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Vlv2TbltDevicePkg: Add PchInitSmm module
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
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5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
d0274122 4# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
5e752084 5#\r
9dc8036d 6# SPDX-License-Identifier: BSD-2-Clause-Patent\r
5e752084 7#\r
8#\r
9#**/\r
10\r
11[Defines]\r
12DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
13DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
14DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
15DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
16DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
17DEFINE FLASH_AREA_SIZE = 0x00800000\r
18\r
19DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
20DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
21DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
22\r
988715a3 23DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 24DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
25\r
988715a3 26DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 27DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
28\r
29\r
988715a3 30DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 31DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
32\r
33!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 34DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 35DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 36DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 37\r
988715a3 38DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 39DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 40DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 41\r
42!endif\r
43\r
988715a3 44DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
45DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000\r
5e752084 46\r
988715a3 47DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000\r
48DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000\r
5e752084 49\r
988715a3 50DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
51DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 52\r
53################################################################################\r
54#\r
55# FD Section\r
56# The [FD] Section is made up of the definition statements and a\r
57# description of what goes into the Flash Device Image. Each FD section\r
58# defines one flash "device" image. A flash device image may be one of\r
59# the following: Removable media bootable image (like a boot floppy\r
60# image,) an Option ROM image (that would be "flashed" into an add-in\r
61# card,) a System "Flash" image (that would be burned into a system's\r
62# flash) or an Update ("Capsule") image that will be used to update and\r
63# existing system flash.\r
64#\r
65################################################################################\r
66[FD.Vlv]\r
67BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
68Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
69ErasePolarity = 1\r
70BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
71NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
72\r
73#\r
74#Flash location override based on actual flash map\r
75#\r
76SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
77SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
78\r
c5a59080
JY		 79SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
80SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
81\r
5e752084 82!if $(MINNOW2_FSP_BUILD) == TRUE\r
83# put below PCD value setting into dsc file\r
84#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
85#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
86#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
87#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
88#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
89#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
90#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
91\r
92!endif\r
93################################################################################\r
94#\r
95# Following are lists of FD Region layout which correspond to the locations of different\r
96# images within the flash device.\r
97#\r
98# Regions must be defined in ascending order and may not overlap.\r
99#\r
100# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
101# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
102# "0x" characters. Like:\r
103# Offset|Size\r
104# PcdOffsetCName|PcdSizeCName\r
105# RegionType <FV, DATA, or FILE>\r
106# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
107#\r
108################################################################################\r
109# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,\r
110# so we hardcode the default value of variable here.\r
111# Please note that we MUST update the binary once the default value is changed.\r
112\r
113#\r
114 # CPU Microcodes\r
115 #\r
116\r
117$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
118gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
119FV = MICROCODE_FV\r
5e752084 120$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
121gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
122FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r
123\r
124$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
125gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
126FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin\r
127\r
128$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
129gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
130FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin\r
131\r
132!if $(MINNOW2_FSP_BUILD) == TRUE\r
133\r
134 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
135 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
07accfe3 136 FILE = Vlv2SocBinPkg/FspBinary/FvFsp.bin\r
5e752084 137\r
138\r
139 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
140 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
141\r
142!endif\r
143\r
144 #\r
145 # Main Block\r
146 #\r
147$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
148gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
149FV = FVMAIN_COMPACT\r
150\r
151 #\r
152 # FV Recovery#2\r
153 #\r
154$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
155gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
156FV = FVRECOVERY2\r
157\r
158 #\r
159 # FV Recovery\r
160 #\r
161$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
162gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
163FV = FVRECOVERY\r
164\r
165################################################################################\r
166#\r
167# FV Section\r
168#\r
169# [FV] section is used to define what components or modules are placed within a flash\r
170# device file. This section also defines order the components and modules are positioned\r
171# within the image. The [FV] section consists of define statements, set statements and\r
172# module statements.\r
173#\r
174################################################################################\r
175[FV.MICROCODE_FV]\r
176BlockSize = $(FLASH_BLOCK_SIZE)\r
177FvAlignment = 16\r
178ERASE_POLARITY = 1\r
179MEMORY_MAPPED = TRUE\r
180STICKY_WRITE = TRUE\r
181LOCK_CAP = TRUE\r
182LOCK_STATUS = FALSE\r
183WRITE_DISABLED_CAP = TRUE\r
184WRITE_ENABLED_CAP = TRUE\r
185WRITE_STATUS = TRUE\r
186WRITE_LOCK_CAP = TRUE\r
187WRITE_LOCK_STATUS = TRUE\r
188READ_DISABLED_CAP = TRUE\r
189READ_ENABLED_CAP = TRUE\r
190READ_STATUS = TRUE\r
191READ_LOCK_CAP = TRUE\r
192READ_LOCK_STATUS = TRUE\r
193\r
194FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
195 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r
196}\r
197\r
c5a59080
JY		 198!if $(RECOVERY_ENABLE)\r
199[FV.FVRECOVERY_COMPONENTS]\r
200FvAlignment = 16 #FV alignment and FV attributes setting.\r
201ERASE_POLARITY = 1\r
202MEMORY_MAPPED = TRUE\r
203STICKY_WRITE = TRUE\r
204LOCK_CAP = TRUE\r
205LOCK_STATUS = TRUE\r
206WRITE_DISABLED_CAP = TRUE\r
207WRITE_ENABLED_CAP = TRUE\r
208WRITE_STATUS = TRUE\r
209WRITE_LOCK_CAP = TRUE\r
210WRITE_LOCK_STATUS = TRUE\r
211READ_DISABLED_CAP = TRUE\r
212READ_ENABLED_CAP = TRUE\r
213READ_STATUS = TRUE\r
214READ_LOCK_CAP = TRUE\r
215READ_LOCK_STATUS = TRUE\r
216\r
217INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
218INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
219INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
220INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
221INF FatPkg/FatPei/FatPei.inf\r
222INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
223INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
224!endif\r
225\r
5e752084 226################################################################################\r
227#\r
228# FV Section\r
229#\r
230# [FV] section is used to define what components or modules are placed within a flash\r
231# device file. This section also defines order the components and modules are positioned\r
232# within the image. The [FV] section consists of define statements, set statements and\r
233# module statements.\r
234#\r
235################################################################################\r
236[FV.FVRECOVERY2]\r
237BlockSize = $(FLASH_BLOCK_SIZE)\r
238FvAlignment = 16 #FV alignment and FV attributes setting.\r
239ERASE_POLARITY = 1\r
240MEMORY_MAPPED = TRUE\r
241STICKY_WRITE = TRUE\r
242LOCK_CAP = TRUE\r
243LOCK_STATUS = TRUE\r
244WRITE_DISABLED_CAP = TRUE\r
245WRITE_ENABLED_CAP = TRUE\r
246WRITE_STATUS = TRUE\r
247WRITE_LOCK_CAP = TRUE\r
248WRITE_LOCK_STATUS = TRUE\r
249READ_DISABLED_CAP = TRUE\r
250READ_ENABLED_CAP = TRUE\r
251READ_STATUS = TRUE\r
252READ_LOCK_CAP = TRUE\r
253READ_LOCK_STATUS = TRUE\r
254FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
255\r
256\r
257\r
258INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
259\r
260!if $(MINNOW2_FSP_BUILD) == FALSE\r
261INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
262INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
263INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
264INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
265INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
266INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
267INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
268INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
5e752084 269!endif\r
270\r
98a88a76 271# INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
5e752084 272!if $(TPM_ENABLED) == TRUE\r
2e886a2e 273INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
5e752084 274INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
275INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
276!endif\r
277!if $(FTPM_ENABLE) == TRUE\r
2e886a2e 278INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config\r
5e752084 279!endif\r
280INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
281\r
282!if $(ACPI50_ENABLE) == TRUE\r
283 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
284!endif\r
285!if $(PERFORMANCE_ENABLE) == TRUE\r
286INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
287!endif\r
288\r
c5a59080
JY		 289!if $(RECOVERY_ENABLE)\r
290FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
291 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
292 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
293 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
294 }\r
295}\r
296!endif\r
297\r
5e752084 298[FV.FVRECOVERY]\r
299BlockSize = $(FLASH_BLOCK_SIZE)\r
300FvAlignment = 16 #FV alignment and FV attributes setting.\r
301ERASE_POLARITY = 1\r
302MEMORY_MAPPED = TRUE\r
303STICKY_WRITE = TRUE\r
304LOCK_CAP = TRUE\r
305LOCK_STATUS = TRUE\r
306WRITE_DISABLED_CAP = TRUE\r
307WRITE_ENABLED_CAP = TRUE\r
308WRITE_STATUS = TRUE\r
309WRITE_LOCK_CAP = TRUE\r
310WRITE_LOCK_STATUS = TRUE\r
311READ_DISABLED_CAP = TRUE\r
312READ_ENABLED_CAP = TRUE\r
313READ_STATUS = TRUE\r
314READ_LOCK_CAP = TRUE\r
315READ_LOCK_STATUS = TRUE\r
316FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
317\r
318\r
319!if $(MINNOW2_FSP_BUILD) == TRUE\r
320INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
321!else\r
322INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
323!endif\r
324\r
325INF MdeModulePkg/Core/Pei/PeiMain.inf\r
326!if $(MINNOW2_FSP_BUILD) == TRUE\r
327INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
328INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
329!endif\r
330INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
331INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
332INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
333\r
334INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
335\r
336!if $(MINNOW2_FSP_BUILD) == FALSE\r
337INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
338!endif\r
339\r
340!if $(FTPM_ENABLE) == TRUE\r
341INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
342!endif\r
343\r
344!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
345 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
346!endif\r
347\r
348\r
349!if $(CAPSULE_ENABLE) == TRUE\r
350INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
351!if $(DXE_ARCHITECTURE) == "X64"\r
352INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
353!endif\r
354!endif\r
355\r
356!if $(MINNOW2_FSP_BUILD) == FALSE\r
357!if $(PCIESC_ENABLE) == TRUE\r
358INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
359!endif\r
360INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
361!endif\r
362\r
363INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
364\r
365[FV.FVMAIN]\r
366BlockSize = $(FLASH_BLOCK_SIZE)\r
367FvAlignment = 16\r
368ERASE_POLARITY = 1\r
369MEMORY_MAPPED = TRUE\r
370STICKY_WRITE = TRUE\r
371LOCK_CAP = TRUE\r
372LOCK_STATUS = TRUE\r
373WRITE_DISABLED_CAP = TRUE\r
374WRITE_ENABLED_CAP = TRUE\r
375WRITE_STATUS = TRUE\r
376WRITE_LOCK_CAP = TRUE\r
377WRITE_LOCK_STATUS = TRUE\r
378READ_DISABLED_CAP = TRUE\r
379READ_ENABLED_CAP = TRUE\r
380READ_STATUS = TRUE\r
381READ_LOCK_CAP = TRUE\r
382READ_LOCK_STATUS = TRUE\r
383FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
384\r
385APRIORI DXE {\r
386 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
387 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
388 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
389 }\r
390\r
391FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
392 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
393 }\r
394\r
395 #\r
396 # EDK II Related Platform codes\r
397 #\r
398\r
399 !if $(MINNOW2_FSP_BUILD) == TRUE\r
400 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
401 !endif\r
402\r
403INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
404INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
405!if $(ACPI50_ENABLE) == TRUE\r
406INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
407INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
408!endif\r
409\r
410\r
411INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
412INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
413INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
414INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
415INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
416INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
86be1a2e 417INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
5e752084 418INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
419INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
07accfe3
ZS		 420!if $(ARCH) == IA32\r
421INF USE=IA32 MdeModulePkg/Logo/Logo.inf\r
422!else\r
98a88a76 423INF USE=X64 MdeModulePkg/Logo/Logo.inf\r
07accfe3 424!endif\r
5e752084 425INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
426INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
427INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
428INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
429\r
430INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
431INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
432INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
433INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
434INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
435!if $(SECURE_BOOT_ENABLE)\r
436INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
437!endif\r
438\r
439INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
440\r
441INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
442INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
443INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
444INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
445\r
446\r
447INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
448\r
449!if $(DATAHUB_ENABLE) == TRUE\r
450INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
451!endif\r
452INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
453INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
454\r
455INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
456\r
457 #\r
458 # EDK II Related Silicon codes\r
459 #\r
460INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
461\r
462!if $(USE_HPET_TIMER) == TRUE\r
463INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
464!else\r
465INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
466!endif\r
467INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
468\r
469INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
470\r
471INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
472INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
473\r
474!if $(MINNOW2_FSP_BUILD) == FALSE\r
475INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
76386f42 476INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitSmm.inf\r
5e752084 477!endif\r
478INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
479!if $(PCIESC_ENABLE) == TRUE\r
480INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
481!endif\r
482\r
483INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
484INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
486INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
487INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
488!if $(MINNOW2_FSP_BUILD) == FALSE\r
489INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
490!else\r
491INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
492INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
493!endif\r
494!if $(MINNOW2_FSP_BUILD) == FALSE\r
495 !if $(SEC_ENABLE) == TRUE\r
496 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
497 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
498 !endif\r
499!endif\r
500!if $(TPM_ENABLED) == TRUE\r
501INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
502INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
503INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
504!endif\r
505!if $(FTPM_ENABLE) == TRUE\r
506INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
507INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
508INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
2e886a2e 509INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf\r
5e752084 510INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
511!endif\r
512\r
513#\r
514# EDK II Related Platform codes\r
515#\r
516INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
517INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
518INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
519INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
520INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
521INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
522INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
523INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
524INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
525!if $(GOP_DRIVER_ENABLE) == TRUE\r
526 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
527 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
528 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
07accfe3 529 SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
5e752084 530 SECTION UI = "IntelGopDriver"\r
531}\r
532!endif\r
533\r
534INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
535 #\r
536 # SMM\r
537 #\r
538INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
539INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 540INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 541\r
542INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
543INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 544INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 545INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
97e862bb
MK		 546\r
547#\r
548# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell\r
549#\r
550#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
551#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
552\r
5e752084 553 #\r
554 # ACPI\r
555 #\r
556INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
557INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
558INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
559INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
560\r
561INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
562\r
563INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
564\r
98a88a76
KM		 565INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf\r
566\r
5e752084 567 #\r
568 # PCI\r
569 #\r
570INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
571\r
572INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
573\r
574\r
575#\r
576# ISA\r
577#\r
578INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
579INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
580INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
581!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
582INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
583!endif\r
584#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
585#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
586\r
587#\r
588# SDIO\r
589#\r
98a88a76
KM		 590#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
591#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
5e752084 592#\r
593# IDE/SCSI/AHCI\r
594#\r
595INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
596\r
597INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
598\r
599INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
600!if $(SATA_ENABLE) == TRUE\r
601INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
602#\r
603\r
604#\r
605INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
606INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
607!if $(SCSI_ENABLE) == TRUE\r
608INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
609INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
610!endif\r
611#\r
612!endif\r
613# Console\r
614#\r
615INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
616INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
617INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
618INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
619INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
620INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
621INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
622INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
623 #\r
624 # USB\r
625 #\r
626!if $(USB_ENABLE) == TRUE\r
627INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
628INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
629INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
630INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
631INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
632INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
633INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
634!endif\r
635\r
5e752084 636 #\r
637 # SMBIOS\r
638 #\r
639INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
640INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
641\r
642INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
643\r
5e752084 644\r
645#\r
646# FAT file system\r
647#\r
648INF FatPkg/EnhancedFatDxe/Fat.inf\r
649\r
650#\r
651# UEFI Shell\r
652#\r
2840bb51 653INF ShellPkg/Application/Shell/Shell.inf\r
5e752084 654\r
7a0e4f8e
RN		 655#\r
656# dp command\r
657#\r
658!if $(PERFORMANCE_ENABLE) == TRUE\r
659INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
660!endif\r
5e752084 661\r
662!if $(GOP_DRIVER_ENABLE) == TRUE\r
663FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
07accfe3 664 SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
5e752084 665 SECTION UI = "IntelGopVbt"\r
666}\r
667!endif\r
668\r
669#\r
670# Network Modules\r
671#\r
672!if $(NETWORK_ENABLE) == TRUE\r
673 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
07accfe3 674 SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
5e752084 675 SECTION UI = "UNDI"\r
676 }\r
677 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
678 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
679 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
680 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
681 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
682 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
683 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
684 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
5f137127
FS		 685 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
686 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
5e752084 687 !if $(NETWORK_IP6_ENABLE) == TRUE\r
688 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
689 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
5e752084 690 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
691 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
692 !endif\r
5e752084 693 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
694 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
695 !endif\r
696 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
5e752084 697 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
5e752084 698 !endif\r
699!endif\r
700\r
c5a59080 701!if $(CAPSULE_ENABLE)\r
1aa9314e
MK		 702INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
703\r
704#\r
705# Minnow Max System Firmware FMP\r
706#\r
707INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
708\r
709#\r
710# Sample Device FMP\r
711#\r
712INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
713INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
714INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
715\r
c5a59080 716!endif\r
1aa9314e 717\r
c5a59080 718!if $(MICOCODE_CAPSULE_ENABLE)\r
1aa9314e 719INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
c5a59080
JY		 720!endif\r
721\r
722!if $(RECOVERY_ENABLE)\r
723FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
724 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
725 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
726 }\r
727!endif\r
c5a59080 728\r
5e752084 729[FV.FVMAIN_COMPACT]\r
730BlockSize = $(FLASH_BLOCK_SIZE)\r
731FvAlignment = 16\r
732ERASE_POLARITY = 1\r
733MEMORY_MAPPED = TRUE\r
734STICKY_WRITE = TRUE\r
735LOCK_CAP = TRUE\r
736LOCK_STATUS = TRUE\r
737WRITE_DISABLED_CAP = TRUE\r
738WRITE_ENABLED_CAP = TRUE\r
739WRITE_STATUS = TRUE\r
740WRITE_LOCK_CAP = TRUE\r
741WRITE_LOCK_STATUS = TRUE\r
742READ_DISABLED_CAP = TRUE\r
743READ_ENABLED_CAP = TRUE\r
744READ_STATUS = TRUE\r
745READ_LOCK_CAP = TRUE\r
746READ_LOCK_STATUS = TRUE\r
747\r
748\r
749\r
750FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
751!if $(LZMA_ENABLE) == TRUE\r
752# LZMA Compress\r
753 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
754 SECTION FV_IMAGE = FVMAIN\r
755 }\r
756!else\r
757!if $(DXE_COMPRESS_ENABLE) == TRUE\r
758# Tiano Compress\r
759 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
760 SECTION FV_IMAGE = FVMAIN\r
761 }\r
762!else\r
763# No Compress\r
764 SECTION COMPRESS PI_NONE {\r
765 SECTION FV_IMAGE = FVMAIN\r
766 }\r
767!endif\r
768!endif\r
769 }\r
770\r
771[FV.SETUP_DATA]\r
772BlockSize = $(FLASH_BLOCK_SIZE)\r
773#NumBlocks = 0x10\r
774FvAlignment = 16\r
775ERASE_POLARITY = 1\r
776MEMORY_MAPPED = TRUE\r
777STICKY_WRITE = TRUE\r
778LOCK_CAP = TRUE\r
779LOCK_STATUS = TRUE\r
780WRITE_DISABLED_CAP = TRUE\r
781WRITE_ENABLED_CAP = TRUE\r
782WRITE_STATUS = TRUE\r
783WRITE_LOCK_CAP = TRUE\r
784WRITE_LOCK_STATUS = TRUE\r
785READ_DISABLED_CAP = TRUE\r
786READ_ENABLED_CAP = TRUE\r
787READ_STATUS = TRUE\r
788READ_LOCK_CAP = TRUE\r
789READ_LOCK_STATUS = TRUE\r
790\r
5e752084 791################################################################################\r
792#\r
793# Rules are use with the [FV] section's module INF type to define\r
794# how an FFS file is created for a given INF file. The following Rule are the default\r
795# rules for the different module type. User can add the customized rules to define the\r
796# content of the FFS file.\r
797#\r
798################################################################################\r
799[Rule.Common.SEC]\r
800 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
801 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
802 RAW BIN Align = 16 |.com\r
803 }\r
804\r
805[Rule.Common.SEC.BINARY]\r
806 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
807 PE32 PE32 Align = 8 |.efi\r
584fcb7d
WD		 808!if $(MINNOW2_FSP_BUILD) == TRUE\r
809 RAW RAW |.raw\r
810!else\r
811 RAW BIN Align = 16 |.com\r
812!endif\r
5e752084 813 }\r
814\r
815[Rule.Common.PEI_CORE]\r
816 FILE PEI_CORE = $(NAMED_GUID) {\r
817 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
818 UI STRING="$(MODULE_NAME)" Optional\r
819 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
820 }\r
821\r
822[Rule.Common.PEIM]\r
823 FILE PEIM = $(NAMED_GUID) {\r
824 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
825 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
826 UI STRING="$(MODULE_NAME)" Optional\r
827 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
828 }\r
829\r
830[Rule.Common.PEIM.BINARY]\r
831 FILE PEIM = $(NAMED_GUID) {\r
832 PEI_DEPEX PEI_DEPEX Optional |.depex\r
833 PE32 PE32 Align = Auto |.efi\r
834 UI STRING="$(MODULE_NAME)" Optional\r
835 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
836 }\r
837\r
838[Rule.Common.PEIM.BIOSID]\r
839 FILE PEIM = $(NAMED_GUID) {\r
840 RAW BIN BiosId.bin\r
841 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
842 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
843 UI STRING="$(MODULE_NAME)" Optional\r
844 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
845 }\r
846\r
847[Rule.Common.USER_DEFINED.APINIT]\r
848 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
849 RAW SEC_BIN |.com\r
850 }\r
851#cjia 2011-07-21\r
852[Rule.Common.USER_DEFINED.LEGACY16]\r
853 FILE FREEFORM = $(NAMED_GUID) {\r
854 UI STRING="$(MODULE_NAME)" Optional\r
855 RAW BIN |.bin\r
856 }\r
857#cjia\r
858\r
859[Rule.Common.USER_DEFINED.ASM16]\r
860 FILE FREEFORM = $(NAMED_GUID) {\r
861 UI STRING="$(MODULE_NAME)" Optional\r
862 RAW BIN |.com\r
863 }\r
864\r
865[Rule.Common.DXE_CORE]\r
866 FILE DXE_CORE = $(NAMED_GUID) {\r
867 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
868 UI STRING="$(MODULE_NAME)" Optional\r
869 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
870 }\r
871\r
872[Rule.Common.UEFI_DRIVER]\r
873 FILE DRIVER = $(NAMED_GUID) {\r
874 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
875 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
876 UI STRING="$(MODULE_NAME)" Optional\r
877 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
878 }\r
879\r
880[Rule.Common.UEFI_DRIVER.BINARY]\r
881 FILE DRIVER = $(NAMED_GUID) {\r
882 DXE_DEPEX DXE_DEPEX Optional |.depex\r
883 PE32 PE32 |.efi\r
884 UI STRING="$(MODULE_NAME)" Optional\r
885 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
886 }\r
887\r
888[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
889 FILE DRIVER = $(NAMED_GUID) {\r
890 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
891 PE32 PE32 |.efi\r
892 UI STRING="$(MODULE_NAME)" Optional\r
893 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
894 }\r
895\r
896[Rule.Common.DXE_DRIVER]\r
897 FILE DRIVER = $(NAMED_GUID) {\r
898 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
899 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
900 UI STRING="$(MODULE_NAME)" Optional\r
901 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
902 }\r
903\r
904[Rule.Common.DXE_DRIVER.BINARY]\r
905 FILE DRIVER = $(NAMED_GUID) {\r
906 DXE_DEPEX DXE_DEPEX Optional |.depex\r
907 PE32 PE32 |.efi\r
908 UI STRING="$(MODULE_NAME)" Optional\r
909 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
910 }\r
911\r
912[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
913 FILE DRIVER = $(NAMED_GUID) {\r
914 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
915 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
916 UI STRING="$(MODULE_NAME)" Optional\r
917 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
918 RAW ACPI Optional |.acpi\r
919 RAW ASL Optional |.aml\r
920 }\r
921\r
922[Rule.Common.DXE_RUNTIME_DRIVER]\r
923 FILE DRIVER = $(NAMED_GUID) {\r
924 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
925 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
926 UI STRING="$(MODULE_NAME)" Optional\r
927 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
928 }\r
929\r
930[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
931 FILE DRIVER = $(NAMED_GUID) {\r
932 DXE_DEPEX DXE_DEPEX Optional |.depex\r
933 PE32 PE32 |.efi\r
934 UI STRING="$(MODULE_NAME)" Optional\r
935 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
936 }\r
937\r
938[Rule.Common.DXE_SMM_DRIVER]\r
939 FILE SMM = $(NAMED_GUID) {\r
940 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
941 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
942 UI STRING="$(MODULE_NAME)" Optional\r
943 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
944 }\r
945\r
946[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
947 FILE SMM = $(NAMED_GUID) {\r
948 SMM_DEPEX SMM_DEPEX |.depex\r
949 PE32 PE32 |.efi\r
950 RAW BIN Optional |.aml\r
951 UI STRING="$(MODULE_NAME)" Optional\r
952 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
953 }\r
954\r
955[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
956 FILE SMM = $(NAMED_GUID) {\r
957 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
958 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
959 UI STRING="$(MODULE_NAME)" Optional\r
960 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
961 RAW ACPI Optional |.acpi\r
962 RAW ASL Optional |.aml\r
963 }\r
964\r
965[Rule.Common.SMM_CORE]\r
966 FILE SMM_CORE = $(NAMED_GUID) {\r
967 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
968 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
969 UI STRING="$(MODULE_NAME)" Optional\r
970 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
971 }\r
972\r
973[Rule.Common.SMM_CORE.BINARY]\r
974 FILE SMM_CORE = $(NAMED_GUID) {\r
975 DXE_DEPEX DXE_DEPEX Optional |.depex\r
976 PE32 PE32 |.efi\r
977 UI STRING="$(MODULE_NAME)" Optional\r
978 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
979 }\r
980\r
981[Rule.Common.UEFI_APPLICATION]\r
982 FILE APPLICATION = $(NAMED_GUID) {\r
983 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
984 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
985 UI STRING="$(MODULE_NAME)" Optional\r
986 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
987 }\r
988\r
989[Rule.Common.UEFI_APPLICATION.UI]\r
990 FILE APPLICATION = $(NAMED_GUID) {\r
991 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
992 UI STRING="Enter Setup"\r
993 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
994 }\r
995\r
996[Rule.Common.USER_DEFINED]\r
997 FILE FREEFORM = $(NAMED_GUID) {\r
998 UI STRING="$(MODULE_NAME)" Optional\r
999 RAW BIN |.bin\r
1000 }\r
1001\r
98a88a76
KM		 1002[Rule.Common.USER_DEFINED.BINARY]\r
1003 FILE FREEFORM = $(NAMED_GUID) {\r
1004 UI STRING="$(MODULE_NAME)" Optional\r
1005 RAW BIN |.bin\r
1006 }\r
1007\r
5e752084 1008[Rule.Common.USER_DEFINED.ACPITABLE]\r
1009 FILE FREEFORM = $(NAMED_GUID) {\r
1010 RAW ACPI Optional |.acpi\r
1011 RAW ASL Optional |.aml\r
1012 }\r
1013\r
1014[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1015 FILE FREEFORM = $(NAMED_GUID) {\r
1016 RAW ASL Optional |.aml\r
1017 }\r
1018\r
1019[Rule.Common.ACPITABLE]\r
1020 FILE FREEFORM = $(NAMED_GUID) {\r
1021 RAW ACPI Optional |.acpi\r
1022 RAW ASL Optional |.aml\r
1023 }\r
1024\r
c5a59080
JY		 1025[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
1026 FILE PEIM = $(NAMED_GUID) {\r
1027 RAW BIN |.acpi\r
1028 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1029 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1030 UI STRING="$(MODULE_NAME)" Optional\r
1031 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1032 }\r
EFI Development Kit II mirror for PVE