ArmPlatformPkg/ArmVExpressLibRTSM: Added support for the additional 6GB memory of...

The FVP Foundation model has additional DRAM regions at 0x08_8000_0000.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15464 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundationMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundationMem.c
index 69d62554c5cd7ea4d8d6734b96161e60f57445b6..863767c84dd178040cb589ccd7fc7a637ee0f035 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundationMem.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMFoundationMem.c
@@ -1,6 +1,6 @@
 /** @file\r
 *\r
 /** @file\r
 *\r

-*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r

 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r


@@ -14,13 +14,14 @@
 \r
 #include <Library/ArmPlatformLib.h>\r
 #include <Library/DebugLib.h>\r
 \r
 #include <Library/ArmPlatformLib.h>\r
 #include <Library/DebugLib.h>\r

+#include <Library/HobLib.h>\r

 #include <Library/PcdLib.h>\r
 #include <Library/IoLib.h>\r
 #include <Library/MemoryAllocationLib.h>\r
 #include <ArmPlatform.h>\r
 \r
 #include <Library/PcdLib.h>\r
 #include <Library/IoLib.h>\r
 #include <Library/MemoryAllocationLib.h>\r
 #include <ArmPlatform.h>\r
 \r

-// Number of Virtual Memory Map Descriptors without a Logic Tile\r
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS          4\r
+// Number of Virtual Memory Map Descriptors\r
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS          5\r

 \r
 // DDR attributes\r
 #define DDR_ATTRIBUTES_CACHED           ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
 \r
 // DDR attributes\r
 #define DDR_ATTRIBUTES_CACHED           ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r


@@ -42,11 +43,33 @@ ArmPlatformGetVirtualMemoryMap (
   )\r
 {\r
   ARM_MEMORY_REGION_ATTRIBUTES  CacheAttributes;\r
   )\r
 {\r
   ARM_MEMORY_REGION_ATTRIBUTES  CacheAttributes;\r

+  EFI_RESOURCE_ATTRIBUTE_TYPE   ResourceAttributes;\r

   UINTN                         Index = 0;\r
   ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;\r
   UINTN                         Index = 0;\r
   ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;\r

+  EFI_VIRTUAL_ADDRESS           SparseMemoryBase;\r
+  UINT64                        SparseMemorySize;\r

 \r
   ASSERT(VirtualMemoryMap != NULL);\r
 \r
 \r
   ASSERT(VirtualMemoryMap != NULL);\r
 \r

+  ResourceAttributes =\r
+      EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
+      EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
+      EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
+      EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
+      EFI_RESOURCE_ATTRIBUTE_TESTED;\r
+\r
+  // Declared the additional DRAM from 2GB to 8GB\r
+  SparseMemoryBase = 0x0880000000;\r
+  SparseMemorySize = SIZE_2GB + SIZE_4GB;\r
+\r
+  BuildResourceDescriptorHob (\r
+      EFI_RESOURCE_SYSTEM_MEMORY,\r
+      ResourceAttributes,\r
+      SparseMemoryBase,\r
+      SparseMemorySize);\r
+\r

   VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r
   if (VirtualMemoryTable == NULL) {\r
       return;\r
   VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r
   if (VirtualMemoryTable == NULL) {\r
       return;\r


@@ -76,6 +99,12 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length       = 2 * ARM_VE_SMB_PERIPH_SZ;\r
   VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
 \r
   VirtualMemoryTable[Index].Length       = 2 * ARM_VE_SMB_PERIPH_SZ;\r
   VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
 \r

+  // Map sparse memory region if present\r
+  VirtualMemoryTable[++Index].PhysicalBase = SparseMemoryBase;\r
+  VirtualMemoryTable[Index].VirtualBase    = SparseMemoryBase;\r
+  VirtualMemoryTable[Index].Length         = SparseMemorySize;\r
+  VirtualMemoryTable[Index].Attributes     = CacheAttributes;\r
+\r

   // End of Table\r
   VirtualMemoryTable[++Index].PhysicalBase = 0;\r
   VirtualMemoryTable[Index].VirtualBase  = 0;\r
   // End of Table\r
   VirtualMemoryTable[++Index].PhysicalBase = 0;\r
   VirtualMemoryTable[Index].VirtualBase  = 0;\r