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00c5eed)
Rename the variable to "gPatchSmmCr3" so that its association with
PatchInstructionX86() is clear from the declaration, change its type to
X86_ASSEMBLY_PATCH_LABEL, and patch it with PatchInstructionX86(). This
lets us remove the binary (DB) encoding of some instructions in
"SmmInit.nasm".
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
extern ASM_PFX(mRebasedFlag)\r
extern ASM_PFX(mSmmRelocationOriginalAddress)\r
\r
extern ASM_PFX(mRebasedFlag)\r
extern ASM_PFX(mSmmRelocationOriginalAddress)\r
\r
-global ASM_PFX(gSmmCr3)\r
+global ASM_PFX(gPatchSmmCr3)\r
global ASM_PFX(gSmmCr4)\r
global ASM_PFX(gSmmCr0)\r
global ASM_PFX(gSmmJmpAddr)\r
global ASM_PFX(gSmmCr4)\r
global ASM_PFX(gSmmCr0)\r
global ASM_PFX(gSmmJmpAddr)\r
mov ebx, edx ; rdmsr will change edx. keep it in ebx.\r
and ebx, BIT20 ; extract NX capability bit\r
shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position\r
mov ebx, edx ; rdmsr will change edx. keep it in ebx.\r
and ebx, BIT20 ; extract NX capability bit\r
shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position\r
- DB 0x66, 0xb8 ; mov eax, imm32\r
-ASM_PFX(gSmmCr3): DD 0\r
+ mov eax, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr3):\r
mov cr3, eax\r
o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
DB 0x66, 0xb8 ; mov eax, imm32\r
mov cr3, eax\r
o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
DB 0x66, 0xb8 ; mov eax, imm32\r
// Patch ASM code template with current CR0, CR3, and CR4 values\r
//\r
gSmmCr0 = (UINT32)AsmReadCr0 ();\r
// Patch ASM code template with current CR0, CR3, and CR4 values\r
//\r
gSmmCr0 = (UINT32)AsmReadCr0 ();\r
- gSmmCr3 = (UINT32)AsmReadCr3 ();\r
+ PatchInstructionX86 (gPatchSmmCr3, AsmReadCr3 (), 4);\r
gSmmCr4 = (UINT32)AsmReadCr4 ();\r
\r
//\r
gSmmCr4 = (UINT32)AsmReadCr4 ();\r
\r
//\r
extern CONST UINT8 gcSmmInitTemplate[];\r
extern CONST UINT16 gcSmmInitSize;\r
extern UINT32 gSmmCr0;\r
extern CONST UINT8 gcSmmInitTemplate[];\r
extern CONST UINT16 gcSmmInitSize;\r
extern UINT32 gSmmCr0;\r
-extern UINT32 gSmmCr3;\r
+X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;\r
extern UINT32 gSmmCr4;\r
extern UINTN gSmmInitStack;\r
\r
extern UINT32 gSmmCr4;\r
extern UINTN gSmmInitStack;\r
\r
extern ASM_PFX(mRebasedFlag)\r
extern ASM_PFX(mSmmRelocationOriginalAddress)\r
\r
extern ASM_PFX(mRebasedFlag)\r
extern ASM_PFX(mSmmRelocationOriginalAddress)\r
\r
-global ASM_PFX(gSmmCr3)\r
+global ASM_PFX(gPatchSmmCr3)\r
global ASM_PFX(gSmmCr4)\r
global ASM_PFX(gSmmCr0)\r
global ASM_PFX(gSmmJmpAddr)\r
global ASM_PFX(gSmmCr4)\r
global ASM_PFX(gSmmCr0)\r
global ASM_PFX(gSmmJmpAddr)\r
mov eax, 0x80000001 ; read capability\r
cpuid\r
mov ebx, edx ; rdmsr will change edx. keep it in ebx.\r
mov eax, 0x80000001 ; read capability\r
cpuid\r
mov ebx, edx ; rdmsr will change edx. keep it in ebx.\r
- DB 0x66, 0xb8 ; mov eax, imm32\r
-ASM_PFX(gSmmCr3): DD 0\r
+ mov eax, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr3):\r
mov cr3, eax\r
o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
DB 0x66, 0xb8 ; mov eax, imm32\r
mov cr3, eax\r
o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
DB 0x66, 0xb8 ; mov eax, imm32\r