#include <Library/UefiBootServicesTableLib.h>\r
\r
#include <Protocol/Cpu.h>\r
+#include <Protocol/EdidDiscovered.h>\r
+#include <Protocol/EdidActive.h>\r
\r
#include <ArmPlatform.h>\r
\r
\r
\r
LCD_RESOLUTION mResolutions[] = {\r
- { // Mode 0 : VGA : 640 x 480 x 24 bpp\r
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,\r
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
- },\r
- { // Mode 1 : SVGA : 800 x 600 x 24 bpp\r
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,\r
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
- },\r
- { // Mode 2 : XGA : 1024 x 768 x 24 bpp\r
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,\r
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
- },\r
- { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp\r
- SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),\r
- SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,\r
- SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH\r
- },\r
- { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp\r
- UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),\r
- UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,\r
- UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH\r
- },\r
- { // Mode 5 : HD : 1920 x 1080 x 24 bpp\r
- HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),\r
- HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,\r
- HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH\r
- },\r
- { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)\r
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY,\r
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
- },\r
- { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)\r
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY,\r
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
- },\r
- { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)\r
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY,\r
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
- },\r
- { // Mode 9 : VGA : 640 x 480 x 15 bpp\r
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY,\r
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
- },\r
- { // Mode 10 : SVGA : 800 x 600 x 15 bpp\r
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY,\r
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
- },\r
- { // Mode 11 : XGA : 1024 x 768 x 15 bpp\r
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY,\r
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
- },\r
- { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings\r
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000,\r
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
- },\r
- { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)\r
- VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY,\r
- VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
- VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
- },\r
- { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)\r
- SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY,\r
- SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
- SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
- },\r
- { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)\r
- XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY,\r
- XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
- XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
- }\r
+ { // Mode 0 : VGA : 640 x 480 x 24 bpp\r
+ VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,\r
+ VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+ VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 1 : SVGA : 800 x 600 x 24 bpp\r
+ SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,\r
+ SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+ SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 2 : XGA : 1024 x 768 x 24 bpp\r
+ XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,\r
+ XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+ XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp\r
+ SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),\r
+ SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,\r
+ SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp\r
+ UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),\r
+ UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,\r
+ UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 5 : HD : 1920 x 1080 x 24 bpp\r
+ HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),\r
+ HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,\r
+ HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH\r
+ },\r
+ { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)\r
+ VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY,\r
+ VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+ VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)\r
+ SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY,\r
+ SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+ SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)\r
+ XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY,\r
+ XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+ XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 9 : VGA : 640 x 480 x 15 bpp\r
+ VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY,\r
+ VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+ VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 10 : SVGA : 800 x 600 x 15 bpp\r
+ SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY,\r
+ SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+ SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 11 : XGA : 1024 x 768 x 15 bpp\r
+ XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY,\r
+ XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+ XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings\r
+ XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000,\r
+ XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+ XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)\r
+ VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY,\r
+ VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+ VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)\r
+ SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY,\r
+ SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+ SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+ },\r
+ { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)\r
+ XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY,\r
+ XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+ XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+ }\r
+};\r
+\r
+EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = {\r
+ 0,\r
+ NULL\r
};\r
\r
+EFI_EDID_ACTIVE_PROTOCOL mEdidActive = {\r
+ 0,\r
+ NULL\r
+};\r
+\r
+\r
EFI_STATUS\r
LcdPlatformInitializeDisplay (\r
- VOID\r
- ) {\r
+ IN EFI_HANDLE Handle\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+\r
// Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard\r
- return ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);\r
+ Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);\r
+ if (!EFI_ERROR(Status)) {\r
+ // Install the EDID Protocols\r
+ Status = gBS->InstallMultipleProtocolInterfaces(\r
+ &Handle,\r
+ &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered,\r
+ &gEfiEdidActiveProtocolGuid, &mEdidActive,\r
+ NULL\r
+ );\r
+ }\r
+\r
+ return Status;\r
}\r
\r
EFI_STATUS\r