# These PCDs should be FeaturePcds. But we used these PCDs as an '#if' in an ASM file.
# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|0|UINT32|0x00000003
+ gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores|1|UINT32|0x0000002D
# Stack for CPU Cores in Secure Mode
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT32|0x00000005
# Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
- # Size of the region reserved for fixed address allocations (Reserved 128MB by default)
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize|0x08000000|UINT32|0x00000014
-
# Size to reserve in the primary core stack for PEI Global Variables
# = sizeof(UINTN) /* PcdPeiServicePtr or HobListPtr */
gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize|0x4|UINT32|0x00000016
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1
+ gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores|2
# Stacks for MPCores in Secure World
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000 # Top of SEC Stack for Secure World
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1
+ gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores|4
gArmTokenSpaceGuid.PcdVFPEnabled|1
# Stacks for MPCores in Secure World
IN UINT64 UefiMemorySize\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;\r
- ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR* EfiMemoryMap;\r
- UINTN Index;\r
- EFI_PHYSICAL_ADDRESS SystemMemoryTop;\r
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;\r
+ UINT64 ResourceLength;\r
+ EFI_PEI_HOB_POINTERS NextHob;\r
+ EFI_PHYSICAL_ADDRESS FdTop;\r
+ EFI_PHYSICAL_ADDRESS SystemMemoryTop;\r
+ EFI_PHYSICAL_ADDRESS ResourceTop;\r
+ BOOLEAN Found;\r
\r
// Ensure PcdSystemMemorySize has been set\r
ASSERT (PcdGet32 (PcdSystemMemorySize) != 0);\r
\r
- SystemMemoryTop = (EFI_PHYSICAL_ADDRESS)((UINT32)PcdGet32 (PcdSystemMemoryBase) + (UINT32)PcdGet32 (PcdSystemMemorySize));\r
-\r
//\r
// Now, the permanent memory has been installed, we can call AllocatePages()\r
//\r
- Attributes = (\r
+ ResourceAttributes = (\r
EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
EFI_RESOURCE_ATTRIBUTE_TESTED\r
);\r
\r
- // If it is not a standalone build we must reserved the space above the base address of the firmware volume\r
- if (!PcdGet32(PcdStandalone)) {\r
- // Check if firmware volume has not be copied at the top of DRAM then we must reserve the extra space\r
- // between the firmware and the top\r
- if (SystemMemoryTop != PcdGet32 (PcdNormalFdBaseAddress) + PcdGet32 (PcdNormalFdSize)) {\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED),\r
- PcdGet32 (PcdNormalFdBaseAddress) + PcdGet32 (PcdNormalFdSize),\r
- SystemMemoryTop - (PcdGet32 (PcdNormalFdBaseAddress) + PcdGet32 (PcdNormalFdSize))\r
- );\r
- }\r
-\r
- // Reserved the memory space occupied by the firmware volume\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT),\r
- (UINT32)PcdGet32 (PcdNormalFdBaseAddress),\r
- (UINT32)PcdGet32 (PcdNormalFdSize)\r
- );\r
- }\r
-\r
- // Check there is no overlap between UEFI and Fix Address Regions\r
- ASSERT (PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemoryFixRegionSize) <= UefiMemoryBase);\r
-\r
- // Reserved the UEFI Memory Region\r
+ // Reserved the memory space occupied by the firmware volume\r
BuildResourceDescriptorHob (\r
EFI_RESOURCE_SYSTEM_MEMORY,\r
- Attributes,\r
- UefiMemoryBase,\r
- UefiMemorySize\r
- );\r
-\r
- // Reserved the Fix Address Region\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- Attributes,\r
+ ResourceAttributes,\r
PcdGet32 (PcdSystemMemoryBase),\r
- PcdGet32 (PcdSystemMemoryFixRegionSize)\r
+ PcdGet32 (PcdSystemMemorySize)\r
);\r
\r
- // Reserved the memory between UEFI and Fix Address regions\r
- if (PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemoryFixRegionSize) != UefiMemoryBase) {\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED),\r
- PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemoryFixRegionSize),\r
- UefiMemoryBase - (PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemoryFixRegionSize))\r
- );\r
- }\r
-\r
- // If a platform has system memory extensions, it can declare those in this function\r
- Status = ArmPlatformGetAdditionalSystemMemory (&EfiMemoryMap);\r
- if (!EFI_ERROR(Status)) {\r
- // Install the EFI Memory Map\r
- for (Index = 0; EfiMemoryMap[Index].ResourceAttribute != 0; Index++) {\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- EfiMemoryMap[Index].ResourceAttribute,\r
- EfiMemoryMap[Index].PhysicalStart,\r
- EfiMemoryMap[Index].NumberOfBytes\r
- );\r
+ SystemMemoryTop = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize);\r
+ FdTop = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);\r
+\r
+ // EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE\r
+ // core to overwrite this area we must mark the region with the attribute non-present\r
+ if ((PcdGet32 (PcdNormalFdBaseAddress) >= PcdGet32 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {\r
+ Found = FALSE;\r
+\r
+ // Search for System Memory Hob that contains the firmware\r
+ NextHob.Raw = GetHobList ();\r
+ while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {\r
+ if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r
+ (PcdGet32(PcdNormalFdBaseAddress) >= NextHob.ResourceDescriptor->PhysicalStart) &&\r
+ (FdTop <= NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength))\r
+ {\r
+ ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;\r
+ ResourceLength = NextHob.ResourceDescriptor->ResourceLength;\r
+ ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;\r
+\r
+ if (PcdGet32(PcdNormalFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {\r
+ if (SystemMemoryTop == FdTop) {\r
+ NextHob.ResourceDescriptor->ResourceAttribute = ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT;\r
+ } else {\r
+ // Create the System Memory HOB for the firmware with the non-present attribute\r
+ BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
+ ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,\r
+ PcdGet32(PcdNormalFdBaseAddress),\r
+ PcdGet32(PcdNormalFdSize));\r
+\r
+ // Top of the FD is system memory available for UEFI\r
+ NextHob.ResourceDescriptor->PhysicalStart += PcdGet32(PcdNormalFdSize);\r
+ NextHob.ResourceDescriptor->ResourceLength -= PcdGet32(PcdNormalFdSize);\r
+ }\r
+ } else {\r
+ // Create the System Memory HOB for the firmware with the non-present attribute\r
+ BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
+ ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,\r
+ PcdGet32(PcdNormalFdBaseAddress),\r
+ PcdGet32(PcdNormalFdSize));\r
+\r
+ // Update the HOB\r
+ NextHob.ResourceDescriptor->ResourceLength = PcdGet32(PcdNormalFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;\r
+\r
+ // If there is some memory available on the top of the FD then create a HOB\r
+ if (FdTop < NextHob.ResourceDescriptor->PhysicalStart + ResourceLength) {\r
+ // Create the System Memory HOB for the remaining region (top of the FD)\r
+ BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
+ ResourceAttributes,\r
+ FdTop,\r
+ ResourceTop - FdTop);\r
+ }\r
+ }\r
+ Found = TRUE;\r
+ break;\r
+ }\r
+ NextHob.Raw = GET_NEXT_HOB (NextHob);\r
}\r
- FreePool (EfiMemoryMap);\r
+\r
+ ASSERT(Found);\r
}\r
\r
// Build Memory Allocation Hob\r
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdStandalone
-
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
)\r
{\r
EFI_STATUS Status;\r
+ UINTN SystemMemoryBase;\r
UINTN SystemMemoryTop;\r
+ UINTN FdBase;\r
+ UINTN FdTop;\r
UINTN UefiMemoryBase;\r
\r
DEBUG ((EFI_D_ERROR, "Memory Init PEIM Loaded\n"));\r
// Ensure PcdSystemMemorySize has been set\r
ASSERT (FixedPcdGet32 (PcdSystemMemorySize) != 0);\r
\r
- SystemMemoryTop = (UINTN)FixedPcdGet32 (PcdSystemMemoryBase) + (UINTN)FixedPcdGet32 (PcdSystemMemorySize);\r
+ SystemMemoryBase = (UINTN)FixedPcdGet32 (PcdSystemMemoryBase);\r
+ SystemMemoryTop = SystemMemoryBase + (UINTN)FixedPcdGet32 (PcdSystemMemorySize);\r
+ FdBase = (UINTN)PcdGet32 (PcdNormalFdBaseAddress);\r
+ FdTop = FdBase + (UINTN)PcdGet32 (PcdNormalFdSize);\r
\r
//\r
// Initialize the System Memory (DRAM)\r
//\r
- if (PcdGet32 (PcdStandalone)) {\r
- // In case of a standalone version, the DRAM is already initialized\r
- ArmPlatformInitializeSystemMemory();\r
+ if (!FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {\r
+ // In case the DRAM has not been initialized by the secure firmware\r
+ ArmPlatformInitializeSystemMemory ();\r
}\r
\r
//\r
// Declare the UEFI memory to PEI\r
//\r
- if (PcdGet32 (PcdStandalone)) {\r
- // In case of standalone UEFI, we set the UEFI memory region at the top of the DRAM\r
- UefiMemoryBase = SystemMemoryTop - FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);\r
+\r
+ // In case the firmware has been shadowed in the System Memory\r
+ if ((FdBase >= SystemMemoryBase) && (FdTop <= SystemMemoryTop)) {\r
+ // Check if there is enough space between the top of the system memory and the top of the\r
+ // firmware to place the UEFI memory (for PEI & DXE phases)\r
+ if (SystemMemoryTop - FdTop >= FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)) {\r
+ UefiMemoryBase = SystemMemoryTop - FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);\r
+ } else {\r
+ // Check there is enough space for the UEFI memory\r
+ ASSERT (SystemMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize) <= FdBase);\r
+\r
+ UefiMemoryBase = FdBase - FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);\r
+ }\r
} else {\r
- // In case of a non standalone UEFI, we set the UEFI memory below the Firmware Volume\r
- UefiMemoryBase = FixedPcdGet32 (PcdNormalFdBaseAddress) - FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);\r
+ // Check the Firmware does not overlapped with the system memory\r
+ ASSERT ((FdBase < SystemMemoryBase) || (FdBase >= SystemMemoryTop));\r
+ ASSERT ((FdTop <= SystemMemoryBase) || (FdTop > SystemMemoryTop));\r
+\r
+ UefiMemoryBase = SystemMemoryTop - FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);\r
}\r
- Status = PeiServicesInstallPeiMemory (UefiMemoryBase,FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
+\r
+ Status = PeiServicesInstallPeiMemory (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
ASSERT_EFI_ERROR (Status);\r
\r
// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
\r
[FeaturePcd]\r
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob\r
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec\r
\r
[FixedPcd]\r
- gArmPlatformTokenSpaceGuid.PcdStandalone\r
-\r
gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
gArmTokenSpaceGuid.PcdNormalFdSize\r
\r
gArmTokenSpaceGuid.PcdSystemMemoryBase\r
gArmTokenSpaceGuid.PcdSystemMemorySize\r
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize\r
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize\r
\r
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory\r
-//
-// Copyright (c) 2011, ARM Limited. All rights reserved.
-//
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <AutoGen.h>
-
-#start of the code section
-.text
-.align 5
-
-# IMPORT
-GCC_ASM_IMPORT(PrePiCommonExceptionEntry)
-
-# EXPORT
-GCC_ASM_EXPORT(PrePiVectorTable)
-
-//============================================================
-//Default Exception Handlers
-//============================================================
-
-ASM_PFX(PrePiVectorTable):
- b _DefaultResetHandler
- b _DefaultUndefined
- b _DefaultSWI
- b _DefaultPrefetchAbort
- b _DefaultDataAbort
- b _DefaultReserved
- b _DefaultIrq
- b _DefaultFiq
-
-//
-// Default Exception handlers: There is no plan to return from any of these exceptions.
-// No context saving at all.
-//
-_DefaultResetHandler:
- mov r1, lr
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #0
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultUndefined:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #1
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultSWI:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #2
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultPrefetchAbort:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #3
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultDataAbort:
- sub r1, LR, #8
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #4
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultReserved:
- mov r1, lr
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #5
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultIrq:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #6
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
-_DefaultFiq:
- sub r1, LR, #4
- # Switch to SVC for common stack
- cps #0x13
- mov r0, #7
- blx ASM_PFX(PrePiCommonExceptionEntry)
-
+//\r
+// Copyright (c) 2011, ARM Limited. All rights reserved.\r
+// \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <AutoGen.h>\r
+\r
+#start of the code section\r
+.text\r
+.align 5\r
+\r
+# IMPORT\r
+GCC_ASM_IMPORT(PrePiCommonExceptionEntry)\r
+\r
+# EXPORT\r
+GCC_ASM_EXPORT(PrePiVectorTable)\r
+\r
+//============================================================\r
+//Default Exception Handlers\r
+//============================================================\r
+ \r
+ASM_PFX(PrePiVectorTable):\r
+ b _DefaultResetHandler\r
+ b _DefaultUndefined\r
+ b _DefaultSWI\r
+ b _DefaultPrefetchAbort\r
+ b _DefaultDataAbort\r
+ b _DefaultReserved\r
+ b _DefaultIrq\r
+ b _DefaultFiq\r
+\r
+//\r
+// Default Exception handlers: There is no plan to return from any of these exceptions.\r
+// No context saving at all.\r
+//\r
+_DefaultResetHandler:\r
+ mov r1, lr\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #0\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
+_DefaultUndefined:\r
+ sub r1, LR, #4\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #1\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
+_DefaultSWI:\r
+ sub r1, LR, #4\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #2\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
+_DefaultPrefetchAbort:\r
+ sub r1, LR, #4\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #3\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
+_DefaultDataAbort:\r
+ sub r1, LR, #8\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #4\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
+_DefaultReserved:\r
+ mov r1, lr\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #5\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
+_DefaultIrq:\r
+ sub r1, LR, #4\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #6\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
+_DefaultFiq:\r
+ sub r1, LR, #4\r
+ # Switch to SVC for common stack\r
+ cps #0x13\r
+ mov r0, #7\r
+ blx ASM_PFX(PrePiCommonExceptionEntry)\r
+\r
VOID\r
PrimaryMain (\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase,\r
IN UINT64 StartTimeStamp\r
)\r
{\r
//Enable the GIC Distributor\r
PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
\r
- // If ArmVe has not been built as Standalone then we need to wake up the secondary cores\r
- if (!FixedPcdGet32(PcdStandalone)) {\r
+ // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization\r
+ if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {\r
// Sending SGI to all the Secondary CPU interfaces\r
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);\r
}\r
\r
- PrePiMain (UefiMemoryBase, StackBase, StartTimeStamp);\r
+ PrePiMain (UefiMemoryBase, StartTimeStamp);\r
\r
// We must never return\r
ASSERT(FALSE);\r
VOID\r
PrimaryMain (\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase,\r
IN UINT64 StartTimeStamp\r
)\r
{\r
- PrePiMain (UefiMemoryBase, StackBase, StartTimeStamp);\r
+ PrePiMain (UefiMemoryBase, StartTimeStamp);\r
\r
// We must never return\r
ASSERT(FALSE);\r
#include <Library/PcdLib.h>\r
#include <AutoGen.h>\r
\r
-#start of the code section\r
.text\r
.align 3\r
\r
-#global symbols referenced by this module\r
+# Global symbols referenced by this module\r
GCC_ASM_IMPORT(CEntryPoint)\r
+GCC_ASM_EXPORT(_ModuleEntryPoint)\r
\r
StartupAddr: .word CEntryPoint\r
\r
-#make _ModuleEntryPoint as global\r
-GCC_ASM_EXPORT(_ModuleEntryPoint)\r
-\r
\r
ASM_PFX(_ModuleEntryPoint):\r
// Identify CPU ID\r
mrc p15, 0, r0, c0, c0, 5\r
and r0, #0xf\r
\r
-_UefiMemoryBase:\r
-#if FixedPcdGet32(PcdStandalone)\r
+_SetSVCMode:\r
+ // Enter SVC mode\r
+ mov r1, #0x13|0x80|0x40\r
+ msr CPSR_c, r1\r
+\r
+// Check if we can install the size at the top of the System Memory or if we need\r
+// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
+// at the top of the DRAM)\r
+_SetupStackPosition:\r
// Compute Top of System Memory\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
-#else\r
- // If it is not a Standalone, we must compute the top of the UEFI memory with the base of the FD\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r1)\r
-#endif\r
\r
- // Compute Base of UEFI Memory\r
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r2)\r
- sub r1, r1, r2 // r1 = SystemMemoryTop - PcdSystemMemoryUefiRegionSize = UefiMemoryBase\r
+ // Calculate Top of the Firmware Device\r
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)\r
+ add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize\r
+\r
+ // UEFI Memory Size (stacks are allocated in this region)\r
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
+\r
+ //\r
+ // Reserve the memory for the UEFI region (contain stacks on its top)\r
+ //\r
+\r
+ // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
+ subs r5, r1, r3 // r5 = SystemMemoryTop - FdTop\r
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop)\r
+ cmp r5, r4\r
+ bge _SetupStack\r
+\r
+ // Case the top of stacks is the FdBaseAddress\r
+ mov r1, r2\r
\r
_SetupStack:\r
// Compute Base of Normal stacks for CPU Cores\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)\r
- mul r3, r0, r2 // r3 = core_id * stack_size = offset from the stack base\r
- sub sp, r1, r3 // r3 = UefiMemoryBase - StackOffset = TopOfStack\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r5)\r
+ mul r3, r0, r5 // r3 = core_id * stack_size = offset from the stack base\r
+ sub sp, r1, r3 // r3 = (SystemMemoryTop|FdBaseAddress) - StackOffset = TopOfStack\r
+\r
+ // Calculate the Base of the UEFI Memory\r
+ sub r1, r1, r4\r
\r
- // Only allocate memory in top of the primary core stack\r
+ // Only allocate memory for global variables at top of the primary core stack\r
cmp r0, #0\r
bne _PrepareArguments\r
\r
-_AllocateGlobalPeiVariables:\r
+_AllocateGlobalPrePiVariables:\r
// Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)\r
LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r4)\r
// The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack\r
sub sp, sp, r4\r
\r
_PrepareArguments:\r
- // Pass the StackBase to the C Entrypoint (UefiMemoryBase - StackSize - StackOffset)\r
- sub r2, r1, r2\r
- sub r2, r3\r
// Move sec startup address into a data register\r
// Ensure we're jumping to FV version of the code (not boot remapped alias)\r
- ldr r3, StartupAddr\r
+ ldr r2, StartupAddr\r
\r
- // jump to PrePiCore C code\r
+ // Jump to PrePiCore C code\r
// r0 = core_id\r
// r1 = UefiMemoryBase\r
- // r2 = StackBase\r
- blx r3\r
+ blx r2\r
\r
mrc p15, 0, r0, c0, c0, 5\r
and r0, #0xf\r
\r
-_UefiMemoryBase\r
-#if FixedPcdGet32(PcdStandalone)\r
+_SetSVCMode\r
+ // Enter SVC mode\r
+ mov r1, #0x13|0x80|0x40\r
+ msr CPSR_c, r1\r
+\r
+// Check if we can install the size at the top of the System Memory or if we need\r
+// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
+// at the top of the DRAM)\r
+_SetupStackPosition\r
// Compute Top of System Memory\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
-#else\r
- // If it is not a Standalone, we must compute the top of the UEFI memory with the base of the FD\r
- LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r1)\r
-#endif\r
\r
- // Compute Base of UEFI Memory\r
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r2)\r
- sub r1, r1, r2 // r1 = SystemMemoryTop - PcdSystemMemoryUefiRegionSize = UefiMemoryBase\r
+ // Calculate Top of the Firmware Device\r
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)\r
+ add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize\r
+\r
+ // UEFI Memory Size (stacks are allocated in this region)\r
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
+\r
+ //\r
+ // Reserve the memory for the UEFI region (contain stacks on its top)\r
+ //\r
+\r
+ // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
+ subs r5, r1, r3 // r5 = SystemMemoryTop - FdTop\r
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop)\r
+ cmp r5, r4\r
+ bge _SetupStack\r
+\r
+ // Case the top of stacks is the FdBaseAddress\r
+ mov r1, r2\r
\r
_SetupStack\r
// Compute Base of Normal stacks for CPU Cores\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)\r
- mul r3, r0, r2 // r3 = core_id * stack_size = offset from the stack base\r
- sub sp, r1, r3 // r3 = UefiMemoryBase - StackOffset = TopOfStack\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r5)\r
+ mul r3, r0, r5 // r3 = core_id * stack_size = offset from the stack base\r
+ sub sp, r1, r3 // r3 = (SystemMemoryTop|FdBaseAddress) - StackOffset = TopOfStack\r
+\r
+ // Calculate the Base of the UEFI Memory\r
+ sub r1, r1, r4\r
\r
- // Only allocate memory in top of the primary core stack\r
+ // Only allocate memory for global variables at top of the primary core stack\r
cmp r0, #0\r
bne _PrepareArguments\r
\r
sub sp, sp, r4\r
\r
_PrepareArguments\r
- // Pass the StackBase to the C Entrypoint (UefiMemoryBase - StackSize - StackOffset)\r
- sub r2, r1, r2\r
- sub r2, r3\r
// Move sec startup address into a data register\r
// Ensure we're jumping to FV version of the code (not boot remapped alias)\r
- ldr r3, StartupAddr\r
+ ldr r2, StartupAddr\r
\r
- // jump to PrePiCore C code\r
+ // Jump to PrePiCore C code\r
// r0 = core_id\r
// r1 = UefiMemoryBase\r
- // r2 = StackBase\r
- blx r3\r
+ blx r2\r
\r
END\r
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
+ gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
-#/** @file
-#
-# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmPlatformPrePiUniCore
- FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
-
-[Sources.ARM]
- PrePi.c
- ModuleEntryPoint.S | GCC
- ModuleEntryPoint.asm | RVCT
- Exception.asm | RVCT
- Exception.S | GCC
- MainUniCore.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- DebugAgentLib
- ArmLib
- IoLib
- TimerLib
- SerialPortLib
- ExtractGuidedSectionLib
- LzmaDecompressLib
- PeCoffGetEntryPointLib
- DebugAgentLib
- PrePiLib
- ArmPlatformLib
- MemoryAllocationLib
- HobLib
- PrePiHobListPointerLib
- PlatformPeiLib
- MemoryInitPeiLib
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
- gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdVFPEnabled
-
- gArmTokenSpaceGuid.PcdNormalFdBaseAddress
- gArmTokenSpaceGuid.PcdNormalFdSize
-
- gArmTokenSpaceGuid.PcdNormalFvBaseAddress
- gArmTokenSpaceGuid.PcdNormalFvSize
-
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
-
- gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
- gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset
-
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize
- gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
-
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
-
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
+#/** @file\r
+# \r
+# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# \r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+# \r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmPlatformPrePiUniCore\r
+ FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8\r
+ MODULE_TYPE = SEC\r
+ VERSION_STRING = 1.0\r
+\r
+[Sources.ARM]\r
+ PrePi.c\r
+ ModuleEntryPoint.S | GCC\r
+ ModuleEntryPoint.asm | RVCT\r
+ Exception.asm | RVCT\r
+ Exception.S | GCC\r
+ MainUniCore.c\r
+ \r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+ ArmPlatformPkg/ArmPlatformPkg.dec\r
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
+\r
+[LibraryClasses]\r
+ BaseLib\r
+ DebugLib\r
+ DebugAgentLib\r
+ ArmLib\r
+ IoLib\r
+ TimerLib\r
+ SerialPortLib\r
+ ExtractGuidedSectionLib\r
+ LzmaDecompressLib\r
+ PeCoffGetEntryPointLib\r
+ DebugAgentLib\r
+ PrePiLib\r
+ ArmPlatformLib\r
+ MemoryAllocationLib\r
+ HobLib\r
+ PrePiHobListPointerLib\r
+ PlatformPeiLib\r
+ MemoryInitPeiLib\r
+\r
+[FeaturePcd] \r
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob\r
+ gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores\r
+\r
+[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdVFPEnabled\r
+\r
+ gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
+ gArmTokenSpaceGuid.PcdNormalFdSize\r
+\r
+ gArmTokenSpaceGuid.PcdNormalFvBaseAddress\r
+ gArmTokenSpaceGuid.PcdNormalFvSize\r
+\r
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase\r
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize\r
+\r
+ gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize\r
+ gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset\r
+\r
+ gArmTokenSpaceGuid.PcdSystemMemoryBase\r
+ gArmTokenSpaceGuid.PcdSystemMemorySize\r
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize\r
+ \r
+ gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize\r
+\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode\r
+ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData\r
VOID\r
PrePiMain (\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase,\r
IN UINT64 StartTimeStamp\r
)\r
{\r
- EFI_HOB_HANDOFF_INFO_TABLE** PrePiHobBase;\r
+ EFI_HOB_HANDOFF_INFO_TABLE** PrePiHobBase;\r
EFI_STATUS Status;\r
CHAR8 Buffer[100];\r
UINTN CharCount;\r
+ UINTN UefiMemoryTop;\r
+ UINTN StacksSize;\r
+ UINTN StacksBase;\r
\r
// Enable program flow prediction, if supported.\r
ArmEnableBranchPrediction ();\r
\r
PrePiHobBase = (EFI_HOB_HANDOFF_INFO_TABLE**)(PcdGet32 (PcdCPUCoresNonSecStackBase) + (PcdGet32 (PcdCPUCoresNonSecStackSize) / 2) - PcdGet32 (PcdHobListPtrGlobalOffset));\r
\r
- // We leave UINT32 at the top of UEFI memory for PcdPrePiHobBase\r
+ UefiMemoryTop = UefiMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);\r
+ StacksSize = PcdGet32 (PcdCPUCoresNonSecStackSize) * PcdGet32 (PcdMPCoreMaxCores);\r
+ StacksBase = UefiMemoryTop - StacksSize;\r
+\r
+ // Declare the PI/UEFI memory region\r
*PrePiHobBase = HobConstructor (\r
(VOID*)UefiMemoryBase,\r
FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
(VOID*)UefiMemoryBase,\r
- (VOID*)(UefiMemoryBase + FixedPcdGet32 (PcdSystemMemoryUefiRegionSize) - sizeof(UINT32)));\r
+ (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
+ );\r
\r
// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
ASSERT_EFI_ERROR (Status);\r
\r
- // Create the Stack HOB\r
- BuildStackHob (StackBase, FixedPcdGet32(PcdCPUCoresNonSecStackSize));\r
+ // Create the Stacks HOB (reserve the memory for all stacks)\r
+ BuildStackHob (StacksBase, StacksSize);\r
\r
// Set the Boot Mode\r
SetBootMode (ArmPlatformGetBootMode ());\r
\r
BuildMemoryTypeInformationHob ();\r
\r
- //InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);\r
- //SaveAndSetDebugTimerInterrupt (TRUE);\r
+ InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);\r
+ SaveAndSetDebugTimerInterrupt (TRUE);\r
\r
// Now, the HOB List has been initialized, we can register performance information\r
PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r
VOID\r
CEntryPoint (\r
IN UINTN CoreId,\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase\r
+ IN UINTN UefiMemoryBase\r
)\r
{\r
UINT64 StartTimeStamp;\r
\r
- StartTimeStamp = 0;\r
-\r
- if ((CoreId == 0) && PerformanceMeasurementEnabled ()) {\r
+ if ((CoreId == ARM_PRIMARY_CORE) && PerformanceMeasurementEnabled ()) {\r
// Initialize the Timer Library to setup the Timer HW controller\r
TimerConstructor ();\r
// We cannot call yet the PerformanceLib because the HOB List has not been initialized\r
StartTimeStamp = GetPerformanceCounter ();\r
}\r
\r
- //Clean Data cache\r
- ArmCleanInvalidateDataCache();\r
+ // Clean Data cache\r
+ ArmCleanInvalidateDataCache ();\r
\r
- //Invalidate instruction cache\r
- ArmInvalidateInstructionCache();\r
+ // Invalidate instruction cache\r
+ ArmInvalidateInstructionCache ();\r
\r
//TODO:Drain Write Buffer\r
\r
// Enable Instruction & Data caches\r
- ArmEnableDataCache();\r
- ArmEnableInstructionCache();\r
+ ArmEnableDataCache ();\r
+ ArmEnableInstructionCache ();\r
\r
// Write VBAR - The Vector table must be 32-byte aligned\r
- ASSERT(((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);\r
- ArmWriteVBar((UINT32)PrePiVectorTable);\r
+ ASSERT (((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);\r
+ ArmWriteVBar ((UINT32)PrePiVectorTable);\r
\r
- //If not primary Jump to Secondary Main\r
- if(0 == CoreId) {\r
+ // If not primary Jump to Secondary Main\r
+ if (CoreId == ARM_PRIMARY_CORE) {\r
// Goto primary Main.\r
- PrimaryMain (UefiMemoryBase, StackBase, StartTimeStamp);\r
+ PrimaryMain (UefiMemoryBase, StartTimeStamp);\r
} else {\r
SecondaryMain (CoreId);\r
}\r
\r
#include <Chipset/ArmV7.h>\r
\r
+#define ARM_PRIMARY_CORE 0\r
#define SerialPrint(txt) SerialPortWrite (txt, AsciiStrLen(txt)+1);\r
\r
// Vector Table for PrePi Phase\r
VOID\r
PrePiMain (\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase,\r
IN UINT64 StartTimeStamp\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
MemoryPeim (\r
- IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
- IN UINT64 UefiMemorySize\r
+ IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
+ IN UINT64 UefiMemorySize\r
);\r
\r
EFI_STATUS\r
VOID\r
PrimaryMain (\r
IN UINTN UefiMemoryBase,\r
- IN UINTN StackBase,\r
IN UINT64 StartTimeStamp\r
);\r
\r