\r
[LibraryClasses.common.SEC]\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf\r
+ ArmPlatformSecLib|ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.inf\r
ArmPlatformLib|ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNullSec.inf\r
ArmTrustedMonitorLib|ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.inf\r
\r
\r
[LibraryClasses.common.SEC]\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf\r
- ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf\r
+ ArmPlatformSecLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSecLib.inf\r
+ ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLibSec.inf\r
\r
[BuildOptions]\r
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A8 --fpu=softvfp -I$(WORKSPACE)/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform\r
\r
[LibraryClasses.common.SEC]\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf\r
- ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf\r
+ ArmPlatformSecLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSecLib.inf\r
+ ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLibSec.inf\r
\r
[BuildOptions]\r
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A9 --fpu=softvfp -I$(WORKSPACE)/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform\r
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <ArmPlatform.h>\r
-#include <AutoGen.h>\r
-\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
-GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ASM_PFX(ArmPlatformSecBootAction):\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ASM_PFX(ArmPlatformInitializeBootMemory):\r
- // The SMC does not need to be initialized for RTSM\r
- bx lr\r
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <ArmPlatform.h>\r
-#include <AutoGen.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
-\r
- EXPORT ArmPlatformSecBootAction\r
- EXPORT ArmPlatformInitializeBootMemory\r
-\r
- PRESERVE8\r
- AREA CTA9x4BootMode, CODE, READONLY\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ArmPlatformSecBootAction\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ArmPlatformInitializeBootMemory\r
- // The SMC does not need to be initialized for RTSM\r
- bx lr\r
--- /dev/null
+#/* @file\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+# \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http://opensource.org/licenses/bsd-license.php \r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#*/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmRealViewEbLibSec\r
+ FILE_GUID = 5d1013ae-57b8-4a37-87d8-f5bf70e49059\r
+ MODULE_TYPE = SEC\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = ArmPlatformLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+ ArmPlatformPkg/ArmPlatformPkg.dec\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+ ArmLib\r
+\r
+[Sources.common]\r
+ ArmRealViewEb.c\r
+\r
+[FeaturePcd]\r
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
+\r
+[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdSystemMemoryBase\r
+ gArmTokenSpaceGuid.PcdSystemMemorySize\r
+\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCore\r
+++ /dev/null
-/** @file
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL341Dmc.h>
-#include <Drivers/SP804Timer.h>
-
-#include <ArmPlatform.h>
-
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformTrustzoneInit (
- IN UINTN MpId
- )
-{
- ASSERT(FALSE);
-}
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-VOID
-ArmPlatformSecInitialize (
- VOID
- )
-{
- // Do nothing yet
-}
-
-/**
- Call before jumping to Normal World
-
- This function allows the firmware platform to do extra actions before
- jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
- IN UINTN MpId,
- OUT UINTN* JumpAddress
- )
-{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
-}
+++ /dev/null
-#/* @file\r
-# Copyright (c) 2011, ARM Limited. All rights reserved.\r
-# \r
-# This program and the accompanying materials \r
-# are licensed and made available under the terms and conditions of the BSD License \r
-# which accompanies this distribution. The full text of the license may be found at \r
-# http://opensource.org/licenses/bsd-license.php \r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-#\r
-#*/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmRealViewEbSecLib\r
- FILE_GUID = 6e02ebe0-1d96-11e0-b9cb-0002a5d5c51b\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ArmPlatformLib\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmPkg/ArmPkg.dec\r
- ArmPlatformPkg/ArmPlatformPkg.dec\r
-\r
-[LibraryClasses]\r
- IoLib\r
- ArmLib\r
-\r
-[Sources.common]\r
- ArmRealViewEb.c\r
- ArmRealViewEbSec.c\r
- ArmRealViewEbBoot.asm | RVCT\r
- ArmRealViewEbBoot.S | GCC\r
-\r
-[FeaturePcd]\r
- gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
-\r
-[FixedPcd]\r
- gArmTokenSpaceGuid.PcdFvBaseAddress\r
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/ArmPlatformSecLib.h>\r
+#include <ArmPlatform.h>\r
+#include <AutoGen.h>\r
+\r
+.text\r
+.align 3\r
+\r
+GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootAction):\r
+ LoadConstantToReg (ARM_EB_SYS_FLAGS_NV_REG, r0)\r
+ ldr r0, [r0]\r
+ cmp r0, #0\r
+ bxeq lr\r
+ bxne r0\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootMemoryInit):\r
+ // The SMC does not need to be initialized for RTSM\r
+ bx lr\r
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/ArmPlatformSecLib.h>\r
+#include <ArmPlatform.h>\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+\r
+ EXPORT ArmPlatformSecBootAction\r
+ EXPORT ArmPlatformSecBootMemoryInit\r
+\r
+ PRESERVE8\r
+ AREA ArmRealviewEbBootMode, CODE, READONLY\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ArmPlatformSecBootAction\r
+ LoadConstantToReg (ARM_EB_SYS_FLAGS_NV_REG, r0)\r
+ ldr r0, [r0]\r
+ cmp r0, #0\r
+ bxeq lr\r
+ bxne r0\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ArmPlatformSecBootMemoryInit\r
+ // The SMC does not need to be initialized for RTSM\r
+ bx lr\r
--- /dev/null
+/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformSecLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/PL341Dmc.h>
+#include <Drivers/SP804Timer.h>
+
+#include <ArmPlatform.h>
+
+/**
+ Initialize the Secure peripherals and memory regions
+
+ If Trustzone is supported by your platform then this function makes the required initialization
+ of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+ IN UINTN MpId
+ )
+{
+ ASSERT(FALSE);
+}
+
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+ IN UINTN MpId
+ )
+{
+ // If it is not the primary core then there is nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // Do nothing yet
+ return RETURN_SUCCESS;
+}
+
+/**
+ Call before jumping to Normal World
+
+ This function allows the firmware platform to do extra actions before
+ jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+ IN UINTN MpId,
+ OUT UINTN* JumpAddress
+ )
+{
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}
--- /dev/null
+#/* @file\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+# \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http://opensource.org/licenses/bsd-license.php \r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#*/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmRealViewEbSecLib\r
+ FILE_GUID = 6e02ebe0-1d96-11e0-b9cb-0002a5d5c51b\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = ArmPlatformSecLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+ ArmPlatformPkg/ArmPlatformPkg.dec\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+ ArmLib\r
+\r
+[Sources.common]\r
+ ArmRealViewEbSec.c\r
+ ArmRealViewEbBoot.asm | RVCT\r
+ ArmRealViewEbBoot.S | GCC\r
+\r
+[FeaturePcd]\r
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
+\r
+[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCore\r
#\r
-# Copyright (c) 2011, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
# \r
# This program and the accompanying materials \r
# are licensed and made available under the terms and conditions of the BSD License \r
\r
[LibraryClasses.common.SEC]\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf\r
- ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf\r
+ ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/ArmVExpressSecLib.inf\r
+ ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf\r
\r
# Uncomment to turn on GDB stub in SEC. \r
#DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf\r
#\r
-# Copyright (c) 2011, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
# \r
# This program and the accompanying materials \r
# are licensed and made available under the terms and conditions of the BSD License \r
\r
[LibraryClasses.common.SEC]\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf\r
- ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressSecLib.inf\r
+ ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf\r
+ ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf\r
\r
[BuildOptions]\r
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM\r
#\r
-# Copyright (c) 2011, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
# \r
# This program and the accompanying materials \r
# are licensed and made available under the terms and conditions of the BSD License \r
\r
[LibraryClasses.common.SEC]\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf\r
- ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressSecLib.inf\r
+ ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf\r
+ ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf\r
\r
[BuildOptions]\r
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM\r
#\r
-# Copyright (c) 2011, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
# \r
# This program and the accompanying materials \r
# are licensed and made available under the terms and conditions of the BSD License \r
\r
[LibraryClasses.common.SEC]\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf\r
- ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressSecLib.inf\r
+ ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf\r
+ ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLibSec.inf\r
\r
# Uncomment to turn on GDB stub in SEC. \r
#DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf\r
--- /dev/null
+#/* @file
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CTA9x4ArmVExpressLibSec
+ FILE_GUID = b16c63a0-f417-11df-b3af-0002a5d5c51b
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ IoLib
+ ArmLib
+ ArmTrustZoneLib
+ PL341DmcLib
+ PL301AxiLib
+ L2X0CacheLib
+ SerialPortLib
+
+[Sources.common]
+ CTA9x4.c
+
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable
+ gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdTrustzoneSupport
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase
+
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
+++ /dev/null
-#/* @file\r
-# Copyright (c) 2011, ARM Limited. All rights reserved.\r
-# \r
-# This program and the accompanying materials \r
-# are licensed and made available under the terms and conditions of the BSD License \r
-# which accompanies this distribution. The full text of the license may be found at \r
-# http://opensource.org/licenses/bsd-license.php \r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-#\r
-#*/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = CTA9x4ArmVExpressLib\r
- FILE_GUID = b16c63a0-f417-11df-b3af-0002a5d5c51b\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ArmPlatformLib\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmPkg/ArmPkg.dec\r
- ArmPlatformPkg/ArmPlatformPkg.dec\r
-\r
-[LibraryClasses]\r
- ArmLib\r
- ArmTrustZoneLib\r
- ArmPlatformSysConfigLib\r
- ArmPlatformSecExtraActionLib\r
- IoLib\r
- L2X0CacheLib\r
- PL301AxiLib\r
- PL341DmcLib\r
- PL35xSmcLib\r
- SerialPortLib\r
-\r
-[Sources.common]\r
- CTA9x4Sec.c\r
- CTA9x4.c\r
- CTA9x4Boot.asm | RVCT\r
- CTA9x4Boot.S | GCC\r
-\r
-[FeaturePcd]\r
- gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping\r
-\r
-[FixedPcd]\r
- gArmTokenSpaceGuid.PcdTrustzoneSupport\r
-\r
- gArmTokenSpaceGuid.PcdL2x0ControllerBase\r
-\r
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
- gArmTokenSpaceGuid.PcdArmPrimaryCore\r
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <Drivers/PL35xSmc.h>\r
-#include <ArmPlatform.h>\r
-#include <AutoGen.h>\r
-\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
-GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)\r
-GCC_ASM_IMPORT(PL35xSmcInitialize)\r
-\r
-//\r
-// For each Chip Select: ChipSelect / SetCycle / SetOpMode\r
-//\r
-VersatileExpressSmcConfiguration:\r
- // NOR Flash 0\r
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(0)\r
- .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV\r
-\r
- // NOR Flash 1\r
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(4)\r
- .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV\r
-\r
- // SRAM\r
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(2)\r
- .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_ADV\r
-\r
- // Usb/Eth/VRAM\r
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(3)\r
- .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)\r
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
-\r
- // Memory Mapped Peripherals\r
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(7)\r
- .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
-\r
- // VRAM\r
- .word PL350_SMC_DIRECT_CMD_ADDR_CS(1)\r
- .word 0x00049249\r
- .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
-VersatileExpressSmcConfigurationEnd:\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ASM_PFX(ArmPlatformSecBootAction):\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ASM_PFX(ArmPlatformInitializeBootMemory):\r
- mov r5, lr\r
-\r
- //\r
- // Initialize PL354 SMC\r
- //\r
- LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)\r
- LoadConstantToReg (VersatileExpressSmcConfiguration, r2)\r
- LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3)\r
- blx ASM_PFX(PL35xSmcInitialize)\r
-\r
- //\r
- // Page mode setup for VRAM\r
- //\r
- LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)\r
-\r
- // Read current state\r
- ldr r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
- ldr r0, = 0x00000000\r
- str r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
-\r
- // Enable page mode\r
- ldr r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
- ldr r0, = 0x00000000\r
- str r0, [r2, #0]\r
- LoadConstantToReg (0x00900090, r0)\r
- str r0, [r2, #0]\r
-\r
- // Confirm page mode enabled\r
- ldr r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
- ldr r0, = 0x00000000\r
- str r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
-\r
- bx r5\r
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <Drivers/PL35xSmc.h>\r
-#include <ArmPlatform.h>\r
-#include <AutoGen.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
-\r
- EXPORT ArmPlatformSecBootAction\r
- EXPORT ArmPlatformInitializeBootMemory\r
- IMPORT PL35xSmcInitialize\r
-\r
- PRESERVE8\r
- AREA CTA9x4BootMode, CODE, READONLY\r
-\r
-//\r
-// For each Chip Select: ChipSelect / SetCycle / SetOpMode\r
-//\r
-VersatileExpressSmcConfiguration\r
- // NOR Flash 0\r
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(0)\r
- DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
-\r
- // NOR Flash 1\r
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(4)\r
- DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
-\r
- // SRAM\r
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(2)\r
- DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
-\r
- // Usb/Eth/VRAM\r
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(3)\r
- DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)\r
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
-\r
- // Memory Mapped Peripherals\r
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(7)\r
- DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
-\r
- // VRAM\r
- DCD PL350_SMC_DIRECT_CMD_ADDR_CS(1)\r
- DCD 0x00049249\r
- DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
-VersatileExpressSmcConfigurationEnd\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ArmPlatformSecBootAction\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ArmPlatformInitializeBootMemory\r
- mov r5, lr\r
-\r
- //\r
- // Initialize PL354 SMC\r
- //\r
- LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)\r
- ldr r2, =VersatileExpressSmcConfiguration\r
- ldr r3, =VersatileExpressSmcConfigurationEnd\r
- blx PL35xSmcInitialize\r
-\r
- //\r
- // Page mode setup for VRAM\r
- //\r
- LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)\r
-\r
- // Read current state\r
- ldr r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
- ldr r0, = 0x00000000\r
- str r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
-\r
- // Enable page mode\r
- ldr r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
- ldr r0, = 0x00000000\r
- str r0, [r2, #0]\r
- ldr r0, = 0x00900090\r
- str r0, [r2, #0]\r
-\r
- // Confirm page mode enabled\r
- ldr r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
- ldr r0, = 0x00000000\r
- str r0, [r2, #0]\r
- ldr r0, [r2, #0]\r
-\r
- bx r5\r
+++ /dev/null
-/** @file
-*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/ArmPlatformSysConfigLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/ArmTrustzone.h>
-#include <Drivers/PL310L2Cache.h>
-
-#include <ArmPlatform.h>
-
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformTrustzoneInit (
- IN UINTN MpId
- )
-{
- // Nothing to do
- if (!IS_PRIMARY_CORE(MpId)) {
- return;
- }
-
- //
- // Setup TZ Protection Controller
- //
-
- if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
- ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
- } else {
- ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
- }
-
- // Set Non Secure access for all devices
- TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
- TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
- TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF);
-
- // Remove Non secure access to secure devices
- TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0,
- ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC);
-
- TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2,
- ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK);
-
- //
- // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
- //
-
- // NOR Flash 0 non secure (BootMon)
- TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED,
- ARM_VE_SMB_NOR0_BASE,0,
- TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-
- // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
- if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
- //Note: Your OS Kernel must be aware of the secure regions before to enable this region
- TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
- ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
- TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
- } else {
- TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
- ARM_VE_SMB_NOR1_BASE,0,
- TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
- }
-
- // Base of SRAM. Only half of SRAM in Non Secure world
- // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
- if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
- //Note: Your OS Kernel must be aware of the secure regions before to enable this region
- TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
- ARM_VE_SMB_SRAM_BASE,0,
- TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
- } else {
- TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
- ARM_VE_SMB_SRAM_BASE,0,
- TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
- }
-
- // Memory Mapped Peripherals. All in non secure world
- TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,
- ARM_VE_SMB_PERIPH_BASE,0,
- TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-
- // MotherBoard Peripherals and On-chip peripherals.
- TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED,
- ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0,
- TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW);
-}
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-VOID
-ArmPlatformSecInitialize (
- VOID
- ) {
- // The L2x0 controller must be intialize in Secure World
- L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase),
- PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
- PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
- 0,~0, // Use default setting for the Auxiliary Control Register
- FALSE);
-
- // Initialize the System Configuration
- ArmPlatformSysConfigInitialize ();
-}
--- /dev/null
+#/* @file\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+# \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http://opensource.org/licenses/bsd-license.php \r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#*/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = RTSMArmVExpressLibSec\r
+ FILE_GUID = a79eed97-4b98-4974-9690-37b32d6a5b56\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = ArmPlatformLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+ ArmPlatformPkg/ArmPlatformPkg.dec\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+ ArmLib\r
+ SerialPortLib\r
+\r
+[Sources.common]\r
+ RTSM.c\r
+ RTSMHelper.asm | RVCT\r
+ RTSMHelper.S | GCC\r
+\r
+[FeaturePcd]\r
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
+ gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping\r
+ gArmPlatformTokenSpaceGuid.PcdStandalone\r
+\r
+[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdSystemMemoryBase\r
+ gArmTokenSpaceGuid.PcdSystemMemorySize\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCore\r
+++ /dev/null
-#/* @file
-# Copyright (c) 2011, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#*/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = RTSMArmVExpressLib
- FILE_GUID = 6352e3a0-ed14-4613-bf90-d316014dd142
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmPlatformLib
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
- IoLib
- ArmLib
- SerialPortLib
-
-[Sources.common]
- RTSMSec.c
- RTSM.c
- RTSMBoot.asm | RVCT
- RTSMBoot.S | GCC
- RTSMHelper.asm | RVCT
- RTSMHelper.S | GCC
-
-[Protocols]
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
- gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
- gArmPlatformTokenSpaceGuid.PcdStandalone
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdFvBaseAddress
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <AutoGen.h>\r
-#include <ArmPlatform.h>\r
-\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
-GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ASM_PFX(ArmPlatformSecBootAction):\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ASM_PFX(ArmPlatformInitializeBootMemory):\r
- // The SMC does not need to be initialized for RTSM\r
- bx lr\r
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <AutoGen.h>\r
-#include <ArmPlatform.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
-\r
- EXPORT ArmPlatformSecBootAction\r
- EXPORT ArmPlatformInitializeBootMemory\r
-\r
- PRESERVE8\r
- AREA RTSMVExpressBootMode, CODE, READONLY\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ArmPlatformSecBootAction\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ArmPlatformInitializeBootMemory\r
- // The SMC does not need to be initialized for RTSM\r
- bx lr\r
+++ /dev/null
-/** @file
-*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL310L2Cache.h>
-#include <Drivers/SP804Timer.h>
-
-#include <ArmPlatform.h>
-
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformTrustzoneInit (
- IN UINTN MpId
- )
-{
- // No TZPC or TZASC on RTSM to initialize
-}
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-VOID
-ArmPlatformSecInitialize (
- VOID
- )
-{
- // Configure periodic timer (TIMER0) for 1MHz operation
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
- // Configure 1MHz clock
- MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
- // Configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
- // Configure SP810 to use 1MHz clock and disable
- MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-}
-
-/**
- Call before jumping to Normal World
-
- This function allows the firmware platform to do extra actions before
- jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
- IN UINTN MpId,
- OUT UINTN* JumpAddress
- )
-{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
-}
--- /dev/null
+#/* @file\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+# \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http://opensource.org/licenses/bsd-license.php \r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#*/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = CTA9x4ArmVExpressLib\r
+ FILE_GUID = aac05341-56df-4a77-b20f-f5daa456bd90\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = ArmPlatformSecLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+ ArmPlatformPkg/ArmPlatformPkg.dec\r
+\r
+[LibraryClasses]\r
+ ArmLib\r
+ ArmTrustZoneLib\r
+ ArmPlatformLib\r
+ ArmPlatformSysConfigLib\r
+ ArmPlatformSecExtraActionLib\r
+ IoLib\r
+ L2X0CacheLib\r
+ PL301AxiLib\r
+ PL341DmcLib\r
+ PL35xSmcLib\r
+ SerialPortLib\r
+\r
+[Sources.common]\r
+ CTA9x4Sec.c\r
+ CTA9x4Boot.asm | RVCT\r
+ CTA9x4Boot.S | GCC\r
+\r
+[FeaturePcd]\r
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
+ gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping\r
+ gArmPlatformTokenSpaceGuid.PcdStandalone\r
+ gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec\r
+\r
+[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdTrustzoneSupport\r
+\r
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase\r
+\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCore\r
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/ArmPlatformLib.h>\r
+#include <Drivers/PL35xSmc.h>\r
+#include <ArmPlatform.h>\r
+#include <AutoGen.h>\r
+\r
+.text\r
+.align 3\r
+\r
+GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)\r
+GCC_ASM_IMPORT(PL35xSmcInitialize)\r
+\r
+//\r
+// For each Chip Select: ChipSelect / SetCycle / SetOpMode\r
+//\r
+VersatileExpressSmcConfiguration:\r
+ // NOR Flash 0\r
+ .word PL350_SMC_DIRECT_CMD_ADDR_CS(0)\r
+ .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
+ .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV\r
+\r
+ // NOR Flash 1\r
+ .word PL350_SMC_DIRECT_CMD_ADDR_CS(4)\r
+ .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
+ .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV\r
+\r
+ // SRAM\r
+ .word PL350_SMC_DIRECT_CMD_ADDR_CS(2)\r
+ .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
+ .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_ADV\r
+\r
+ // Usb/Eth/VRAM\r
+ .word PL350_SMC_DIRECT_CMD_ADDR_CS(3)\r
+ .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)\r
+ .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
+\r
+ // Memory Mapped Peripherals\r
+ .word PL350_SMC_DIRECT_CMD_ADDR_CS(7)\r
+ .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
+ .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
+\r
+ // VRAM\r
+ .word PL350_SMC_DIRECT_CMD_ADDR_CS(1)\r
+ .word 0x00049249\r
+ .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
+VersatileExpressSmcConfigurationEnd:\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootAction):\r
+ bx lr\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootMemoryInit):\r
+ mov r5, lr\r
+\r
+ //\r
+ // Initialize PL354 SMC\r
+ //\r
+ LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)\r
+ LoadConstantToReg (VersatileExpressSmcConfiguration, r2)\r
+ LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3)\r
+ blx ASM_PFX(PL35xSmcInitialize)\r
+\r
+ //\r
+ // Page mode setup for VRAM\r
+ //\r
+ LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)\r
+\r
+ // Read current state\r
+ ldr r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+ ldr r0, = 0x00000000\r
+ str r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+\r
+ // Enable page mode\r
+ ldr r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+ ldr r0, = 0x00000000\r
+ str r0, [r2, #0]\r
+ LoadConstantToReg (0x00900090, r0)\r
+ str r0, [r2, #0]\r
+\r
+ // Confirm page mode enabled\r
+ ldr r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+ ldr r0, = 0x00000000\r
+ str r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+\r
+ bx r5\r
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/ArmPlatformLib.h>\r
+#include <Drivers/PL35xSmc.h>\r
+#include <ArmPlatform.h>\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+\r
+ EXPORT ArmPlatformSecBootAction\r
+ EXPORT ArmPlatformSecBootMemoryInit\r
+ IMPORT PL35xSmcInitialize\r
+\r
+ PRESERVE8\r
+ AREA CTA9x4BootMode, CODE, READONLY\r
+\r
+//\r
+// For each Chip Select: ChipSelect / SetCycle / SetOpMode\r
+//\r
+VersatileExpressSmcConfiguration\r
+ // NOR Flash 0\r
+ DCD PL350_SMC_DIRECT_CMD_ADDR_CS(0)\r
+ DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
+ DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
+\r
+ // NOR Flash 1\r
+ DCD PL350_SMC_DIRECT_CMD_ADDR_CS(4)\r
+ DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)\r
+ DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
+\r
+ // SRAM\r
+ DCD PL350_SMC_DIRECT_CMD_ADDR_CS(2)\r
+ DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
+ DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV\r
+\r
+ // Usb/Eth/VRAM\r
+ DCD PL350_SMC_DIRECT_CMD_ADDR_CS(3)\r
+ DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)\r
+ DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
+\r
+ // Memory Mapped Peripherals\r
+ DCD PL350_SMC_DIRECT_CMD_ADDR_CS(7)\r
+ DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)\r
+ DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
+\r
+ // VRAM\r
+ DCD PL350_SMC_DIRECT_CMD_ADDR_CS(1)\r
+ DCD 0x00049249\r
+ DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC\r
+VersatileExpressSmcConfigurationEnd\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ArmPlatformSecBootAction\r
+ bx lr\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ArmPlatformSecBootMemoryInit\r
+ mov r5, lr\r
+\r
+ //\r
+ // Initialize PL354 SMC\r
+ //\r
+ LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)\r
+ ldr r2, =VersatileExpressSmcConfiguration\r
+ ldr r3, =VersatileExpressSmcConfigurationEnd\r
+ blx PL35xSmcInitialize\r
+\r
+ //\r
+ // Page mode setup for VRAM\r
+ //\r
+ LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)\r
+\r
+ // Read current state\r
+ ldr r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+ ldr r0, = 0x00000000\r
+ str r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+\r
+ // Enable page mode\r
+ ldr r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+ ldr r0, = 0x00000000\r
+ str r0, [r2, #0]\r
+ ldr r0, = 0x00900090\r
+ str r0, [r2, #0]\r
+\r
+ // Confirm page mode enabled\r
+ ldr r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+ ldr r0, = 0x00000000\r
+ str r0, [r2, #0]\r
+ ldr r0, [r2, #0]\r
+\r
+ bx r5\r
--- /dev/null
+/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/ArmPlatformSysConfigLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/ArmTrustzone.h>
+#include <Drivers/PL310L2Cache.h>
+
+#include <ArmPlatform.h>
+
+/**
+ Initialize the Secure peripherals and memory regions
+
+ If Trustzone is supported by your platform then this function makes the required initialization
+ of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+ IN UINTN MpId
+ )
+{
+ // Nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return;
+ }
+
+ //
+ // Setup TZ Protection Controller
+ //
+
+ if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
+ ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
+ } else {
+ ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
+ }
+
+ // Set Non Secure access for all devices
+ TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
+ TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
+ TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF);
+
+ // Remove Non secure access to secure devices
+ TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0,
+ ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC);
+
+ TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2,
+ ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK);
+
+ //
+ // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
+ //
+
+ // NOR Flash 0 non secure (BootMon)
+ TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_NOR0_BASE,0,
+ TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+ // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
+ if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+ //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+ TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
+ TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+ } else {
+ TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_NOR1_BASE,0,
+ TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+ }
+
+ // Base of SRAM. Only half of SRAM in Non Secure world
+ // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
+ if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+ //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+ TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_SRAM_BASE,0,
+ TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
+ } else {
+ TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_SRAM_BASE,0,
+ TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+ }
+
+ // Memory Mapped Peripherals. All in non secure world
+ TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_PERIPH_BASE,0,
+ TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+ // MotherBoard Peripherals and On-chip peripherals.
+ TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0,
+ TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW);
+}
+
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+ IN UINTN MpId
+ )
+{
+ // If it is not the primary core then there is nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // The L2x0 controller must be intialize in Secure World
+ L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase),
+ PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
+ PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
+ 0,~0, // Use default setting for the Auxiliary Control Register
+ FALSE);
+
+ // Initialize the System Configuration
+ ArmPlatformSysConfigInitialize ();
+
+ // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
+ // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
+ if ((FeaturePcdGet (PcdSystemMemoryInitializeInSec)) || (FeaturePcdGet (PcdStandalone) == FALSE)) {
+ // If it is not a standalone build ensure the PcdSystemMemoryInitializeInSec has been set
+ ASSERT(FeaturePcdGet (PcdSystemMemoryInitializeInSec) == TRUE);
+
+ // Initialize system memory (DRAM)
+ ArmPlatformInitializeSystemMemory ();
+ }
+
+ return RETURN_SUCCESS;
+}
--- /dev/null
+#/* @file
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = RTSMArmVExpressSecLib
+ FILE_GUID = 1fdaabb0-ab7d-480c-91ff-428dc1546f3a
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformSecLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ IoLib
+ ArmLib
+ SerialPortLib
+
+[Sources.common]
+ RTSMSec.c
+ RTSMBoot.asm | RVCT
+ RTSMBoot.S | GCC
+ RTSMHelper.asm | RVCT
+ RTSMHelper.S | GCC
+
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable
+ gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
+ gArmPlatformTokenSpaceGuid.PcdStandalone
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdFvBaseAddress
+
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/ArmPlatformLib.h>\r
+#include <AutoGen.h>\r
+#include <ArmPlatform.h>\r
+\r
+.text\r
+.align 3\r
+\r
+GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootAction):\r
+ bx lr\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootMemoryInit):\r
+ // The SMC does not need to be initialized for RTSM\r
+ bx lr\r
--- /dev/null
+//\r
+// Copyright (c) 2011, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/ArmPlatformLib.h>\r
+#include <AutoGen.h>\r
+#include <ArmPlatform.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+\r
+ EXPORT ArmPlatformSecBootAction\r
+ EXPORT ArmPlatformSecBootMemoryInit\r
+\r
+ PRESERVE8\r
+ AREA RTSMVExpressBootMode, CODE, READONLY\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ArmPlatformSecBootAction\r
+ bx lr\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ArmPlatformSecBootMemoryInit\r
+ // The SMC does not need to be initialized for RTSM\r
+ bx lr\r
--- /dev/null
+#\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+# \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http:#opensource.org/licenses/bsd-license.php \r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <AutoGen.h>\r
+#.include AsmMacroIoLib.inc\r
+\r
+#include <Chipset/ArmCortexA9.h>\r
+\r
+.text\r
+.align 2\r
+\r
+GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)\r
+\r
+# IN None\r
+# OUT r0 = SCU Base Address\r
+ASM_PFX(ArmGetScuBaseAddress):\r
+ # Read Configuration Base Address Register. ArmCBar cannot be called to get\r
+ # the Configuration BAR as a stack is not necessary setup. The SCU is at the\r
+ # offset 0x0000 from the Private Memory Region.\r
+ mrc p15, 4, r0, c15, c0, 0\r
+ bx lr\r
+\r
+# IN None\r
+# OUT r0 = number of cores present in the system\r
+ASM_PFX(ArmGetCpuCountPerCluster):\r
+ stmfd SP!, {r1-r2}\r
+\r
+ # Read CP15 MIDR\r
+ mrc p15, 0, r1, c0, c0, 0\r
+\r
+ # Check if the CPU is A15\r
+ mov r1, r1, LSR #4\r
+ LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)\r
+ and r1, r1, r0\r
+\r
+ LoadConstantToReg (ARM_CPU_TYPE_A15, r0)\r
+ cmp r1, r0\r
+ beq _Read_cp15_reg\r
+\r
+_CPU_is_not_A15:\r
+ mov r2, lr @ Save link register\r
+ bl ArmGetScuBaseAddress @ Read SCU Base Address\r
+ mov lr, r2 @ Restore link register val\r
+ ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count\r
+ b _Return\r
+\r
+_Read_cp15_reg:\r
+ mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count\r
+ lsr r0, #24\r
+\r
+_Return:\r
+ and r0, r0, #3\r
+ # Add '1' to the number of CPU on the Cluster\r
+ add r0, r0, #1\r
+ ldmfd SP!, {r1-r2}\r
+ bx lr\r
+\r
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED \r
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+// \r
+// This program and the accompanying materials \r
+// are licensed and made available under the terms and conditions of the BSD License \r
+// which accompanies this distribution. The full text of the license may be found at \r
+// http://opensource.org/licenses/bsd-license.php \r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#include <Chipset/ArmCortexA9.h>\r
+\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+\r
+ EXPORT ArmGetCpuCountPerCluster\r
+ \r
+ AREA RTSMHelper, CODE, READONLY\r
+\r
+// IN None\r
+// OUT r0 = SCU Base Address\r
+ArmGetScuBaseAddress\r
+ // Read Configuration Base Address Register. ArmCBar cannot be called to get\r
+ // the Configuration BAR as a stack is not necessary setup. The SCU is at the\r
+ // offset 0x0000 from the Private Memory Region.\r
+ mrc p15, 4, r0, c15, c0, 0\r
+ bx lr\r
+\r
+// IN None\r
+// OUT r0 = number of cores present in the system\r
+ArmGetCpuCountPerCluster\r
+ stmfd SP!, {r1-r2}\r
+\r
+ // Read CP15 MIDR\r
+ mrc p15, 0, r1, c0, c0, 0\r
+\r
+ // Check if the CPU is A15\r
+ mov r1, r1, LSR #4\r
+ mov r0, #ARM_CPU_TYPE_MASK\r
+ and r1, r1, r0\r
+\r
+ mov r0, #ARM_CPU_TYPE_A15\r
+ cmp r1, r0\r
+ beq _Read_cp15_reg\r
+\r
+_CPU_is_not_A15\r
+ mov r2, lr ; Save link register\r
+ bl ArmGetScuBaseAddress ; Read SCU Base Address\r
+ mov lr, r2 ; Restore link register val\r
+ ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] ; Read SCU Config reg to get CPU count\r
+ b _Return\r
+\r
+_Read_cp15_reg\r
+ mrc p15, 1, r0, c9, c0, 2 ; Read C9 register of CP15 to get CPU count\r
+ lsr r0, #24\r
+\r
+\r
+_Return\r
+ and r0, r0, #3\r
+ // Add '1' to the number of CPU on the Cluster\r
+ add r0, r0, #1\r
+ ldmfd SP!, {r1-r2}\r
+ bx lr\r
+\r
+ END\r
--- /dev/null
+/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/PL310L2Cache.h>
+#include <Drivers/SP804Timer.h>
+
+#include <ArmPlatform.h>
+
+/**
+ Initialize the Secure peripherals and memory regions
+
+ If Trustzone is supported by your platform then this function makes the required initialization
+ of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+ IN UINTN MpId
+ )
+{
+ // No TZPC or TZASC on RTSM to initialize
+}
+
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+ IN UINTN MpId
+ )
+{
+ // If it is not the primary core then there is nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // Configure periodic timer (TIMER0) for 1MHz operation
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+ // Configure 1MHz clock
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+ // Configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Call before jumping to Normal World
+
+ This function allows the firmware platform to do extra actions before
+ jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+ IN UINTN MpId,
+ OUT UINTN* JumpAddress
+ )
+{
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}
UINT64 NumberOfBytes;
} ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR;
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the satck has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-VOID
-ArmPlatformInitializeBootMemory (
- VOID
- );
-
/**
Return the current Boot Mode
VOID
);
-/**
- Call at the beginning of the platform boot up
-
- This function allows the firmware platform to do extra actions at the early
- stage of the platform power up.
-
- Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-VOID
-ArmPlatformSecBootAction (
- VOID
- );
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-VOID
-ArmPlatformSecInitialize (
- VOID
- );
-
-/**
- Call before jumping to Normal World
-
- This function allows the firmware platform to do extra actions before
- jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
- IN UINTN MpId,
- OUT UINTN* JumpAddress
- );
-
/**
Initialize controllers that must setup in the normal world
VOID
);
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformTrustzoneInit (
- IN UINTN MpId
- );
-
/**
Return the Virtual Memory Map of your platform
--- /dev/null
+/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef _ARMPLATFORMSECLIB_H_
+#define _ARMPLATFORMSECLIB_H_
+
+/**
+ Initialize the memory where the initial stacks will reside
+
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).
+ In some platform, this region is already initialized and the implementation of this function can
+ do nothing. This memory can also represent the Secure RAM.
+ This function is called before the satck has been set up. Its implementation must ensure the stack
+ pointer is not used (probably required to use assembly language)
+
+**/
+VOID
+ArmPlatformSecBootMemoryInit (
+ VOID
+ );
+
+/**
+ Call at the beginning of the platform boot up
+
+ This function allows the firmware platform to do extra actions at the early
+ stage of the platform power up.
+
+ Note: This function must be implemented in assembler as there is no stack set up yet
+
+**/
+VOID
+ArmPlatformSecBootAction (
+ VOID
+ );
+
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example: Some L2 controller, interconnect, clock, DMC, etc
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+ IN UINTN MpId
+ );
+
+/**
+ Call before jumping to Normal World
+
+ This function allows the firmware platform to do extra actions before
+ jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+ IN UINTN MpId,
+ OUT UINTN* JumpAddress
+ );
+
+/**
+ Initialize the Secure peripherals and memory regions
+
+ If Trustzone is supported by your platform then this function makes the required initialization
+ of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+ IN UINTN MpId
+ );
+
+#endif
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <Base.h>\r
-#include <AutoGen.h>\r
-\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
-GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ASM_PFX(ArmPlatformSecBootAction):\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ASM_PFX(ArmPlatformInitializeBootMemory):\r
- // The SMC does not need to be initialized for RTSM\r
- bx lr\r
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//\r
-\r
-#include <Base.h>\r
-#include <AutoGen.h>\r
-\r
- EXPORT ArmPlatformSecBootAction\r
- EXPORT ArmPlatformInitializeBootMemory\r
-\r
- PRESERVE8\r
- AREA ArmPlatformLibBoot, CODE, READONLY\r
-\r
-/**\r
- Call at the beginning of the platform boot up\r
-\r
- This function allows the firmware platform to do extra actions at the early\r
- stage of the platform power up.\r
-\r
- Note: This function must be implemented in assembler as there is no stack set up yet\r
-\r
-**/\r
-ArmPlatformSecBootAction\r
- bx lr\r
-\r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ArmPlatformInitializeBootMemory\r
- // The SMC does not need to be initialized for RTSM\r
- bx lr\r
+++ /dev/null
-/** @file
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-/**
- Initialize the Secure peripherals and memory regions
-
- If Trustzone is supported by your platform then this function makes the required initialization
- of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformTrustzoneInit (
- IN UINTN MpId
- )
-{
- // Secondary cores might have to set the Secure SGIs into the GICD_IGROUPR0
- if (!IS_PRIMARY_CORE(MpId)) {
- return;
- }
-
- ASSERT(FALSE);
-}
-
-/**
- Initialize controllers that must setup at the early stage
-
- Some peripherals must be initialized in Secure World.
- For example, some L2x0 requires to be initialized in Secure World
-
-**/
-VOID
-ArmPlatformSecInitialize (
- VOID
- )
-{
- // Do nothing yet
-}
-
-/**
- Call before jumping to Normal World
-
- This function allows the firmware platform to do extra actions before
- jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
- IN UINTN MpId,
- OUT UINTN* JumpAddress
- )
-{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
-}
+++ /dev/null
-#/* @file\r
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
-# \r
-# This program and the accompanying materials \r
-# are licensed and made available under the terms and conditions of the BSD License \r
-# which accompanies this distribution. The full text of the license may be found at \r
-# http://opensource.org/licenses/bsd-license.php \r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-#\r
-#*/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmPlatformLibSecNull\r
- FILE_GUID = 83333d9e-b00d-44cb-819c-e154c7efe79a\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ArmPlatformLib\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- ArmPkg/ArmPkg.dec\r
- ArmPlatformPkg/ArmPlatformPkg.dec\r
-\r
-[LibraryClasses]\r
- ArmLib\r
- DebugLib\r
-\r
-[Sources.common]\r
- ArmPlatformLibNull.c\r
- ArmPlatformLibNullSec.c\r
- ArmPlatformLibNullBoot.asm | RVCT\r
- ArmPlatformLibNullBoot.S | GCC\r
-\r
-[FixedPcd]\r
- gArmTokenSpaceGuid.PcdFvBaseAddress\r
-\r
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
- gArmTokenSpaceGuid.PcdArmPrimaryCore\r
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <Base.h>\r
+#include <AutoGen.h>\r
+\r
+.text\r
+.align 3\r
+\r
+GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootAction):\r
+ bx lr\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ASM_PFX(ArmPlatformSecBootMemoryInit):\r
+ // The SMC does not need to be initialized for RTSM\r
+ bx lr\r
--- /dev/null
+//\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <Base.h>\r
+#include <AutoGen.h>\r
+\r
+ EXPORT ArmPlatformSecBootAction\r
+ EXPORT ArmPlatformSecBootMemoryInit\r
+\r
+ PRESERVE8\r
+ AREA ArmPlatformSecLibBoot, CODE, READONLY\r
+\r
+/**\r
+ Call at the beginning of the platform boot up\r
+\r
+ This function allows the firmware platform to do extra actions at the early\r
+ stage of the platform power up.\r
+\r
+ Note: This function must be implemented in assembler as there is no stack set up yet\r
+\r
+**/\r
+ArmPlatformSecBootAction\r
+ bx lr\r
+\r
+/**\r
+ Initialize the memory where the initial stacks will reside\r
+\r
+ This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
+ In some platform, this region is already initialized and the implementation of this function can\r
+ do nothing. This memory can also represent the Secure RAM.\r
+ This function is called before the satck has been set up. Its implementation must ensure the stack\r
+ pointer is not used (probably required to use assembly language)\r
+\r
+**/\r
+ArmPlatformSecBootMemoryInit\r
+ // The SMC does not need to be initialized for RTSM\r
+ bx lr\r
--- /dev/null
+/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+/**
+ Initialize the Secure peripherals and memory regions
+
+ If Trustzone is supported by your platform then this function makes the required initialization
+ of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+ IN UINTN MpId
+ )
+{
+ // Secondary cores might have to set the Secure SGIs into the GICD_IGROUPR0
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return;
+ }
+
+ ASSERT(FALSE);
+}
+
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+ IN UINTN MpId
+ )
+{
+ // If it is not the primary core then there is nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // Do nothing yet
+ return RETURN_SUCCESS;
+}
+
+/**
+ Call before jumping to Normal World
+
+ This function allows the firmware platform to do extra actions before
+ jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+ IN UINTN MpId,
+ OUT UINTN* JumpAddress
+ )
+{
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}
--- /dev/null
+#/* @file\r
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+# \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http://opensource.org/licenses/bsd-license.php \r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#*/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmPlatformLibSecNull\r
+ FILE_GUID = a2cf63c6-d44f-4cd0-8af6-722a0138c021\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = ArmPlatformSecLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+ ArmPlatformPkg/ArmPlatformPkg.dec\r
+\r
+[LibraryClasses]\r
+ ArmLib\r
+ DebugLib\r
+\r
+[Sources.common]\r
+ ArmPlatformLibNullSec.c\r
+ ArmPlatformLibNullBoot.asm | RVCT\r
+ ArmPlatformLibNullBoot.S | GCC\r
+\r
+[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress\r
+\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCore\r
#include <Library/BaseMemoryLib.h>
#include <Library/SerialPortLib.h>
#include <Library/ArmGicLib.h>
-#include <Library/ArmCpuLib.h>
#include "SecInternal.h"
if (FixedPcdGet32 (PcdVFPEnabled)) {
ArmEnableVFP();
}
-
+
+ // Initialize peripherals that must be done at the early stage
+ // Example: Some L2 controller, interconnect, clock, DMC, etc
+ ArmPlatformSecInitialize (MpId);
+
// Primary CPU clears out the SCU tag RAMs, secondaries wait
if (IS_PRIMARY_CORE(MpId)) {
if (ArmIsMpCore()) {
// Enable Full Access to CoProcessors
ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
- if (IS_PRIMARY_CORE(MpId)) {
- // Initialize peripherals that must be done at the early stage
- // Example: Some L2x0 controllers must be initialized in Secure World
- ArmPlatformSecInitialize ();
-
- // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
- // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
- if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
- // Initialize system memory (DRAM)
- ArmPlatformInitializeSystemMemory ();
- }
- }
-
// Test if Trustzone is supported on this platform
if (FixedPcdGetBool (PcdTrustzoneSupport)) {
if (ArmIsMpCore()) {
ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
// Initialize platform specific security policy
- ArmPlatformTrustzoneInit (MpId);
+ ArmPlatformSecTrustzoneInit (MpId);
// Setup the Trustzone Chipsets
if (IS_PRIMARY_CORE(MpId)) {
[LibraryClasses]\r
ArmCpuLib\r
ArmLib\r
- ArmPlatformLib\r
+ ArmPlatformSecLib\r
ArmTrustedMonitorLib\r
BaseLib\r
DebugLib\r
\r
GCC_ASM_IMPORT(CEntryPoint)\r
GCC_ASM_IMPORT(ArmPlatformSecBootAction)\r
-GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)\r
+GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)\r
GCC_ASM_IMPORT(ArmDisableInterrupts)\r
GCC_ASM_IMPORT(ArmDisableCachesAndMmu)\r
GCC_ASM_IMPORT(ArmWriteVBar)\r
\r
_InitMem:\r
// Initialize Init Boot Memory\r
- bl ASM_PFX(ArmPlatformInitializeBootMemory)\r
+ bl ASM_PFX(ArmPlatformSecBootMemoryInit)\r
\r
// Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)\r
\r
IMPORT CEntryPoint\r
IMPORT ArmPlatformSecBootAction\r
- IMPORT ArmPlatformInitializeBootMemory\r
+ IMPORT ArmPlatformSecBootMemoryInit\r
IMPORT ArmDisableInterrupts\r
IMPORT ArmDisableCachesAndMmu\r
IMPORT ArmWriteVBar\r
\r
_InitMem\r
// Initialize Init Boot Memory\r
- bl ArmPlatformInitializeBootMemory\r
+ bl ArmPlatformSecBootMemoryInit\r
\r
// Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)\r
#include <Base.h>\r
#include <Library/ArmLib.h>\r
#include <Library/ArmCpuLib.h>\r
-#include <Library/ArmPlatformLib.h>\r
+#include <Library/ArmPlatformSecLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PcdLib.h>\r
VOID\r
);\r
\r
-VOID\r
-NonSecureWaitForFirmware (\r
- VOID\r
- );\r
-\r
VOID\r
enter_monitor_mode (\r
IN UINTN MonitorEntryPoint,\r
return (BEAGLEBOARD_REVISION)((Revision >> 11) & 0x7);
}
-/**
- Return if Trustzone is supported by your platform
-
- A non-zero value must be returned if you want to support a Secure World on your platform.
- ArmPlatformTrustzoneInit() will later set up the secure regions.
- This function can return 0 even if Trustzone is supported by your processor. In this case,
- the platform will continue to run in Secure World.
-
- @return A non-zero value if Trustzone supported.
-
-**/
-UINTN
-ArmPlatformTrustzoneSupported (
- VOID
- )
-{
- // The BeagleBoard starts in Normal World (Non Secure World)
- return FALSE;
-}
-
-/**
- Remap the memory at 0x0
-
- Some platform requires or gives the ability to remap the memory at the address 0x0.
- This function can do nothing if this feature is not relevant to your platform.
-
-**/
-VOID
-ArmPlatformBootRemapping (
- VOID
- )
-{
- // Do nothing for the BeagleBoard
-}
-
/**
Return the current Boot Mode
+++ /dev/null
-//
-// Copyright (c) 2011, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <BeagleBoard.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformIsBootMemoryInitialized)
-GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
-
-/**
- Called at the early stage of the Boot phase to know if the memory has already been initialized
-
- Running the code from the reset vector does not mean we start from cold boot. In some case, we
- can go through this code with the memory already initialized.
- Because this function is called at the early stage, the implementation must not use the stack.
- Its implementation must probably done in assembly to ensure this requirement.
-
- @return Return a non zero value if initialized
-
-**/
-ASM_PFX(ArmPlatformIsBootMemoryInitialized):
- // The system memory is initialized by the BeagleBoard firmware
- mov r0, #1
- bx lr
-
-
-/**
- Initialize the memory where the initial stacks will reside
-
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).
- In some platform, this region is already initialized and the implementation of this function can
- do nothing. This memory can also represent the Secure RAM.
- This function is called before the satck has been set up. Its implementation must ensure the stack
- pointer is not used (probably required to use assembly language)
-
-**/
-ASM_PFX(ArmPlatformInitializeBootMemory):
- // We must need to go into this function
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
+++ /dev/null
-//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
-// \r
-// This program and the accompanying materials \r
-// are licensed and made available under the terms and conditions of the BSD License \r
-// which accompanies this distribution. The full text of the license may be found at \r
-// http://opensource.org/licenses/bsd-license.php \r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-//\r
-//\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
-#include <BeagleBoard.h>\r
-#include <AutoGen.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
- \r
- EXPORT ArmPlatformIsBootMemoryInitialized\r
- EXPORT ArmPlatformInitializeBootMemory\r
- \r
- PRESERVE8\r
- AREA BeagleBoardHelper, CODE, READONLY\r
-\r
-/**\r
- Called at the early stage of the Boot phase to know if the memory has already been initialized\r
-\r
- Running the code from the reset vector does not mean we start from cold boot. In some case, we\r
- can go through this code with the memory already initialized.\r
- Because this function is called at the early stage, the implementation must not use the stack.\r
- Its implementation must probably done in assembly to ensure this requirement.\r
-\r
- @return Return a non zero value if initialized\r
-\r
-**/\r
-ArmPlatformIsBootMemoryInitialized\r
- // The system memory is initialized by the BeagleBoard firmware\r
- mov r0, #1\r
- bx lr\r
- \r
-/**\r
- Initialize the memory where the initial stacks will reside\r
-\r
- This memory can contain the initial stacks (Secure and Secure Monitor stacks).\r
- In some platform, this region is already initialized and the implementation of this function can\r
- do nothing. This memory can also represent the Secure RAM.\r
- This function is called before the satck has been set up. Its implementation must ensure the stack\r
- pointer is not used (probably required to use assembly language)\r
-\r
-**/\r
-ArmPlatformInitializeBootMemory\r
- // We must need to go into this function\r
- bx lr\r
- \r
- END\r
#/* @file
-# Copyright (c) 2011, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
[Sources.common]
BeagleBoard.c
BeagleBoardMem.c
- BeagleBoardHelper.asm | RVCT
- BeagleBoardHelper.S | GCC
PadConfiguration.c
Clock.c