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1/*
2 * OpenPOWER Palmetto BMC
3 *
4 * Andrew Jeffery <andrew@aj.id.au>
5 *
6 * Copyright 2016 IBM Corp.
7 *
8 * This code is licensed under the GPL version 2 or later. See
9 * the COPYING file in the top-level directory.
10 */
11
12#include "qemu/osdep.h"
da34e65c 13#include "qapi/error.h"
4771d756 14#include "cpu.h"
327d8e4e 15#include "exec/address-spaces.h"
12ec8bd5 16#include "hw/arm/boot.h"
fca9ca1b 17#include "hw/arm/aspeed.h"
00442402 18#include "hw/arm/aspeed_soc.h"
327d8e4e 19#include "hw/boards.h"
93198b6c 20#include "hw/i2c/smbus_eeprom.h"
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21#include "hw/misc/pca9552.h"
22#include "hw/misc/tmp105.h"
a27bd6c7 23#include "hw/qdev-properties.h"
03dd024f 24#include "qemu/log.h"
e1ad9bc4 25#include "sysemu/block-backend.h"
ece09bee 26#include "sysemu/sysemu.h"
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27#include "hw/loader.h"
28#include "qemu/error-report.h"
a9df9622 29#include "qemu/units.h"
327d8e4e 30
74fb1f38 31static struct arm_boot_info aspeed_board_binfo = {
b033271f 32 .board_id = -1, /* device-tree-only board */
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33};
34
ea066d39 35struct AspeedBoardState {
ff90606f 36 AspeedSoCState soc;
ad1a9782 37 MemoryRegion ram_container;
327d8e4e 38 MemoryRegion ram;
ebe31c0a 39 MemoryRegion max_ram;
ea066d39 40};
327d8e4e 41
ef17f836 42/* Palmetto hardware value: 0x120CE416 */
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43#define PALMETTO_BMC_HW_STRAP1 ( \
44 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
45 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
46 SCU_AST2400_HW_STRAP_ACPI_DIS | \
47 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
48 SCU_HW_STRAP_VGA_CLASS_CODE | \
49 SCU_HW_STRAP_LPC_RESET_PIN | \
50 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
51 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
52 SCU_HW_STRAP_SPI_WIDTH | \
53 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
54 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
55
ef17f836 56/* AST2500 evb hardware value: 0xF100C2E6 */
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57#define AST2500_EVB_HW_STRAP1 (( \
58 AST2500_HW_STRAP1_DEFAULTS | \
59 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
60 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
61 SCU_AST2500_HW_STRAP_UART_DEBUG | \
62 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
63 SCU_HW_STRAP_MAC1_RGMII | \
64 SCU_HW_STRAP_MAC0_RGMII) & \
65 ~SCU_HW_STRAP_2ND_BOOT_WDT)
66
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67/* Romulus hardware value: 0xF10AD206 */
68#define ROMULUS_BMC_HW_STRAP1 ( \
69 AST2500_HW_STRAP1_DEFAULTS | \
70 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
71 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
72 SCU_AST2500_HW_STRAP_UART_DEBUG | \
73 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
74 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
75 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
76
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77/* Swift hardware value: 0xF11AD206 */
78#define SWIFT_BMC_HW_STRAP1 ( \
79 AST2500_HW_STRAP1_DEFAULTS | \
80 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
81 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
82 SCU_AST2500_HW_STRAP_UART_DEBUG | \
83 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
84 SCU_H_PLL_BYPASS_EN | \
85 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
86 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
87
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88/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
89#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
90
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91/* AST2600 evb hardware value */
92#define AST2600_EVB_HW_STRAP1 0x000000C0
93#define AST2600_EVB_HW_STRAP2 0x00000003
94
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95/* Tacoma hardware value */
96#define TACOMA_BMC_HW_STRAP1 0x00000000
97#define TACOMA_BMC_HW_STRAP2 0x00000000
98
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99/*
100 * The max ram region is for firmwares that scan the address space
101 * with load/store to guess how much RAM the SoC has.
102 */
103static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size)
104{
105 return 0;
106}
107
108static void max_ram_write(void *opaque, hwaddr offset, uint64_t value,
109 unsigned size)
110{
111 /* Discard writes */
112}
113
114static const MemoryRegionOps max_ram_ops = {
115 .read = max_ram_read,
116 .write = max_ram_write,
117 .endianness = DEVICE_NATIVE_ENDIAN,
118};
119
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120#define FIRMWARE_ADDR 0x0
121
122static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
123 Error **errp)
124{
125 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
126 uint8_t *storage;
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127 int64_t size;
128
129 /* The block backend size should have already been 'validated' by
130 * the creation of the m25p80 object.
131 */
132 size = blk_getlength(blk);
133 if (size <= 0) {
134 error_setg(errp, "failed to get flash size");
135 return;
136 }
d769a1da 137
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138 if (rom_size > size) {
139 rom_size = size;
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140 }
141
142 storage = g_new0(uint8_t, rom_size);
143 if (blk_pread(blk, 0, storage, rom_size) < 0) {
144 error_setg(errp, "failed to read the initial flash content");
145 return;
146 }
147
148 rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
149 g_free(storage);
150}
151
74fb1f38 152static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
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153 Error **errp)
154{
155 int i ;
156
157 for (i = 0; i < s->num_cs; ++i) {
158 AspeedSMCFlash *fl = &s->flashes[i];
159 DriveInfo *dinfo = drive_get_next(IF_MTD);
160 qemu_irq cs_line;
161
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162 fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
163 if (dinfo) {
164 qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
165 errp);
166 }
167 qdev_init_nofail(fl->flash);
168
169 cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
170 sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
171 }
172}
173
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174static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
175{
176 DeviceState *card;
177
178 card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
179 TYPE_SD_CARD);
180 if (dinfo) {
181 qdev_prop_set_drive(card, "drive", blk_by_legacy_dinfo(dinfo),
182 &error_fatal);
183 }
184 object_property_set_bool(OBJECT(card), true, "realized", &error_fatal);
185}
186
baa4732b 187static void aspeed_machine_init(MachineState *machine)
327d8e4e 188{
74fb1f38 189 AspeedBoardState *bmc;
baa4732b 190 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
b033271f 191 AspeedSoCClass *sc;
d769a1da 192 DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
ebe31c0a 193 ram_addr_t max_ram_size;
2bea128c 194 int i;
327d8e4e 195
74fb1f38 196 bmc = g_new0(AspeedBoardState, 1);
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197
198 memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container",
199 UINT32_MAX);
200
1b0ad567 201 object_initialize_child(OBJECT(machine), "soc", &bmc->soc,
baa4732b 202 (sizeof(bmc->soc)), amc->soc_name, &error_abort,
1b0ad567 203 NULL);
327d8e4e 204
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205 sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
206
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207 object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
208 &error_abort);
baa4732b 209 object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1",
87e79af0 210 &error_abort);
baa4732b 211 object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2",
ccc2c418 212 &error_abort);
baa4732b 213 object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs",
26d5df95 214 &error_abort);
cc7d44c2 215 object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
ece09bee 216 &error_abort);
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217 object_property_set_link(OBJECT(&bmc->soc), OBJECT(&bmc->ram_container),
218 "dram", &error_abort);
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219 if (machine->kernel_filename) {
220 /*
221 * When booting with a -kernel command line there is no u-boot
222 * that runs to unlock the SCU. In this case set the default to
223 * be unlocked as the kernel expects
224 */
225 object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY,
226 "hw-prot-key", &error_abort);
227 }
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228 object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
229 &error_abort);
230
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231 /*
232 * Allocate RAM after the memory controller has checked the size
233 * was valid. If not, a default value is used.
234 */
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235 ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size",
236 &error_abort);
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237
238 memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
ad1a9782 239 memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram);
d783d1fe 240 memory_region_add_subregion(get_system_memory(),
54ecafb7 241 sc->memmap[ASPEED_SDRAM],
ad1a9782 242 &bmc->ram_container);
de46f5f4 243
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244 max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size",
245 &error_abort);
246 memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL,
247 "max_ram", max_ram_size - ram_size);
ad1a9782 248 memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram);
ebe31c0a 249
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250 aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model, &error_abort);
251 aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model, &error_abort);
74fb1f38 252
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253 /* Install first FMC flash content as a boot rom. */
254 if (drive0) {
255 AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
256 MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
257
258 /*
259 * create a ROM region using the default mapping window size of
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260 * the flash module. The window size is 64MB for the AST2400
261 * SoC and 128MB for the AST2500 SoC, which is twice as big as
262 * needed by the flash modules of the Aspeed machines.
d769a1da 263 */
44cf837d 264 memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
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265 fl->size, &error_abort);
266 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
267 boot_rom);
268 write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
269 }
270
74fb1f38 271 aspeed_board_binfo.ram_size = ram_size;
54ecafb7 272 aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM];
ece09bee 273 aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus;
e1ad9bc4 274
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275 if (amc->i2c_init) {
276 amc->i2c_init(bmc);
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277 }
278
0e2c24c6 279 for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
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280 sdhci_attach_drive(&bmc->soc.sdhci.slots[i], drive_get_next(IF_SD));
281 }
2bea128c 282
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283 if (bmc->soc.emmc.num_slots) {
284 sdhci_attach_drive(&bmc->soc.emmc.slots[0], drive_get_next(IF_SD));
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285 }
286
2744ece8 287 arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
74fb1f38 288}
b033271f 289
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290static void palmetto_bmc_i2c_init(AspeedBoardState *bmc)
291{
292 AspeedSoCState *soc = &bmc->soc;
a87e81b9 293 DeviceState *dev;
3d165f12 294 uint8_t *eeprom_buf = g_malloc0(32 * 1024);
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295
296 /* The palmetto platform expects a ds3231 RTC but a ds1338 is
297 * enough to provide basic RTC features. Alarms will be missing */
298 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68);
a87e81b9 299
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300 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), 0x50,
301 eeprom_buf);
302
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303 /* add a TMP423 temperature sensor */
304 dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2),
305 "tmp423", 0x4c);
306 object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort);
307 object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort);
308 object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort);
309 object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort);
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310}
311
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312static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
313{
314 AspeedSoCState *soc = &bmc->soc;
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315 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
316
317 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), 0x50,
318 eeprom_buf);
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319
320 /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
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321 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7),
322 TYPE_TMP105, 0x4d);
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323
324 /* The AST2500 EVB does not have an RTC. Let's pretend that one is
325 * plugged on the I2C bus header */
326 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
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327}
328
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329static void ast2600_evb_i2c_init(AspeedBoardState *bmc)
330{
331 /* Start with some devices on our I2C busses */
332 ast2500_evb_i2c_init(bmc);
333}
334
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335static void romulus_bmc_i2c_init(AspeedBoardState *bmc)
336{
337 AspeedSoCState *soc = &bmc->soc;
338
339 /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
340 * good enough */
341 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
342}
343
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344static void swift_bmc_i2c_init(AspeedBoardState *bmc)
345{
346 AspeedSoCState *soc = &bmc->soc;
347
348 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60);
349
350 /* The swift board expects a TMP275 but a TMP105 is compatible */
351 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x48);
352 /* The swift board expects a pca9551 but a pca9552 is compatible */
353 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "pca9552", 0x60);
354
355 /* The swift board expects an Epson RX8900 RTC but a ds1338 is compatible */
356 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "ds1338", 0x32);
357 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x60);
358
359 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp423", 0x4c);
360 /* The swift board expects a pca9539 but a pca9552 is compatible */
361 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "pca9552", 0x74);
362
363 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "tmp423", 0x4c);
364 /* The swift board expects a pca9539 but a pca9552 is compatible */
365 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "pca9552",
366 0x74);
367
368 /* The swift board expects a TMP275 but a TMP105 is compatible */
369 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x48);
370 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x4a);
371}
372
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373static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc)
374{
375 AspeedSoCState *soc = &bmc->soc;
3d165f12 376 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
62c2c2eb 377
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378 /* Bus 3: TODO bmp280@77 */
379 /* Bus 3: TODO max31785@52 */
380 /* Bus 3: TODO dps310@76 */
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381 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552,
382 0x60);
8c9a61d7 383
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384 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c);
385 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c);
386
387 /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
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388 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105,
389 0x4a);
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390
391 /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
392 * good enough */
393 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32);
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394
395 smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51,
396 eeprom_buf);
044475f3 397 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552,
8c9a61d7 398 0x60);
63ceb818 399 /* Bus 11: TODO ucd90160@64 */
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400}
401
fca9ca1b 402static void aspeed_machine_class_init(ObjectClass *oc, void *data)
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403{
404 MachineClass *mc = MACHINE_CLASS(oc);
405
fca9ca1b 406 mc->init = aspeed_machine_init;
ece09bee 407 mc->max_cpus = ASPEED_CPUS_NUM;
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408 mc->no_floppy = 1;
409 mc->no_cdrom = 1;
410 mc->no_parallel = 1;
411}
412
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413static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
414{
415 MachineClass *mc = MACHINE_CLASS(oc);
416 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
417
418 mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
419 amc->soc_name = "ast2400-a1";
420 amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
421 amc->fmc_model = "n25q256a";
422 amc->spi_model = "mx25l25635e";
423 amc->num_cs = 1;
424 amc->i2c_init = palmetto_bmc_i2c_init;
425 mc->default_ram_size = 256 * MiB;
426};
427
428static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
429{
430 MachineClass *mc = MACHINE_CLASS(oc);
431 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
432
433 mc->desc = "Aspeed AST2500 EVB (ARM1176)";
434 amc->soc_name = "ast2500-a1";
435 amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
436 amc->fmc_model = "w25q256";
437 amc->spi_model = "mx25l25635e";
438 amc->num_cs = 1;
439 amc->i2c_init = ast2500_evb_i2c_init;
440 mc->default_ram_size = 512 * MiB;
441};
442
443static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
444{
445 MachineClass *mc = MACHINE_CLASS(oc);
446 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
447
448 mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
449 amc->soc_name = "ast2500-a1";
450 amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
451 amc->fmc_model = "n25q256a";
452 amc->spi_model = "mx66l1g45g";
453 amc->num_cs = 2;
454 amc->i2c_init = romulus_bmc_i2c_init;
455 mc->default_ram_size = 512 * MiB;
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456};
457
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458static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data)
459{
460 MachineClass *mc = MACHINE_CLASS(oc);
461 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
462
463 mc->desc = "OpenPOWER Swift BMC (ARM1176)";
464 amc->soc_name = "ast2500-a1";
465 amc->hw_strap1 = SWIFT_BMC_HW_STRAP1;
466 amc->fmc_model = "mx66l1g45g";
467 amc->spi_model = "mx66l1g45g";
468 amc->num_cs = 2;
469 amc->i2c_init = swift_bmc_i2c_init;
470 mc->default_ram_size = 512 * MiB;
471};
472
473static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
474{
475 MachineClass *mc = MACHINE_CLASS(oc);
476 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
477
478 mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
479 amc->soc_name = "ast2500-a1";
480 amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
481 amc->fmc_model = "mx25l25635e";
482 amc->spi_model = "mx66l1g45g";
483 amc->num_cs = 2;
484 amc->i2c_init = witherspoon_bmc_i2c_init;
485 mc->default_ram_size = 512 * MiB;
486};
487
488static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
489{
490 MachineClass *mc = MACHINE_CLASS(oc);
491 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
492
493 mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
494 amc->soc_name = "ast2600-a0";
495 amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
496 amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
497 amc->fmc_model = "w25q512jv";
498 amc->spi_model = "mx66u51235f";
499 amc->num_cs = 1;
500 amc->i2c_init = ast2600_evb_i2c_init;
501 mc->default_ram_size = 1 * GiB;
502};
503
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504static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
505{
506 MachineClass *mc = MACHINE_CLASS(oc);
507 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
508
509 mc->desc = "Aspeed AST2600 EVB (Cortex A7)";
510 amc->soc_name = "ast2600-a0";
511 amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
512 amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
513 amc->fmc_model = "mx66l1g45g";
514 amc->spi_model = "mx66l1g45g";
515 amc->num_cs = 2;
516 amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */
517 mc->default_ram_size = 1 * GiB;
518};
519
baa4732b 520static const TypeInfo aspeed_machine_types[] = {
fca9ca1b 521 {
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522 .name = MACHINE_TYPE_NAME("palmetto-bmc"),
523 .parent = TYPE_ASPEED_MACHINE,
524 .class_init = aspeed_machine_palmetto_class_init,
fca9ca1b 525 }, {
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526 .name = MACHINE_TYPE_NAME("ast2500-evb"),
527 .parent = TYPE_ASPEED_MACHINE,
528 .class_init = aspeed_machine_ast2500_evb_class_init,
fca9ca1b 529 }, {
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530 .name = MACHINE_TYPE_NAME("romulus-bmc"),
531 .parent = TYPE_ASPEED_MACHINE,
532 .class_init = aspeed_machine_romulus_class_init,
aae7a18d 533 }, {
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534 .name = MACHINE_TYPE_NAME("swift-bmc"),
535 .parent = TYPE_ASPEED_MACHINE,
536 .class_init = aspeed_machine_swift_class_init,
fca9ca1b 537 }, {
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538 .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
539 .parent = TYPE_ASPEED_MACHINE,
540 .class_init = aspeed_machine_witherspoon_class_init,
ccc2c418 541 }, {
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542 .name = MACHINE_TYPE_NAME("ast2600-evb"),
543 .parent = TYPE_ASPEED_MACHINE,
544 .class_init = aspeed_machine_ast2600_evb_class_init,
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545 }, {
546 .name = MACHINE_TYPE_NAME("tacoma-bmc"),
547 .parent = TYPE_ASPEED_MACHINE,
548 .class_init = aspeed_machine_tacoma_class_init,
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549 }, {
550 .name = TYPE_ASPEED_MACHINE,
551 .parent = TYPE_MACHINE,
552 .instance_size = sizeof(AspeedMachine),
553 .class_size = sizeof(AspeedMachineClass),
554 .class_init = aspeed_machine_class_init,
555 .abstract = true,
fca9ca1b 556 }
baa4732b 557};
74fb1f38 558
baa4732b 559DEFINE_TYPES(aspeed_machine_types)