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1965aae3 PA |
1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | |
6c386655 | 3 | |
21729f81 | 4 | #include <linux/mem_encrypt.h> |
c47c1b1f | 5 | #include <asm/page.h> |
8d19c99f | 6 | #include <asm/pgtable_types.h> |
b2bc2731 | 7 | |
8a7b12f7 | 8 | /* |
9 | * Macro to mark a page protection value as UC- | |
10 | */ | |
d85f3334 JG |
11 | #define pgprot_noncached(prot) \ |
12 | ((boot_cpu_data.x86 > 3) \ | |
13 | ? (__pgprot(pgprot_val(prot) | \ | |
14 | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ | |
8a7b12f7 | 15 | : (prot)) |
16 | ||
21729f81 TL |
17 | /* |
18 | * Macros to add or remove encryption attribute | |
19 | */ | |
20 | #define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot))) | |
21 | #define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot))) | |
22 | ||
4614139c | 23 | #ifndef __ASSEMBLY__ |
55a6ca25 PA |
24 | #include <asm/x86_init.h> |
25 | ||
b9d05200 TL |
26 | extern pgd_t early_top_pgt[PTRS_PER_PGD]; |
27 | int __init __early_make_pgtable(unsigned long address, pmdval_t pmd); | |
28 | ||
ef6bea6d | 29 | void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); |
e1a58320 SS |
30 | void ptdump_walk_pgd_level_checkwx(void); |
31 | ||
32 | #ifdef CONFIG_DEBUG_WX | |
33 | #define debug_checkwx() ptdump_walk_pgd_level_checkwx() | |
34 | #else | |
35 | #define debug_checkwx() do { } while (0) | |
36 | #endif | |
ef6bea6d | 37 | |
8405b122 JF |
38 | /* |
39 | * ZERO_PAGE is a global shared page that is always zero: used | |
40 | * for zero-mapped memory areas etc.. | |
41 | */ | |
277d5b40 AK |
42 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
43 | __visible; | |
8405b122 JF |
44 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
45 | ||
e3ed910d JF |
46 | extern spinlock_t pgd_lock; |
47 | extern struct list_head pgd_list; | |
8405b122 | 48 | |
617d34d9 JF |
49 | extern struct mm_struct *pgd_page_get_mm(struct page *page); |
50 | ||
21729f81 TL |
51 | extern pmdval_t early_pmd_flags; |
52 | ||
54321d94 JF |
53 | #ifdef CONFIG_PARAVIRT |
54 | #include <asm/paravirt.h> | |
55 | #else /* !CONFIG_PARAVIRT */ | |
56 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | |
57 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | |
2609ae6d | 58 | #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) |
a00cc7d9 | 59 | #define set_pud_at(mm, addr, pudp, pud) native_set_pud_at(mm, addr, pudp, pud) |
54321d94 | 60 | |
54321d94 JF |
61 | #define set_pte_atomic(ptep, pte) \ |
62 | native_set_pte_atomic(ptep, pte) | |
63 | ||
64 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | |
65 | ||
f2a6a705 | 66 | #ifndef __PAGETABLE_P4D_FOLDED |
54321d94 JF |
67 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) |
68 | #define pgd_clear(pgd) native_pgd_clear(pgd) | |
69 | #endif | |
70 | ||
f2a6a705 KS |
71 | #ifndef set_p4d |
72 | # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) | |
73 | #endif | |
74 | ||
75 | #ifndef __PAGETABLE_PUD_FOLDED | |
76 | #define p4d_clear(p4d) native_p4d_clear(p4d) | |
77 | #endif | |
78 | ||
54321d94 JF |
79 | #ifndef set_pud |
80 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | |
81 | #endif | |
82 | ||
d0f33ac9 | 83 | #ifndef __PAGETABLE_PUD_FOLDED |
54321d94 JF |
84 | #define pud_clear(pud) native_pud_clear(pud) |
85 | #endif | |
86 | ||
87 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | |
88 | #define pmd_clear(pmd) native_pmd_clear(pmd) | |
89 | ||
90 | #define pte_update(mm, addr, ptep) do { } while (0) | |
54321d94 | 91 | |
54321d94 JF |
92 | #define pgd_val(x) native_pgd_val(x) |
93 | #define __pgd(x) native_make_pgd(x) | |
94 | ||
f2a6a705 KS |
95 | #ifndef __PAGETABLE_P4D_FOLDED |
96 | #define p4d_val(x) native_p4d_val(x) | |
97 | #define __p4d(x) native_make_p4d(x) | |
98 | #endif | |
99 | ||
54321d94 JF |
100 | #ifndef __PAGETABLE_PUD_FOLDED |
101 | #define pud_val(x) native_pud_val(x) | |
102 | #define __pud(x) native_make_pud(x) | |
103 | #endif | |
104 | ||
105 | #ifndef __PAGETABLE_PMD_FOLDED | |
106 | #define pmd_val(x) native_pmd_val(x) | |
107 | #define __pmd(x) native_make_pmd(x) | |
108 | #endif | |
109 | ||
110 | #define pte_val(x) native_pte_val(x) | |
111 | #define __pte(x) native_make_pte(x) | |
112 | ||
224101ed JF |
113 | #define arch_end_context_switch(prev) do {} while(0) |
114 | ||
54321d94 JF |
115 | #endif /* CONFIG_PARAVIRT */ |
116 | ||
4614139c JF |
117 | /* |
118 | * The following only work if pte_present() is true. | |
119 | * Undefined behaviour if not.. | |
120 | */ | |
3cbaeafe JP |
121 | static inline int pte_dirty(pte_t pte) |
122 | { | |
a15af1c9 | 123 | return pte_flags(pte) & _PAGE_DIRTY; |
3cbaeafe JP |
124 | } |
125 | ||
a927cb83 DH |
126 | |
127 | static inline u32 read_pkru(void) | |
128 | { | |
129 | if (boot_cpu_has(X86_FEATURE_OSPKE)) | |
130 | return __read_pkru(); | |
131 | return 0; | |
132 | } | |
133 | ||
9e90199c XG |
134 | static inline void write_pkru(u32 pkru) |
135 | { | |
136 | if (boot_cpu_has(X86_FEATURE_OSPKE)) | |
137 | __write_pkru(pkru); | |
138 | } | |
139 | ||
3cbaeafe JP |
140 | static inline int pte_young(pte_t pte) |
141 | { | |
a15af1c9 | 142 | return pte_flags(pte) & _PAGE_ACCESSED; |
3cbaeafe JP |
143 | } |
144 | ||
c164e038 KS |
145 | static inline int pmd_dirty(pmd_t pmd) |
146 | { | |
147 | return pmd_flags(pmd) & _PAGE_DIRTY; | |
148 | } | |
3cbaeafe | 149 | |
f2d6bfe9 JW |
150 | static inline int pmd_young(pmd_t pmd) |
151 | { | |
152 | return pmd_flags(pmd) & _PAGE_ACCESSED; | |
153 | } | |
154 | ||
a00cc7d9 MW |
155 | static inline int pud_dirty(pud_t pud) |
156 | { | |
157 | return pud_flags(pud) & _PAGE_DIRTY; | |
158 | } | |
159 | ||
160 | static inline int pud_young(pud_t pud) | |
161 | { | |
162 | return pud_flags(pud) & _PAGE_ACCESSED; | |
163 | } | |
164 | ||
3cbaeafe JP |
165 | static inline int pte_write(pte_t pte) |
166 | { | |
a15af1c9 | 167 | return pte_flags(pte) & _PAGE_RW; |
3cbaeafe JP |
168 | } |
169 | ||
3cbaeafe JP |
170 | static inline int pte_huge(pte_t pte) |
171 | { | |
a15af1c9 | 172 | return pte_flags(pte) & _PAGE_PSE; |
4614139c JF |
173 | } |
174 | ||
3cbaeafe JP |
175 | static inline int pte_global(pte_t pte) |
176 | { | |
a15af1c9 | 177 | return pte_flags(pte) & _PAGE_GLOBAL; |
3cbaeafe JP |
178 | } |
179 | ||
180 | static inline int pte_exec(pte_t pte) | |
181 | { | |
a15af1c9 | 182 | return !(pte_flags(pte) & _PAGE_NX); |
3cbaeafe JP |
183 | } |
184 | ||
7e675137 NP |
185 | static inline int pte_special(pte_t pte) |
186 | { | |
c819f37e | 187 | return pte_flags(pte) & _PAGE_SPECIAL; |
7e675137 NP |
188 | } |
189 | ||
91030ca1 HD |
190 | static inline unsigned long pte_pfn(pte_t pte) |
191 | { | |
192 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
193 | } | |
194 | ||
087975b0 AM |
195 | static inline unsigned long pmd_pfn(pmd_t pmd) |
196 | { | |
f70abb0f | 197 | return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; |
087975b0 AM |
198 | } |
199 | ||
0ee364eb MG |
200 | static inline unsigned long pud_pfn(pud_t pud) |
201 | { | |
f70abb0f | 202 | return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT; |
0ee364eb MG |
203 | } |
204 | ||
fe1e8c3e KS |
205 | static inline unsigned long p4d_pfn(p4d_t p4d) |
206 | { | |
207 | return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; | |
208 | } | |
209 | ||
fd7e3159 TL |
210 | static inline unsigned long pgd_pfn(pgd_t pgd) |
211 | { | |
212 | return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
213 | } | |
214 | ||
fe1e8c3e KS |
215 | static inline int p4d_large(p4d_t p4d) |
216 | { | |
217 | /* No 512 GiB pages yet */ | |
218 | return 0; | |
219 | } | |
220 | ||
91030ca1 HD |
221 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) |
222 | ||
3cbaeafe JP |
223 | static inline int pmd_large(pmd_t pte) |
224 | { | |
027ef6c8 | 225 | return pmd_flags(pte) & _PAGE_PSE; |
3cbaeafe JP |
226 | } |
227 | ||
f2d6bfe9 | 228 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
f2d6bfe9 JW |
229 | static inline int pmd_trans_huge(pmd_t pmd) |
230 | { | |
5c7fb56e | 231 | return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; |
f2d6bfe9 | 232 | } |
4b7167b9 | 233 | |
a00cc7d9 MW |
234 | #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD |
235 | static inline int pud_trans_huge(pud_t pud) | |
236 | { | |
237 | return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; | |
238 | } | |
239 | #endif | |
240 | ||
fd8cfd30 | 241 | #define has_transparent_hugepage has_transparent_hugepage |
4b7167b9 AA |
242 | static inline int has_transparent_hugepage(void) |
243 | { | |
16bf9226 | 244 | return boot_cpu_has(X86_FEATURE_PSE); |
4b7167b9 | 245 | } |
5c7fb56e DW |
246 | |
247 | #ifdef __HAVE_ARCH_PTE_DEVMAP | |
248 | static inline int pmd_devmap(pmd_t pmd) | |
249 | { | |
250 | return !!(pmd_val(pmd) & _PAGE_DEVMAP); | |
251 | } | |
a00cc7d9 MW |
252 | |
253 | #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD | |
254 | static inline int pud_devmap(pud_t pud) | |
255 | { | |
256 | return !!(pud_val(pud) & _PAGE_DEVMAP); | |
257 | } | |
258 | #else | |
259 | static inline int pud_devmap(pud_t pud) | |
260 | { | |
261 | return 0; | |
262 | } | |
263 | #endif | |
e585513b KS |
264 | |
265 | static inline int pgd_devmap(pgd_t pgd) | |
266 | { | |
267 | return 0; | |
268 | } | |
5c7fb56e | 269 | #endif |
f2d6bfe9 JW |
270 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
271 | ||
6522869c JF |
272 | static inline pte_t pte_set_flags(pte_t pte, pteval_t set) |
273 | { | |
274 | pteval_t v = native_pte_val(pte); | |
275 | ||
276 | return native_make_pte(v | set); | |
277 | } | |
278 | ||
279 | static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) | |
280 | { | |
281 | pteval_t v = native_pte_val(pte); | |
282 | ||
283 | return native_make_pte(v & ~clear); | |
284 | } | |
285 | ||
3cbaeafe JP |
286 | static inline pte_t pte_mkclean(pte_t pte) |
287 | { | |
6522869c | 288 | return pte_clear_flags(pte, _PAGE_DIRTY); |
3cbaeafe JP |
289 | } |
290 | ||
291 | static inline pte_t pte_mkold(pte_t pte) | |
292 | { | |
6522869c | 293 | return pte_clear_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
294 | } |
295 | ||
296 | static inline pte_t pte_wrprotect(pte_t pte) | |
297 | { | |
6522869c | 298 | return pte_clear_flags(pte, _PAGE_RW); |
3cbaeafe JP |
299 | } |
300 | ||
301 | static inline pte_t pte_mkexec(pte_t pte) | |
302 | { | |
6522869c | 303 | return pte_clear_flags(pte, _PAGE_NX); |
3cbaeafe JP |
304 | } |
305 | ||
306 | static inline pte_t pte_mkdirty(pte_t pte) | |
307 | { | |
0f8975ec | 308 | return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
3cbaeafe JP |
309 | } |
310 | ||
311 | static inline pte_t pte_mkyoung(pte_t pte) | |
312 | { | |
6522869c | 313 | return pte_set_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
314 | } |
315 | ||
316 | static inline pte_t pte_mkwrite(pte_t pte) | |
317 | { | |
6522869c | 318 | return pte_set_flags(pte, _PAGE_RW); |
3cbaeafe JP |
319 | } |
320 | ||
321 | static inline pte_t pte_mkhuge(pte_t pte) | |
322 | { | |
6522869c | 323 | return pte_set_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
324 | } |
325 | ||
326 | static inline pte_t pte_clrhuge(pte_t pte) | |
327 | { | |
6522869c | 328 | return pte_clear_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
329 | } |
330 | ||
331 | static inline pte_t pte_mkglobal(pte_t pte) | |
332 | { | |
6522869c | 333 | return pte_set_flags(pte, _PAGE_GLOBAL); |
3cbaeafe JP |
334 | } |
335 | ||
336 | static inline pte_t pte_clrglobal(pte_t pte) | |
337 | { | |
6522869c | 338 | return pte_clear_flags(pte, _PAGE_GLOBAL); |
3cbaeafe | 339 | } |
4614139c | 340 | |
7e675137 NP |
341 | static inline pte_t pte_mkspecial(pte_t pte) |
342 | { | |
6522869c | 343 | return pte_set_flags(pte, _PAGE_SPECIAL); |
7e675137 NP |
344 | } |
345 | ||
01c8f1c4 DW |
346 | static inline pte_t pte_mkdevmap(pte_t pte) |
347 | { | |
348 | return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); | |
349 | } | |
350 | ||
f2d6bfe9 JW |
351 | static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) |
352 | { | |
353 | pmdval_t v = native_pmd_val(pmd); | |
354 | ||
355 | return __pmd(v | set); | |
356 | } | |
357 | ||
358 | static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) | |
359 | { | |
360 | pmdval_t v = native_pmd_val(pmd); | |
361 | ||
362 | return __pmd(v & ~clear); | |
363 | } | |
364 | ||
365 | static inline pmd_t pmd_mkold(pmd_t pmd) | |
366 | { | |
367 | return pmd_clear_flags(pmd, _PAGE_ACCESSED); | |
368 | } | |
369 | ||
590a471c MK |
370 | static inline pmd_t pmd_mkclean(pmd_t pmd) |
371 | { | |
372 | return pmd_clear_flags(pmd, _PAGE_DIRTY); | |
373 | } | |
374 | ||
f2d6bfe9 JW |
375 | static inline pmd_t pmd_wrprotect(pmd_t pmd) |
376 | { | |
377 | return pmd_clear_flags(pmd, _PAGE_RW); | |
378 | } | |
379 | ||
380 | static inline pmd_t pmd_mkdirty(pmd_t pmd) | |
381 | { | |
0f8975ec | 382 | return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
f2d6bfe9 JW |
383 | } |
384 | ||
f25748e3 DW |
385 | static inline pmd_t pmd_mkdevmap(pmd_t pmd) |
386 | { | |
387 | return pmd_set_flags(pmd, _PAGE_DEVMAP); | |
388 | } | |
389 | ||
f2d6bfe9 JW |
390 | static inline pmd_t pmd_mkhuge(pmd_t pmd) |
391 | { | |
392 | return pmd_set_flags(pmd, _PAGE_PSE); | |
393 | } | |
394 | ||
395 | static inline pmd_t pmd_mkyoung(pmd_t pmd) | |
396 | { | |
397 | return pmd_set_flags(pmd, _PAGE_ACCESSED); | |
398 | } | |
399 | ||
400 | static inline pmd_t pmd_mkwrite(pmd_t pmd) | |
401 | { | |
402 | return pmd_set_flags(pmd, _PAGE_RW); | |
403 | } | |
404 | ||
405 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | |
406 | { | |
21d9ee3e | 407 | return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); |
f2d6bfe9 JW |
408 | } |
409 | ||
a00cc7d9 MW |
410 | static inline pud_t pud_set_flags(pud_t pud, pudval_t set) |
411 | { | |
412 | pudval_t v = native_pud_val(pud); | |
413 | ||
414 | return __pud(v | set); | |
415 | } | |
416 | ||
417 | static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) | |
418 | { | |
419 | pudval_t v = native_pud_val(pud); | |
420 | ||
421 | return __pud(v & ~clear); | |
422 | } | |
423 | ||
424 | static inline pud_t pud_mkold(pud_t pud) | |
425 | { | |
426 | return pud_clear_flags(pud, _PAGE_ACCESSED); | |
427 | } | |
428 | ||
429 | static inline pud_t pud_mkclean(pud_t pud) | |
430 | { | |
431 | return pud_clear_flags(pud, _PAGE_DIRTY); | |
432 | } | |
433 | ||
434 | static inline pud_t pud_wrprotect(pud_t pud) | |
435 | { | |
436 | return pud_clear_flags(pud, _PAGE_RW); | |
437 | } | |
438 | ||
439 | static inline pud_t pud_mkdirty(pud_t pud) | |
440 | { | |
441 | return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); | |
442 | } | |
443 | ||
444 | static inline pud_t pud_mkdevmap(pud_t pud) | |
445 | { | |
446 | return pud_set_flags(pud, _PAGE_DEVMAP); | |
447 | } | |
448 | ||
449 | static inline pud_t pud_mkhuge(pud_t pud) | |
450 | { | |
451 | return pud_set_flags(pud, _PAGE_PSE); | |
452 | } | |
453 | ||
454 | static inline pud_t pud_mkyoung(pud_t pud) | |
455 | { | |
456 | return pud_set_flags(pud, _PAGE_ACCESSED); | |
457 | } | |
458 | ||
459 | static inline pud_t pud_mkwrite(pud_t pud) | |
460 | { | |
461 | return pud_set_flags(pud, _PAGE_RW); | |
462 | } | |
463 | ||
464 | static inline pud_t pud_mknotpresent(pud_t pud) | |
465 | { | |
466 | return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE); | |
467 | } | |
468 | ||
2bf01f9f | 469 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
0f8975ec PE |
470 | static inline int pte_soft_dirty(pte_t pte) |
471 | { | |
472 | return pte_flags(pte) & _PAGE_SOFT_DIRTY; | |
473 | } | |
474 | ||
475 | static inline int pmd_soft_dirty(pmd_t pmd) | |
476 | { | |
477 | return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; | |
478 | } | |
479 | ||
a00cc7d9 MW |
480 | static inline int pud_soft_dirty(pud_t pud) |
481 | { | |
482 | return pud_flags(pud) & _PAGE_SOFT_DIRTY; | |
483 | } | |
484 | ||
0f8975ec PE |
485 | static inline pte_t pte_mksoft_dirty(pte_t pte) |
486 | { | |
487 | return pte_set_flags(pte, _PAGE_SOFT_DIRTY); | |
488 | } | |
489 | ||
490 | static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) | |
491 | { | |
492 | return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); | |
493 | } | |
494 | ||
a00cc7d9 MW |
495 | static inline pud_t pud_mksoft_dirty(pud_t pud) |
496 | { | |
497 | return pud_set_flags(pud, _PAGE_SOFT_DIRTY); | |
498 | } | |
499 | ||
a7b76174 MS |
500 | static inline pte_t pte_clear_soft_dirty(pte_t pte) |
501 | { | |
502 | return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); | |
503 | } | |
504 | ||
505 | static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) | |
506 | { | |
507 | return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); | |
508 | } | |
509 | ||
a00cc7d9 MW |
510 | static inline pud_t pud_clear_soft_dirty(pud_t pud) |
511 | { | |
512 | return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); | |
513 | } | |
514 | ||
2bf01f9f CG |
515 | #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ |
516 | ||
b534816b JF |
517 | /* |
518 | * Mask out unsupported bits in a present pgprot. Non-present pgprots | |
519 | * can use those bits for other purposes, so leave them be. | |
520 | */ | |
521 | static inline pgprotval_t massage_pgprot(pgprot_t pgprot) | |
522 | { | |
523 | pgprotval_t protval = pgprot_val(pgprot); | |
524 | ||
525 | if (protval & _PAGE_PRESENT) | |
526 | protval &= __supported_pte_mask; | |
527 | ||
528 | return protval; | |
529 | } | |
530 | ||
6fdc05d4 JF |
531 | static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) |
532 | { | |
b534816b JF |
533 | return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | |
534 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
535 | } |
536 | ||
537 | static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) | |
538 | { | |
b534816b JF |
539 | return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | |
540 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
541 | } |
542 | ||
a00cc7d9 MW |
543 | static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) |
544 | { | |
545 | return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) | | |
546 | massage_pgprot(pgprot)); | |
547 | } | |
548 | ||
38472311 IM |
549 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
550 | { | |
551 | pteval_t val = pte_val(pte); | |
552 | ||
553 | /* | |
554 | * Chop off the NX bit (if present), and add the NX portion of | |
555 | * the newprot (if present): | |
556 | */ | |
1c12c4cf | 557 | val &= _PAGE_CHG_MASK; |
b534816b | 558 | val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; |
38472311 IM |
559 | |
560 | return __pte(val); | |
561 | } | |
562 | ||
c489f125 JW |
563 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) |
564 | { | |
565 | pmdval_t val = pmd_val(pmd); | |
566 | ||
567 | val &= _HPAGE_CHG_MASK; | |
568 | val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; | |
569 | ||
570 | return __pmd(val); | |
571 | } | |
572 | ||
1c12c4cf VP |
573 | /* mprotect needs to preserve PAT bits when updating vm_page_prot */ |
574 | #define pgprot_modify pgprot_modify | |
575 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
576 | { | |
577 | pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; | |
578 | pgprotval_t addbits = pgprot_val(newprot); | |
579 | return __pgprot(preservebits | addbits); | |
580 | } | |
581 | ||
bbac8c6d TK |
582 | #define pte_pgprot(x) __pgprot(pte_flags(x)) |
583 | #define pmd_pgprot(x) __pgprot(pmd_flags(x)) | |
584 | #define pud_pgprot(x) __pgprot(pud_flags(x)) | |
f2a6a705 | 585 | #define p4d_pgprot(x) __pgprot(p4d_flags(x)) |
c6ca18eb | 586 | |
b534816b | 587 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) |
1e8e23bc | 588 | |
1adcaafe | 589 | static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, |
d85f3334 JG |
590 | enum page_cache_mode pcm, |
591 | enum page_cache_mode new_pcm) | |
afc7d20c | 592 | { |
1adcaafe | 593 | /* |
55a6ca25 | 594 | * PAT type is always WB for untracked ranges, so no need to check. |
1adcaafe | 595 | */ |
8a271389 | 596 | if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) |
1adcaafe SS |
597 | return 1; |
598 | ||
afc7d20c | 599 | /* |
600 | * Certain new memtypes are not allowed with certain | |
601 | * requested memtype: | |
602 | * - request is uncached, return cannot be write-back | |
603 | * - request is write-combine, return cannot be write-back | |
ecb2feba TK |
604 | * - request is write-through, return cannot be write-back |
605 | * - request is write-through, return cannot be write-combine | |
afc7d20c | 606 | */ |
d85f3334 JG |
607 | if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && |
608 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
609 | (pcm == _PAGE_CACHE_MODE_WC && | |
ecb2feba TK |
610 | new_pcm == _PAGE_CACHE_MODE_WB) || |
611 | (pcm == _PAGE_CACHE_MODE_WT && | |
612 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
613 | (pcm == _PAGE_CACHE_MODE_WT && | |
614 | new_pcm == _PAGE_CACHE_MODE_WC)) { | |
afc7d20c | 615 | return 0; |
616 | } | |
617 | ||
618 | return 1; | |
619 | } | |
620 | ||
458a3e64 TH |
621 | pmd_t *populate_extra_pmd(unsigned long vaddr); |
622 | pte_t *populate_extra_pte(unsigned long vaddr); | |
4614139c JF |
623 | #endif /* __ASSEMBLY__ */ |
624 | ||
96a388de | 625 | #ifdef CONFIG_X86_32 |
a1ce3928 | 626 | # include <asm/pgtable_32.h> |
96a388de | 627 | #else |
a1ce3928 | 628 | # include <asm/pgtable_64.h> |
96a388de | 629 | #endif |
6c386655 | 630 | |
aca159db | 631 | #ifndef __ASSEMBLY__ |
f476961c | 632 | #include <linux/mm_types.h> |
fa0f281c | 633 | #include <linux/mmdebug.h> |
4cbeb51b | 634 | #include <linux/log2.h> |
ef37bc36 | 635 | #include <asm/fixmap.h> |
aca159db | 636 | |
a034a010 JF |
637 | static inline int pte_none(pte_t pte) |
638 | { | |
97e3c602 | 639 | return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); |
a034a010 JF |
640 | } |
641 | ||
8de01da3 JF |
642 | #define __HAVE_ARCH_PTE_SAME |
643 | static inline int pte_same(pte_t a, pte_t b) | |
644 | { | |
645 | return a.pte == b.pte; | |
646 | } | |
647 | ||
7c683851 | 648 | static inline int pte_present(pte_t a) |
c46a7c81 MG |
649 | { |
650 | return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); | |
651 | } | |
652 | ||
3565fce3 DW |
653 | #ifdef __HAVE_ARCH_PTE_DEVMAP |
654 | static inline int pte_devmap(pte_t a) | |
655 | { | |
656 | return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; | |
657 | } | |
658 | #endif | |
659 | ||
2c3cf556 | 660 | #define pte_accessible pte_accessible |
20841405 | 661 | static inline bool pte_accessible(struct mm_struct *mm, pte_t a) |
2c3cf556 | 662 | { |
20841405 RR |
663 | if (pte_flags(a) & _PAGE_PRESENT) |
664 | return true; | |
665 | ||
21d9ee3e | 666 | if ((pte_flags(a) & _PAGE_PROTNONE) && |
20841405 RR |
667 | mm_tlb_flush_pending(mm)) |
668 | return true; | |
669 | ||
670 | return false; | |
2c3cf556 RR |
671 | } |
672 | ||
eb63657e | 673 | static inline int pte_hidden(pte_t pte) |
dfec072e | 674 | { |
eb63657e | 675 | return pte_flags(pte) & _PAGE_HIDDEN; |
dfec072e VN |
676 | } |
677 | ||
649e8ef6 JF |
678 | static inline int pmd_present(pmd_t pmd) |
679 | { | |
027ef6c8 AA |
680 | /* |
681 | * Checking for _PAGE_PSE is needed too because | |
682 | * split_huge_page will temporarily clear the present bit (but | |
683 | * the _PAGE_PSE flag will remain set at all times while the | |
684 | * _PAGE_PRESENT bit is clear). | |
685 | */ | |
21d9ee3e | 686 | return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); |
649e8ef6 JF |
687 | } |
688 | ||
e7bb4b6d MG |
689 | #ifdef CONFIG_NUMA_BALANCING |
690 | /* | |
691 | * These work without NUMA balancing but the kernel does not care. See the | |
692 | * comment in include/asm-generic/pgtable.h | |
693 | */ | |
694 | static inline int pte_protnone(pte_t pte) | |
695 | { | |
e3a1f6ca DV |
696 | return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
697 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
698 | } |
699 | ||
700 | static inline int pmd_protnone(pmd_t pmd) | |
701 | { | |
e3a1f6ca DV |
702 | return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
703 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
704 | } |
705 | #endif /* CONFIG_NUMA_BALANCING */ | |
706 | ||
4fea801a JF |
707 | static inline int pmd_none(pmd_t pmd) |
708 | { | |
709 | /* Only check low word on 32-bit platforms, since it might be | |
710 | out of sync with upper half. */ | |
97e3c602 DH |
711 | unsigned long val = native_pmd_val(pmd); |
712 | return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; | |
4fea801a JF |
713 | } |
714 | ||
3ffb3564 JF |
715 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
716 | { | |
f70abb0f | 717 | return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); |
3ffb3564 JF |
718 | } |
719 | ||
e5f7f202 IM |
720 | /* |
721 | * Currently stuck as a macro due to indirect forward reference to | |
722 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
723 | */ | |
fd7e3159 | 724 | #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) |
20063ca4 | 725 | |
e24d7eee JF |
726 | /* |
727 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] | |
728 | * | |
729 | * this macro returns the index of the entry in the pmd page which would | |
730 | * control the given virtual address | |
731 | */ | |
ce0c0f9e | 732 | static inline unsigned long pmd_index(unsigned long address) |
e24d7eee JF |
733 | { |
734 | return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); | |
735 | } | |
736 | ||
97e2817d JF |
737 | /* |
738 | * Conversion functions: convert a page and protection to a page entry, | |
739 | * and a page entry and page directory to the page they refer to. | |
740 | * | |
741 | * (Currently stuck as a macro because of indirect forward reference | |
742 | * to linux/mm.h:page_to_nid()) | |
743 | */ | |
744 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | |
745 | ||
346309cf JF |
746 | /* |
747 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | |
748 | * | |
749 | * this function returns the index of the entry in the pte page which would | |
750 | * control the given virtual address | |
751 | */ | |
ce0c0f9e | 752 | static inline unsigned long pte_index(unsigned long address) |
346309cf JF |
753 | { |
754 | return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); | |
755 | } | |
756 | ||
3fbc2444 JF |
757 | static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) |
758 | { | |
759 | return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); | |
760 | } | |
761 | ||
99510238 JF |
762 | static inline int pmd_bad(pmd_t pmd) |
763 | { | |
18a7a199 | 764 | return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; |
99510238 JF |
765 | } |
766 | ||
cc290ca3 JF |
767 | static inline unsigned long pages_to_mb(unsigned long npg) |
768 | { | |
769 | return npg >> (20 - PAGE_SHIFT); | |
770 | } | |
771 | ||
98233368 | 772 | #if CONFIG_PGTABLE_LEVELS > 2 |
deb79cfb JF |
773 | static inline int pud_none(pud_t pud) |
774 | { | |
97e3c602 | 775 | return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; |
deb79cfb JF |
776 | } |
777 | ||
5ba7c913 JF |
778 | static inline int pud_present(pud_t pud) |
779 | { | |
18a7a199 | 780 | return pud_flags(pud) & _PAGE_PRESENT; |
5ba7c913 | 781 | } |
6fff47e3 JF |
782 | |
783 | static inline unsigned long pud_page_vaddr(pud_t pud) | |
784 | { | |
f70abb0f | 785 | return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud)); |
6fff47e3 | 786 | } |
f476961c | 787 | |
e5f7f202 IM |
788 | /* |
789 | * Currently stuck as a macro due to indirect forward reference to | |
790 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
791 | */ | |
fd7e3159 | 792 | #define pud_page(pud) pfn_to_page(pud_pfn(pud)) |
01ade20d JF |
793 | |
794 | /* Find an entry in the second-level page table.. */ | |
795 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) | |
796 | { | |
797 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); | |
798 | } | |
3180fba0 | 799 | |
3f6cbef1 JF |
800 | static inline int pud_large(pud_t pud) |
801 | { | |
e2f5bda9 | 802 | return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == |
3f6cbef1 JF |
803 | (_PAGE_PSE | _PAGE_PRESENT); |
804 | } | |
a61bb29a JF |
805 | |
806 | static inline int pud_bad(pud_t pud) | |
807 | { | |
18a7a199 | 808 | return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; |
a61bb29a | 809 | } |
e2f5bda9 JF |
810 | #else |
811 | static inline int pud_large(pud_t pud) | |
812 | { | |
813 | return 0; | |
814 | } | |
98233368 | 815 | #endif /* CONFIG_PGTABLE_LEVELS > 2 */ |
5ba7c913 | 816 | |
fe1e8c3e KS |
817 | static inline unsigned long pud_index(unsigned long address) |
818 | { | |
819 | return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); | |
820 | } | |
821 | ||
f2a6a705 KS |
822 | #if CONFIG_PGTABLE_LEVELS > 3 |
823 | static inline int p4d_none(p4d_t p4d) | |
824 | { | |
825 | return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; | |
826 | } | |
827 | ||
828 | static inline int p4d_present(p4d_t p4d) | |
829 | { | |
830 | return p4d_flags(p4d) & _PAGE_PRESENT; | |
831 | } | |
832 | ||
833 | static inline unsigned long p4d_page_vaddr(p4d_t p4d) | |
834 | { | |
835 | return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); | |
836 | } | |
837 | ||
838 | /* | |
839 | * Currently stuck as a macro due to indirect forward reference to | |
840 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
841 | */ | |
fd7e3159 | 842 | #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) |
f2a6a705 KS |
843 | |
844 | /* Find an entry in the third-level page table.. */ | |
845 | static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) | |
846 | { | |
847 | return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address); | |
848 | } | |
849 | ||
850 | static inline int p4d_bad(p4d_t p4d) | |
851 | { | |
852 | return (p4d_flags(p4d) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; | |
853 | } | |
854 | #endif /* CONFIG_PGTABLE_LEVELS > 3 */ | |
855 | ||
fe1e8c3e KS |
856 | static inline unsigned long p4d_index(unsigned long address) |
857 | { | |
858 | return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); | |
859 | } | |
860 | ||
f2a6a705 | 861 | #if CONFIG_PGTABLE_LEVELS > 4 |
9f38d7e8 JF |
862 | static inline int pgd_present(pgd_t pgd) |
863 | { | |
18a7a199 | 864 | return pgd_flags(pgd) & _PAGE_PRESENT; |
9f38d7e8 | 865 | } |
c5f040b1 JF |
866 | |
867 | static inline unsigned long pgd_page_vaddr(pgd_t pgd) | |
868 | { | |
869 | return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); | |
870 | } | |
777cba16 | 871 | |
e5f7f202 IM |
872 | /* |
873 | * Currently stuck as a macro due to indirect forward reference to | |
874 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
875 | */ | |
fd7e3159 | 876 | #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) |
7cfb8102 JF |
877 | |
878 | /* to find an entry in a page-table-directory. */ | |
f2a6a705 | 879 | static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) |
3d081b18 | 880 | { |
f2a6a705 | 881 | return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); |
3d081b18 | 882 | } |
30f10316 JF |
883 | |
884 | static inline int pgd_bad(pgd_t pgd) | |
885 | { | |
18a7a199 | 886 | return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; |
30f10316 | 887 | } |
7325cc2e JF |
888 | |
889 | static inline int pgd_none(pgd_t pgd) | |
890 | { | |
97e3c602 DH |
891 | /* |
892 | * There is no need to do a workaround for the KNL stray | |
893 | * A/D bit erratum here. PGDs only point to page tables | |
894 | * except on 32-bit non-PAE which is not supported on | |
895 | * KNL. | |
896 | */ | |
26c8e317 | 897 | return !native_pgd_val(pgd); |
7325cc2e | 898 | } |
f2a6a705 | 899 | #endif /* CONFIG_PGTABLE_LEVELS > 4 */ |
9f38d7e8 | 900 | |
4614139c JF |
901 | #endif /* __ASSEMBLY__ */ |
902 | ||
fb15a9b3 JF |
903 | /* |
904 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | |
905 | * | |
906 | * this macro returns the index of the entry in the pgd page which would | |
907 | * control the given virtual address | |
908 | */ | |
909 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
910 | ||
911 | /* | |
912 | * pgd_offset() returns a (pgd_t *) | |
913 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | |
914 | */ | |
915 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
916 | /* | |
917 | * a shortcut which implies the use of the kernel's pgd, instead | |
918 | * of a process's | |
919 | */ | |
920 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | |
921 | ||
922 | ||
68db065c JF |
923 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
924 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | |
925 | ||
195466dc JF |
926 | #ifndef __ASSEMBLY__ |
927 | ||
2c1b284e | 928 | extern int direct_gbpages; |
22ddfcaa | 929 | void init_mem_mapping(void); |
8d57470d | 930 | void early_alloc_pgt_buf(void); |
4270fd8b | 931 | extern void memblock_find_dma_reserve(void); |
2c1b284e | 932 | |
b234e8a0 TG |
933 | #ifdef CONFIG_X86_64 |
934 | /* Realmode trampoline initialization. */ | |
935 | extern pgd_t trampoline_pgd_entry; | |
0483e1fa | 936 | static inline void __meminit init_trampoline_default(void) |
b234e8a0 TG |
937 | { |
938 | /* Default trampoline pgd value */ | |
65ade2f8 | 939 | trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)]; |
b234e8a0 | 940 | } |
0483e1fa TG |
941 | # ifdef CONFIG_RANDOMIZE_MEMORY |
942 | void __meminit init_trampoline(void); | |
943 | # else | |
944 | # define init_trampoline init_trampoline_default | |
945 | # endif | |
b234e8a0 TG |
946 | #else |
947 | static inline void init_trampoline(void) { } | |
948 | #endif | |
949 | ||
4891645e JF |
950 | /* local pte updates need not use xchg for locking */ |
951 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | |
952 | { | |
953 | pte_t res = *ptep; | |
954 | ||
955 | /* Pure native function needs no input for mm, addr */ | |
956 | native_pte_clear(NULL, 0, ptep); | |
957 | return res; | |
958 | } | |
959 | ||
f2d6bfe9 JW |
960 | static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) |
961 | { | |
962 | pmd_t res = *pmdp; | |
963 | ||
964 | native_pmd_clear(pmdp); | |
965 | return res; | |
966 | } | |
967 | ||
a00cc7d9 MW |
968 | static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) |
969 | { | |
970 | pud_t res = *pudp; | |
971 | ||
972 | native_pud_clear(pudp); | |
973 | return res; | |
974 | } | |
975 | ||
4891645e JF |
976 | static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, |
977 | pte_t *ptep , pte_t pte) | |
978 | { | |
979 | native_set_pte(ptep, pte); | |
980 | } | |
981 | ||
0a47de52 AA |
982 | static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, |
983 | pmd_t *pmdp , pmd_t pmd) | |
984 | { | |
985 | native_set_pmd(pmdp, pmd); | |
986 | } | |
987 | ||
a00cc7d9 MW |
988 | static inline void native_set_pud_at(struct mm_struct *mm, unsigned long addr, |
989 | pud_t *pudp, pud_t pud) | |
990 | { | |
991 | native_set_pud(pudp, pud); | |
992 | } | |
993 | ||
195466dc JF |
994 | #ifndef CONFIG_PARAVIRT |
995 | /* | |
996 | * Rules for using pte_update - it must be called after any PTE update which | |
997 | * has not been done using the set_pte / clear_pte interfaces. It is used by | |
998 | * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE | |
999 | * updates should either be sets, clears, or set_pte_atomic for P->P | |
1000 | * transitions, which means this hook should only be called for user PTEs. | |
1001 | * This hook implies a P->P protection or access change has taken place, which | |
d6ccc3ec | 1002 | * requires a subsequent TLB flush. |
195466dc JF |
1003 | */ |
1004 | #define pte_update(mm, addr, ptep) do { } while (0) | |
195466dc JF |
1005 | #endif |
1006 | ||
195466dc JF |
1007 | /* |
1008 | * We only update the dirty/accessed state if we set | |
1009 | * the dirty bit by hand in the kernel, since the hardware | |
1010 | * will do the accessed bit for us, and we don't want to | |
1011 | * race with other CPU's that might be updating the dirty | |
1012 | * bit at the same time. | |
1013 | */ | |
bea41808 JF |
1014 | struct vm_area_struct; |
1015 | ||
195466dc | 1016 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
ee5aa8d3 JF |
1017 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
1018 | unsigned long address, pte_t *ptep, | |
1019 | pte_t entry, int dirty); | |
195466dc JF |
1020 | |
1021 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
f9fbf1a3 JF |
1022 | extern int ptep_test_and_clear_young(struct vm_area_struct *vma, |
1023 | unsigned long addr, pte_t *ptep); | |
195466dc JF |
1024 | |
1025 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
c20311e1 JF |
1026 | extern int ptep_clear_flush_young(struct vm_area_struct *vma, |
1027 | unsigned long address, pte_t *ptep); | |
195466dc JF |
1028 | |
1029 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
3cbaeafe JP |
1030 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, |
1031 | pte_t *ptep) | |
195466dc JF |
1032 | { |
1033 | pte_t pte = native_ptep_get_and_clear(ptep); | |
1034 | pte_update(mm, addr, ptep); | |
1035 | return pte; | |
1036 | } | |
1037 | ||
1038 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL | |
3cbaeafe JP |
1039 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
1040 | unsigned long addr, pte_t *ptep, | |
1041 | int full) | |
195466dc JF |
1042 | { |
1043 | pte_t pte; | |
1044 | if (full) { | |
1045 | /* | |
1046 | * Full address destruction in progress; paravirt does not | |
1047 | * care about updates and native needs no locking | |
1048 | */ | |
1049 | pte = native_local_ptep_get_and_clear(ptep); | |
1050 | } else { | |
1051 | pte = ptep_get_and_clear(mm, addr, ptep); | |
1052 | } | |
1053 | return pte; | |
1054 | } | |
1055 | ||
1056 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | |
3cbaeafe JP |
1057 | static inline void ptep_set_wrprotect(struct mm_struct *mm, |
1058 | unsigned long addr, pte_t *ptep) | |
195466dc | 1059 | { |
d8d89827 | 1060 | clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); |
195466dc JF |
1061 | pte_update(mm, addr, ptep); |
1062 | } | |
1063 | ||
2ac13462 | 1064 | #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) |
61c77326 | 1065 | |
f2d6bfe9 JW |
1066 | #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) |
1067 | ||
1068 | #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
1069 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
1070 | unsigned long address, pmd_t *pmdp, | |
1071 | pmd_t entry, int dirty); | |
a00cc7d9 MW |
1072 | extern int pudp_set_access_flags(struct vm_area_struct *vma, |
1073 | unsigned long address, pud_t *pudp, | |
1074 | pud_t entry, int dirty); | |
f2d6bfe9 JW |
1075 | |
1076 | #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
1077 | extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
1078 | unsigned long addr, pmd_t *pmdp); | |
a00cc7d9 MW |
1079 | extern int pudp_test_and_clear_young(struct vm_area_struct *vma, |
1080 | unsigned long addr, pud_t *pudp); | |
f2d6bfe9 JW |
1081 | |
1082 | #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
1083 | extern int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
1084 | unsigned long address, pmd_t *pmdp); | |
1085 | ||
1086 | ||
f2d6bfe9 JW |
1087 | #define __HAVE_ARCH_PMD_WRITE |
1088 | static inline int pmd_write(pmd_t pmd) | |
1089 | { | |
1090 | return pmd_flags(pmd) & _PAGE_RW; | |
1091 | } | |
1092 | ||
8809aa2d AK |
1093 | #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR |
1094 | static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, | |
f2d6bfe9 JW |
1095 | pmd_t *pmdp) |
1096 | { | |
d6ccc3ec | 1097 | return native_pmdp_get_and_clear(pmdp); |
f2d6bfe9 JW |
1098 | } |
1099 | ||
a00cc7d9 MW |
1100 | #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR |
1101 | static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, | |
1102 | unsigned long addr, pud_t *pudp) | |
1103 | { | |
1104 | return native_pudp_get_and_clear(pudp); | |
1105 | } | |
1106 | ||
f2d6bfe9 JW |
1107 | #define __HAVE_ARCH_PMDP_SET_WRPROTECT |
1108 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
1109 | unsigned long addr, pmd_t *pmdp) | |
1110 | { | |
1111 | clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); | |
f2d6bfe9 JW |
1112 | } |
1113 | ||
85958b46 JF |
1114 | /* |
1115 | * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); | |
1116 | * | |
1117 | * dst - pointer to pgd range anwhere on a pgd page | |
1118 | * src - "" | |
1119 | * count - the number of pgds to copy. | |
1120 | * | |
1121 | * dst and src can be on the same page, but the range must not overlap, | |
1122 | * and must not cross a page boundary. | |
1123 | */ | |
1124 | static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) | |
1125 | { | |
1126 | memcpy(dst, src, count * sizeof(pgd_t)); | |
1127 | } | |
1128 | ||
4cbeb51b DH |
1129 | #define PTE_SHIFT ilog2(PTRS_PER_PTE) |
1130 | static inline int page_level_shift(enum pg_level level) | |
1131 | { | |
1132 | return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; | |
1133 | } | |
1134 | static inline unsigned long page_level_size(enum pg_level level) | |
1135 | { | |
1136 | return 1UL << page_level_shift(level); | |
1137 | } | |
1138 | static inline unsigned long page_level_mask(enum pg_level level) | |
1139 | { | |
1140 | return ~(page_level_size(level) - 1); | |
1141 | } | |
85958b46 | 1142 | |
602e0186 KS |
1143 | /* |
1144 | * The x86 doesn't have any external MMU info: the kernel page | |
1145 | * tables contain all the necessary information. | |
1146 | */ | |
1147 | static inline void update_mmu_cache(struct vm_area_struct *vma, | |
1148 | unsigned long addr, pte_t *ptep) | |
1149 | { | |
1150 | } | |
1151 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, | |
1152 | unsigned long addr, pmd_t *pmd) | |
1153 | { | |
1154 | } | |
a00cc7d9 MW |
1155 | static inline void update_mmu_cache_pud(struct vm_area_struct *vma, |
1156 | unsigned long addr, pud_t *pud) | |
1157 | { | |
1158 | } | |
85958b46 | 1159 | |
2bf01f9f | 1160 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
fa0f281c CG |
1161 | static inline pte_t pte_swp_mksoft_dirty(pte_t pte) |
1162 | { | |
fa0f281c CG |
1163 | return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
1164 | } | |
1165 | ||
1166 | static inline int pte_swp_soft_dirty(pte_t pte) | |
1167 | { | |
fa0f281c CG |
1168 | return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; |
1169 | } | |
1170 | ||
1171 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) | |
1172 | { | |
fa0f281c CG |
1173 | return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
1174 | } | |
2bf01f9f | 1175 | #endif |
fa0f281c | 1176 | |
33a709b2 DH |
1177 | #define PKRU_AD_BIT 0x1 |
1178 | #define PKRU_WD_BIT 0x2 | |
84594296 | 1179 | #define PKRU_BITS_PER_PKEY 2 |
33a709b2 DH |
1180 | |
1181 | static inline bool __pkru_allows_read(u32 pkru, u16 pkey) | |
1182 | { | |
84594296 | 1183 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
1184 | return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits)); |
1185 | } | |
1186 | ||
1187 | static inline bool __pkru_allows_write(u32 pkru, u16 pkey) | |
1188 | { | |
84594296 | 1189 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
1190 | /* |
1191 | * Access-disable disables writes too so we need to check | |
1192 | * both bits here. | |
1193 | */ | |
1194 | return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits)); | |
1195 | } | |
1196 | ||
1197 | static inline u16 pte_flags_pkey(unsigned long pte_flags) | |
1198 | { | |
1199 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS | |
1200 | /* ifdef to avoid doing 59-bit shift on 32-bit values */ | |
1201 | return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; | |
1202 | #else | |
1203 | return 0; | |
1204 | #endif | |
1205 | } | |
1206 | ||
e585513b KS |
1207 | static inline bool __pkru_allows_pkey(u16 pkey, bool write) |
1208 | { | |
1209 | u32 pkru = read_pkru(); | |
1210 | ||
1211 | if (!__pkru_allows_read(pkru, pkey)) | |
1212 | return false; | |
1213 | if (write && !__pkru_allows_write(pkru, pkey)) | |
1214 | return false; | |
1215 | ||
1216 | return true; | |
1217 | } | |
1218 | ||
1219 | /* | |
1220 | * 'pteval' can come from a PTE, PMD or PUD. We only check | |
1221 | * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the | |
1222 | * same value on all 3 types. | |
1223 | */ | |
1224 | static inline bool __pte_access_permitted(unsigned long pteval, bool write) | |
1225 | { | |
1226 | unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; | |
1227 | ||
1228 | if (write) | |
1229 | need_pte_bits |= _PAGE_RW; | |
1230 | ||
1231 | if ((pteval & need_pte_bits) != need_pte_bits) | |
1232 | return 0; | |
1233 | ||
1234 | return __pkru_allows_pkey(pte_flags_pkey(pteval), write); | |
1235 | } | |
1236 | ||
1237 | #define pte_access_permitted pte_access_permitted | |
1238 | static inline bool pte_access_permitted(pte_t pte, bool write) | |
1239 | { | |
1240 | return __pte_access_permitted(pte_val(pte), write); | |
1241 | } | |
1242 | ||
1243 | #define pmd_access_permitted pmd_access_permitted | |
1244 | static inline bool pmd_access_permitted(pmd_t pmd, bool write) | |
1245 | { | |
1246 | return __pte_access_permitted(pmd_val(pmd), write); | |
1247 | } | |
1248 | ||
1249 | #define pud_access_permitted pud_access_permitted | |
1250 | static inline bool pud_access_permitted(pud_t pud, bool write) | |
1251 | { | |
1252 | return __pte_access_permitted(pud_val(pud), write); | |
1253 | } | |
1254 | ||
195466dc JF |
1255 | #include <asm-generic/pgtable.h> |
1256 | #endif /* __ASSEMBLY__ */ | |
1257 | ||
1965aae3 | 1258 | #endif /* _ASM_X86_PGTABLE_H */ |