]> git.proxmox.com Git - mirror_edk2.git/blame - Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ArmVirtPkg/PrePi ARM CLANG35: drop incompatible command line option
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
CommitLineData
5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
54024039 4# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
5e752084 5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License that accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php.\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14#\r
15#**/\r
16\r
17[Defines]\r
18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
23DEFINE FLASH_AREA_SIZE = 0x00800000\r
24\r
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
28\r
988715a3 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
31\r
988715a3 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
34\r
35\r
988715a3 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
38\r
39!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 43\r
988715a3 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 47\r
48!endif\r
49\r
988715a3 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000\r
5e752084 52\r
988715a3 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000\r
54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000\r
5e752084 55\r
988715a3 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 58\r
59################################################################################\r
60#\r
61# FD Section\r
62# The [FD] Section is made up of the definition statements and a\r
63# description of what goes into the Flash Device Image. Each FD section\r
64# defines one flash "device" image. A flash device image may be one of\r
65# the following: Removable media bootable image (like a boot floppy\r
66# image,) an Option ROM image (that would be "flashed" into an add-in\r
67# card,) a System "Flash" image (that would be burned into a system's\r
68# flash) or an Update ("Capsule") image that will be used to update and\r
69# existing system flash.\r
70#\r
71################################################################################\r
72[FD.Vlv]\r
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
75ErasePolarity = 1\r
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
78\r
79#\r
80#Flash location override based on actual flash map\r
81#\r
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
84\r
c5a59080
JY		 85SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
86SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
87\r
5e752084 88!if $(MINNOW2_FSP_BUILD) == TRUE\r
89# put below PCD value setting into dsc file\r
90#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
91#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
92#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
93#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
94#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
95#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
96#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
97\r
98!endif\r
99################################################################################\r
100#\r
101# Following are lists of FD Region layout which correspond to the locations of different\r
102# images within the flash device.\r
103#\r
104# Regions must be defined in ascending order and may not overlap.\r
105#\r
106# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
107# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
108# "0x" characters. Like:\r
109# Offset|Size\r
110# PcdOffsetCName|PcdSizeCName\r
111# RegionType <FV, DATA, or FILE>\r
112# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
113#\r
114################################################################################\r
115# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,\r
116# so we hardcode the default value of variable here.\r
117# Please note that we MUST update the binary once the default value is changed.\r
118\r
119#\r
120 # CPU Microcodes\r
121 #\r
122\r
123$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
124gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
125FV = MICROCODE_FV\r
5e752084 126$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
127gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
128FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r
129\r
130$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
131gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
132FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin\r
133\r
134$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
135gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
136FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin\r
137\r
138!if $(MINNOW2_FSP_BUILD) == TRUE\r
139\r
140 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
141 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
142 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r
143\r
144\r
145 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
146 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
147\r
148!endif\r
149\r
150 #\r
151 # Main Block\r
152 #\r
153$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
154gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
155FV = FVMAIN_COMPACT\r
156\r
157 #\r
158 # FV Recovery#2\r
159 #\r
160$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
161gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
162FV = FVRECOVERY2\r
163\r
164 #\r
165 # FV Recovery\r
166 #\r
167$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
168gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
169FV = FVRECOVERY\r
170\r
171################################################################################\r
172#\r
173# FV Section\r
174#\r
175# [FV] section is used to define what components or modules are placed within a flash\r
176# device file. This section also defines order the components and modules are positioned\r
177# within the image. The [FV] section consists of define statements, set statements and\r
178# module statements.\r
179#\r
180################################################################################\r
181[FV.MICROCODE_FV]\r
182BlockSize = $(FLASH_BLOCK_SIZE)\r
183FvAlignment = 16\r
184ERASE_POLARITY = 1\r
185MEMORY_MAPPED = TRUE\r
186STICKY_WRITE = TRUE\r
187LOCK_CAP = TRUE\r
188LOCK_STATUS = FALSE\r
189WRITE_DISABLED_CAP = TRUE\r
190WRITE_ENABLED_CAP = TRUE\r
191WRITE_STATUS = TRUE\r
192WRITE_LOCK_CAP = TRUE\r
193WRITE_LOCK_STATUS = TRUE\r
194READ_DISABLED_CAP = TRUE\r
195READ_ENABLED_CAP = TRUE\r
196READ_STATUS = TRUE\r
197READ_LOCK_CAP = TRUE\r
198READ_LOCK_STATUS = TRUE\r
199\r
200FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
201 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r
202}\r
203\r
c5a59080
JY		 204!if $(RECOVERY_ENABLE)\r
205[FV.FVRECOVERY_COMPONENTS]\r
206FvAlignment = 16 #FV alignment and FV attributes setting.\r
207ERASE_POLARITY = 1\r
208MEMORY_MAPPED = TRUE\r
209STICKY_WRITE = TRUE\r
210LOCK_CAP = TRUE\r
211LOCK_STATUS = TRUE\r
212WRITE_DISABLED_CAP = TRUE\r
213WRITE_ENABLED_CAP = TRUE\r
214WRITE_STATUS = TRUE\r
215WRITE_LOCK_CAP = TRUE\r
216WRITE_LOCK_STATUS = TRUE\r
217READ_DISABLED_CAP = TRUE\r
218READ_ENABLED_CAP = TRUE\r
219READ_STATUS = TRUE\r
220READ_LOCK_CAP = TRUE\r
221READ_LOCK_STATUS = TRUE\r
222\r
223INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
224INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
225INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
226INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
227INF FatPkg/FatPei/FatPei.inf\r
228INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
229INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
230!endif\r
231\r
5e752084 232################################################################################\r
233#\r
234# FV Section\r
235#\r
236# [FV] section is used to define what components or modules are placed within a flash\r
237# device file. This section also defines order the components and modules are positioned\r
238# within the image. The [FV] section consists of define statements, set statements and\r
239# module statements.\r
240#\r
241################################################################################\r
242[FV.FVRECOVERY2]\r
243BlockSize = $(FLASH_BLOCK_SIZE)\r
244FvAlignment = 16 #FV alignment and FV attributes setting.\r
245ERASE_POLARITY = 1\r
246MEMORY_MAPPED = TRUE\r
247STICKY_WRITE = TRUE\r
248LOCK_CAP = TRUE\r
249LOCK_STATUS = TRUE\r
250WRITE_DISABLED_CAP = TRUE\r
251WRITE_ENABLED_CAP = TRUE\r
252WRITE_STATUS = TRUE\r
253WRITE_LOCK_CAP = TRUE\r
254WRITE_LOCK_STATUS = TRUE\r
255READ_DISABLED_CAP = TRUE\r
256READ_ENABLED_CAP = TRUE\r
257READ_STATUS = TRUE\r
258READ_LOCK_CAP = TRUE\r
259READ_LOCK_STATUS = TRUE\r
260FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
261\r
262\r
263\r
264INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
265\r
266!if $(MINNOW2_FSP_BUILD) == FALSE\r
267INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
268INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
269INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
270INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
271INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
272INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
273INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
274INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
275INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r
276!endif\r
277\r
98a88a76 278# INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
5e752084 279!if $(TPM_ENABLED) == TRUE\r
2e886a2e 280INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
5e752084 281INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
282INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
283!endif\r
284!if $(FTPM_ENABLE) == TRUE\r
2e886a2e 285INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config\r
5e752084 286!endif\r
287INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
288\r
289!if $(ACPI50_ENABLE) == TRUE\r
290 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
291!endif\r
292!if $(PERFORMANCE_ENABLE) == TRUE\r
293INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
294!endif\r
295\r
c5a59080
JY		 296!if $(RECOVERY_ENABLE)\r
297FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
298 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
299 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
300 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
301 }\r
302}\r
303!endif\r
304\r
5e752084 305[FV.FVRECOVERY]\r
306BlockSize = $(FLASH_BLOCK_SIZE)\r
307FvAlignment = 16 #FV alignment and FV attributes setting.\r
308ERASE_POLARITY = 1\r
309MEMORY_MAPPED = TRUE\r
310STICKY_WRITE = TRUE\r
311LOCK_CAP = TRUE\r
312LOCK_STATUS = TRUE\r
313WRITE_DISABLED_CAP = TRUE\r
314WRITE_ENABLED_CAP = TRUE\r
315WRITE_STATUS = TRUE\r
316WRITE_LOCK_CAP = TRUE\r
317WRITE_LOCK_STATUS = TRUE\r
318READ_DISABLED_CAP = TRUE\r
319READ_ENABLED_CAP = TRUE\r
320READ_STATUS = TRUE\r
321READ_LOCK_CAP = TRUE\r
322READ_LOCK_STATUS = TRUE\r
323FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
324\r
325\r
326!if $(MINNOW2_FSP_BUILD) == TRUE\r
327INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
328!else\r
329INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
330!endif\r
331\r
332INF MdeModulePkg/Core/Pei/PeiMain.inf\r
333!if $(MINNOW2_FSP_BUILD) == TRUE\r
334INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
335INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
336!endif\r
337INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
338INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
339INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
340\r
341INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
342\r
343!if $(MINNOW2_FSP_BUILD) == FALSE\r
344INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
345!endif\r
346\r
347!if $(FTPM_ENABLE) == TRUE\r
348INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
349!endif\r
350\r
351!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
352 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
353!endif\r
354\r
355\r
356!if $(CAPSULE_ENABLE) == TRUE\r
357INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
358!if $(DXE_ARCHITECTURE) == "X64"\r
359INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
360!endif\r
361!endif\r
362\r
363!if $(MINNOW2_FSP_BUILD) == FALSE\r
364!if $(PCIESC_ENABLE) == TRUE\r
365INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
366!endif\r
367INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
368!endif\r
369\r
370INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
371\r
372[FV.FVMAIN]\r
373BlockSize = $(FLASH_BLOCK_SIZE)\r
374FvAlignment = 16\r
375ERASE_POLARITY = 1\r
376MEMORY_MAPPED = TRUE\r
377STICKY_WRITE = TRUE\r
378LOCK_CAP = TRUE\r
379LOCK_STATUS = TRUE\r
380WRITE_DISABLED_CAP = TRUE\r
381WRITE_ENABLED_CAP = TRUE\r
382WRITE_STATUS = TRUE\r
383WRITE_LOCK_CAP = TRUE\r
384WRITE_LOCK_STATUS = TRUE\r
385READ_DISABLED_CAP = TRUE\r
386READ_ENABLED_CAP = TRUE\r
387READ_STATUS = TRUE\r
388READ_LOCK_CAP = TRUE\r
389READ_LOCK_STATUS = TRUE\r
390FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
391\r
392APRIORI DXE {\r
393 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
394 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
395 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
396 }\r
397\r
398FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
399 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
400 }\r
401\r
402 #\r
403 # EDK II Related Platform codes\r
404 #\r
405\r
406 !if $(MINNOW2_FSP_BUILD) == TRUE\r
407 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
408 !endif\r
409\r
410INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
411INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
412!if $(ACPI50_ENABLE) == TRUE\r
413INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
414INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
415!endif\r
416\r
417\r
418INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
419INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
420INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
421INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
422INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
423INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
424INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
425INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
426INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
98a88a76 427INF USE=X64 MdeModulePkg/Logo/Logo.inf\r
5e752084 428INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
429INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
430INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
431INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
432\r
433INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
434INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
435INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
436INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
437INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
438!if $(SECURE_BOOT_ENABLE)\r
439INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
440!endif\r
441\r
442INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
443\r
444INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
445INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
446INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
447INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
448\r
449\r
450INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
451\r
452!if $(DATAHUB_ENABLE) == TRUE\r
453INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
454!endif\r
455INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
456INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
457\r
458INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
459\r
460 #\r
461 # EDK II Related Silicon codes\r
462 #\r
463INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
464\r
465!if $(USE_HPET_TIMER) == TRUE\r
466INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
467!else\r
468INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
469!endif\r
470INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
471\r
472INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
473\r
474INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
475INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
476\r
477!if $(MINNOW2_FSP_BUILD) == FALSE\r
478INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
479!endif\r
480INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
481!if $(PCIESC_ENABLE) == TRUE\r
482INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
483!endif\r
484\r
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
486INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
487INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
488INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
489INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
490!if $(MINNOW2_FSP_BUILD) == FALSE\r
491INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
492!else\r
493INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
494INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
495!endif\r
496!if $(MINNOW2_FSP_BUILD) == FALSE\r
497 !if $(SEC_ENABLE) == TRUE\r
498 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
499 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
500 !endif\r
501!endif\r
502!if $(TPM_ENABLED) == TRUE\r
503INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
504INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
505INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
506!endif\r
507!if $(FTPM_ENABLE) == TRUE\r
508INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
509INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
510INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
2e886a2e 511INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf\r
5e752084 512INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
513!endif\r
514\r
515#\r
516# EDK II Related Platform codes\r
517#\r
518INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
519INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
520INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
521INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
522INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
523INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
524INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
525INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
526INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
527!if $(GOP_DRIVER_ENABLE) == TRUE\r
528 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
529 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
530 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
531 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
532 SECTION UI = "IntelGopDriver"\r
533}\r
534!endif\r
535\r
536INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
537 #\r
538 # SMM\r
539 #\r
540INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
541INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 542INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 543\r
544INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
545INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 546INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 547INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
97e862bb
MK		 548\r
549#\r
550# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell\r
551#\r
552#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
553#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
554\r
5e752084 555 #\r
556 # ACPI\r
557 #\r
558INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
559INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
560INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
561INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
562\r
563INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
564\r
565INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
566\r
98a88a76
KM		 567INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf\r
568\r
5e752084 569 #\r
570 # PCI\r
571 #\r
572INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
573\r
574INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
575\r
576\r
577#\r
578# ISA\r
579#\r
580INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
581INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
582INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
583!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
584INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
585!endif\r
586#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
587#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
588\r
589#\r
590# SDIO\r
591#\r
98a88a76
KM		 592#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
593#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
5e752084 594#\r
595# IDE/SCSI/AHCI\r
596#\r
597INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
598\r
599INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
600\r
601INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
602!if $(SATA_ENABLE) == TRUE\r
603INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
604#\r
605\r
606#\r
607INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
608INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
609!if $(SCSI_ENABLE) == TRUE\r
610INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
611INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
612!endif\r
613#\r
614!endif\r
615# Console\r
616#\r
617INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
618INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
619INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
620INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
621INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
622INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
623INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
624INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
625 #\r
626 # USB\r
627 #\r
628!if $(USB_ENABLE) == TRUE\r
629INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
630INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
631INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
632INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
633INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
634INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
635INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
636!endif\r
637\r
638 #\r
639 # ECP\r
640 #\r
641INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf\r
642INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf\r
643INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf\r
644INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf\r
645INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf\r
646INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf\r
647 #\r
648 # SMBIOS\r
649 #\r
650INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
651INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
652\r
653INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
654\r
655 #\r
656 # Legacy Modules\r
657 #\r
658INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
659\r
660#\r
661# FAT file system\r
662#\r
663INF FatPkg/EnhancedFatDxe/Fat.inf\r
664\r
665#\r
666# UEFI Shell\r
667#\r
2840bb51 668INF ShellPkg/Application/Shell/Shell.inf\r
5e752084 669\r
7a0e4f8e
RN		 670#\r
671# dp command\r
672#\r
673!if $(PERFORMANCE_ENABLE) == TRUE\r
674INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
675!endif\r
5e752084 676\r
677!if $(GOP_DRIVER_ENABLE) == TRUE\r
678FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
679 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
680 SECTION UI = "IntelGopVbt"\r
681}\r
682!endif\r
683\r
684#\r
685# Network Modules\r
686#\r
687!if $(NETWORK_ENABLE) == TRUE\r
688 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
689 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
690 SECTION UI = "UNDI"\r
691 }\r
692 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
693 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
694 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
695 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
696 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
697 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
698 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
699 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
5f137127
FS		 700 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
701 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
5e752084 702 !if $(NETWORK_IP6_ENABLE) == TRUE\r
703 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
704 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
705 INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r
706 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
707 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
708 !endif\r
5e752084 709 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
710 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
711 !endif\r
712 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
5e752084 713 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
5e752084 714 !endif\r
715!endif\r
716\r
c5a59080 717!if $(CAPSULE_ENABLE)\r
1aa9314e
MK		 718INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
719\r
720#\r
721# Minnow Max System Firmware FMP\r
722#\r
723INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
724\r
725#\r
726# Sample Device FMP\r
727#\r
728INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
729INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
730INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
731\r
c5a59080 732!endif\r
1aa9314e 733\r
c5a59080 734!if $(MICOCODE_CAPSULE_ENABLE)\r
1aa9314e 735INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
c5a59080
JY		 736!endif\r
737\r
738!if $(RECOVERY_ENABLE)\r
739FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
740 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
741 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
742 }\r
743!endif\r
c5a59080 744\r
5e752084 745[FV.FVMAIN_COMPACT]\r
746BlockSize = $(FLASH_BLOCK_SIZE)\r
747FvAlignment = 16\r
748ERASE_POLARITY = 1\r
749MEMORY_MAPPED = TRUE\r
750STICKY_WRITE = TRUE\r
751LOCK_CAP = TRUE\r
752LOCK_STATUS = TRUE\r
753WRITE_DISABLED_CAP = TRUE\r
754WRITE_ENABLED_CAP = TRUE\r
755WRITE_STATUS = TRUE\r
756WRITE_LOCK_CAP = TRUE\r
757WRITE_LOCK_STATUS = TRUE\r
758READ_DISABLED_CAP = TRUE\r
759READ_ENABLED_CAP = TRUE\r
760READ_STATUS = TRUE\r
761READ_LOCK_CAP = TRUE\r
762READ_LOCK_STATUS = TRUE\r
763\r
764\r
765\r
766FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
767!if $(LZMA_ENABLE) == TRUE\r
768# LZMA Compress\r
769 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
770 SECTION FV_IMAGE = FVMAIN\r
771 }\r
772!else\r
773!if $(DXE_COMPRESS_ENABLE) == TRUE\r
774# Tiano Compress\r
775 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
776 SECTION FV_IMAGE = FVMAIN\r
777 }\r
778!else\r
779# No Compress\r
780 SECTION COMPRESS PI_NONE {\r
781 SECTION FV_IMAGE = FVMAIN\r
782 }\r
783!endif\r
784!endif\r
785 }\r
786\r
787[FV.SETUP_DATA]\r
788BlockSize = $(FLASH_BLOCK_SIZE)\r
789#NumBlocks = 0x10\r
790FvAlignment = 16\r
791ERASE_POLARITY = 1\r
792MEMORY_MAPPED = TRUE\r
793STICKY_WRITE = TRUE\r
794LOCK_CAP = TRUE\r
795LOCK_STATUS = TRUE\r
796WRITE_DISABLED_CAP = TRUE\r
797WRITE_ENABLED_CAP = TRUE\r
798WRITE_STATUS = TRUE\r
799WRITE_LOCK_CAP = TRUE\r
800WRITE_LOCK_STATUS = TRUE\r
801READ_DISABLED_CAP = TRUE\r
802READ_ENABLED_CAP = TRUE\r
803READ_STATUS = TRUE\r
804READ_LOCK_CAP = TRUE\r
805READ_LOCK_STATUS = TRUE\r
806\r
5e752084 807################################################################################\r
808#\r
809# Rules are use with the [FV] section's module INF type to define\r
810# how an FFS file is created for a given INF file. The following Rule are the default\r
811# rules for the different module type. User can add the customized rules to define the\r
812# content of the FFS file.\r
813#\r
814################################################################################\r
815[Rule.Common.SEC]\r
816 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
817 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
818 RAW BIN Align = 16 |.com\r
819 }\r
820\r
821[Rule.Common.SEC.BINARY]\r
822 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
823 PE32 PE32 Align = 8 |.efi\r
584fcb7d
WD		 824!if $(MINNOW2_FSP_BUILD) == TRUE\r
825 RAW RAW |.raw\r
826!else\r
827 RAW BIN Align = 16 |.com\r
828!endif\r
5e752084 829 }\r
830\r
831[Rule.Common.PEI_CORE]\r
832 FILE PEI_CORE = $(NAMED_GUID) {\r
833 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
834 UI STRING="$(MODULE_NAME)" Optional\r
835 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
836 }\r
837\r
838[Rule.Common.PEIM]\r
839 FILE PEIM = $(NAMED_GUID) {\r
840 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
841 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
842 UI STRING="$(MODULE_NAME)" Optional\r
843 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
844 }\r
845\r
846[Rule.Common.PEIM.BINARY]\r
847 FILE PEIM = $(NAMED_GUID) {\r
848 PEI_DEPEX PEI_DEPEX Optional |.depex\r
849 PE32 PE32 Align = Auto |.efi\r
850 UI STRING="$(MODULE_NAME)" Optional\r
851 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
852 }\r
853\r
854[Rule.Common.PEIM.BIOSID]\r
855 FILE PEIM = $(NAMED_GUID) {\r
856 RAW BIN BiosId.bin\r
857 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
858 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
859 UI STRING="$(MODULE_NAME)" Optional\r
860 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
861 }\r
862\r
863[Rule.Common.USER_DEFINED.APINIT]\r
864 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
865 RAW SEC_BIN |.com\r
866 }\r
867#cjia 2011-07-21\r
868[Rule.Common.USER_DEFINED.LEGACY16]\r
869 FILE FREEFORM = $(NAMED_GUID) {\r
870 UI STRING="$(MODULE_NAME)" Optional\r
871 RAW BIN |.bin\r
872 }\r
873#cjia\r
874\r
875[Rule.Common.USER_DEFINED.ASM16]\r
876 FILE FREEFORM = $(NAMED_GUID) {\r
877 UI STRING="$(MODULE_NAME)" Optional\r
878 RAW BIN |.com\r
879 }\r
880\r
881[Rule.Common.DXE_CORE]\r
882 FILE DXE_CORE = $(NAMED_GUID) {\r
883 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
884 UI STRING="$(MODULE_NAME)" Optional\r
885 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
886 }\r
887\r
888[Rule.Common.UEFI_DRIVER]\r
889 FILE DRIVER = $(NAMED_GUID) {\r
890 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
891 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
892 UI STRING="$(MODULE_NAME)" Optional\r
893 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
894 }\r
895\r
896[Rule.Common.UEFI_DRIVER.BINARY]\r
897 FILE DRIVER = $(NAMED_GUID) {\r
898 DXE_DEPEX DXE_DEPEX Optional |.depex\r
899 PE32 PE32 |.efi\r
900 UI STRING="$(MODULE_NAME)" Optional\r
901 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
902 }\r
903\r
904[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
905 FILE DRIVER = $(NAMED_GUID) {\r
906 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
907 PE32 PE32 |.efi\r
908 UI STRING="$(MODULE_NAME)" Optional\r
909 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
910 }\r
911\r
912[Rule.Common.DXE_DRIVER]\r
913 FILE DRIVER = $(NAMED_GUID) {\r
914 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
915 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
916 UI STRING="$(MODULE_NAME)" Optional\r
917 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
918 }\r
919\r
920[Rule.Common.DXE_DRIVER.BINARY]\r
921 FILE DRIVER = $(NAMED_GUID) {\r
922 DXE_DEPEX DXE_DEPEX Optional |.depex\r
923 PE32 PE32 |.efi\r
924 UI STRING="$(MODULE_NAME)" Optional\r
925 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
926 }\r
927\r
928[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
929 FILE DRIVER = $(NAMED_GUID) {\r
930 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
931 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
932 UI STRING="$(MODULE_NAME)" Optional\r
933 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
934 RAW ACPI Optional |.acpi\r
935 RAW ASL Optional |.aml\r
936 }\r
937\r
938[Rule.Common.DXE_RUNTIME_DRIVER]\r
939 FILE DRIVER = $(NAMED_GUID) {\r
940 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
941 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
942 UI STRING="$(MODULE_NAME)" Optional\r
943 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
944 }\r
945\r
946[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
947 FILE DRIVER = $(NAMED_GUID) {\r
948 DXE_DEPEX DXE_DEPEX Optional |.depex\r
949 PE32 PE32 |.efi\r
950 UI STRING="$(MODULE_NAME)" Optional\r
951 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
952 }\r
953\r
954[Rule.Common.DXE_SMM_DRIVER]\r
955 FILE SMM = $(NAMED_GUID) {\r
956 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
957 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
958 UI STRING="$(MODULE_NAME)" Optional\r
959 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
960 }\r
961\r
962[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
963 FILE SMM = $(NAMED_GUID) {\r
964 SMM_DEPEX SMM_DEPEX |.depex\r
965 PE32 PE32 |.efi\r
966 RAW BIN Optional |.aml\r
967 UI STRING="$(MODULE_NAME)" Optional\r
968 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
969 }\r
970\r
971[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
972 FILE SMM = $(NAMED_GUID) {\r
973 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
974 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
975 UI STRING="$(MODULE_NAME)" Optional\r
976 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
977 RAW ACPI Optional |.acpi\r
978 RAW ASL Optional |.aml\r
979 }\r
980\r
981[Rule.Common.SMM_CORE]\r
982 FILE SMM_CORE = $(NAMED_GUID) {\r
983 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
984 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
985 UI STRING="$(MODULE_NAME)" Optional\r
986 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
987 }\r
988\r
989[Rule.Common.SMM_CORE.BINARY]\r
990 FILE SMM_CORE = $(NAMED_GUID) {\r
991 DXE_DEPEX DXE_DEPEX Optional |.depex\r
992 PE32 PE32 |.efi\r
993 UI STRING="$(MODULE_NAME)" Optional\r
994 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
995 }\r
996\r
997[Rule.Common.UEFI_APPLICATION]\r
998 FILE APPLICATION = $(NAMED_GUID) {\r
999 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1000 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1001 UI STRING="$(MODULE_NAME)" Optional\r
1002 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1003 }\r
1004\r
1005[Rule.Common.UEFI_APPLICATION.UI]\r
1006 FILE APPLICATION = $(NAMED_GUID) {\r
1007 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1008 UI STRING="Enter Setup"\r
1009 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1010 }\r
1011\r
1012[Rule.Common.USER_DEFINED]\r
1013 FILE FREEFORM = $(NAMED_GUID) {\r
1014 UI STRING="$(MODULE_NAME)" Optional\r
1015 RAW BIN |.bin\r
1016 }\r
1017\r
98a88a76
KM		 1018[Rule.Common.USER_DEFINED.BINARY]\r
1019 FILE FREEFORM = $(NAMED_GUID) {\r
1020 UI STRING="$(MODULE_NAME)" Optional\r
1021 RAW BIN |.bin\r
1022 }\r
1023\r
5e752084 1024[Rule.Common.USER_DEFINED.ACPITABLE]\r
1025 FILE FREEFORM = $(NAMED_GUID) {\r
1026 RAW ACPI Optional |.acpi\r
1027 RAW ASL Optional |.aml\r
1028 }\r
1029\r
1030[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1031 FILE FREEFORM = $(NAMED_GUID) {\r
1032 RAW ASL Optional |.aml\r
1033 }\r
1034\r
1035[Rule.Common.ACPITABLE]\r
1036 FILE FREEFORM = $(NAMED_GUID) {\r
1037 RAW ACPI Optional |.acpi\r
1038 RAW ASL Optional |.aml\r
1039 }\r
1040\r
c5a59080
JY		 1041[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
1042 FILE PEIM = $(NAMED_GUID) {\r
1043 RAW BIN |.acpi\r
1044 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1045 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1046 UI STRING="$(MODULE_NAME)" Optional\r
1047 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1048 }\r
EFI Development Kit II mirror for PVE