REF: https://bugzilla.tianocore.org/show_bug.cgi?id=653
Correct description of Timeout param in XhciReg.h to be matched with
XhciReg.c.
Cc: Alexei Fedorov <Alexei.Fedorov@arm.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
\r
This file contains the register definition of XHCI host controller.\r
\r
\r
This file contains the register definition of XHCI host controller.\r
\r
-Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Offset The offset of the operational register.\r
@param Bit The bit of the register to wait for.\r
@param WaitToSet Wait the bit to set or clear.\r
@param Offset The offset of the operational register.\r
@param Bit The bit of the register to wait for.\r
@param WaitToSet Wait the bit to set or clear.\r
- @param Timeout The time to wait before abort (in microsecond, us).\r
+ @param Timeout The time to wait before abort (in millisecond, ms).\r
\r
@retval EFI_SUCCESS The bit successfully changed by host controller.\r
@retval EFI_TIMEOUT The time out occurred.\r
\r
@retval EFI_SUCCESS The bit successfully changed by host controller.\r
@retval EFI_TIMEOUT The time out occurred.\r
Reset the XHCI host controller.\r
\r
@param Xhc The XHCI Instance.\r
Reset the XHCI host controller.\r
\r
@param Xhc The XHCI Instance.\r
- @param Timeout Time to wait before abort (in microsecond, us).\r
+ @param Timeout Time to wait before abort (in millisecond, ms).\r
\r
@retval EFI_SUCCESS The XHCI host controller is reset.\r
@return Others Failed to reset the XHCI before Timeout.\r
\r
@retval EFI_SUCCESS The XHCI host controller is reset.\r
@return Others Failed to reset the XHCI before Timeout.\r
Halt the XHCI host controller.\r
\r
@param Xhc The XHCI Instance.\r
Halt the XHCI host controller.\r
\r
@param Xhc The XHCI Instance.\r
- @param Timeout Time to wait before abort (in microsecond, us).\r
+ @param Timeout Time to wait before abort (in millisecond, ms).\r
\r
@return EFI_SUCCESS The XHCI host controller is halt.\r
@return EFI_TIMEOUT Failed to halt the XHCI before Timeout.\r
\r
@return EFI_SUCCESS The XHCI host controller is halt.\r
@return EFI_TIMEOUT Failed to halt the XHCI before Timeout.\r
Set the XHCI host controller to run.\r
\r
@param Xhc The XHCI Instance.\r
Set the XHCI host controller to run.\r
\r
@param Xhc The XHCI Instance.\r
- @param Timeout Time to wait before abort (in microsecond, us).\r
+ @param Timeout Time to wait before abort (in millisecond, ms).\r
\r
@return EFI_SUCCESS The XHCI host controller is running.\r
@return EFI_TIMEOUT Failed to set the XHCI to run before Timeout.\r
\r
@return EFI_SUCCESS The XHCI host controller is running.\r
@return EFI_TIMEOUT Failed to set the XHCI to run before Timeout.\r
/** @file\r
Private Header file for Usb Host Controller PEIM\r
\r
/** @file\r
Private Header file for Usb Host Controller PEIM\r
\r
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
@param Offset The offset of the operational register.\r
@param Bit The bit of the register to wait for.\r
@param WaitToSet Wait the bit to set or clear.\r
@param Offset The offset of the operational register.\r
@param Bit The bit of the register to wait for.\r
@param WaitToSet Wait the bit to set or clear.\r
- @param Timeout The time to wait before abort (in microsecond, us).\r
+ @param Timeout The time to wait before abort (in millisecond, ms).\r
\r
@retval EFI_SUCCESS The bit successfully changed by host controller.\r
@retval EFI_TIMEOUT The time out occurred.\r
\r
@retval EFI_SUCCESS The bit successfully changed by host controller.\r
@retval EFI_TIMEOUT The time out occurred.\r