UINT64 Padding;0x328 // Required for stack alignment\r
*/\r
\r
-ASM_GLOBAL ASM_PFX(ExceptionHandlersStart)\r
-ASM_GLOBAL ASM_PFX(ExceptionHandlersEnd)\r
-ASM_GLOBAL ASM_PFX(CommonExceptionEntry)\r
-ASM_GLOBAL ASM_PFX(AsmCommonExceptionEntry)\r
-ASM_GLOBAL ASM_PFX(CommonCExceptionHandler)\r
+GCC_ASM_EXPORT(ExceptionHandlersStart)\r
+GCC_ASM_EXPORT(ExceptionHandlersEnd)\r
+GCC_ASM_EXPORT(CommonExceptionEntry)\r
+GCC_ASM_EXPORT(AsmCommonExceptionEntry)\r
+GCC_ASM_EXPORT(CommonCExceptionHandler)\r
\r
.text\r
.align 11\r
.text\r
.align 2\r
\r
-ASM_GLOBAL ASM_PFX(ArmReadCntFrq)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntFrq)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntPct)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntkCtl)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntkCtl)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntpTval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntpTval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntpCtl)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntpCtl)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvTval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvTval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvCtl)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvCtl)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvCt)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntpCval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntpCval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvCval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvCval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvOff)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvOff)\r
+GCC_ASM_EXPORT(ArmReadCntFrq)\r
+GCC_ASM_EXPORT(ArmWriteCntFrq)\r
+GCC_ASM_EXPORT(ArmReadCntPct)\r
+GCC_ASM_EXPORT(ArmReadCntkCtl)\r
+GCC_ASM_EXPORT(ArmWriteCntkCtl)\r
+GCC_ASM_EXPORT(ArmReadCntpTval)\r
+GCC_ASM_EXPORT(ArmWriteCntpTval)\r
+GCC_ASM_EXPORT(ArmReadCntpCtl)\r
+GCC_ASM_EXPORT(ArmWriteCntpCtl)\r
+GCC_ASM_EXPORT(ArmReadCntvTval)\r
+GCC_ASM_EXPORT(ArmWriteCntvTval)\r
+GCC_ASM_EXPORT(ArmReadCntvCtl)\r
+GCC_ASM_EXPORT(ArmWriteCntvCtl)\r
+GCC_ASM_EXPORT(ArmReadCntvCt)\r
+GCC_ASM_EXPORT(ArmReadCntpCval)\r
+GCC_ASM_EXPORT(ArmWriteCntpCval)\r
+GCC_ASM_EXPORT(ArmReadCntvCval)\r
+GCC_ASM_EXPORT(ArmWriteCntvCval)\r
+GCC_ASM_EXPORT(ArmReadCntvOff)\r
+GCC_ASM_EXPORT(ArmWriteCntvOff)\r
\r
ASM_PFX(ArmReadCntFrq):\r
mrs x0, cntfrq_el0 // Read CNTFRQ\r
.text\r
.align 3\r
\r
-ASM_GLOBAL ASM_PFX(ArmPlatformSecBootAction)\r
-ASM_GLOBAL ASM_PFX(ArmPlatformSecBootMemoryInit)\r
-ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesWrite)\r
-ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesRead)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)\r
+GCC_ASM_EXPORT(ArmSecMpCoreSecondariesWrite)\r
+GCC_ASM_EXPORT(ArmSecMpCoreSecondariesRead)\r
\r
/**\r
Call at the beginning of the platform boot up\r
.text\r
.align 3\r
\r
-ASM_GLOBAL ASM_PFX(SwitchToNSExceptionLevel1)\r
-ASM_GLOBAL ASM_PFX(enter_monitor_mode)\r
-ASM_GLOBAL ASM_PFX(return_from_exception)\r
-ASM_GLOBAL ASM_PFX(copy_cpsr_into_spsr)\r
-ASM_GLOBAL ASM_PFX(set_non_secure_mode)\r
+GCC_ASM_EXPORT(SwitchToNSExceptionLevel1)\r
+GCC_ASM_EXPORT(enter_monitor_mode)\r
+GCC_ASM_EXPORT(return_from_exception)\r
+GCC_ASM_EXPORT(copy_cpsr_into_spsr)\r
+GCC_ASM_EXPORT(set_non_secure_mode)\r
\r
// Switch from EL3 to NS-EL1\r
ASM_PFX(SwitchToNSExceptionLevel1):\r