]> git.proxmox.com Git - mirror_edk2.git/commitdiff
ARM Packages: use GCC_ASM_EXPORT to export functions
authorBrendan Jackman <brendan.jackman@arm.com>
Thu, 8 May 2014 14:55:52 +0000 (14:55 +0000)
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>
Thu, 8 May 2014 14:55:52 +0000 (14:55 +0000)
This ensures the .type directive is used to mark them as function symbols

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15506 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S
ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S
ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S
ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
ArmPlatformPkg/Sec/AArch64/Helper.S

index 8e2b37640fc60707043b28171271a3d52b26e4ea..7a25f1bf359ae0e3e4ecc4be9c7a3011755882ac 100644 (file)
   UINT64  Padding;0x328   // Required for stack alignment\r
 */\r
 \r
-ASM_GLOBAL ASM_PFX(ExceptionHandlersStart)\r
-ASM_GLOBAL ASM_PFX(ExceptionHandlersEnd)\r
-ASM_GLOBAL ASM_PFX(CommonExceptionEntry)\r
-ASM_GLOBAL ASM_PFX(AsmCommonExceptionEntry)\r
-ASM_GLOBAL ASM_PFX(CommonCExceptionHandler)\r
+GCC_ASM_EXPORT(ExceptionHandlersStart)\r
+GCC_ASM_EXPORT(ExceptionHandlersEnd)\r
+GCC_ASM_EXPORT(CommonExceptionEntry)\r
+GCC_ASM_EXPORT(AsmCommonExceptionEntry)\r
+GCC_ASM_EXPORT(CommonCExceptionHandler)\r
 \r
 .text\r
 .align 11\r
index c6087aa6193f99442ae2a8b7b2fb7f6a1f6f13f5..1ac01086aa3a797acac8257cec351451112f40fb 100644 (file)
 .text\r
 .align 2\r
 \r
-ASM_GLOBAL ASM_PFX(ArmReadCntFrq)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntFrq)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntPct)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntkCtl)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntkCtl)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntpTval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntpTval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntpCtl)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntpCtl)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvTval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvTval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvCtl)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvCtl)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvCt)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntpCval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntpCval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvCval)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvCval)\r
-ASM_GLOBAL ASM_PFX(ArmReadCntvOff)\r
-ASM_GLOBAL ASM_PFX(ArmWriteCntvOff)\r
+GCC_ASM_EXPORT(ArmReadCntFrq)\r
+GCC_ASM_EXPORT(ArmWriteCntFrq)\r
+GCC_ASM_EXPORT(ArmReadCntPct)\r
+GCC_ASM_EXPORT(ArmReadCntkCtl)\r
+GCC_ASM_EXPORT(ArmWriteCntkCtl)\r
+GCC_ASM_EXPORT(ArmReadCntpTval)\r
+GCC_ASM_EXPORT(ArmWriteCntpTval)\r
+GCC_ASM_EXPORT(ArmReadCntpCtl)\r
+GCC_ASM_EXPORT(ArmWriteCntpCtl)\r
+GCC_ASM_EXPORT(ArmReadCntvTval)\r
+GCC_ASM_EXPORT(ArmWriteCntvTval)\r
+GCC_ASM_EXPORT(ArmReadCntvCtl)\r
+GCC_ASM_EXPORT(ArmWriteCntvCtl)\r
+GCC_ASM_EXPORT(ArmReadCntvCt)\r
+GCC_ASM_EXPORT(ArmReadCntpCval)\r
+GCC_ASM_EXPORT(ArmWriteCntpCval)\r
+GCC_ASM_EXPORT(ArmReadCntvCval)\r
+GCC_ASM_EXPORT(ArmWriteCntvCval)\r
+GCC_ASM_EXPORT(ArmReadCntvOff)\r
+GCC_ASM_EXPORT(ArmWriteCntvOff)\r
 \r
 ASM_PFX(ArmReadCntFrq):\r
   mrs   x0, cntfrq_el0           // Read CNTFRQ\r
index f97bf150d39a8861ae5f3a3ccc97083fece1c627..525c1287efe09bdb57b71bbada16d5cef1edd031 100644 (file)
@@ -25,7 +25,7 @@
 .text\r
 .align 3\r
 \r
-ASM_GLOBAL ASM_PFX(SecondariesPenStart)\r
+GCC_ASM_EXPORT(SecondariesPenStart)\r
 ASM_GLOBAL SecondariesPenEnd\r
 \r
 ASM_PFX(SecondariesPenStart):\r
index 18433b3d502458bf1c480de321a7fb10b525344b..66102da14b6a15465f44d09b896438daa30e125d 100644 (file)
@@ -31,7 +31,7 @@
 .align 2\r
 \r
 \r
-ASM_GLOBAL ASM_PFX(memcpy)\r
+GCC_ASM_EXPORT(memcpy)\r
 \r
 \r
 // Taken from Newlib BSD implementation.\r
index 20554a6fe72a3ce30f58fdd58d25b714914ef91a..a07ed97f5f1fdb804125636ce091fd59bb3d432f 100644 (file)
 .text\r
 .align 3\r
 \r
-ASM_GLOBAL ASM_PFX(ArmPlatformSecBootAction)\r
-ASM_GLOBAL ASM_PFX(ArmPlatformSecBootMemoryInit)\r
-ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesWrite)\r
-ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesRead)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootAction)\r
+GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)\r
+GCC_ASM_EXPORT(ArmSecMpCoreSecondariesWrite)\r
+GCC_ASM_EXPORT(ArmSecMpCoreSecondariesRead)\r
 \r
 /**\r
   Call at the beginning of the platform boot up\r
index 1fc39e68a160f3a8aeaaa45d35d107f58f323975..cdc8d925bc69f370c368778310cec71c497e85d2 100644 (file)
@@ -18,7 +18,7 @@
 .text\r
 .align 11\r
 \r
-ASM_GLOBAL ASM_PFX(PeiVectorTable)\r
+GCC_ASM_EXPORT(PeiVectorTable)\r
 \r
 //============================================================\r
 //Default Exception Handlers\r
index a11cda06d1b74139eaf259d986d283452be98e5f..8e23b0389653d9efb9797c296f3649698301af24 100644 (file)
@@ -18,8 +18,8 @@
 .text\r
 .align 3\r
 \r
-ASM_GLOBAL ASM_PFX(SetupExceptionLevel1)\r
-ASM_GLOBAL ASM_PFX(SetupExceptionLevel2)\r
+GCC_ASM_EXPORT(SetupExceptionLevel1)\r
+GCC_ASM_EXPORT(SetupExceptionLevel2)\r
 \r
 // Setup EL1 while in EL1\r
 ASM_PFX(SetupExceptionLevel1):\r
index d3fcd0aa130839be0b46599b0aa65f81dbe5e8a6..8d83510517b465d215b435b53faec4634ea99205 100644 (file)
@@ -17,7 +17,7 @@
 .text\r
 .align 3\r
 \r
-ASM_GLOBAL ASM_PFX(SecSwitchStack)\r
+GCC_ASM_EXPORT(SecSwitchStack)\r
 \r
 \r
 \r
index 490d3df12d765cb54cc001b9e804a96bb4f7fcb2..259aca485634899b365e00c575a053039e6bfcb7 100644 (file)
 .text\r
 .align 3\r
 \r
-ASM_GLOBAL ASM_PFX(SwitchToNSExceptionLevel1)\r
-ASM_GLOBAL ASM_PFX(enter_monitor_mode)\r
-ASM_GLOBAL ASM_PFX(return_from_exception)\r
-ASM_GLOBAL ASM_PFX(copy_cpsr_into_spsr)\r
-ASM_GLOBAL ASM_PFX(set_non_secure_mode)\r
+GCC_ASM_EXPORT(SwitchToNSExceptionLevel1)\r
+GCC_ASM_EXPORT(enter_monitor_mode)\r
+GCC_ASM_EXPORT(return_from_exception)\r
+GCC_ASM_EXPORT(copy_cpsr_into_spsr)\r
+GCC_ASM_EXPORT(set_non_secure_mode)\r
 \r
 // Switch from EL3 to NS-EL1\r
 ASM_PFX(SwitchToNSExceptionLevel1):\r