]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - arch/x86/include/asm/pgtable.h
x86/mm/pti: Allocate a separate user PGD
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
1965aae3
PA
2#ifndef _ASM_X86_PGTABLE_H
3#define _ASM_X86_PGTABLE_H
6c386655 4
21729f81 5#include <linux/mem_encrypt.h>
c47c1b1f 6#include <asm/page.h>
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
21729f81
TL
18/*
19 * Macros to add or remove encryption attribute
20 */
21#define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot)))
22#define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot)))
23
4614139c 24#ifndef __ASSEMBLY__
55a6ca25
PA
25#include <asm/x86_init.h>
26
b9d05200
TL
27extern pgd_t early_top_pgt[PTRS_PER_PGD];
28int __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
29
ef6bea6d 30void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
e1a58320
SS
31void ptdump_walk_pgd_level_checkwx(void);
32
33#ifdef CONFIG_DEBUG_WX
34#define debug_checkwx() ptdump_walk_pgd_level_checkwx()
35#else
36#define debug_checkwx() do { } while (0)
37#endif
ef6bea6d 38
8405b122
JF
39/*
40 * ZERO_PAGE is a global shared page that is always zero: used
41 * for zero-mapped memory areas etc..
42 */
277d5b40
AK
43extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
44 __visible;
8405b122
JF
45#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
46
e3ed910d
JF
47extern spinlock_t pgd_lock;
48extern struct list_head pgd_list;
8405b122 49
617d34d9
JF
50extern struct mm_struct *pgd_page_get_mm(struct page *page);
51
21729f81
TL
52extern pmdval_t early_pmd_flags;
53
54321d94
JF
54#ifdef CONFIG_PARAVIRT
55#include <asm/paravirt.h>
56#else /* !CONFIG_PARAVIRT */
57#define set_pte(ptep, pte) native_set_pte(ptep, pte)
58#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
59
54321d94
JF
60#define set_pte_atomic(ptep, pte) \
61 native_set_pte_atomic(ptep, pte)
62
63#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
64
f2a6a705 65#ifndef __PAGETABLE_P4D_FOLDED
54321d94
JF
66#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
67#define pgd_clear(pgd) native_pgd_clear(pgd)
68#endif
69
f2a6a705
KS
70#ifndef set_p4d
71# define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d)
72#endif
73
74#ifndef __PAGETABLE_PUD_FOLDED
75#define p4d_clear(p4d) native_p4d_clear(p4d)
76#endif
77
54321d94
JF
78#ifndef set_pud
79# define set_pud(pudp, pud) native_set_pud(pudp, pud)
80#endif
81
d0f33ac9 82#ifndef __PAGETABLE_PUD_FOLDED
54321d94
JF
83#define pud_clear(pud) native_pud_clear(pud)
84#endif
85
86#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
87#define pmd_clear(pmd) native_pmd_clear(pmd)
88
54321d94
JF
89#define pgd_val(x) native_pgd_val(x)
90#define __pgd(x) native_make_pgd(x)
91
f2a6a705
KS
92#ifndef __PAGETABLE_P4D_FOLDED
93#define p4d_val(x) native_p4d_val(x)
94#define __p4d(x) native_make_p4d(x)
95#endif
96
54321d94
JF
97#ifndef __PAGETABLE_PUD_FOLDED
98#define pud_val(x) native_pud_val(x)
99#define __pud(x) native_make_pud(x)
100#endif
101
102#ifndef __PAGETABLE_PMD_FOLDED
103#define pmd_val(x) native_pmd_val(x)
104#define __pmd(x) native_make_pmd(x)
105#endif
106
107#define pte_val(x) native_pte_val(x)
108#define __pte(x) native_make_pte(x)
109
224101ed
JF
110#define arch_end_context_switch(prev) do {} while(0)
111
54321d94
JF
112#endif /* CONFIG_PARAVIRT */
113
4614139c
JF
114/*
115 * The following only work if pte_present() is true.
116 * Undefined behaviour if not..
117 */
3cbaeafe
JP
118static inline int pte_dirty(pte_t pte)
119{
a15af1c9 120 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
121}
122
a927cb83
DH
123
124static inline u32 read_pkru(void)
125{
126 if (boot_cpu_has(X86_FEATURE_OSPKE))
127 return __read_pkru();
128 return 0;
129}
130
9e90199c
XG
131static inline void write_pkru(u32 pkru)
132{
133 if (boot_cpu_has(X86_FEATURE_OSPKE))
134 __write_pkru(pkru);
135}
136
3cbaeafe
JP
137static inline int pte_young(pte_t pte)
138{
a15af1c9 139 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
140}
141
c164e038
KS
142static inline int pmd_dirty(pmd_t pmd)
143{
144 return pmd_flags(pmd) & _PAGE_DIRTY;
145}
3cbaeafe 146
f2d6bfe9
JW
147static inline int pmd_young(pmd_t pmd)
148{
149 return pmd_flags(pmd) & _PAGE_ACCESSED;
150}
151
a00cc7d9
MW
152static inline int pud_dirty(pud_t pud)
153{
154 return pud_flags(pud) & _PAGE_DIRTY;
155}
156
157static inline int pud_young(pud_t pud)
158{
159 return pud_flags(pud) & _PAGE_ACCESSED;
160}
161
3cbaeafe
JP
162static inline int pte_write(pte_t pte)
163{
a15af1c9 164 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
165}
166
3cbaeafe
JP
167static inline int pte_huge(pte_t pte)
168{
a15af1c9 169 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
170}
171
3cbaeafe
JP
172static inline int pte_global(pte_t pte)
173{
a15af1c9 174 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
175}
176
177static inline int pte_exec(pte_t pte)
178{
a15af1c9 179 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
180}
181
7e675137
NP
182static inline int pte_special(pte_t pte)
183{
c819f37e 184 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
185}
186
91030ca1
HD
187static inline unsigned long pte_pfn(pte_t pte)
188{
189 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
190}
191
087975b0
AM
192static inline unsigned long pmd_pfn(pmd_t pmd)
193{
f70abb0f 194 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
087975b0
AM
195}
196
0ee364eb
MG
197static inline unsigned long pud_pfn(pud_t pud)
198{
f70abb0f 199 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
0ee364eb
MG
200}
201
fe1e8c3e
KS
202static inline unsigned long p4d_pfn(p4d_t p4d)
203{
204 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
205}
206
fd7e3159
TL
207static inline unsigned long pgd_pfn(pgd_t pgd)
208{
209 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
210}
211
fe1e8c3e
KS
212static inline int p4d_large(p4d_t p4d)
213{
214 /* No 512 GiB pages yet */
215 return 0;
216}
217
91030ca1
HD
218#define pte_page(pte) pfn_to_page(pte_pfn(pte))
219
3cbaeafe
JP
220static inline int pmd_large(pmd_t pte)
221{
027ef6c8 222 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
223}
224
f2d6bfe9 225#ifdef CONFIG_TRANSPARENT_HUGEPAGE
f2d6bfe9
JW
226static inline int pmd_trans_huge(pmd_t pmd)
227{
5c7fb56e 228 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
f2d6bfe9 229}
4b7167b9 230
a00cc7d9
MW
231#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
232static inline int pud_trans_huge(pud_t pud)
233{
234 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
235}
236#endif
237
fd8cfd30 238#define has_transparent_hugepage has_transparent_hugepage
4b7167b9
AA
239static inline int has_transparent_hugepage(void)
240{
16bf9226 241 return boot_cpu_has(X86_FEATURE_PSE);
4b7167b9 242}
5c7fb56e
DW
243
244#ifdef __HAVE_ARCH_PTE_DEVMAP
245static inline int pmd_devmap(pmd_t pmd)
246{
247 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
248}
a00cc7d9
MW
249
250#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
251static inline int pud_devmap(pud_t pud)
252{
253 return !!(pud_val(pud) & _PAGE_DEVMAP);
254}
255#else
256static inline int pud_devmap(pud_t pud)
257{
258 return 0;
259}
260#endif
e585513b
KS
261
262static inline int pgd_devmap(pgd_t pgd)
263{
264 return 0;
265}
5c7fb56e 266#endif
f2d6bfe9
JW
267#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
268
6522869c
JF
269static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
270{
271 pteval_t v = native_pte_val(pte);
272
273 return native_make_pte(v | set);
274}
275
276static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
277{
278 pteval_t v = native_pte_val(pte);
279
280 return native_make_pte(v & ~clear);
281}
282
3cbaeafe
JP
283static inline pte_t pte_mkclean(pte_t pte)
284{
6522869c 285 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
286}
287
288static inline pte_t pte_mkold(pte_t pte)
289{
6522869c 290 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
291}
292
293static inline pte_t pte_wrprotect(pte_t pte)
294{
6522869c 295 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
296}
297
298static inline pte_t pte_mkexec(pte_t pte)
299{
6522869c 300 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
301}
302
303static inline pte_t pte_mkdirty(pte_t pte)
304{
0f8975ec 305 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
306}
307
308static inline pte_t pte_mkyoung(pte_t pte)
309{
6522869c 310 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
311}
312
313static inline pte_t pte_mkwrite(pte_t pte)
314{
6522869c 315 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
316}
317
318static inline pte_t pte_mkhuge(pte_t pte)
319{
6522869c 320 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
321}
322
323static inline pte_t pte_clrhuge(pte_t pte)
324{
6522869c 325 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
326}
327
328static inline pte_t pte_mkglobal(pte_t pte)
329{
6522869c 330 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
331}
332
333static inline pte_t pte_clrglobal(pte_t pte)
334{
6522869c 335 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 336}
4614139c 337
7e675137
NP
338static inline pte_t pte_mkspecial(pte_t pte)
339{
6522869c 340 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
341}
342
01c8f1c4
DW
343static inline pte_t pte_mkdevmap(pte_t pte)
344{
345 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
346}
347
f2d6bfe9
JW
348static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
349{
350 pmdval_t v = native_pmd_val(pmd);
351
352 return __pmd(v | set);
353}
354
355static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
356{
357 pmdval_t v = native_pmd_val(pmd);
358
359 return __pmd(v & ~clear);
360}
361
362static inline pmd_t pmd_mkold(pmd_t pmd)
363{
364 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
365}
366
590a471c
MK
367static inline pmd_t pmd_mkclean(pmd_t pmd)
368{
369 return pmd_clear_flags(pmd, _PAGE_DIRTY);
370}
371
f2d6bfe9
JW
372static inline pmd_t pmd_wrprotect(pmd_t pmd)
373{
374 return pmd_clear_flags(pmd, _PAGE_RW);
375}
376
377static inline pmd_t pmd_mkdirty(pmd_t pmd)
378{
0f8975ec 379 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
380}
381
f25748e3
DW
382static inline pmd_t pmd_mkdevmap(pmd_t pmd)
383{
384 return pmd_set_flags(pmd, _PAGE_DEVMAP);
385}
386
f2d6bfe9
JW
387static inline pmd_t pmd_mkhuge(pmd_t pmd)
388{
389 return pmd_set_flags(pmd, _PAGE_PSE);
390}
391
392static inline pmd_t pmd_mkyoung(pmd_t pmd)
393{
394 return pmd_set_flags(pmd, _PAGE_ACCESSED);
395}
396
397static inline pmd_t pmd_mkwrite(pmd_t pmd)
398{
399 return pmd_set_flags(pmd, _PAGE_RW);
400}
401
402static inline pmd_t pmd_mknotpresent(pmd_t pmd)
403{
21d9ee3e 404 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
f2d6bfe9
JW
405}
406
a00cc7d9
MW
407static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
408{
409 pudval_t v = native_pud_val(pud);
410
411 return __pud(v | set);
412}
413
414static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
415{
416 pudval_t v = native_pud_val(pud);
417
418 return __pud(v & ~clear);
419}
420
421static inline pud_t pud_mkold(pud_t pud)
422{
423 return pud_clear_flags(pud, _PAGE_ACCESSED);
424}
425
426static inline pud_t pud_mkclean(pud_t pud)
427{
428 return pud_clear_flags(pud, _PAGE_DIRTY);
429}
430
431static inline pud_t pud_wrprotect(pud_t pud)
432{
433 return pud_clear_flags(pud, _PAGE_RW);
434}
435
436static inline pud_t pud_mkdirty(pud_t pud)
437{
438 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
439}
440
441static inline pud_t pud_mkdevmap(pud_t pud)
442{
443 return pud_set_flags(pud, _PAGE_DEVMAP);
444}
445
446static inline pud_t pud_mkhuge(pud_t pud)
447{
448 return pud_set_flags(pud, _PAGE_PSE);
449}
450
451static inline pud_t pud_mkyoung(pud_t pud)
452{
453 return pud_set_flags(pud, _PAGE_ACCESSED);
454}
455
456static inline pud_t pud_mkwrite(pud_t pud)
457{
458 return pud_set_flags(pud, _PAGE_RW);
459}
460
461static inline pud_t pud_mknotpresent(pud_t pud)
462{
463 return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE);
464}
465
2bf01f9f 466#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
467static inline int pte_soft_dirty(pte_t pte)
468{
469 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
470}
471
472static inline int pmd_soft_dirty(pmd_t pmd)
473{
474 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
475}
476
a00cc7d9
MW
477static inline int pud_soft_dirty(pud_t pud)
478{
479 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
480}
481
0f8975ec
PE
482static inline pte_t pte_mksoft_dirty(pte_t pte)
483{
484 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
485}
486
487static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
488{
489 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
490}
491
a00cc7d9
MW
492static inline pud_t pud_mksoft_dirty(pud_t pud)
493{
494 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
495}
496
a7b76174
MS
497static inline pte_t pte_clear_soft_dirty(pte_t pte)
498{
499 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
500}
501
502static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
503{
504 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
505}
506
a00cc7d9
MW
507static inline pud_t pud_clear_soft_dirty(pud_t pud)
508{
509 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
510}
511
2bf01f9f
CG
512#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
513
b534816b
JF
514/*
515 * Mask out unsupported bits in a present pgprot. Non-present pgprots
516 * can use those bits for other purposes, so leave them be.
517 */
518static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
519{
520 pgprotval_t protval = pgprot_val(pgprot);
521
522 if (protval & _PAGE_PRESENT)
523 protval &= __supported_pte_mask;
524
525 return protval;
526}
527
6fdc05d4
JF
528static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
529{
b534816b
JF
530 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
531 massage_pgprot(pgprot));
6fdc05d4
JF
532}
533
534static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
535{
b534816b
JF
536 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
537 massage_pgprot(pgprot));
6fdc05d4
JF
538}
539
a00cc7d9
MW
540static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
541{
542 return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) |
543 massage_pgprot(pgprot));
544}
545
38472311
IM
546static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
547{
548 pteval_t val = pte_val(pte);
549
550 /*
551 * Chop off the NX bit (if present), and add the NX portion of
552 * the newprot (if present):
553 */
1c12c4cf 554 val &= _PAGE_CHG_MASK;
b534816b 555 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
556
557 return __pte(val);
558}
559
c489f125
JW
560static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
561{
562 pmdval_t val = pmd_val(pmd);
563
564 val &= _HPAGE_CHG_MASK;
565 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
566
567 return __pmd(val);
568}
569
1c12c4cf
VP
570/* mprotect needs to preserve PAT bits when updating vm_page_prot */
571#define pgprot_modify pgprot_modify
572static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
573{
574 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
575 pgprotval_t addbits = pgprot_val(newprot);
576 return __pgprot(preservebits | addbits);
577}
578
bbac8c6d
TK
579#define pte_pgprot(x) __pgprot(pte_flags(x))
580#define pmd_pgprot(x) __pgprot(pmd_flags(x))
581#define pud_pgprot(x) __pgprot(pud_flags(x))
f2a6a705 582#define p4d_pgprot(x) __pgprot(p4d_flags(x))
c6ca18eb 583
b534816b 584#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 585
1adcaafe 586static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
587 enum page_cache_mode pcm,
588 enum page_cache_mode new_pcm)
afc7d20c 589{
1adcaafe 590 /*
55a6ca25 591 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 592 */
8a271389 593 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
594 return 1;
595
afc7d20c 596 /*
597 * Certain new memtypes are not allowed with certain
598 * requested memtype:
599 * - request is uncached, return cannot be write-back
600 * - request is write-combine, return cannot be write-back
ecb2feba
TK
601 * - request is write-through, return cannot be write-back
602 * - request is write-through, return cannot be write-combine
afc7d20c 603 */
d85f3334
JG
604 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
605 new_pcm == _PAGE_CACHE_MODE_WB) ||
606 (pcm == _PAGE_CACHE_MODE_WC &&
ecb2feba
TK
607 new_pcm == _PAGE_CACHE_MODE_WB) ||
608 (pcm == _PAGE_CACHE_MODE_WT &&
609 new_pcm == _PAGE_CACHE_MODE_WB) ||
610 (pcm == _PAGE_CACHE_MODE_WT &&
611 new_pcm == _PAGE_CACHE_MODE_WC)) {
afc7d20c 612 return 0;
613 }
614
615 return 1;
616}
617
458a3e64
TH
618pmd_t *populate_extra_pmd(unsigned long vaddr);
619pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
620#endif /* __ASSEMBLY__ */
621
96a388de 622#ifdef CONFIG_X86_32
a1ce3928 623# include <asm/pgtable_32.h>
96a388de 624#else
a1ce3928 625# include <asm/pgtable_64.h>
96a388de 626#endif
6c386655 627
aca159db 628#ifndef __ASSEMBLY__
f476961c 629#include <linux/mm_types.h>
fa0f281c 630#include <linux/mmdebug.h>
4cbeb51b 631#include <linux/log2.h>
ef37bc36 632#include <asm/fixmap.h>
aca159db 633
a034a010
JF
634static inline int pte_none(pte_t pte)
635{
97e3c602 636 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
a034a010
JF
637}
638
8de01da3
JF
639#define __HAVE_ARCH_PTE_SAME
640static inline int pte_same(pte_t a, pte_t b)
641{
642 return a.pte == b.pte;
643}
644
7c683851 645static inline int pte_present(pte_t a)
c46a7c81
MG
646{
647 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
648}
649
3565fce3
DW
650#ifdef __HAVE_ARCH_PTE_DEVMAP
651static inline int pte_devmap(pte_t a)
652{
653 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
654}
655#endif
656
2c3cf556 657#define pte_accessible pte_accessible
20841405 658static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 659{
20841405
RR
660 if (pte_flags(a) & _PAGE_PRESENT)
661 return true;
662
21d9ee3e 663 if ((pte_flags(a) & _PAGE_PROTNONE) &&
20841405
RR
664 mm_tlb_flush_pending(mm))
665 return true;
666
667 return false;
2c3cf556
RR
668}
669
eb63657e 670static inline int pte_hidden(pte_t pte)
dfec072e 671{
eb63657e 672 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
673}
674
649e8ef6
JF
675static inline int pmd_present(pmd_t pmd)
676{
027ef6c8
AA
677 /*
678 * Checking for _PAGE_PSE is needed too because
679 * split_huge_page will temporarily clear the present bit (but
680 * the _PAGE_PSE flag will remain set at all times while the
681 * _PAGE_PRESENT bit is clear).
682 */
21d9ee3e 683 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
649e8ef6
JF
684}
685
e7bb4b6d
MG
686#ifdef CONFIG_NUMA_BALANCING
687/*
688 * These work without NUMA balancing but the kernel does not care. See the
689 * comment in include/asm-generic/pgtable.h
690 */
691static inline int pte_protnone(pte_t pte)
692{
e3a1f6ca
DV
693 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
694 == _PAGE_PROTNONE;
e7bb4b6d
MG
695}
696
697static inline int pmd_protnone(pmd_t pmd)
698{
e3a1f6ca
DV
699 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
700 == _PAGE_PROTNONE;
e7bb4b6d
MG
701}
702#endif /* CONFIG_NUMA_BALANCING */
703
4fea801a
JF
704static inline int pmd_none(pmd_t pmd)
705{
706 /* Only check low word on 32-bit platforms, since it might be
707 out of sync with upper half. */
97e3c602
DH
708 unsigned long val = native_pmd_val(pmd);
709 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
4fea801a
JF
710}
711
3ffb3564
JF
712static inline unsigned long pmd_page_vaddr(pmd_t pmd)
713{
f70abb0f 714 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
3ffb3564
JF
715}
716
e5f7f202
IM
717/*
718 * Currently stuck as a macro due to indirect forward reference to
719 * linux/mmzone.h's __section_mem_map_addr() definition:
720 */
fd7e3159 721#define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
20063ca4 722
e24d7eee
JF
723/*
724 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
725 *
726 * this macro returns the index of the entry in the pmd page which would
727 * control the given virtual address
728 */
ce0c0f9e 729static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
730{
731 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
732}
733
97e2817d
JF
734/*
735 * Conversion functions: convert a page and protection to a page entry,
736 * and a page entry and page directory to the page they refer to.
737 *
738 * (Currently stuck as a macro because of indirect forward reference
739 * to linux/mm.h:page_to_nid())
740 */
741#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
742
346309cf
JF
743/*
744 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
745 *
746 * this function returns the index of the entry in the pte page which would
747 * control the given virtual address
748 */
ce0c0f9e 749static inline unsigned long pte_index(unsigned long address)
346309cf
JF
750{
751 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
752}
753
3fbc2444
JF
754static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
755{
756 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
757}
758
99510238
JF
759static inline int pmd_bad(pmd_t pmd)
760{
18a7a199 761 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
762}
763
cc290ca3
JF
764static inline unsigned long pages_to_mb(unsigned long npg)
765{
766 return npg >> (20 - PAGE_SHIFT);
767}
768
98233368 769#if CONFIG_PGTABLE_LEVELS > 2
deb79cfb
JF
770static inline int pud_none(pud_t pud)
771{
97e3c602 772 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
deb79cfb
JF
773}
774
5ba7c913
JF
775static inline int pud_present(pud_t pud)
776{
18a7a199 777 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 778}
6fff47e3
JF
779
780static inline unsigned long pud_page_vaddr(pud_t pud)
781{
f70abb0f 782 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
6fff47e3 783}
f476961c 784
e5f7f202
IM
785/*
786 * Currently stuck as a macro due to indirect forward reference to
787 * linux/mmzone.h's __section_mem_map_addr() definition:
788 */
fd7e3159 789#define pud_page(pud) pfn_to_page(pud_pfn(pud))
01ade20d
JF
790
791/* Find an entry in the second-level page table.. */
792static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
793{
794 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
795}
3180fba0 796
3f6cbef1
JF
797static inline int pud_large(pud_t pud)
798{
e2f5bda9 799 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
800 (_PAGE_PSE | _PAGE_PRESENT);
801}
a61bb29a
JF
802
803static inline int pud_bad(pud_t pud)
804{
18a7a199 805 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 806}
e2f5bda9
JF
807#else
808static inline int pud_large(pud_t pud)
809{
810 return 0;
811}
98233368 812#endif /* CONFIG_PGTABLE_LEVELS > 2 */
5ba7c913 813
fe1e8c3e
KS
814static inline unsigned long pud_index(unsigned long address)
815{
816 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
817}
818
f2a6a705
KS
819#if CONFIG_PGTABLE_LEVELS > 3
820static inline int p4d_none(p4d_t p4d)
821{
822 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
823}
824
825static inline int p4d_present(p4d_t p4d)
826{
827 return p4d_flags(p4d) & _PAGE_PRESENT;
828}
829
830static inline unsigned long p4d_page_vaddr(p4d_t p4d)
831{
832 return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
833}
834
835/*
836 * Currently stuck as a macro due to indirect forward reference to
837 * linux/mmzone.h's __section_mem_map_addr() definition:
838 */
fd7e3159 839#define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d))
f2a6a705
KS
840
841/* Find an entry in the third-level page table.. */
842static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
843{
844 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address);
845}
846
847static inline int p4d_bad(p4d_t p4d)
848{
1c4de1ff
DH
849 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
850
851 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
852 ignore_flags |= _PAGE_NX;
853
854 return (p4d_flags(p4d) & ~ignore_flags) != 0;
f2a6a705
KS
855}
856#endif /* CONFIG_PGTABLE_LEVELS > 3 */
857
fe1e8c3e
KS
858static inline unsigned long p4d_index(unsigned long address)
859{
860 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
861}
862
f2a6a705 863#if CONFIG_PGTABLE_LEVELS > 4
9f38d7e8
JF
864static inline int pgd_present(pgd_t pgd)
865{
18a7a199 866 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 867}
c5f040b1
JF
868
869static inline unsigned long pgd_page_vaddr(pgd_t pgd)
870{
871 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
872}
777cba16 873
e5f7f202
IM
874/*
875 * Currently stuck as a macro due to indirect forward reference to
876 * linux/mmzone.h's __section_mem_map_addr() definition:
877 */
fd7e3159 878#define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
7cfb8102
JF
879
880/* to find an entry in a page-table-directory. */
f2a6a705 881static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
3d081b18 882{
f2a6a705 883 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address);
3d081b18 884}
30f10316
JF
885
886static inline int pgd_bad(pgd_t pgd)
887{
1c4de1ff
DH
888 unsigned long ignore_flags = _PAGE_USER;
889
890 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
891 ignore_flags |= _PAGE_NX;
892
893 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
30f10316 894}
7325cc2e
JF
895
896static inline int pgd_none(pgd_t pgd)
897{
97e3c602
DH
898 /*
899 * There is no need to do a workaround for the KNL stray
900 * A/D bit erratum here. PGDs only point to page tables
901 * except on 32-bit non-PAE which is not supported on
902 * KNL.
903 */
26c8e317 904 return !native_pgd_val(pgd);
7325cc2e 905}
f2a6a705 906#endif /* CONFIG_PGTABLE_LEVELS > 4 */
9f38d7e8 907
4614139c
JF
908#endif /* __ASSEMBLY__ */
909
fb15a9b3
JF
910/*
911 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
912 *
913 * this macro returns the index of the entry in the pgd page which would
914 * control the given virtual address
915 */
916#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
917
918/*
919 * pgd_offset() returns a (pgd_t *)
920 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
921 */
61e9b367
DH
922#define pgd_offset_pgd(pgd, address) (pgd + pgd_index((address)))
923/*
924 * a shortcut to get a pgd_t in a given mm
925 */
926#define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
fb15a9b3
JF
927/*
928 * a shortcut which implies the use of the kernel's pgd, instead
929 * of a process's
930 */
931#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
932
933
68db065c
JF
934#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
935#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
936
195466dc
JF
937#ifndef __ASSEMBLY__
938
2c1b284e 939extern int direct_gbpages;
22ddfcaa 940void init_mem_mapping(void);
8d57470d 941void early_alloc_pgt_buf(void);
4270fd8b 942extern void memblock_find_dma_reserve(void);
2c1b284e 943
b234e8a0
TG
944#ifdef CONFIG_X86_64
945/* Realmode trampoline initialization. */
946extern pgd_t trampoline_pgd_entry;
0483e1fa 947static inline void __meminit init_trampoline_default(void)
b234e8a0
TG
948{
949 /* Default trampoline pgd value */
65ade2f8 950 trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
b234e8a0 951}
0483e1fa
TG
952# ifdef CONFIG_RANDOMIZE_MEMORY
953void __meminit init_trampoline(void);
954# else
955# define init_trampoline init_trampoline_default
956# endif
b234e8a0
TG
957#else
958static inline void init_trampoline(void) { }
959#endif
960
4891645e
JF
961/* local pte updates need not use xchg for locking */
962static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
963{
964 pte_t res = *ptep;
965
966 /* Pure native function needs no input for mm, addr */
967 native_pte_clear(NULL, 0, ptep);
968 return res;
969}
970
f2d6bfe9
JW
971static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
972{
973 pmd_t res = *pmdp;
974
975 native_pmd_clear(pmdp);
976 return res;
977}
978
a00cc7d9
MW
979static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
980{
981 pud_t res = *pudp;
982
983 native_pud_clear(pudp);
984 return res;
985}
986
4891645e
JF
987static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
988 pte_t *ptep , pte_t pte)
989{
990 native_set_pte(ptep, pte);
991}
992
87930019
JG
993static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
994 pmd_t *pmdp, pmd_t pmd)
0a47de52
AA
995{
996 native_set_pmd(pmdp, pmd);
997}
998
87930019
JG
999static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1000 pud_t *pudp, pud_t pud)
a00cc7d9
MW
1001{
1002 native_set_pud(pudp, pud);
1003}
1004
195466dc
JF
1005/*
1006 * We only update the dirty/accessed state if we set
1007 * the dirty bit by hand in the kernel, since the hardware
1008 * will do the accessed bit for us, and we don't want to
1009 * race with other CPU's that might be updating the dirty
1010 * bit at the same time.
1011 */
bea41808
JF
1012struct vm_area_struct;
1013
195466dc 1014#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
1015extern int ptep_set_access_flags(struct vm_area_struct *vma,
1016 unsigned long address, pte_t *ptep,
1017 pte_t entry, int dirty);
195466dc
JF
1018
1019#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
1020extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1021 unsigned long addr, pte_t *ptep);
195466dc
JF
1022
1023#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
1024extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1025 unsigned long address, pte_t *ptep);
195466dc
JF
1026
1027#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
1028static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1029 pte_t *ptep)
195466dc
JF
1030{
1031 pte_t pte = native_ptep_get_and_clear(ptep);
195466dc
JF
1032 return pte;
1033}
1034
1035#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
1036static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1037 unsigned long addr, pte_t *ptep,
1038 int full)
195466dc
JF
1039{
1040 pte_t pte;
1041 if (full) {
1042 /*
1043 * Full address destruction in progress; paravirt does not
1044 * care about updates and native needs no locking
1045 */
1046 pte = native_local_ptep_get_and_clear(ptep);
1047 } else {
1048 pte = ptep_get_and_clear(mm, addr, ptep);
1049 }
1050 return pte;
1051}
1052
1053#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
1054static inline void ptep_set_wrprotect(struct mm_struct *mm,
1055 unsigned long addr, pte_t *ptep)
195466dc 1056{
d8d89827 1057 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
1058}
1059
2ac13462 1060#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 1061
f2d6bfe9
JW
1062#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1063
1064#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1065extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1066 unsigned long address, pmd_t *pmdp,
1067 pmd_t entry, int dirty);
a00cc7d9
MW
1068extern int pudp_set_access_flags(struct vm_area_struct *vma,
1069 unsigned long address, pud_t *pudp,
1070 pud_t entry, int dirty);
f2d6bfe9
JW
1071
1072#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1073extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1074 unsigned long addr, pmd_t *pmdp);
a00cc7d9
MW
1075extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1076 unsigned long addr, pud_t *pudp);
f2d6bfe9
JW
1077
1078#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1079extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1080 unsigned long address, pmd_t *pmdp);
1081
1082
f2d6bfe9
JW
1083#define __HAVE_ARCH_PMD_WRITE
1084static inline int pmd_write(pmd_t pmd)
1085{
1086 return pmd_flags(pmd) & _PAGE_RW;
1087}
1088
8809aa2d
AK
1089#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1090static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
f2d6bfe9
JW
1091 pmd_t *pmdp)
1092{
d6ccc3ec 1093 return native_pmdp_get_and_clear(pmdp);
f2d6bfe9
JW
1094}
1095
a00cc7d9
MW
1096#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1097static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1098 unsigned long addr, pud_t *pudp)
1099{
1100 return native_pudp_get_and_clear(pudp);
1101}
1102
f2d6bfe9
JW
1103#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1104static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1105 unsigned long addr, pmd_t *pmdp)
1106{
1107 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
f2d6bfe9
JW
1108}
1109
85958b46
JF
1110/*
1111 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1112 *
1113 * dst - pointer to pgd range anwhere on a pgd page
1114 * src - ""
1115 * count - the number of pgds to copy.
1116 *
1117 * dst and src can be on the same page, but the range must not overlap,
1118 * and must not cross a page boundary.
1119 */
1120static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1121{
1122 memcpy(dst, src, count * sizeof(pgd_t));
1123}
1124
4cbeb51b
DH
1125#define PTE_SHIFT ilog2(PTRS_PER_PTE)
1126static inline int page_level_shift(enum pg_level level)
1127{
1128 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1129}
1130static inline unsigned long page_level_size(enum pg_level level)
1131{
1132 return 1UL << page_level_shift(level);
1133}
1134static inline unsigned long page_level_mask(enum pg_level level)
1135{
1136 return ~(page_level_size(level) - 1);
1137}
85958b46 1138
602e0186
KS
1139/*
1140 * The x86 doesn't have any external MMU info: the kernel page
1141 * tables contain all the necessary information.
1142 */
1143static inline void update_mmu_cache(struct vm_area_struct *vma,
1144 unsigned long addr, pte_t *ptep)
1145{
1146}
1147static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1148 unsigned long addr, pmd_t *pmd)
1149{
1150}
a00cc7d9
MW
1151static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1152 unsigned long addr, pud_t *pud)
1153{
1154}
85958b46 1155
2bf01f9f 1156#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
fa0f281c
CG
1157static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1158{
fa0f281c
CG
1159 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1160}
1161
1162static inline int pte_swp_soft_dirty(pte_t pte)
1163{
fa0f281c
CG
1164 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1165}
1166
1167static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1168{
fa0f281c
CG
1169 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1170}
ab6e3d09
NH
1171
1172#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1173static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1174{
1175 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1176}
1177
1178static inline int pmd_swp_soft_dirty(pmd_t pmd)
1179{
1180 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1181}
1182
1183static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1184{
1185 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1186}
1187#endif
2bf01f9f 1188#endif
fa0f281c 1189
33a709b2
DH
1190#define PKRU_AD_BIT 0x1
1191#define PKRU_WD_BIT 0x2
84594296 1192#define PKRU_BITS_PER_PKEY 2
33a709b2
DH
1193
1194static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1195{
84594296 1196 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1197 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1198}
1199
1200static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1201{
84594296 1202 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1203 /*
1204 * Access-disable disables writes too so we need to check
1205 * both bits here.
1206 */
1207 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1208}
1209
1210static inline u16 pte_flags_pkey(unsigned long pte_flags)
1211{
1212#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1213 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1214 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1215#else
1216 return 0;
1217#endif
1218}
1219
e585513b
KS
1220static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1221{
1222 u32 pkru = read_pkru();
1223
1224 if (!__pkru_allows_read(pkru, pkey))
1225 return false;
1226 if (write && !__pkru_allows_write(pkru, pkey))
1227 return false;
1228
1229 return true;
1230}
1231
1232/*
1233 * 'pteval' can come from a PTE, PMD or PUD. We only check
1234 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1235 * same value on all 3 types.
1236 */
1237static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1238{
1239 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1240
1241 if (write)
1242 need_pte_bits |= _PAGE_RW;
1243
1244 if ((pteval & need_pte_bits) != need_pte_bits)
1245 return 0;
1246
1247 return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1248}
1249
1250#define pte_access_permitted pte_access_permitted
1251static inline bool pte_access_permitted(pte_t pte, bool write)
1252{
1253 return __pte_access_permitted(pte_val(pte), write);
1254}
1255
1256#define pmd_access_permitted pmd_access_permitted
1257static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1258{
1259 return __pte_access_permitted(pmd_val(pmd), write);
1260}
1261
1262#define pud_access_permitted pud_access_permitted
1263static inline bool pud_access_permitted(pud_t pud, bool write)
1264{
1265 return __pte_access_permitted(pud_val(pud), write);
1266}
1267
195466dc
JF
1268#include <asm-generic/pgtable.h>
1269#endif /* __ASSEMBLY__ */
1270
1965aae3 1271#endif /* _ASM_X86_PGTABLE_H */