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ac644614 | 1 | /** @file\r |
50a64e5b | 2 | Provides string functions, linked list functions, math functions, synchronization\r |
1a2f870c | 3 | functions, and CPU architecture-specific functions.\r |
ac644614 | 4 | \r |
e01a125f | 5 | Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r |
9df063a0 HT |
6 | Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
7 | This program and the accompanying materials\r | |
50a64e5b | 8 | are licensed and made available under the terms and conditions of the BSD License\r |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
af2dc6a7 | 10 | http://opensource.org/licenses/bsd-license.php.\r |
ac644614 | 11 | \r |
50a64e5b | 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
ac644614 | 14 | \r |
15 | **/\r | |
16 | \r | |
17 | #ifndef __BASE_LIB__\r | |
18 | #define __BASE_LIB__\r | |
19 | \r | |
1106ffe1 | 20 | //\r |
1a2f870c | 21 | // Definitions for architecture-specific types\r |
1106ffe1 | 22 | //\r |
ac644614 | 23 | #if defined (MDE_CPU_IA32)\r |
fc30687f | 24 | ///\r |
af2dc6a7 | 25 | /// The IA-32 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 26 | ///\r |
ac644614 | 27 | typedef struct {\r |
28 | UINT32 Ebx;\r | |
29 | UINT32 Esi;\r | |
30 | UINT32 Edi;\r | |
31 | UINT32 Ebp;\r | |
32 | UINT32 Esp;\r | |
33 | UINT32 Eip;\r | |
34 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
35 | \r | |
36 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
37 | \r | |
aa4df547 | 38 | #endif // defined (MDE_CPU_IA32)\r |
39 | \r | |
40 | #if defined (MDE_CPU_IPF)\r | |
ac644614 | 41 | \r |
fc30687f | 42 | ///\r |
af2dc6a7 | 43 | /// The Itanium architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 44 | ///\r |
ac644614 | 45 | typedef struct {\r |
46 | UINT64 F2[2];\r | |
47 | UINT64 F3[2];\r | |
48 | UINT64 F4[2];\r | |
49 | UINT64 F5[2];\r | |
50 | UINT64 F16[2];\r | |
51 | UINT64 F17[2];\r | |
52 | UINT64 F18[2];\r | |
53 | UINT64 F19[2];\r | |
54 | UINT64 F20[2];\r | |
55 | UINT64 F21[2];\r | |
56 | UINT64 F22[2];\r | |
57 | UINT64 F23[2];\r | |
58 | UINT64 F24[2];\r | |
59 | UINT64 F25[2];\r | |
60 | UINT64 F26[2];\r | |
61 | UINT64 F27[2];\r | |
62 | UINT64 F28[2];\r | |
63 | UINT64 F29[2];\r | |
64 | UINT64 F30[2];\r | |
65 | UINT64 F31[2];\r | |
66 | UINT64 R4;\r | |
67 | UINT64 R5;\r | |
68 | UINT64 R6;\r | |
69 | UINT64 R7;\r | |
70 | UINT64 SP;\r | |
71 | UINT64 BR0;\r | |
72 | UINT64 BR1;\r | |
73 | UINT64 BR2;\r | |
74 | UINT64 BR3;\r | |
75 | UINT64 BR4;\r | |
76 | UINT64 BR5;\r | |
77 | UINT64 InitialUNAT;\r | |
78 | UINT64 AfterSpillUNAT;\r | |
79 | UINT64 PFS;\r | |
80 | UINT64 BSP;\r | |
81 | UINT64 Predicates;\r | |
82 | UINT64 LoopCount;\r | |
83 | UINT64 FPSR;\r | |
84 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
85 | \r | |
86 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
87 | \r | |
aa4df547 | 88 | #endif // defined (MDE_CPU_IPF)\r |
89 | \r | |
90 | #if defined (MDE_CPU_X64)\r | |
fc30687f | 91 | ///\r |
af2dc6a7 | 92 | /// The x64 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 93 | ///\r |
ac644614 | 94 | typedef struct {\r |
95 | UINT64 Rbx;\r | |
96 | UINT64 Rsp;\r | |
97 | UINT64 Rbp;\r | |
98 | UINT64 Rdi;\r | |
99 | UINT64 Rsi;\r | |
100 | UINT64 R12;\r | |
101 | UINT64 R13;\r | |
102 | UINT64 R14;\r | |
103 | UINT64 R15;\r | |
104 | UINT64 Rip;\r | |
9b9641c6 | 105 | UINT64 MxCsr;\r |
af2dc6a7 | 106 | UINT8 XmmBuffer[160]; ///< XMM6-XMM15.\r |
ac644614 | 107 | } BASE_LIBRARY_JUMP_BUFFER;\r |
108 | \r | |
109 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
110 | \r | |
aa4df547 | 111 | #endif // defined (MDE_CPU_X64)\r |
112 | \r | |
113 | #if defined (MDE_CPU_EBC)\r | |
fc30687f | 114 | ///\r |
af2dc6a7 | 115 | /// The EBC context buffer used by SetJump() and LongJump().\r |
fc30687f | 116 | ///\r |
ac644614 | 117 | typedef struct {\r |
118 | UINT64 R0;\r | |
119 | UINT64 R1;\r | |
120 | UINT64 R2;\r | |
121 | UINT64 R3;\r | |
122 | UINT64 IP;\r | |
123 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
124 | \r | |
125 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
126 | \r | |
aa4df547 | 127 | #endif // defined (MDE_CPU_EBC)\r |
ac644614 | 128 | \r |
ebd04fc2 | 129 | #if defined (MDE_CPU_ARM)\r |
130 | \r | |
131 | typedef struct {\r | |
af2dc6a7 | 132 | UINT32 R3; ///< A copy of R13.\r |
01a54966 | 133 | UINT32 R4;\r |
134 | UINT32 R5;\r | |
135 | UINT32 R6;\r | |
136 | UINT32 R7;\r | |
137 | UINT32 R8;\r | |
138 | UINT32 R9;\r | |
139 | UINT32 R10;\r | |
140 | UINT32 R11;\r | |
141 | UINT32 R12;\r | |
142 | UINT32 R14;\r | |
ebd04fc2 | 143 | } BASE_LIBRARY_JUMP_BUFFER;\r |
144 | \r | |
145 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
146 | \r | |
147 | #endif // defined (MDE_CPU_ARM)\r | |
148 | \r | |
807e2604 HL |
149 | #if defined (MDE_CPU_AARCH64)\r |
150 | typedef struct {\r | |
151 | // GP regs\r | |
152 | UINT64 X19;\r | |
153 | UINT64 X20;\r | |
154 | UINT64 X21;\r | |
155 | UINT64 X22;\r | |
156 | UINT64 X23;\r | |
157 | UINT64 X24;\r | |
158 | UINT64 X25;\r | |
159 | UINT64 X26;\r | |
160 | UINT64 X27;\r | |
161 | UINT64 X28;\r | |
162 | UINT64 FP;\r | |
163 | UINT64 LR;\r | |
164 | UINT64 IP0;\r | |
165 | \r | |
166 | // FP regs\r | |
167 | UINT64 D8;\r | |
168 | UINT64 D9;\r | |
169 | UINT64 D10;\r | |
170 | UINT64 D11;\r | |
171 | UINT64 D12;\r | |
172 | UINT64 D13;\r | |
173 | UINT64 D14;\r | |
174 | UINT64 D15;\r | |
175 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
176 | \r | |
177 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
178 | \r | |
179 | #endif // defined (MDE_CPU_AARCH64)\r | |
180 | \r | |
181 | \r | |
ac644614 | 182 | //\r |
183 | // String Services\r | |
184 | //\r | |
185 | \r | |
186 | /**\r | |
187 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
188 | string and returns the new Unicode string.\r | |
189 | \r | |
190 | This function copies the contents of the Unicode string Source to the Unicode\r | |
191 | string Destination, and returns Destination. If Source and Destination\r | |
192 | overlap, then the results are undefined.\r | |
193 | \r | |
194 | If Destination is NULL, then ASSERT().\r | |
195 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
196 | If Source is NULL, then ASSERT().\r | |
197 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
198 | If Source and Destination overlap, then ASSERT().\r | |
199 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
200 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
201 | Null-terminator, then ASSERT().\r | |
202 | \r | |
af2dc6a7 | 203 | @param Destination The pointer to a Null-terminated Unicode string.\r |
204 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 205 | \r |
9aa049d9 | 206 | @return Destination.\r |
ac644614 | 207 | \r |
208 | **/\r | |
209 | CHAR16 *\r | |
210 | EFIAPI\r | |
211 | StrCpy (\r | |
212 | OUT CHAR16 *Destination,\r | |
213 | IN CONST CHAR16 *Source\r | |
214 | );\r | |
215 | \r | |
216 | \r | |
217 | /**\r | |
af2dc6a7 | 218 | Copies up to a specified length from one Null-terminated Unicode string to \r |
17f695ed | 219 | another Null-terminated Unicode string and returns the new Unicode string.\r |
ac644614 | 220 | \r |
221 | This function copies the contents of the Unicode string Source to the Unicode\r | |
222 | string Destination, and returns Destination. At most, Length Unicode\r | |
223 | characters are copied from Source to Destination. If Length is 0, then\r | |
224 | Destination is returned unmodified. If Length is greater that the number of\r | |
225 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
226 | characters. If Source and Destination overlap, then the results are\r | |
227 | undefined.\r | |
228 | \r | |
229 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
230 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
231 | If Length > 0 and Source is NULL, then ASSERT().\r | |
77f863ee | 232 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 233 | If Source and Destination overlap, then ASSERT().\r |
50c247fd | 234 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
235 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 236 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
50c247fd | 237 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r |
238 | then ASSERT().\r | |
ac644614 | 239 | \r |
af2dc6a7 | 240 | @param Destination The pointer to a Null-terminated Unicode string.\r |
241 | @param Source The pointer to a Null-terminated Unicode string.\r | |
242 | @param Length The maximum number of Unicode characters to copy.\r | |
ac644614 | 243 | \r |
9aa049d9 | 244 | @return Destination.\r |
ac644614 | 245 | \r |
246 | **/\r | |
247 | CHAR16 *\r | |
248 | EFIAPI\r | |
249 | StrnCpy (\r | |
250 | OUT CHAR16 *Destination,\r | |
251 | IN CONST CHAR16 *Source,\r | |
252 | IN UINTN Length\r | |
253 | );\r | |
254 | \r | |
255 | \r | |
256 | /**\r | |
257 | Returns the length of a Null-terminated Unicode string.\r | |
258 | \r | |
259 | This function returns the number of Unicode characters in the Null-terminated\r | |
260 | Unicode string specified by String.\r | |
261 | \r | |
262 | If String is NULL, then ASSERT().\r | |
263 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
264 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
265 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
266 | Null-terminator, then ASSERT().\r | |
267 | \r | |
268 | @param String Pointer to a Null-terminated Unicode string.\r | |
269 | \r | |
270 | @return The length of String.\r | |
271 | \r | |
272 | **/\r | |
273 | UINTN\r | |
274 | EFIAPI\r | |
275 | StrLen (\r | |
276 | IN CONST CHAR16 *String\r | |
277 | );\r | |
278 | \r | |
279 | \r | |
280 | /**\r | |
281 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
282 | Null terminator.\r | |
283 | \r | |
17f695ed | 284 | This function returns the size, in bytes, of the Null-terminated Unicode string \r |
285 | specified by String.\r | |
ac644614 | 286 | \r |
287 | If String is NULL, then ASSERT().\r | |
288 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
289 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
290 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
291 | Null-terminator, then ASSERT().\r | |
292 | \r | |
af2dc6a7 | 293 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 294 | \r |
295 | @return The size of String.\r | |
296 | \r | |
297 | **/\r | |
298 | UINTN\r | |
299 | EFIAPI\r | |
300 | StrSize (\r | |
301 | IN CONST CHAR16 *String\r | |
302 | );\r | |
303 | \r | |
304 | \r | |
305 | /**\r | |
306 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
307 | between the first mismatched Unicode characters.\r | |
308 | \r | |
309 | This function compares the Null-terminated Unicode string FirstString to the\r | |
310 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
311 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
312 | mismatched Unicode character in SecondString subtracted from the first\r | |
313 | mismatched Unicode character in FirstString.\r | |
314 | \r | |
315 | If FirstString is NULL, then ASSERT().\r | |
316 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
317 | If SecondString is NULL, then ASSERT().\r | |
318 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
319 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
320 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
321 | Null-terminator, then ASSERT().\r | |
322 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
af2dc6a7 | 323 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 324 | Null-terminator, then ASSERT().\r |
325 | \r | |
af2dc6a7 | 326 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
327 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 328 | \r |
1106ffe1 | 329 | @retval 0 FirstString is identical to SecondString.\r |
330 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 331 | \r |
332 | **/\r | |
333 | INTN\r | |
334 | EFIAPI\r | |
335 | StrCmp (\r | |
336 | IN CONST CHAR16 *FirstString,\r | |
337 | IN CONST CHAR16 *SecondString\r | |
338 | );\r | |
339 | \r | |
340 | \r | |
341 | /**\r | |
17f695ed | 342 | Compares up to a specified length the contents of two Null-terminated Unicode strings,\r |
343 | and returns the difference between the first mismatched Unicode characters.\r | |
344 | \r | |
ac644614 | 345 | This function compares the Null-terminated Unicode string FirstString to the\r |
346 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
347 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
348 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
349 | value returned is the first mismatched Unicode character in SecondString\r | |
350 | subtracted from the first mismatched Unicode character in FirstString.\r | |
351 | \r | |
352 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
77f863ee | 353 | If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 354 | If Length > 0 and SecondString is NULL, then ASSERT().\r |
77f863ee | 355 | If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r |
50c247fd | 356 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r |
357 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
358 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r | |
359 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
360 | then ASSERT().\r | |
361 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r | |
362 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
363 | then ASSERT().\r | |
ac644614 | 364 | \r |
af2dc6a7 | 365 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
366 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
367 | @param Length The maximum number of Unicode characters to compare.\r | |
ac644614 | 368 | \r |
1106ffe1 | 369 | @retval 0 FirstString is identical to SecondString.\r |
370 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 371 | \r |
372 | **/\r | |
373 | INTN\r | |
374 | EFIAPI\r | |
375 | StrnCmp (\r | |
376 | IN CONST CHAR16 *FirstString,\r | |
377 | IN CONST CHAR16 *SecondString,\r | |
378 | IN UINTN Length\r | |
379 | );\r | |
380 | \r | |
381 | \r | |
382 | /**\r | |
383 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
384 | Unicode string, and returns the concatenated Unicode string.\r | |
385 | \r | |
386 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
387 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
388 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
389 | Unicode String is returned. If Source and Destination overlap, then the\r | |
390 | results are undefined.\r | |
391 | \r | |
392 | If Destination is NULL, then ASSERT().\r | |
77f863ee | 393 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 394 | If Source is NULL, then ASSERT().\r |
77f863ee | 395 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 396 | If Source and Destination overlap, then ASSERT().\r |
397 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
af2dc6a7 | 398 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 399 | Null-terminator, then ASSERT().\r |
400 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
af2dc6a7 | 401 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 402 | Null-terminator, then ASSERT().\r |
403 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
404 | and Source results in a Unicode string with more than\r | |
af2dc6a7 | 405 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 406 | Null-terminator, then ASSERT().\r |
407 | \r | |
af2dc6a7 | 408 | @param Destination The pointer to a Null-terminated Unicode string.\r |
409 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 410 | \r |
9aa049d9 | 411 | @return Destination.\r |
ac644614 | 412 | \r |
413 | **/\r | |
414 | CHAR16 *\r | |
415 | EFIAPI\r | |
416 | StrCat (\r | |
417 | IN OUT CHAR16 *Destination,\r | |
418 | IN CONST CHAR16 *Source\r | |
419 | );\r | |
420 | \r | |
421 | \r | |
422 | /**\r | |
17f695ed | 423 | Concatenates up to a specified length one Null-terminated Unicode to the end \r |
424 | of another Null-terminated Unicode string, and returns the concatenated \r | |
ac644614 | 425 | Unicode string.\r |
426 | \r | |
427 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
428 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
429 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
430 | most, Length Unicode characters are concatenated from Source to the end of\r | |
431 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
432 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
433 | the results are undefined.\r | |
434 | \r | |
435 | If Destination is NULL, then ASSERT().\r | |
436 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
437 | If Length > 0 and Source is NULL, then ASSERT().\r | |
438 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
439 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 440 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
441 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 442 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
50c247fd | 443 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 444 | Null-terminator, then ASSERT().\r |
445 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
50c247fd | 446 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 447 | Null-terminator, then ASSERT().\r |
448 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
50c247fd | 449 | and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r |
450 | Unicode characters, not including the Null-terminator, then ASSERT().\r | |
ac644614 | 451 | \r |
af2dc6a7 | 452 | @param Destination The pointer to a Null-terminated Unicode string.\r |
453 | @param Source The pointer to a Null-terminated Unicode string.\r | |
454 | @param Length The maximum number of Unicode characters to concatenate from\r | |
ac644614 | 455 | Source.\r |
456 | \r | |
9aa049d9 | 457 | @return Destination.\r |
ac644614 | 458 | \r |
459 | **/\r | |
460 | CHAR16 *\r | |
461 | EFIAPI\r | |
462 | StrnCat (\r | |
463 | IN OUT CHAR16 *Destination,\r | |
464 | IN CONST CHAR16 *Source,\r | |
465 | IN UINTN Length\r | |
466 | );\r | |
467 | \r | |
468 | /**\r | |
9aa049d9 | 469 | Returns the first occurrence of a Null-terminated Unicode sub-string\r |
ac644614 | 470 | in a Null-terminated Unicode string.\r |
471 | \r | |
472 | This function scans the contents of the Null-terminated Unicode string\r | |
473 | specified by String and returns the first occurrence of SearchString.\r | |
474 | If SearchString is not found in String, then NULL is returned. If\r | |
af2dc6a7 | 475 | the length of SearchString is zero, then String is returned.\r |
ac644614 | 476 | \r |
477 | If String is NULL, then ASSERT().\r | |
478 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
479 | If SearchString is NULL, then ASSERT().\r | |
480 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
481 | \r | |
482 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r | |
483 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
af2dc6a7 | 484 | characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 485 | \r |
af2dc6a7 | 486 | @param String The pointer to a Null-terminated Unicode string.\r |
487 | @param SearchString The pointer to a Null-terminated Unicode string to search for.\r | |
ac644614 | 488 | \r |
489 | @retval NULL If the SearchString does not appear in String.\r | |
1106ffe1 | 490 | @return others If there is a match.\r |
ac644614 | 491 | \r |
492 | **/\r | |
493 | CHAR16 *\r | |
494 | EFIAPI\r | |
495 | StrStr (\r | |
17f695ed | 496 | IN CONST CHAR16 *String,\r |
497 | IN CONST CHAR16 *SearchString\r | |
ac644614 | 498 | );\r |
499 | \r | |
500 | /**\r | |
501 | Convert a Null-terminated Unicode decimal string to a value of\r | |
502 | type UINTN.\r | |
503 | \r | |
504 | This function returns a value of type UINTN by interpreting the contents\r | |
505 | of the Unicode string specified by String as a decimal number. The format\r | |
506 | of the input Unicode string String is:\r | |
507 | \r | |
508 | [spaces] [decimal digits].\r | |
509 | \r | |
510 | The valid decimal digit character is in the range [0-9]. The\r | |
511 | function will ignore the pad space, which includes spaces or\r | |
512 | tab characters, before [decimal digits]. The running zero in the\r | |
513 | beginning of [decimal digits] will be ignored. Then, the function\r | |
514 | stops at the first character that is a not a valid decimal character\r | |
515 | or a Null-terminator, whichever one comes first.\r | |
516 | \r | |
517 | If String is NULL, then ASSERT().\r | |
518 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
519 | If String has only pad spaces, then 0 is returned.\r | |
520 | If String has no pad spaces or valid decimal digits,\r | |
521 | then 0 is returned.\r | |
522 | If the number represented by String overflows according\r | |
523 | to the range defined by UINTN, then ASSERT().\r | |
524 | \r | |
525 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
526 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
527 | the Null-terminator, then ASSERT().\r | |
528 | \r | |
af2dc6a7 | 529 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 530 | \r |
38bbd3d9 | 531 | @retval Value translated from String.\r |
ac644614 | 532 | \r |
533 | **/\r | |
534 | UINTN\r | |
535 | EFIAPI\r | |
536 | StrDecimalToUintn (\r | |
17f695ed | 537 | IN CONST CHAR16 *String\r |
ac644614 | 538 | );\r |
539 | \r | |
540 | /**\r | |
541 | Convert a Null-terminated Unicode decimal string to a value of\r | |
542 | type UINT64.\r | |
543 | \r | |
544 | This function returns a value of type UINT64 by interpreting the contents\r | |
545 | of the Unicode string specified by String as a decimal number. The format\r | |
546 | of the input Unicode string String is:\r | |
547 | \r | |
548 | [spaces] [decimal digits].\r | |
549 | \r | |
550 | The valid decimal digit character is in the range [0-9]. The\r | |
551 | function will ignore the pad space, which includes spaces or\r | |
552 | tab characters, before [decimal digits]. The running zero in the\r | |
553 | beginning of [decimal digits] will be ignored. Then, the function\r | |
554 | stops at the first character that is a not a valid decimal character\r | |
555 | or a Null-terminator, whichever one comes first.\r | |
556 | \r | |
557 | If String is NULL, then ASSERT().\r | |
558 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
559 | If String has only pad spaces, then 0 is returned.\r | |
560 | If String has no pad spaces or valid decimal digits,\r | |
561 | then 0 is returned.\r | |
562 | If the number represented by String overflows according\r | |
563 | to the range defined by UINT64, then ASSERT().\r | |
564 | \r | |
565 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
566 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
567 | the Null-terminator, then ASSERT().\r | |
568 | \r | |
af2dc6a7 | 569 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 570 | \r |
38bbd3d9 | 571 | @retval Value translated from String.\r |
ac644614 | 572 | \r |
573 | **/\r | |
574 | UINT64\r | |
575 | EFIAPI\r | |
576 | StrDecimalToUint64 (\r | |
17f695ed | 577 | IN CONST CHAR16 *String\r |
ac644614 | 578 | );\r |
579 | \r | |
580 | \r | |
581 | /**\r | |
582 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
583 | \r | |
584 | This function returns a value of type UINTN by interpreting the contents\r | |
585 | of the Unicode string specified by String as a hexadecimal number.\r | |
586 | The format of the input Unicode string String is:\r | |
587 | \r | |
588 | [spaces][zeros][x][hexadecimal digits].\r | |
589 | \r | |
590 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
591 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
592 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
593 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
594 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
595 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
af2dc6a7 | 596 | first valid hexadecimal digit. Then, the function stops at the first character \r |
597 | that is a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
ac644614 | 598 | \r |
599 | If String is NULL, then ASSERT().\r | |
600 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
601 | If String has only pad spaces, then zero is returned.\r | |
602 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
603 | then zero is returned.\r | |
604 | If the number represented by String overflows according to the range defined by\r | |
605 | UINTN, then ASSERT().\r | |
606 | \r | |
607 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
608 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
609 | then ASSERT().\r | |
610 | \r | |
af2dc6a7 | 611 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 612 | \r |
38bbd3d9 | 613 | @retval Value translated from String.\r |
ac644614 | 614 | \r |
615 | **/\r | |
616 | UINTN\r | |
617 | EFIAPI\r | |
618 | StrHexToUintn (\r | |
17f695ed | 619 | IN CONST CHAR16 *String\r |
ac644614 | 620 | );\r |
621 | \r | |
622 | \r | |
623 | /**\r | |
624 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
625 | \r | |
626 | This function returns a value of type UINT64 by interpreting the contents\r | |
627 | of the Unicode string specified by String as a hexadecimal number.\r | |
628 | The format of the input Unicode string String is\r | |
629 | \r | |
630 | [spaces][zeros][x][hexadecimal digits].\r | |
631 | \r | |
632 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
633 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
634 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
635 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
636 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
637 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
638 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
639 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
640 | \r | |
641 | If String is NULL, then ASSERT().\r | |
642 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
643 | If String has only pad spaces, then zero is returned.\r | |
644 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
645 | then zero is returned.\r | |
646 | If the number represented by String overflows according to the range defined by\r | |
647 | UINT64, then ASSERT().\r | |
648 | \r | |
649 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
650 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
651 | then ASSERT().\r | |
652 | \r | |
af2dc6a7 | 653 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 654 | \r |
38bbd3d9 | 655 | @retval Value translated from String.\r |
ac644614 | 656 | \r |
657 | **/\r | |
658 | UINT64\r | |
659 | EFIAPI\r | |
660 | StrHexToUint64 (\r | |
17f695ed | 661 | IN CONST CHAR16 *String\r |
ac644614 | 662 | );\r |
663 | \r | |
ac644614 | 664 | /**\r |
17f695ed | 665 | Convert a Null-terminated Unicode string to a Null-terminated\r |
ac644614 | 666 | ASCII string and returns the ASCII string.\r |
667 | \r | |
668 | This function converts the content of the Unicode string Source\r | |
669 | to the ASCII string Destination by copying the lower 8 bits of\r | |
670 | each Unicode character. It returns Destination.\r | |
671 | \r | |
d3e0289c | 672 | The caller is responsible to make sure Destination points to a buffer with size\r |
673 | equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.\r | |
674 | \r | |
ac644614 | 675 | If any Unicode characters in Source contain non-zero value in\r |
676 | the upper 8 bits, then ASSERT().\r | |
677 | \r | |
678 | If Destination is NULL, then ASSERT().\r | |
679 | If Source is NULL, then ASSERT().\r | |
680 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
681 | If Source and Destination overlap, then ASSERT().\r | |
682 | \r | |
683 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
684 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
685 | the Null-terminator, then ASSERT().\r | |
686 | \r | |
687 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
688 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
689 | Null-terminator, then ASSERT().\r | |
690 | \r | |
af2dc6a7 | 691 | @param Source The pointer to a Null-terminated Unicode string.\r |
692 | @param Destination The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 693 | \r |
9aa049d9 | 694 | @return Destination.\r |
ac644614 | 695 | \r |
696 | **/\r | |
697 | CHAR8 *\r | |
698 | EFIAPI\r | |
699 | UnicodeStrToAsciiStr (\r | |
17f695ed | 700 | IN CONST CHAR16 *Source,\r |
701 | OUT CHAR8 *Destination\r | |
ac644614 | 702 | );\r |
703 | \r | |
704 | \r | |
705 | /**\r | |
706 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
707 | string and returns the new ASCII string.\r | |
708 | \r | |
709 | This function copies the contents of the ASCII string Source to the ASCII\r | |
710 | string Destination, and returns Destination. If Source and Destination\r | |
711 | overlap, then the results are undefined.\r | |
712 | \r | |
713 | If Destination is NULL, then ASSERT().\r | |
714 | If Source is NULL, then ASSERT().\r | |
715 | If Source and Destination overlap, then ASSERT().\r | |
716 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
717 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
718 | then ASSERT().\r | |
719 | \r | |
af2dc6a7 | 720 | @param Destination The pointer to a Null-terminated ASCII string.\r |
721 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 722 | \r |
723 | @return Destination\r | |
724 | \r | |
725 | **/\r | |
726 | CHAR8 *\r | |
727 | EFIAPI\r | |
728 | AsciiStrCpy (\r | |
729 | OUT CHAR8 *Destination,\r | |
730 | IN CONST CHAR8 *Source\r | |
731 | );\r | |
732 | \r | |
733 | \r | |
734 | /**\r | |
17f695ed | 735 | Copies up to a specified length one Null-terminated ASCII string to another \r |
736 | Null-terminated ASCII string and returns the new ASCII string.\r | |
ac644614 | 737 | \r |
738 | This function copies the contents of the ASCII string Source to the ASCII\r | |
739 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
740 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
741 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
742 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
743 | and Destination overlap, then the results are undefined.\r | |
744 | \r | |
745 | If Destination is NULL, then ASSERT().\r | |
746 | If Source is NULL, then ASSERT().\r | |
747 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 748 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
749 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 750 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
50c247fd | 751 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 752 | then ASSERT().\r |
753 | \r | |
af2dc6a7 | 754 | @param Destination The pointer to a Null-terminated ASCII string.\r |
755 | @param Source The pointer to a Null-terminated ASCII string.\r | |
756 | @param Length The maximum number of ASCII characters to copy.\r | |
ac644614 | 757 | \r |
758 | @return Destination\r | |
759 | \r | |
760 | **/\r | |
761 | CHAR8 *\r | |
762 | EFIAPI\r | |
763 | AsciiStrnCpy (\r | |
764 | OUT CHAR8 *Destination,\r | |
765 | IN CONST CHAR8 *Source,\r | |
766 | IN UINTN Length\r | |
767 | );\r | |
768 | \r | |
769 | \r | |
770 | /**\r | |
771 | Returns the length of a Null-terminated ASCII string.\r | |
772 | \r | |
773 | This function returns the number of ASCII characters in the Null-terminated\r | |
774 | ASCII string specified by String.\r | |
775 | \r | |
776 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
777 | If Length > 0 and Source is NULL, then ASSERT().\r | |
778 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
779 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
780 | then ASSERT().\r | |
781 | \r | |
af2dc6a7 | 782 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 783 | \r |
784 | @return The length of String.\r | |
785 | \r | |
786 | **/\r | |
787 | UINTN\r | |
788 | EFIAPI\r | |
789 | AsciiStrLen (\r | |
790 | IN CONST CHAR8 *String\r | |
791 | );\r | |
792 | \r | |
793 | \r | |
794 | /**\r | |
795 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
796 | Null terminator.\r | |
797 | \r | |
798 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
799 | specified by String.\r | |
800 | \r | |
801 | If String is NULL, then ASSERT().\r | |
802 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
803 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
804 | then ASSERT().\r | |
805 | \r | |
af2dc6a7 | 806 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 807 | \r |
808 | @return The size of String.\r | |
809 | \r | |
810 | **/\r | |
811 | UINTN\r | |
812 | EFIAPI\r | |
813 | AsciiStrSize (\r | |
814 | IN CONST CHAR8 *String\r | |
815 | );\r | |
816 | \r | |
817 | \r | |
818 | /**\r | |
819 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
820 | between the first mismatched ASCII characters.\r | |
821 | \r | |
822 | This function compares the Null-terminated ASCII string FirstString to the\r | |
823 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
824 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
825 | mismatched ASCII character in SecondString subtracted from the first\r | |
826 | mismatched ASCII character in FirstString.\r | |
827 | \r | |
828 | If FirstString is NULL, then ASSERT().\r | |
829 | If SecondString is NULL, then ASSERT().\r | |
830 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
831 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
832 | then ASSERT().\r | |
833 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
834 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
835 | Null-terminator, then ASSERT().\r | |
836 | \r | |
af2dc6a7 | 837 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
838 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 839 | \r |
17f695ed | 840 | @retval ==0 FirstString is identical to SecondString.\r |
841 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 842 | \r |
843 | **/\r | |
844 | INTN\r | |
845 | EFIAPI\r | |
846 | AsciiStrCmp (\r | |
847 | IN CONST CHAR8 *FirstString,\r | |
848 | IN CONST CHAR8 *SecondString\r | |
849 | );\r | |
850 | \r | |
851 | \r | |
852 | /**\r | |
853 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
854 | and returns the difference between the first mismatched ASCII characters.\r | |
855 | \r | |
856 | This function performs a case insensitive comparison of the Null-terminated\r | |
857 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
858 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
859 | value returned is the first mismatched lower case ASCII character in\r | |
860 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
861 | in FirstString.\r | |
862 | \r | |
863 | If FirstString is NULL, then ASSERT().\r | |
864 | If SecondString is NULL, then ASSERT().\r | |
865 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
866 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
867 | then ASSERT().\r | |
868 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
869 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
870 | Null-terminator, then ASSERT().\r | |
871 | \r | |
af2dc6a7 | 872 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
873 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 874 | \r |
17f695ed | 875 | @retval ==0 FirstString is identical to SecondString using case insensitive\r |
1106ffe1 | 876 | comparisons.\r |
17f695ed | 877 | @retval !=0 FirstString is not identical to SecondString using case\r |
1106ffe1 | 878 | insensitive comparisons.\r |
ac644614 | 879 | \r |
880 | **/\r | |
881 | INTN\r | |
882 | EFIAPI\r | |
883 | AsciiStriCmp (\r | |
884 | IN CONST CHAR8 *FirstString,\r | |
885 | IN CONST CHAR8 *SecondString\r | |
886 | );\r | |
887 | \r | |
888 | \r | |
889 | /**\r | |
890 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
891 | the difference between the first mismatched ASCII characters.\r | |
892 | \r | |
893 | This function compares the Null-terminated ASCII string FirstString to the\r | |
894 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
895 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
896 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
897 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
898 | first mismatched ASCII character in FirstString.\r | |
899 | \r | |
900 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
901 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
50c247fd | 902 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
903 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
904 | If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r | |
905 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 906 | then ASSERT().\r |
50c247fd | 907 | If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r |
908 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 909 | then ASSERT().\r |
910 | \r | |
af2dc6a7 | 911 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
912 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
913 | @param Length The maximum number of ASCII characters for compare.\r | |
ac644614 | 914 | \r |
17f695ed | 915 | @retval ==0 FirstString is identical to SecondString.\r |
916 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 917 | \r |
918 | **/\r | |
919 | INTN\r | |
920 | EFIAPI\r | |
921 | AsciiStrnCmp (\r | |
922 | IN CONST CHAR8 *FirstString,\r | |
923 | IN CONST CHAR8 *SecondString,\r | |
924 | IN UINTN Length\r | |
925 | );\r | |
926 | \r | |
927 | \r | |
928 | /**\r | |
929 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
930 | ASCII string, and returns the concatenated ASCII string.\r | |
931 | \r | |
932 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
933 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
934 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
935 | String is returned.\r | |
936 | \r | |
937 | If Destination is NULL, then ASSERT().\r | |
938 | If Source is NULL, then ASSERT().\r | |
939 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
940 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
941 | then ASSERT().\r | |
942 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
943 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
944 | then ASSERT().\r | |
945 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
946 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
947 | ASCII characters, then ASSERT().\r | |
948 | \r | |
af2dc6a7 | 949 | @param Destination The pointer to a Null-terminated ASCII string.\r |
950 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 951 | \r |
952 | @return Destination\r | |
953 | \r | |
954 | **/\r | |
955 | CHAR8 *\r | |
956 | EFIAPI\r | |
957 | AsciiStrCat (\r | |
958 | IN OUT CHAR8 *Destination,\r | |
959 | IN CONST CHAR8 *Source\r | |
960 | );\r | |
961 | \r | |
962 | \r | |
963 | /**\r | |
17f695ed | 964 | Concatenates up to a specified length one Null-terminated ASCII string to \r |
965 | the end of another Null-terminated ASCII string, and returns the \r | |
966 | concatenated ASCII string.\r | |
ac644614 | 967 | \r |
968 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
969 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
970 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
971 | Length ASCII characters are concatenated from Source to the end of\r | |
972 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
973 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
974 | the results are undefined.\r | |
975 | \r | |
976 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
977 | If Length > 0 and Source is NULL, then ASSERT().\r | |
978 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 979 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r |
980 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 981 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
50c247fd | 982 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 983 | then ASSERT().\r |
984 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
50c247fd | 985 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 986 | then ASSERT().\r |
987 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
988 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
50c247fd | 989 | ASCII characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 990 | \r |
af2dc6a7 | 991 | @param Destination The pointer to a Null-terminated ASCII string.\r |
992 | @param Source The pointer to a Null-terminated ASCII string.\r | |
993 | @param Length The maximum number of ASCII characters to concatenate from\r | |
ac644614 | 994 | Source.\r |
995 | \r | |
996 | @return Destination\r | |
997 | \r | |
998 | **/\r | |
999 | CHAR8 *\r | |
1000 | EFIAPI\r | |
1001 | AsciiStrnCat (\r | |
1002 | IN OUT CHAR8 *Destination,\r | |
1003 | IN CONST CHAR8 *Source,\r | |
1004 | IN UINTN Length\r | |
1005 | );\r | |
1006 | \r | |
1007 | \r | |
1008 | /**\r | |
9aa049d9 | 1009 | Returns the first occurrence of a Null-terminated ASCII sub-string\r |
ac644614 | 1010 | in a Null-terminated ASCII string.\r |
1011 | \r | |
1012 | This function scans the contents of the ASCII string specified by String\r | |
1013 | and returns the first occurrence of SearchString. If SearchString is not\r | |
1014 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
1015 | then String is returned.\r | |
1016 | \r | |
1017 | If String is NULL, then ASSERT().\r | |
1018 | If SearchString is NULL, then ASSERT().\r | |
1019 | \r | |
1020 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r | |
1021 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
1022 | not including the Null-terminator, then ASSERT().\r | |
1023 | \r | |
af2dc6a7 | 1024 | @param String The pointer to a Null-terminated ASCII string.\r |
1025 | @param SearchString The pointer to a Null-terminated ASCII string to search for.\r | |
ac644614 | 1026 | \r |
1027 | @retval NULL If the SearchString does not appear in String.\r | |
17f695ed | 1028 | @retval others If there is a match return the first occurrence of SearchingString.\r |
9aa049d9 | 1029 | If the length of SearchString is zero,return String.\r |
ac644614 | 1030 | \r |
1031 | **/\r | |
1032 | CHAR8 *\r | |
1033 | EFIAPI\r | |
1034 | AsciiStrStr (\r | |
17f695ed | 1035 | IN CONST CHAR8 *String,\r |
1036 | IN CONST CHAR8 *SearchString\r | |
ac644614 | 1037 | );\r |
1038 | \r | |
1039 | \r | |
1040 | /**\r | |
1041 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1042 | UINTN.\r | |
1043 | \r | |
1044 | This function returns a value of type UINTN by interpreting the contents\r | |
1045 | of the ASCII string String as a decimal number. The format of the input\r | |
1046 | ASCII string String is:\r | |
1047 | \r | |
1048 | [spaces] [decimal digits].\r | |
1049 | \r | |
1050 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1051 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1052 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1053 | function stops at the first character that is a not a valid decimal character or\r | |
1054 | Null-terminator, whichever on comes first.\r | |
1055 | \r | |
1056 | If String has only pad spaces, then 0 is returned.\r | |
1057 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1058 | If the number represented by String overflows according to the range defined by\r | |
1059 | UINTN, then ASSERT().\r | |
1060 | If String is NULL, then ASSERT().\r | |
1061 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1062 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1063 | then ASSERT().\r | |
1064 | \r | |
af2dc6a7 | 1065 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1066 | \r |
af2dc6a7 | 1067 | @retval The value translated from String.\r |
ac644614 | 1068 | \r |
1069 | **/\r | |
1070 | UINTN\r | |
1071 | EFIAPI\r | |
1072 | AsciiStrDecimalToUintn (\r | |
1073 | IN CONST CHAR8 *String\r | |
1074 | );\r | |
1075 | \r | |
1076 | \r | |
1077 | /**\r | |
1078 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1079 | UINT64.\r | |
1080 | \r | |
1081 | This function returns a value of type UINT64 by interpreting the contents\r | |
1082 | of the ASCII string String as a decimal number. The format of the input\r | |
1083 | ASCII string String is:\r | |
1084 | \r | |
1085 | [spaces] [decimal digits].\r | |
1086 | \r | |
1087 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1088 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1089 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1090 | function stops at the first character that is a not a valid decimal character or\r | |
1091 | Null-terminator, whichever on comes first.\r | |
1092 | \r | |
1093 | If String has only pad spaces, then 0 is returned.\r | |
1094 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1095 | If the number represented by String overflows according to the range defined by\r | |
1096 | UINT64, then ASSERT().\r | |
1097 | If String is NULL, then ASSERT().\r | |
1098 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1099 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1100 | then ASSERT().\r | |
1101 | \r | |
af2dc6a7 | 1102 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1103 | \r |
38bbd3d9 | 1104 | @retval Value translated from String.\r |
ac644614 | 1105 | \r |
1106 | **/\r | |
1107 | UINT64\r | |
1108 | EFIAPI\r | |
1109 | AsciiStrDecimalToUint64 (\r | |
17f695ed | 1110 | IN CONST CHAR8 *String\r |
ac644614 | 1111 | );\r |
1112 | \r | |
1113 | \r | |
1114 | /**\r | |
1115 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
1116 | \r | |
1117 | This function returns a value of type UINTN by interpreting the contents of\r | |
1118 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1119 | string String is:\r | |
1120 | \r | |
1121 | [spaces][zeros][x][hexadecimal digits].\r | |
1122 | \r | |
1123 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1124 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1125 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1126 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1127 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1128 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1129 | digit. Then, the function stops at the first character that is a not a valid\r | |
1130 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1131 | \r | |
1132 | If String has only pad spaces, then 0 is returned.\r | |
1133 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1134 | 0 is returned.\r | |
1135 | \r | |
1136 | If the number represented by String overflows according to the range defined by UINTN,\r | |
1137 | then ASSERT().\r | |
1138 | If String is NULL, then ASSERT().\r | |
1139 | If PcdMaximumAsciiStringLength is not zero,\r | |
1140 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1141 | the Null-terminator, then ASSERT().\r | |
1142 | \r | |
af2dc6a7 | 1143 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1144 | \r |
38bbd3d9 | 1145 | @retval Value translated from String.\r |
ac644614 | 1146 | \r |
1147 | **/\r | |
1148 | UINTN\r | |
1149 | EFIAPI\r | |
1150 | AsciiStrHexToUintn (\r | |
17f695ed | 1151 | IN CONST CHAR8 *String\r |
ac644614 | 1152 | );\r |
1153 | \r | |
1154 | \r | |
1155 | /**\r | |
1156 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
1157 | \r | |
1158 | This function returns a value of type UINT64 by interpreting the contents of\r | |
1159 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1160 | string String is:\r | |
1161 | \r | |
1162 | [spaces][zeros][x][hexadecimal digits].\r | |
1163 | \r | |
1164 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1165 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1166 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1167 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1168 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1169 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1170 | digit. Then, the function stops at the first character that is a not a valid\r | |
1171 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1172 | \r | |
1173 | If String has only pad spaces, then 0 is returned.\r | |
1174 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1175 | 0 is returned.\r | |
1176 | \r | |
1177 | If the number represented by String overflows according to the range defined by UINT64,\r | |
1178 | then ASSERT().\r | |
1179 | If String is NULL, then ASSERT().\r | |
1180 | If PcdMaximumAsciiStringLength is not zero,\r | |
1181 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1182 | the Null-terminator, then ASSERT().\r | |
1183 | \r | |
af2dc6a7 | 1184 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1185 | \r |
38bbd3d9 | 1186 | @retval Value translated from String.\r |
ac644614 | 1187 | \r |
1188 | **/\r | |
1189 | UINT64\r | |
1190 | EFIAPI\r | |
1191 | AsciiStrHexToUint64 (\r | |
17f695ed | 1192 | IN CONST CHAR8 *String\r |
ac644614 | 1193 | );\r |
1194 | \r | |
1195 | \r | |
1196 | /**\r | |
1197 | Convert one Null-terminated ASCII string to a Null-terminated\r | |
1198 | Unicode string and returns the Unicode string.\r | |
1199 | \r | |
1200 | This function converts the contents of the ASCII string Source to the Unicode\r | |
1201 | string Destination, and returns Destination. The function terminates the\r | |
1202 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
1203 | The caller is responsible to make sure Destination points to a buffer with size\r | |
1204 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r | |
1205 | \r | |
1206 | If Destination is NULL, then ASSERT().\r | |
1207 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
1208 | If Source is NULL, then ASSERT().\r | |
1209 | If Source and Destination overlap, then ASSERT().\r | |
1210 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
1211 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1212 | then ASSERT().\r | |
1213 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
1214 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
1215 | Null-terminator, then ASSERT().\r | |
1216 | \r | |
af2dc6a7 | 1217 | @param Source The pointer to a Null-terminated ASCII string.\r |
1218 | @param Destination The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 1219 | \r |
9aa049d9 | 1220 | @return Destination.\r |
ac644614 | 1221 | \r |
1222 | **/\r | |
1223 | CHAR16 *\r | |
1224 | EFIAPI\r | |
1225 | AsciiStrToUnicodeStr (\r | |
17f695ed | 1226 | IN CONST CHAR8 *Source,\r |
1227 | OUT CHAR16 *Destination\r | |
ac644614 | 1228 | );\r |
1229 | \r | |
1230 | \r | |
1231 | /**\r | |
1232 | Converts an 8-bit value to an 8-bit BCD value.\r | |
1233 | \r | |
1234 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
1235 | returned.\r | |
1236 | \r | |
1237 | If Value >= 100, then ASSERT().\r | |
1238 | \r | |
1239 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
1240 | \r | |
9aa049d9 | 1241 | @return The BCD value.\r |
ac644614 | 1242 | \r |
1243 | **/\r | |
1244 | UINT8\r | |
1245 | EFIAPI\r | |
1246 | DecimalToBcd8 (\r | |
1247 | IN UINT8 Value\r | |
1248 | );\r | |
1249 | \r | |
1250 | \r | |
1251 | /**\r | |
1252 | Converts an 8-bit BCD value to an 8-bit value.\r | |
1253 | \r | |
1254 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
1255 | value is returned.\r | |
1256 | \r | |
1257 | If Value >= 0xA0, then ASSERT().\r | |
1258 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
1259 | \r | |
1260 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
1261 | \r | |
1262 | @return The 8-bit value is returned.\r | |
1263 | \r | |
1264 | **/\r | |
1265 | UINT8\r | |
1266 | EFIAPI\r | |
1267 | BcdToDecimal8 (\r | |
1268 | IN UINT8 Value\r | |
1269 | );\r | |
1270 | \r | |
1271 | \r | |
1272 | //\r | |
1273 | // Linked List Functions and Macros\r | |
1274 | //\r | |
1275 | \r | |
1276 | /**\r | |
1277 | Initializes the head node of a doubly linked list that is declared as a\r | |
1278 | global variable in a module.\r | |
1279 | \r | |
1280 | Initializes the forward and backward links of a new linked list. After\r | |
1281 | initializing a linked list with this macro, the other linked list functions\r | |
1282 | may be used to add and remove nodes from the linked list. This macro results\r | |
1283 | in smaller executables by initializing the linked list in the data section,\r | |
1284 | instead if calling the InitializeListHead() function to perform the\r | |
1285 | equivalent operation.\r | |
1286 | \r | |
77f863ee | 1287 | @param ListHead The head note of a list to initialize.\r |
ac644614 | 1288 | \r |
1289 | **/\r | |
17f695ed | 1290 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r |
ac644614 | 1291 | \r |
1292 | \r | |
1293 | /**\r | |
1294 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
1295 | the head node of the doubly linked list.\r | |
1296 | \r | |
1297 | Initializes the forward and backward links of a new linked list. After\r | |
1298 | initializing a linked list with this function, the other linked list\r | |
1299 | functions may be used to add and remove nodes from the linked list. It is up\r | |
1300 | to the caller of this function to allocate the memory for ListHead.\r | |
1301 | \r | |
1302 | If ListHead is NULL, then ASSERT().\r | |
1303 | \r | |
1304 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
1305 | \r | |
1306 | @return ListHead\r | |
1307 | \r | |
1308 | **/\r | |
1309 | LIST_ENTRY *\r | |
1310 | EFIAPI\r | |
1311 | InitializeListHead (\r | |
aa0583c7 | 1312 | IN OUT LIST_ENTRY *ListHead\r |
ac644614 | 1313 | );\r |
1314 | \r | |
1315 | \r | |
1316 | /**\r | |
1317 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
1318 | to the head node of the doubly linked list.\r | |
1319 | \r | |
1320 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
1321 | ListHead, and returns ListHead.\r | |
1322 | \r | |
1323 | If ListHead is NULL, then ASSERT().\r | |
1324 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1325 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1326 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1327 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
ac644614 | 1328 | of nodes in ListHead, including the ListHead node, is greater than or\r |
1329 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1330 | \r | |
1331 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1332 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
1333 | of a doubly linked list.\r | |
1334 | \r | |
1335 | @return ListHead\r | |
1336 | \r | |
1337 | **/\r | |
1338 | LIST_ENTRY *\r | |
1339 | EFIAPI\r | |
1340 | InsertHeadList (\r | |
aa0583c7 | 1341 | IN OUT LIST_ENTRY *ListHead,\r |
1342 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1343 | );\r |
1344 | \r | |
1345 | \r | |
1346 | /**\r | |
1347 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
1348 | the head node of the doubly linked list.\r | |
1349 | \r | |
1350 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
1351 | and returns ListHead.\r | |
1352 | \r | |
1353 | If ListHead is NULL, then ASSERT().\r | |
1354 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1355 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1356 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1357 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
ac644614 | 1358 | of nodes in ListHead, including the ListHead node, is greater than or\r |
1359 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1360 | \r | |
1361 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1362 | @param Entry A pointer to a node that is to be added at the end of the\r | |
1363 | doubly linked list.\r | |
1364 | \r | |
1365 | @return ListHead\r | |
1366 | \r | |
1367 | **/\r | |
1368 | LIST_ENTRY *\r | |
1369 | EFIAPI\r | |
1370 | InsertTailList (\r | |
aa0583c7 | 1371 | IN OUT LIST_ENTRY *ListHead,\r |
1372 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1373 | );\r |
1374 | \r | |
1375 | \r | |
1376 | /**\r | |
1377 | Retrieves the first node of a doubly linked list.\r | |
1378 | \r | |
17f695ed | 1379 | Returns the first node of a doubly linked list. List must have been \r |
1380 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r | |
1381 | If List is empty, then List is returned.\r | |
ac644614 | 1382 | \r |
1383 | If List is NULL, then ASSERT().\r | |
17f695ed | 1384 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1385 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1386 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1387 | in List, including the List node, is greater than or equal to\r |
1388 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1389 | \r | |
1390 | @param List A pointer to the head node of a doubly linked list.\r | |
1391 | \r | |
1392 | @return The first node of a doubly linked list.\r | |
e01a125f | 1393 | @retval List The list is empty.\r |
ac644614 | 1394 | \r |
1395 | **/\r | |
1396 | LIST_ENTRY *\r | |
1397 | EFIAPI\r | |
1398 | GetFirstNode (\r | |
1399 | IN CONST LIST_ENTRY *List\r | |
1400 | );\r | |
1401 | \r | |
1402 | \r | |
1403 | /**\r | |
1404 | Retrieves the next node of a doubly linked list.\r | |
1405 | \r | |
17f695ed | 1406 | Returns the node of a doubly linked list that follows Node. \r |
1407 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1408 | or InitializeListHead(). If List is empty, then List is returned.\r | |
ac644614 | 1409 | \r |
1410 | If List is NULL, then ASSERT().\r | |
1411 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1412 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1413 | InitializeListHead(), then ASSERT().\r | |
a71865b1 LG |
1414 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
1415 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
1081f624 | 1416 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1417 | \r |
1418 | @param List A pointer to the head node of a doubly linked list.\r | |
1419 | @param Node A pointer to a node in the doubly linked list.\r | |
1420 | \r | |
af2dc6a7 | 1421 | @return The pointer to the next node if one exists. Otherwise List is returned.\r |
ac644614 | 1422 | \r |
1423 | **/\r | |
1424 | LIST_ENTRY *\r | |
1425 | EFIAPI\r | |
1426 | GetNextNode (\r | |
1427 | IN CONST LIST_ENTRY *List,\r | |
1428 | IN CONST LIST_ENTRY *Node\r | |
1429 | );\r | |
1430 | \r | |
cbca8de5 | 1431 | \r |
1432 | /**\r | |
1433 | Retrieves the previous node of a doubly linked list.\r | |
1434 | \r | |
1435 | Returns the node of a doubly linked list that precedes Node. \r | |
1436 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1437 | or InitializeListHead(). If List is empty, then List is returned.\r | |
1438 | \r | |
1439 | If List is NULL, then ASSERT().\r | |
1440 | If Node is NULL, then ASSERT().\r | |
1441 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r | |
1442 | InitializeListHead(), then ASSERT().\r | |
a71865b1 LG |
1443 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
1444 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
cbca8de5 | 1445 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
1446 | \r | |
1447 | @param List A pointer to the head node of a doubly linked list.\r | |
1448 | @param Node A pointer to a node in the doubly linked list.\r | |
1449 | \r | |
af2dc6a7 | 1450 | @return The pointer to the previous node if one exists. Otherwise List is returned.\r |
cbca8de5 | 1451 | \r |
1452 | **/\r | |
1453 | LIST_ENTRY *\r | |
1454 | EFIAPI\r | |
1455 | GetPreviousNode (\r | |
1456 | IN CONST LIST_ENTRY *List,\r | |
1457 | IN CONST LIST_ENTRY *Node\r | |
1458 | );\r | |
ac644614 | 1459 | \r |
cbca8de5 | 1460 | \r |
ac644614 | 1461 | /**\r |
1462 | Checks to see if a doubly linked list is empty or not.\r | |
1463 | \r | |
1464 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
1465 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
1466 | \r | |
1467 | If ListHead is NULL, then ASSERT().\r | |
17f695ed | 1468 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1469 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1470 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1471 | in List, including the List node, is greater than or equal to\r |
1472 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1473 | \r | |
1474 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1475 | \r | |
1476 | @retval TRUE The linked list is empty.\r | |
1477 | @retval FALSE The linked list is not empty.\r | |
1478 | \r | |
1479 | **/\r | |
1480 | BOOLEAN\r | |
1481 | EFIAPI\r | |
1482 | IsListEmpty (\r | |
1483 | IN CONST LIST_ENTRY *ListHead\r | |
1484 | );\r | |
1485 | \r | |
1486 | \r | |
1487 | /**\r | |
aa0583c7 | 1488 | Determines if a node in a doubly linked list is the head node of a the same\r |
1489 | doubly linked list. This function is typically used to terminate a loop that\r | |
1490 | traverses all the nodes in a doubly linked list starting with the head node.\r | |
ac644614 | 1491 | \r |
aa0583c7 | 1492 | Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r |
1493 | nodes in the doubly linked list specified by List. List must have been\r | |
17f695ed | 1494 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1495 | \r |
1496 | If List is NULL, then ASSERT().\r | |
1497 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1498 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r |
1499 | then ASSERT().\r | |
a71865b1 | 1500 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1501 | in List, including the List node, is greater than or equal to\r |
1502 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1503 | If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r |
1504 | to List, then ASSERT().\r | |
ac644614 | 1505 | \r |
1506 | @param List A pointer to the head node of a doubly linked list.\r | |
1507 | @param Node A pointer to a node in the doubly linked list.\r | |
1508 | \r | |
1955808d LG |
1509 | @retval TRUE Node is the head of the doubly-linked list pointed by List.\r |
1510 | @retval FALSE Node is not the head of the doubly-linked list pointed by List.\r | |
ac644614 | 1511 | \r |
1512 | **/\r | |
1513 | BOOLEAN\r | |
1514 | EFIAPI\r | |
1515 | IsNull (\r | |
1516 | IN CONST LIST_ENTRY *List,\r | |
1517 | IN CONST LIST_ENTRY *Node\r | |
1518 | );\r | |
1519 | \r | |
1520 | \r | |
1521 | /**\r | |
1522 | Determines if a node the last node in a doubly linked list.\r | |
1523 | \r | |
1524 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
1525 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
17f695ed | 1526 | INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1527 | \r |
1528 | If List is NULL, then ASSERT().\r | |
1529 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1530 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1531 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1532 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1533 | in List, including the List node, is greater than or equal to\r |
1534 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1535 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1536 | \r |
1537 | @param List A pointer to the head node of a doubly linked list.\r | |
1538 | @param Node A pointer to a node in the doubly linked list.\r | |
1539 | \r | |
1540 | @retval TRUE Node is the last node in the linked list.\r | |
1541 | @retval FALSE Node is not the last node in the linked list.\r | |
1542 | \r | |
1543 | **/\r | |
1544 | BOOLEAN\r | |
1545 | EFIAPI\r | |
1546 | IsNodeAtEnd (\r | |
1547 | IN CONST LIST_ENTRY *List,\r | |
1548 | IN CONST LIST_ENTRY *Node\r | |
1549 | );\r | |
1550 | \r | |
1551 | \r | |
1552 | /**\r | |
1553 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
1554 | first node after the swap.\r | |
1555 | \r | |
1556 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
1557 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
1558 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
1559 | same double linked list as FirstEntry and that double linked list must have\r | |
17f695ed | 1560 | been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r |
1561 | SecondEntry is returned after the nodes are swapped.\r | |
ac644614 | 1562 | \r |
1563 | If FirstEntry is NULL, then ASSERT().\r | |
1564 | If SecondEntry is NULL, then ASSERT().\r | |
1081f624 | 1565 | If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r |
1566 | same linked list, then ASSERT().\r | |
ac644614 | 1567 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
1568 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
1569 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
1570 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1571 | \r | |
1572 | @param FirstEntry A pointer to a node in a linked list.\r | |
1573 | @param SecondEntry A pointer to another node in the same linked list.\r | |
38bbd3d9 | 1574 | \r |
9aa049d9 | 1575 | @return SecondEntry.\r |
ac644614 | 1576 | \r |
1577 | **/\r | |
1578 | LIST_ENTRY *\r | |
1579 | EFIAPI\r | |
1580 | SwapListEntries (\r | |
aa0583c7 | 1581 | IN OUT LIST_ENTRY *FirstEntry,\r |
1582 | IN OUT LIST_ENTRY *SecondEntry\r | |
ac644614 | 1583 | );\r |
1584 | \r | |
1585 | \r | |
1586 | /**\r | |
1587 | Removes a node from a doubly linked list, and returns the node that follows\r | |
1588 | the removed node.\r | |
1589 | \r | |
1590 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
1591 | this function to release the memory used by this node if that is required. On\r | |
1592 | exit, the node following Entry in the doubly linked list is returned. If\r | |
1593 | Entry is the only node in the linked list, then the head node of the linked\r | |
1594 | list is returned.\r | |
1595 | \r | |
1596 | If Entry is NULL, then ASSERT().\r | |
1597 | If Entry is the head node of an empty list, then ASSERT().\r | |
1598 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1599 | linked list containing Entry, including the Entry node, is greater than\r | |
1600 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1601 | \r | |
9aa049d9 | 1602 | @param Entry A pointer to a node in a linked list.\r |
ac644614 | 1603 | \r |
9aa049d9 | 1604 | @return Entry.\r |
ac644614 | 1605 | \r |
1606 | **/\r | |
1607 | LIST_ENTRY *\r | |
1608 | EFIAPI\r | |
1609 | RemoveEntryList (\r | |
1610 | IN CONST LIST_ENTRY *Entry\r | |
1611 | );\r | |
1612 | \r | |
1613 | //\r | |
1614 | // Math Services\r | |
1615 | //\r | |
1616 | \r | |
1617 | /**\r | |
1618 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
1619 | with zeros. The shifted value is returned.\r | |
1620 | \r | |
1621 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
1622 | low Count bits are set to zero. The shifted value is returned.\r | |
1623 | \r | |
1624 | If Count is greater than 63, then ASSERT().\r | |
1625 | \r | |
1626 | @param Operand The 64-bit operand to shift left.\r | |
1627 | @param Count The number of bits to shift left.\r | |
1628 | \r | |
9aa049d9 | 1629 | @return Operand << Count.\r |
ac644614 | 1630 | \r |
1631 | **/\r | |
1632 | UINT64\r | |
1633 | EFIAPI\r | |
1634 | LShiftU64 (\r | |
1635 | IN UINT64 Operand,\r | |
1636 | IN UINTN Count\r | |
1637 | );\r | |
1638 | \r | |
1639 | \r | |
1640 | /**\r | |
1641 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
1642 | filled with zeros. The shifted value is returned.\r | |
1643 | \r | |
1644 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1645 | high Count bits are set to zero. The shifted value is returned.\r | |
1646 | \r | |
1647 | If Count is greater than 63, then ASSERT().\r | |
1648 | \r | |
1649 | @param Operand The 64-bit operand to shift right.\r | |
1650 | @param Count The number of bits to shift right.\r | |
1651 | \r | |
1652 | @return Operand >> Count\r | |
1653 | \r | |
1654 | **/\r | |
1655 | UINT64\r | |
1656 | EFIAPI\r | |
1657 | RShiftU64 (\r | |
1658 | IN UINT64 Operand,\r | |
1659 | IN UINTN Count\r | |
1660 | );\r | |
1661 | \r | |
1662 | \r | |
1663 | /**\r | |
1664 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
1665 | with original integer's bit 63. The shifted value is returned.\r | |
1666 | \r | |
1667 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1668 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
1669 | \r | |
1670 | If Count is greater than 63, then ASSERT().\r | |
1671 | \r | |
1672 | @param Operand The 64-bit operand to shift right.\r | |
1673 | @param Count The number of bits to shift right.\r | |
1674 | \r | |
1675 | @return Operand >> Count\r | |
1676 | \r | |
1677 | **/\r | |
1678 | UINT64\r | |
1679 | EFIAPI\r | |
1680 | ARShiftU64 (\r | |
1681 | IN UINT64 Operand,\r | |
1682 | IN UINTN Count\r | |
1683 | );\r | |
1684 | \r | |
1685 | \r | |
1686 | /**\r | |
1687 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
1688 | with the high bits that were rotated.\r | |
1689 | \r | |
1690 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
1691 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1692 | value is returned.\r | |
1693 | \r | |
1694 | If Count is greater than 31, then ASSERT().\r | |
1695 | \r | |
1696 | @param Operand The 32-bit operand to rotate left.\r | |
1697 | @param Count The number of bits to rotate left.\r | |
1698 | \r | |
17f695ed | 1699 | @return Operand << Count\r |
ac644614 | 1700 | \r |
1701 | **/\r | |
1702 | UINT32\r | |
1703 | EFIAPI\r | |
1704 | LRotU32 (\r | |
1705 | IN UINT32 Operand,\r | |
1706 | IN UINTN Count\r | |
1707 | );\r | |
1708 | \r | |
1709 | \r | |
1710 | /**\r | |
1711 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
1712 | with the low bits that were rotated.\r | |
1713 | \r | |
1714 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
1715 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1716 | value is returned.\r | |
1717 | \r | |
1718 | If Count is greater than 31, then ASSERT().\r | |
1719 | \r | |
1720 | @param Operand The 32-bit operand to rotate right.\r | |
1721 | @param Count The number of bits to rotate right.\r | |
1722 | \r | |
2fe241a2 | 1723 | @return Operand >> Count\r |
ac644614 | 1724 | \r |
1725 | **/\r | |
1726 | UINT32\r | |
1727 | EFIAPI\r | |
1728 | RRotU32 (\r | |
1729 | IN UINT32 Operand,\r | |
1730 | IN UINTN Count\r | |
1731 | );\r | |
1732 | \r | |
1733 | \r | |
1734 | /**\r | |
1735 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
1736 | with the high bits that were rotated.\r | |
1737 | \r | |
1738 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
1739 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1740 | value is returned.\r | |
1741 | \r | |
1742 | If Count is greater than 63, then ASSERT().\r | |
1743 | \r | |
1744 | @param Operand The 64-bit operand to rotate left.\r | |
1745 | @param Count The number of bits to rotate left.\r | |
1746 | \r | |
17f695ed | 1747 | @return Operand << Count\r |
ac644614 | 1748 | \r |
1749 | **/\r | |
1750 | UINT64\r | |
1751 | EFIAPI\r | |
1752 | LRotU64 (\r | |
1753 | IN UINT64 Operand,\r | |
1754 | IN UINTN Count\r | |
1755 | );\r | |
1756 | \r | |
1757 | \r | |
1758 | /**\r | |
1759 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
1760 | with the high low bits that were rotated.\r | |
1761 | \r | |
1762 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
1763 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1764 | value is returned.\r | |
1765 | \r | |
1766 | If Count is greater than 63, then ASSERT().\r | |
1767 | \r | |
1768 | @param Operand The 64-bit operand to rotate right.\r | |
1769 | @param Count The number of bits to rotate right.\r | |
1770 | \r | |
17f695ed | 1771 | @return Operand >> Count\r |
ac644614 | 1772 | \r |
1773 | **/\r | |
1774 | UINT64\r | |
1775 | EFIAPI\r | |
1776 | RRotU64 (\r | |
1777 | IN UINT64 Operand,\r | |
1778 | IN UINTN Count\r | |
1779 | );\r | |
1780 | \r | |
1781 | \r | |
1782 | /**\r | |
1783 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
1784 | \r | |
1785 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
1786 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1787 | Otherwise, a value between 0 and 31 is returned.\r | |
1788 | \r | |
1789 | @param Operand The 32-bit operand to evaluate.\r | |
1790 | \r | |
9aa049d9 | 1791 | @retval 0..31 The lowest bit set in Operand was found.\r |
17f695ed | 1792 | @retval -1 Operand is zero.\r |
ac644614 | 1793 | \r |
1794 | **/\r | |
1795 | INTN\r | |
1796 | EFIAPI\r | |
1797 | LowBitSet32 (\r | |
1798 | IN UINT32 Operand\r | |
1799 | );\r | |
1800 | \r | |
1801 | \r | |
1802 | /**\r | |
1803 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
1804 | \r | |
1805 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
1806 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1807 | Otherwise, a value between 0 and 63 is returned.\r | |
1808 | \r | |
1809 | @param Operand The 64-bit operand to evaluate.\r | |
1810 | \r | |
9aa049d9 | 1811 | @retval 0..63 The lowest bit set in Operand was found.\r |
17f695ed | 1812 | @retval -1 Operand is zero.\r |
1813 | \r | |
ac644614 | 1814 | \r |
1815 | **/\r | |
1816 | INTN\r | |
1817 | EFIAPI\r | |
1818 | LowBitSet64 (\r | |
1819 | IN UINT64 Operand\r | |
1820 | );\r | |
1821 | \r | |
1822 | \r | |
1823 | /**\r | |
1824 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
1825 | to log2(x).\r | |
1826 | \r | |
1827 | This function computes the bit position of the highest bit set in the 32-bit\r | |
1828 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1829 | Otherwise, a value between 0 and 31 is returned.\r | |
1830 | \r | |
1831 | @param Operand The 32-bit operand to evaluate.\r | |
1832 | \r | |
9aa049d9 | 1833 | @retval 0..31 Position of the highest bit set in Operand if found.\r |
17f695ed | 1834 | @retval -1 Operand is zero.\r |
ac644614 | 1835 | \r |
1836 | **/\r | |
1837 | INTN\r | |
1838 | EFIAPI\r | |
1839 | HighBitSet32 (\r | |
1840 | IN UINT32 Operand\r | |
1841 | );\r | |
1842 | \r | |
1843 | \r | |
1844 | /**\r | |
1845 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
1846 | to log2(x).\r | |
1847 | \r | |
1848 | This function computes the bit position of the highest bit set in the 64-bit\r | |
1849 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1850 | Otherwise, a value between 0 and 63 is returned.\r | |
1851 | \r | |
1852 | @param Operand The 64-bit operand to evaluate.\r | |
1853 | \r | |
9aa049d9 | 1854 | @retval 0..63 Position of the highest bit set in Operand if found.\r |
17f695ed | 1855 | @retval -1 Operand is zero.\r |
ac644614 | 1856 | \r |
1857 | **/\r | |
1858 | INTN\r | |
1859 | EFIAPI\r | |
1860 | HighBitSet64 (\r | |
1861 | IN UINT64 Operand\r | |
1862 | );\r | |
1863 | \r | |
1864 | \r | |
1865 | /**\r | |
1866 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
17f695ed | 1867 | 1 << log2(x).\r |
ac644614 | 1868 | \r |
1869 | This function computes the value of the highest bit set in the 32-bit value\r | |
1870 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1871 | \r | |
1872 | @param Operand The 32-bit operand to evaluate.\r | |
1873 | \r | |
1874 | @return 1 << HighBitSet32(Operand)\r | |
1875 | @retval 0 Operand is zero.\r | |
1876 | \r | |
1877 | **/\r | |
1878 | UINT32\r | |
1879 | EFIAPI\r | |
1880 | GetPowerOfTwo32 (\r | |
1881 | IN UINT32 Operand\r | |
1882 | );\r | |
1883 | \r | |
1884 | \r | |
1885 | /**\r | |
1886 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
17f695ed | 1887 | 1 << log2(x).\r |
ac644614 | 1888 | \r |
1889 | This function computes the value of the highest bit set in the 64-bit value\r | |
1890 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1891 | \r | |
1892 | @param Operand The 64-bit operand to evaluate.\r | |
1893 | \r | |
1894 | @return 1 << HighBitSet64(Operand)\r | |
1895 | @retval 0 Operand is zero.\r | |
1896 | \r | |
1897 | **/\r | |
1898 | UINT64\r | |
1899 | EFIAPI\r | |
1900 | GetPowerOfTwo64 (\r | |
1901 | IN UINT64 Operand\r | |
1902 | );\r | |
1903 | \r | |
1904 | \r | |
1905 | /**\r | |
af2dc6a7 | 1906 | Switches the endianness of a 16-bit integer.\r |
ac644614 | 1907 | \r |
1908 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
1909 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1910 | returned.\r | |
1911 | \r | |
2a53dabf | 1912 | @param Value A 16-bit unsigned value.\r |
ac644614 | 1913 | \r |
efb23117 | 1914 | @return The byte swapped Value.\r |
ac644614 | 1915 | \r |
1916 | **/\r | |
1917 | UINT16\r | |
1918 | EFIAPI\r | |
1919 | SwapBytes16 (\r | |
1920 | IN UINT16 Value\r | |
1921 | );\r | |
1922 | \r | |
1923 | \r | |
1924 | /**\r | |
af2dc6a7 | 1925 | Switches the endianness of a 32-bit integer.\r |
ac644614 | 1926 | \r |
1927 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
1928 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1929 | returned.\r | |
1930 | \r | |
2a53dabf | 1931 | @param Value A 32-bit unsigned value.\r |
ac644614 | 1932 | \r |
efb23117 | 1933 | @return The byte swapped Value.\r |
ac644614 | 1934 | \r |
1935 | **/\r | |
1936 | UINT32\r | |
1937 | EFIAPI\r | |
1938 | SwapBytes32 (\r | |
1939 | IN UINT32 Value\r | |
1940 | );\r | |
1941 | \r | |
1942 | \r | |
1943 | /**\r | |
af2dc6a7 | 1944 | Switches the endianness of a 64-bit integer.\r |
ac644614 | 1945 | \r |
1946 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
1947 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1948 | returned.\r | |
1949 | \r | |
2a53dabf | 1950 | @param Value A 64-bit unsigned value.\r |
ac644614 | 1951 | \r |
efb23117 | 1952 | @return The byte swapped Value.\r |
ac644614 | 1953 | \r |
1954 | **/\r | |
1955 | UINT64\r | |
1956 | EFIAPI\r | |
1957 | SwapBytes64 (\r | |
1958 | IN UINT64 Value\r | |
1959 | );\r | |
1960 | \r | |
1961 | \r | |
1962 | /**\r | |
1963 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
1964 | generates a 64-bit unsigned result.\r | |
1965 | \r | |
1966 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
1967 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1968 | bit unsigned result is returned.\r | |
1969 | \r | |
ac644614 | 1970 | @param Multiplicand A 64-bit unsigned value.\r |
1971 | @param Multiplier A 32-bit unsigned value.\r | |
1972 | \r | |
1973 | @return Multiplicand * Multiplier\r | |
1974 | \r | |
1975 | **/\r | |
1976 | UINT64\r | |
1977 | EFIAPI\r | |
1978 | MultU64x32 (\r | |
1979 | IN UINT64 Multiplicand,\r | |
1980 | IN UINT32 Multiplier\r | |
1981 | );\r | |
1982 | \r | |
1983 | \r | |
1984 | /**\r | |
1985 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
1986 | generates a 64-bit unsigned result.\r | |
1987 | \r | |
1988 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
1989 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1990 | bit unsigned result is returned.\r | |
1991 | \r | |
ac644614 | 1992 | @param Multiplicand A 64-bit unsigned value.\r |
1993 | @param Multiplier A 64-bit unsigned value.\r | |
1994 | \r | |
af2dc6a7 | 1995 | @return Multiplicand * Multiplier.\r |
ac644614 | 1996 | \r |
1997 | **/\r | |
1998 | UINT64\r | |
1999 | EFIAPI\r | |
2000 | MultU64x64 (\r | |
2001 | IN UINT64 Multiplicand,\r | |
2002 | IN UINT64 Multiplier\r | |
2003 | );\r | |
2004 | \r | |
2005 | \r | |
2006 | /**\r | |
2007 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2008 | 64-bit signed result.\r | |
2009 | \r | |
2010 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
2011 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
2012 | signed result is returned.\r | |
2013 | \r | |
ac644614 | 2014 | @param Multiplicand A 64-bit signed value.\r |
2015 | @param Multiplier A 64-bit signed value.\r | |
2016 | \r | |
2017 | @return Multiplicand * Multiplier\r | |
2018 | \r | |
2019 | **/\r | |
2020 | INT64\r | |
2021 | EFIAPI\r | |
2022 | MultS64x64 (\r | |
2023 | IN INT64 Multiplicand,\r | |
2024 | IN INT64 Multiplier\r | |
2025 | );\r | |
2026 | \r | |
2027 | \r | |
2028 | /**\r | |
2029 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2030 | a 64-bit unsigned result.\r | |
2031 | \r | |
2032 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2033 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
2034 | function returns the 64-bit unsigned quotient.\r | |
2035 | \r | |
2036 | If Divisor is 0, then ASSERT().\r | |
2037 | \r | |
2038 | @param Dividend A 64-bit unsigned value.\r | |
2039 | @param Divisor A 32-bit unsigned value.\r | |
2040 | \r | |
af2dc6a7 | 2041 | @return Dividend / Divisor.\r |
ac644614 | 2042 | \r |
2043 | **/\r | |
2044 | UINT64\r | |
2045 | EFIAPI\r | |
2046 | DivU64x32 (\r | |
2047 | IN UINT64 Dividend,\r | |
2048 | IN UINT32 Divisor\r | |
2049 | );\r | |
2050 | \r | |
2051 | \r | |
2052 | /**\r | |
2053 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2054 | a 32-bit unsigned remainder.\r | |
2055 | \r | |
2056 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2057 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
2058 | returns the 32-bit unsigned remainder.\r | |
2059 | \r | |
2060 | If Divisor is 0, then ASSERT().\r | |
2061 | \r | |
2062 | @param Dividend A 64-bit unsigned value.\r | |
2063 | @param Divisor A 32-bit unsigned value.\r | |
2064 | \r | |
af2dc6a7 | 2065 | @return Dividend % Divisor.\r |
ac644614 | 2066 | \r |
2067 | **/\r | |
2068 | UINT32\r | |
2069 | EFIAPI\r | |
2070 | ModU64x32 (\r | |
2071 | IN UINT64 Dividend,\r | |
2072 | IN UINT32 Divisor\r | |
2073 | );\r | |
2074 | \r | |
2075 | \r | |
2076 | /**\r | |
2077 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2078 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
2079 | \r | |
2080 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2081 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2082 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
2083 | This function returns the 64-bit unsigned quotient.\r | |
2084 | \r | |
2085 | If Divisor is 0, then ASSERT().\r | |
2086 | \r | |
2087 | @param Dividend A 64-bit unsigned value.\r | |
2088 | @param Divisor A 32-bit unsigned value.\r | |
2089 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
2090 | optional and may be NULL.\r | |
2091 | \r | |
af2dc6a7 | 2092 | @return Dividend / Divisor.\r |
ac644614 | 2093 | \r |
2094 | **/\r | |
2095 | UINT64\r | |
2096 | EFIAPI\r | |
2097 | DivU64x32Remainder (\r | |
2098 | IN UINT64 Dividend,\r | |
2099 | IN UINT32 Divisor,\r | |
2100 | OUT UINT32 *Remainder OPTIONAL\r | |
2101 | );\r | |
2102 | \r | |
2103 | \r | |
2104 | /**\r | |
2105 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
2106 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
2107 | \r | |
2108 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
2109 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2110 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
2111 | This function returns the 64-bit unsigned quotient.\r | |
2112 | \r | |
2113 | If Divisor is 0, then ASSERT().\r | |
2114 | \r | |
2115 | @param Dividend A 64-bit unsigned value.\r | |
2116 | @param Divisor A 64-bit unsigned value.\r | |
2117 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
2118 | optional and may be NULL.\r | |
2119 | \r | |
af2dc6a7 | 2120 | @return Dividend / Divisor.\r |
ac644614 | 2121 | \r |
2122 | **/\r | |
2123 | UINT64\r | |
2124 | EFIAPI\r | |
2125 | DivU64x64Remainder (\r | |
2126 | IN UINT64 Dividend,\r | |
2127 | IN UINT64 Divisor,\r | |
2128 | OUT UINT64 *Remainder OPTIONAL\r | |
2129 | );\r | |
2130 | \r | |
2131 | \r | |
2132 | /**\r | |
2133 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2134 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
2135 | \r | |
2136 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
2137 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
2138 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
2139 | function returns the 64-bit signed quotient.\r | |
2140 | \r | |
9aa049d9 | 2141 | It is the caller's responsibility to not call this function with a Divisor of 0.\r |
17f695ed | 2142 | If Divisor is 0, then the quotient and remainder should be assumed to be \r |
2143 | the largest negative integer.\r | |
2144 | \r | |
ac644614 | 2145 | If Divisor is 0, then ASSERT().\r |
2146 | \r | |
2147 | @param Dividend A 64-bit signed value.\r | |
2148 | @param Divisor A 64-bit signed value.\r | |
2149 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
2150 | optional and may be NULL.\r | |
2151 | \r | |
af2dc6a7 | 2152 | @return Dividend / Divisor.\r |
ac644614 | 2153 | \r |
2154 | **/\r | |
2155 | INT64\r | |
2156 | EFIAPI\r | |
2157 | DivS64x64Remainder (\r | |
2158 | IN INT64 Dividend,\r | |
2159 | IN INT64 Divisor,\r | |
2160 | OUT INT64 *Remainder OPTIONAL\r | |
2161 | );\r | |
2162 | \r | |
2163 | \r | |
2164 | /**\r | |
2165 | Reads a 16-bit value from memory that may be unaligned.\r | |
2166 | \r | |
2167 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
2168 | guarantees that the read operation does not produce an alignment fault.\r | |
2169 | \r | |
2170 | If the Buffer is NULL, then ASSERT().\r | |
2171 | \r | |
af2dc6a7 | 2172 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2173 | \r |
5385a579 | 2174 | @return The 16-bit value read from Buffer.\r |
ac644614 | 2175 | \r |
2176 | **/\r | |
2177 | UINT16\r | |
2178 | EFIAPI\r | |
2179 | ReadUnaligned16 (\r | |
5385a579 | 2180 | IN CONST UINT16 *Buffer\r |
ac644614 | 2181 | );\r |
2182 | \r | |
2183 | \r | |
2184 | /**\r | |
2185 | Writes a 16-bit value to memory that may be unaligned.\r | |
2186 | \r | |
2187 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
2188 | returned. The function guarantees that the write operation does not produce\r | |
2189 | an alignment fault.\r | |
2190 | \r | |
2191 | If the Buffer is NULL, then ASSERT().\r | |
2192 | \r | |
af2dc6a7 | 2193 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2194 | @param Value 16-bit value to write to Buffer.\r |
2195 | \r | |
5385a579 | 2196 | @return The 16-bit value to write to Buffer.\r |
ac644614 | 2197 | \r |
2198 | **/\r | |
2199 | UINT16\r | |
2200 | EFIAPI\r | |
2201 | WriteUnaligned16 (\r | |
5385a579 | 2202 | OUT UINT16 *Buffer,\r |
2203 | IN UINT16 Value\r | |
ac644614 | 2204 | );\r |
2205 | \r | |
2206 | \r | |
2207 | /**\r | |
2208 | Reads a 24-bit value from memory that may be unaligned.\r | |
2209 | \r | |
2210 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
2211 | guarantees that the read operation does not produce an alignment fault.\r | |
2212 | \r | |
2213 | If the Buffer is NULL, then ASSERT().\r | |
2214 | \r | |
af2dc6a7 | 2215 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2216 | \r |
5385a579 | 2217 | @return The 24-bit value read from Buffer.\r |
ac644614 | 2218 | \r |
2219 | **/\r | |
2220 | UINT32\r | |
2221 | EFIAPI\r | |
2222 | ReadUnaligned24 (\r | |
5385a579 | 2223 | IN CONST UINT32 *Buffer\r |
ac644614 | 2224 | );\r |
2225 | \r | |
2226 | \r | |
2227 | /**\r | |
2228 | Writes a 24-bit value to memory that may be unaligned.\r | |
2229 | \r | |
2230 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
2231 | returned. The function guarantees that the write operation does not produce\r | |
2232 | an alignment fault.\r | |
2233 | \r | |
2234 | If the Buffer is NULL, then ASSERT().\r | |
2235 | \r | |
af2dc6a7 | 2236 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2237 | @param Value 24-bit value to write to Buffer.\r |
2238 | \r | |
5385a579 | 2239 | @return The 24-bit value to write to Buffer.\r |
ac644614 | 2240 | \r |
2241 | **/\r | |
2242 | UINT32\r | |
2243 | EFIAPI\r | |
2244 | WriteUnaligned24 (\r | |
5385a579 | 2245 | OUT UINT32 *Buffer,\r |
2246 | IN UINT32 Value\r | |
ac644614 | 2247 | );\r |
2248 | \r | |
2249 | \r | |
2250 | /**\r | |
2251 | Reads a 32-bit value from memory that may be unaligned.\r | |
2252 | \r | |
2253 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
2254 | guarantees that the read operation does not produce an alignment fault.\r | |
2255 | \r | |
2256 | If the Buffer is NULL, then ASSERT().\r | |
2257 | \r | |
af2dc6a7 | 2258 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2259 | \r |
5385a579 | 2260 | @return The 32-bit value read from Buffer.\r |
ac644614 | 2261 | \r |
2262 | **/\r | |
2263 | UINT32\r | |
2264 | EFIAPI\r | |
2265 | ReadUnaligned32 (\r | |
5385a579 | 2266 | IN CONST UINT32 *Buffer\r |
ac644614 | 2267 | );\r |
2268 | \r | |
2269 | \r | |
2270 | /**\r | |
2271 | Writes a 32-bit value to memory that may be unaligned.\r | |
2272 | \r | |
2273 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
2274 | returned. The function guarantees that the write operation does not produce\r | |
2275 | an alignment fault.\r | |
2276 | \r | |
2277 | If the Buffer is NULL, then ASSERT().\r | |
2278 | \r | |
af2dc6a7 | 2279 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2280 | @param Value 32-bit value to write to Buffer.\r |
2281 | \r | |
5385a579 | 2282 | @return The 32-bit value to write to Buffer.\r |
ac644614 | 2283 | \r |
2284 | **/\r | |
2285 | UINT32\r | |
2286 | EFIAPI\r | |
2287 | WriteUnaligned32 (\r | |
5385a579 | 2288 | OUT UINT32 *Buffer,\r |
2289 | IN UINT32 Value\r | |
ac644614 | 2290 | );\r |
2291 | \r | |
2292 | \r | |
2293 | /**\r | |
2294 | Reads a 64-bit value from memory that may be unaligned.\r | |
2295 | \r | |
2296 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
2297 | guarantees that the read operation does not produce an alignment fault.\r | |
2298 | \r | |
2299 | If the Buffer is NULL, then ASSERT().\r | |
2300 | \r | |
af2dc6a7 | 2301 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2302 | \r |
5385a579 | 2303 | @return The 64-bit value read from Buffer.\r |
ac644614 | 2304 | \r |
2305 | **/\r | |
2306 | UINT64\r | |
2307 | EFIAPI\r | |
2308 | ReadUnaligned64 (\r | |
5385a579 | 2309 | IN CONST UINT64 *Buffer\r |
ac644614 | 2310 | );\r |
2311 | \r | |
2312 | \r | |
2313 | /**\r | |
2314 | Writes a 64-bit value to memory that may be unaligned.\r | |
2315 | \r | |
2316 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
2317 | returned. The function guarantees that the write operation does not produce\r | |
2318 | an alignment fault.\r | |
2319 | \r | |
2320 | If the Buffer is NULL, then ASSERT().\r | |
2321 | \r | |
af2dc6a7 | 2322 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2323 | @param Value 64-bit value to write to Buffer.\r |
2324 | \r | |
5385a579 | 2325 | @return The 64-bit value to write to Buffer.\r |
ac644614 | 2326 | \r |
2327 | **/\r | |
2328 | UINT64\r | |
2329 | EFIAPI\r | |
2330 | WriteUnaligned64 (\r | |
5385a579 | 2331 | OUT UINT64 *Buffer,\r |
2332 | IN UINT64 Value\r | |
ac644614 | 2333 | );\r |
2334 | \r | |
2335 | \r | |
2336 | //\r | |
2337 | // Bit Field Functions\r | |
2338 | //\r | |
2339 | \r | |
2340 | /**\r | |
2341 | Returns a bit field from an 8-bit value.\r | |
2342 | \r | |
2343 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2344 | \r | |
2345 | If 8-bit operations are not supported, then ASSERT().\r | |
2346 | If StartBit is greater than 7, then ASSERT().\r | |
2347 | If EndBit is greater than 7, then ASSERT().\r | |
2348 | If EndBit is less than StartBit, then ASSERT().\r | |
2349 | \r | |
2350 | @param Operand Operand on which to perform the bitfield operation.\r | |
2351 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2352 | Range 0..7.\r | |
2353 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2354 | Range 0..7.\r | |
2355 | \r | |
2356 | @return The bit field read.\r | |
2357 | \r | |
2358 | **/\r | |
2359 | UINT8\r | |
2360 | EFIAPI\r | |
2361 | BitFieldRead8 (\r | |
2362 | IN UINT8 Operand,\r | |
2363 | IN UINTN StartBit,\r | |
2364 | IN UINTN EndBit\r | |
2365 | );\r | |
2366 | \r | |
2367 | \r | |
2368 | /**\r | |
2369 | Writes a bit field to an 8-bit value, and returns the result.\r | |
2370 | \r | |
2371 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2372 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
2373 | returned.\r | |
2374 | \r | |
2375 | If 8-bit operations are not supported, then ASSERT().\r | |
2376 | If StartBit is greater than 7, then ASSERT().\r | |
2377 | If EndBit is greater than 7, then ASSERT().\r | |
2378 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2379 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2380 | \r |
2381 | @param Operand Operand on which to perform the bitfield operation.\r | |
2382 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2383 | Range 0..7.\r | |
2384 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2385 | Range 0..7.\r | |
2386 | @param Value New value of the bit field.\r | |
2387 | \r | |
2388 | @return The new 8-bit value.\r | |
2389 | \r | |
2390 | **/\r | |
2391 | UINT8\r | |
2392 | EFIAPI\r | |
2393 | BitFieldWrite8 (\r | |
2394 | IN UINT8 Operand,\r | |
2395 | IN UINTN StartBit,\r | |
2396 | IN UINTN EndBit,\r | |
2397 | IN UINT8 Value\r | |
2398 | );\r | |
2399 | \r | |
2400 | \r | |
2401 | /**\r | |
2402 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
2403 | result.\r | |
2404 | \r | |
62991af2 | 2405 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2406 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2407 | Operand are preserved. The new 8-bit value is returned.\r | |
2408 | \r | |
2409 | If 8-bit operations are not supported, then ASSERT().\r | |
2410 | If StartBit is greater than 7, then ASSERT().\r | |
2411 | If EndBit is greater than 7, then ASSERT().\r | |
2412 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2413 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2414 | \r |
2415 | @param Operand Operand on which to perform the bitfield operation.\r | |
2416 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2417 | Range 0..7.\r | |
2418 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2419 | Range 0..7.\r | |
2420 | @param OrData The value to OR with the read value from the value\r | |
2421 | \r | |
2422 | @return The new 8-bit value.\r | |
2423 | \r | |
2424 | **/\r | |
2425 | UINT8\r | |
2426 | EFIAPI\r | |
2427 | BitFieldOr8 (\r | |
2428 | IN UINT8 Operand,\r | |
2429 | IN UINTN StartBit,\r | |
2430 | IN UINTN EndBit,\r | |
2431 | IN UINT8 OrData\r | |
2432 | );\r | |
2433 | \r | |
2434 | \r | |
2435 | /**\r | |
2436 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
2437 | the result.\r | |
2438 | \r | |
2439 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2440 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2441 | preserved. The new 8-bit value is returned.\r | |
2442 | \r | |
2443 | If 8-bit operations are not supported, then ASSERT().\r | |
2444 | If StartBit is greater than 7, then ASSERT().\r | |
2445 | If EndBit is greater than 7, then ASSERT().\r | |
2446 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2447 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2448 | \r |
2449 | @param Operand Operand on which to perform the bitfield operation.\r | |
2450 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2451 | Range 0..7.\r | |
2452 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2453 | Range 0..7.\r | |
2454 | @param AndData The value to AND with the read value from the value.\r | |
2455 | \r | |
2456 | @return The new 8-bit value.\r | |
2457 | \r | |
2458 | **/\r | |
2459 | UINT8\r | |
2460 | EFIAPI\r | |
2461 | BitFieldAnd8 (\r | |
2462 | IN UINT8 Operand,\r | |
2463 | IN UINTN StartBit,\r | |
2464 | IN UINTN EndBit,\r | |
2465 | IN UINT8 AndData\r | |
2466 | );\r | |
2467 | \r | |
2468 | \r | |
2469 | /**\r | |
2470 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
2471 | bitwise OR, and returns the result.\r | |
2472 | \r | |
2473 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2474 | in Operand and the value specified by AndData, followed by a bitwise \r |
2475 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2476 | preserved. The new 8-bit value is returned.\r |
2477 | \r | |
2478 | If 8-bit operations are not supported, then ASSERT().\r | |
2479 | If StartBit is greater than 7, then ASSERT().\r | |
2480 | If EndBit is greater than 7, then ASSERT().\r | |
2481 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
2482 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
2483 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 2484 | \r |
2485 | @param Operand Operand on which to perform the bitfield operation.\r | |
2486 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2487 | Range 0..7.\r | |
2488 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2489 | Range 0..7.\r | |
2490 | @param AndData The value to AND with the read value from the value.\r | |
2491 | @param OrData The value to OR with the result of the AND operation.\r | |
2492 | \r | |
2493 | @return The new 8-bit value.\r | |
2494 | \r | |
2495 | **/\r | |
2496 | UINT8\r | |
2497 | EFIAPI\r | |
2498 | BitFieldAndThenOr8 (\r | |
2499 | IN UINT8 Operand,\r | |
2500 | IN UINTN StartBit,\r | |
2501 | IN UINTN EndBit,\r | |
2502 | IN UINT8 AndData,\r | |
2503 | IN UINT8 OrData\r | |
2504 | );\r | |
2505 | \r | |
2506 | \r | |
2507 | /**\r | |
2508 | Returns a bit field from a 16-bit value.\r | |
2509 | \r | |
2510 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2511 | \r | |
2512 | If 16-bit operations are not supported, then ASSERT().\r | |
2513 | If StartBit is greater than 15, then ASSERT().\r | |
2514 | If EndBit is greater than 15, then ASSERT().\r | |
2515 | If EndBit is less than StartBit, then ASSERT().\r | |
2516 | \r | |
2517 | @param Operand Operand on which to perform the bitfield operation.\r | |
2518 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2519 | Range 0..15.\r | |
2520 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2521 | Range 0..15.\r | |
2522 | \r | |
2523 | @return The bit field read.\r | |
2524 | \r | |
2525 | **/\r | |
2526 | UINT16\r | |
2527 | EFIAPI\r | |
2528 | BitFieldRead16 (\r | |
2529 | IN UINT16 Operand,\r | |
2530 | IN UINTN StartBit,\r | |
2531 | IN UINTN EndBit\r | |
2532 | );\r | |
2533 | \r | |
2534 | \r | |
2535 | /**\r | |
2536 | Writes a bit field to a 16-bit value, and returns the result.\r | |
2537 | \r | |
2538 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2539 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
2540 | returned.\r | |
2541 | \r | |
2542 | If 16-bit operations are not supported, then ASSERT().\r | |
2543 | If StartBit is greater than 15, then ASSERT().\r | |
2544 | If EndBit is greater than 15, then ASSERT().\r | |
2545 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2546 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2547 | \r |
2548 | @param Operand Operand on which to perform the bitfield operation.\r | |
2549 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2550 | Range 0..15.\r | |
2551 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2552 | Range 0..15.\r | |
2553 | @param Value New value of the bit field.\r | |
2554 | \r | |
2555 | @return The new 16-bit value.\r | |
2556 | \r | |
2557 | **/\r | |
2558 | UINT16\r | |
2559 | EFIAPI\r | |
2560 | BitFieldWrite16 (\r | |
2561 | IN UINT16 Operand,\r | |
2562 | IN UINTN StartBit,\r | |
2563 | IN UINTN EndBit,\r | |
2564 | IN UINT16 Value\r | |
2565 | );\r | |
2566 | \r | |
2567 | \r | |
2568 | /**\r | |
2569 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
2570 | result.\r | |
2571 | \r | |
62991af2 | 2572 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2573 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2574 | Operand are preserved. The new 16-bit value is returned.\r | |
2575 | \r | |
2576 | If 16-bit operations are not supported, then ASSERT().\r | |
2577 | If StartBit is greater than 15, then ASSERT().\r | |
2578 | If EndBit is greater than 15, then ASSERT().\r | |
2579 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2580 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2581 | \r |
2582 | @param Operand Operand on which to perform the bitfield operation.\r | |
2583 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2584 | Range 0..15.\r | |
2585 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2586 | Range 0..15.\r | |
2587 | @param OrData The value to OR with the read value from the value\r | |
2588 | \r | |
2589 | @return The new 16-bit value.\r | |
2590 | \r | |
2591 | **/\r | |
2592 | UINT16\r | |
2593 | EFIAPI\r | |
2594 | BitFieldOr16 (\r | |
2595 | IN UINT16 Operand,\r | |
2596 | IN UINTN StartBit,\r | |
2597 | IN UINTN EndBit,\r | |
2598 | IN UINT16 OrData\r | |
2599 | );\r | |
2600 | \r | |
2601 | \r | |
2602 | /**\r | |
2603 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
2604 | the result.\r | |
2605 | \r | |
2606 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2607 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2608 | preserved. The new 16-bit value is returned.\r | |
2609 | \r | |
2610 | If 16-bit operations are not supported, then ASSERT().\r | |
2611 | If StartBit is greater than 15, then ASSERT().\r | |
2612 | If EndBit is greater than 15, then ASSERT().\r | |
2613 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2614 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2615 | \r |
2616 | @param Operand Operand on which to perform the bitfield operation.\r | |
2617 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2618 | Range 0..15.\r | |
2619 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2620 | Range 0..15.\r | |
2621 | @param AndData The value to AND with the read value from the value\r | |
2622 | \r | |
2623 | @return The new 16-bit value.\r | |
2624 | \r | |
2625 | **/\r | |
2626 | UINT16\r | |
2627 | EFIAPI\r | |
2628 | BitFieldAnd16 (\r | |
2629 | IN UINT16 Operand,\r | |
2630 | IN UINTN StartBit,\r | |
2631 | IN UINTN EndBit,\r | |
2632 | IN UINT16 AndData\r | |
2633 | );\r | |
2634 | \r | |
2635 | \r | |
2636 | /**\r | |
2637 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
2638 | bitwise OR, and returns the result.\r | |
2639 | \r | |
2640 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2641 | in Operand and the value specified by AndData, followed by a bitwise \r |
2642 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2643 | preserved. The new 16-bit value is returned.\r |
2644 | \r | |
2645 | If 16-bit operations are not supported, then ASSERT().\r | |
2646 | If StartBit is greater than 15, then ASSERT().\r | |
2647 | If EndBit is greater than 15, then ASSERT().\r | |
2648 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
2649 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
2650 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 2651 | \r |
2652 | @param Operand Operand on which to perform the bitfield operation.\r | |
2653 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2654 | Range 0..15.\r | |
2655 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2656 | Range 0..15.\r | |
2657 | @param AndData The value to AND with the read value from the value.\r | |
2658 | @param OrData The value to OR with the result of the AND operation.\r | |
2659 | \r | |
2660 | @return The new 16-bit value.\r | |
2661 | \r | |
2662 | **/\r | |
2663 | UINT16\r | |
2664 | EFIAPI\r | |
2665 | BitFieldAndThenOr16 (\r | |
2666 | IN UINT16 Operand,\r | |
2667 | IN UINTN StartBit,\r | |
2668 | IN UINTN EndBit,\r | |
2669 | IN UINT16 AndData,\r | |
2670 | IN UINT16 OrData\r | |
2671 | );\r | |
2672 | \r | |
2673 | \r | |
2674 | /**\r | |
2675 | Returns a bit field from a 32-bit value.\r | |
2676 | \r | |
2677 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2678 | \r | |
2679 | If 32-bit operations are not supported, then ASSERT().\r | |
2680 | If StartBit is greater than 31, then ASSERT().\r | |
2681 | If EndBit is greater than 31, then ASSERT().\r | |
2682 | If EndBit is less than StartBit, then ASSERT().\r | |
2683 | \r | |
2684 | @param Operand Operand on which to perform the bitfield operation.\r | |
2685 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2686 | Range 0..31.\r | |
2687 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2688 | Range 0..31.\r | |
2689 | \r | |
2690 | @return The bit field read.\r | |
2691 | \r | |
2692 | **/\r | |
2693 | UINT32\r | |
2694 | EFIAPI\r | |
2695 | BitFieldRead32 (\r | |
2696 | IN UINT32 Operand,\r | |
2697 | IN UINTN StartBit,\r | |
2698 | IN UINTN EndBit\r | |
2699 | );\r | |
2700 | \r | |
2701 | \r | |
2702 | /**\r | |
2703 | Writes a bit field to a 32-bit value, and returns the result.\r | |
2704 | \r | |
2705 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2706 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
2707 | returned.\r | |
2708 | \r | |
2709 | If 32-bit operations are not supported, then ASSERT().\r | |
2710 | If StartBit is greater than 31, then ASSERT().\r | |
2711 | If EndBit is greater than 31, then ASSERT().\r | |
2712 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2713 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2714 | \r |
2715 | @param Operand Operand on which to perform the bitfield operation.\r | |
2716 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2717 | Range 0..31.\r | |
2718 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2719 | Range 0..31.\r | |
2720 | @param Value New value of the bit field.\r | |
2721 | \r | |
2722 | @return The new 32-bit value.\r | |
2723 | \r | |
2724 | **/\r | |
2725 | UINT32\r | |
2726 | EFIAPI\r | |
2727 | BitFieldWrite32 (\r | |
2728 | IN UINT32 Operand,\r | |
2729 | IN UINTN StartBit,\r | |
2730 | IN UINTN EndBit,\r | |
2731 | IN UINT32 Value\r | |
2732 | );\r | |
2733 | \r | |
2734 | \r | |
2735 | /**\r | |
2736 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
2737 | result.\r | |
2738 | \r | |
62991af2 | 2739 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2740 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2741 | Operand are preserved. The new 32-bit value is returned.\r | |
2742 | \r | |
2743 | If 32-bit operations are not supported, then ASSERT().\r | |
2744 | If StartBit is greater than 31, then ASSERT().\r | |
2745 | If EndBit is greater than 31, then ASSERT().\r | |
2746 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2747 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2748 | \r |
2749 | @param Operand Operand on which to perform the bitfield operation.\r | |
2750 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2751 | Range 0..31.\r | |
2752 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2753 | Range 0..31.\r | |
af2dc6a7 | 2754 | @param OrData The value to OR with the read value from the value.\r |
ac644614 | 2755 | \r |
2756 | @return The new 32-bit value.\r | |
2757 | \r | |
2758 | **/\r | |
2759 | UINT32\r | |
2760 | EFIAPI\r | |
2761 | BitFieldOr32 (\r | |
2762 | IN UINT32 Operand,\r | |
2763 | IN UINTN StartBit,\r | |
2764 | IN UINTN EndBit,\r | |
2765 | IN UINT32 OrData\r | |
2766 | );\r | |
2767 | \r | |
2768 | \r | |
2769 | /**\r | |
2770 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
2771 | the result.\r | |
2772 | \r | |
2773 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2774 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2775 | preserved. The new 32-bit value is returned.\r | |
2776 | \r | |
2777 | If 32-bit operations are not supported, then ASSERT().\r | |
2778 | If StartBit is greater than 31, then ASSERT().\r | |
2779 | If EndBit is greater than 31, then ASSERT().\r | |
2780 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2781 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2782 | \r |
2783 | @param Operand Operand on which to perform the bitfield operation.\r | |
2784 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2785 | Range 0..31.\r | |
2786 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2787 | Range 0..31.\r | |
2788 | @param AndData The value to AND with the read value from the value\r | |
2789 | \r | |
2790 | @return The new 32-bit value.\r | |
2791 | \r | |
2792 | **/\r | |
2793 | UINT32\r | |
2794 | EFIAPI\r | |
2795 | BitFieldAnd32 (\r | |
2796 | IN UINT32 Operand,\r | |
2797 | IN UINTN StartBit,\r | |
2798 | IN UINTN EndBit,\r | |
2799 | IN UINT32 AndData\r | |
2800 | );\r | |
2801 | \r | |
2802 | \r | |
2803 | /**\r | |
2804 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
2805 | bitwise OR, and returns the result.\r | |
2806 | \r | |
2807 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2808 | in Operand and the value specified by AndData, followed by a bitwise \r |
2809 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2810 | preserved. The new 32-bit value is returned.\r |
2811 | \r | |
2812 | If 32-bit operations are not supported, then ASSERT().\r | |
2813 | If StartBit is greater than 31, then ASSERT().\r | |
2814 | If EndBit is greater than 31, then ASSERT().\r | |
2815 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
2816 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
2817 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 2818 | \r |
2819 | @param Operand Operand on which to perform the bitfield operation.\r | |
2820 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2821 | Range 0..31.\r | |
2822 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2823 | Range 0..31.\r | |
2824 | @param AndData The value to AND with the read value from the value.\r | |
2825 | @param OrData The value to OR with the result of the AND operation.\r | |
2826 | \r | |
2827 | @return The new 32-bit value.\r | |
2828 | \r | |
2829 | **/\r | |
2830 | UINT32\r | |
2831 | EFIAPI\r | |
2832 | BitFieldAndThenOr32 (\r | |
2833 | IN UINT32 Operand,\r | |
2834 | IN UINTN StartBit,\r | |
2835 | IN UINTN EndBit,\r | |
2836 | IN UINT32 AndData,\r | |
2837 | IN UINT32 OrData\r | |
2838 | );\r | |
2839 | \r | |
2840 | \r | |
2841 | /**\r | |
2842 | Returns a bit field from a 64-bit value.\r | |
2843 | \r | |
2844 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2845 | \r | |
2846 | If 64-bit operations are not supported, then ASSERT().\r | |
2847 | If StartBit is greater than 63, then ASSERT().\r | |
2848 | If EndBit is greater than 63, then ASSERT().\r | |
2849 | If EndBit is less than StartBit, then ASSERT().\r | |
2850 | \r | |
2851 | @param Operand Operand on which to perform the bitfield operation.\r | |
2852 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2853 | Range 0..63.\r | |
2854 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2855 | Range 0..63.\r | |
2856 | \r | |
2857 | @return The bit field read.\r | |
2858 | \r | |
2859 | **/\r | |
2860 | UINT64\r | |
2861 | EFIAPI\r | |
2862 | BitFieldRead64 (\r | |
2863 | IN UINT64 Operand,\r | |
2864 | IN UINTN StartBit,\r | |
2865 | IN UINTN EndBit\r | |
2866 | );\r | |
2867 | \r | |
2868 | \r | |
2869 | /**\r | |
2870 | Writes a bit field to a 64-bit value, and returns the result.\r | |
2871 | \r | |
2872 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2873 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
2874 | returned.\r | |
2875 | \r | |
2876 | If 64-bit operations are not supported, then ASSERT().\r | |
2877 | If StartBit is greater than 63, then ASSERT().\r | |
2878 | If EndBit is greater than 63, then ASSERT().\r | |
2879 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2880 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2881 | \r |
2882 | @param Operand Operand on which to perform the bitfield operation.\r | |
2883 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2884 | Range 0..63.\r | |
2885 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2886 | Range 0..63.\r | |
2887 | @param Value New value of the bit field.\r | |
2888 | \r | |
2889 | @return The new 64-bit value.\r | |
2890 | \r | |
2891 | **/\r | |
2892 | UINT64\r | |
2893 | EFIAPI\r | |
2894 | BitFieldWrite64 (\r | |
2895 | IN UINT64 Operand,\r | |
2896 | IN UINTN StartBit,\r | |
2897 | IN UINTN EndBit,\r | |
2898 | IN UINT64 Value\r | |
2899 | );\r | |
2900 | \r | |
2901 | \r | |
2902 | /**\r | |
2903 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
2904 | result.\r | |
2905 | \r | |
62991af2 | 2906 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2907 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2908 | Operand are preserved. The new 64-bit value is returned.\r | |
2909 | \r | |
2910 | If 64-bit operations are not supported, then ASSERT().\r | |
2911 | If StartBit is greater than 63, then ASSERT().\r | |
2912 | If EndBit is greater than 63, then ASSERT().\r | |
2913 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2914 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2915 | \r |
2916 | @param Operand Operand on which to perform the bitfield operation.\r | |
2917 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2918 | Range 0..63.\r | |
2919 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2920 | Range 0..63.\r | |
2921 | @param OrData The value to OR with the read value from the value\r | |
2922 | \r | |
2923 | @return The new 64-bit value.\r | |
2924 | \r | |
2925 | **/\r | |
2926 | UINT64\r | |
2927 | EFIAPI\r | |
2928 | BitFieldOr64 (\r | |
2929 | IN UINT64 Operand,\r | |
2930 | IN UINTN StartBit,\r | |
2931 | IN UINTN EndBit,\r | |
2932 | IN UINT64 OrData\r | |
2933 | );\r | |
2934 | \r | |
2935 | \r | |
2936 | /**\r | |
2937 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
2938 | the result.\r | |
2939 | \r | |
2940 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2941 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2942 | preserved. The new 64-bit value is returned.\r | |
2943 | \r | |
2944 | If 64-bit operations are not supported, then ASSERT().\r | |
2945 | If StartBit is greater than 63, then ASSERT().\r | |
2946 | If EndBit is greater than 63, then ASSERT().\r | |
2947 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2948 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2949 | \r |
2950 | @param Operand Operand on which to perform the bitfield operation.\r | |
2951 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2952 | Range 0..63.\r | |
2953 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2954 | Range 0..63.\r | |
2955 | @param AndData The value to AND with the read value from the value\r | |
2956 | \r | |
2957 | @return The new 64-bit value.\r | |
2958 | \r | |
2959 | **/\r | |
2960 | UINT64\r | |
2961 | EFIAPI\r | |
2962 | BitFieldAnd64 (\r | |
2963 | IN UINT64 Operand,\r | |
2964 | IN UINTN StartBit,\r | |
2965 | IN UINTN EndBit,\r | |
2966 | IN UINT64 AndData\r | |
2967 | );\r | |
2968 | \r | |
2969 | \r | |
2970 | /**\r | |
2971 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
2972 | bitwise OR, and returns the result.\r | |
2973 | \r | |
2974 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2975 | in Operand and the value specified by AndData, followed by a bitwise \r |
2976 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2977 | preserved. The new 64-bit value is returned.\r |
2978 | \r | |
2979 | If 64-bit operations are not supported, then ASSERT().\r | |
2980 | If StartBit is greater than 63, then ASSERT().\r | |
2981 | If EndBit is greater than 63, then ASSERT().\r | |
2982 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
2983 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
2984 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 2985 | \r |
2986 | @param Operand Operand on which to perform the bitfield operation.\r | |
2987 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2988 | Range 0..63.\r | |
2989 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2990 | Range 0..63.\r | |
2991 | @param AndData The value to AND with the read value from the value.\r | |
2992 | @param OrData The value to OR with the result of the AND operation.\r | |
2993 | \r | |
2994 | @return The new 64-bit value.\r | |
2995 | \r | |
2996 | **/\r | |
2997 | UINT64\r | |
2998 | EFIAPI\r | |
2999 | BitFieldAndThenOr64 (\r | |
3000 | IN UINT64 Operand,\r | |
3001 | IN UINTN StartBit,\r | |
3002 | IN UINTN EndBit,\r | |
3003 | IN UINT64 AndData,\r | |
3004 | IN UINT64 OrData\r | |
3005 | );\r | |
3006 | \r | |
ac644614 | 3007 | //\r |
3008 | // Base Library Checksum Functions\r | |
3009 | //\r | |
3010 | \r | |
3011 | /**\r | |
17f695ed | 3012 | Returns the sum of all elements in a buffer in unit of UINT8.\r |
ac644614 | 3013 | During calculation, the carry bits are dropped.\r |
3014 | \r | |
3015 | This function calculates the sum of all elements in a buffer\r | |
3016 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
3017 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
3018 | returned.\r | |
3019 | \r | |
3020 | If Buffer is NULL, then ASSERT().\r | |
3021 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3022 | \r | |
af2dc6a7 | 3023 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
17f695ed | 3024 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3025 | \r |
3026 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3027 | \r | |
3028 | **/\r | |
3029 | UINT8\r | |
3030 | EFIAPI\r | |
3031 | CalculateSum8 (\r | |
ee6c452c | 3032 | IN CONST UINT8 *Buffer,\r |
3033 | IN UINTN Length\r | |
ac644614 | 3034 | );\r |
3035 | \r | |
3036 | \r | |
3037 | /**\r | |
3038 | Returns the two's complement checksum of all elements in a buffer\r | |
3039 | of 8-bit values.\r | |
3040 | \r | |
3041 | This function first calculates the sum of the 8-bit values in the\r | |
3042 | buffer specified by Buffer and Length. The carry bits in the result\r | |
3043 | of addition are dropped. Then, the two's complement of the sum is\r | |
3044 | returned. If Length is 0, then 0 is returned.\r | |
3045 | \r | |
3046 | If Buffer is NULL, then ASSERT().\r | |
3047 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3048 | \r | |
af2dc6a7 | 3049 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3050 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3051 | \r |
af2dc6a7 | 3052 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3053 | \r |
3054 | **/\r | |
3055 | UINT8\r | |
3056 | EFIAPI\r | |
3057 | CalculateCheckSum8 (\r | |
ee6c452c | 3058 | IN CONST UINT8 *Buffer,\r |
3059 | IN UINTN Length\r | |
ac644614 | 3060 | );\r |
3061 | \r | |
3062 | \r | |
3063 | /**\r | |
3064 | Returns the sum of all elements in a buffer of 16-bit values. During\r | |
3065 | calculation, the carry bits are dropped.\r | |
3066 | \r | |
3067 | This function calculates the sum of the 16-bit values in the buffer\r | |
3068 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3069 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
3070 | \r | |
3071 | If Buffer is NULL, then ASSERT().\r | |
3072 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3073 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3074 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3075 | \r | |
af2dc6a7 | 3076 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3077 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3078 | \r |
3079 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3080 | \r | |
3081 | **/\r | |
3082 | UINT16\r | |
3083 | EFIAPI\r | |
3084 | CalculateSum16 (\r | |
ee6c452c | 3085 | IN CONST UINT16 *Buffer,\r |
3086 | IN UINTN Length\r | |
ac644614 | 3087 | );\r |
3088 | \r | |
3089 | \r | |
3090 | /**\r | |
3091 | Returns the two's complement checksum of all elements in a buffer of\r | |
3092 | 16-bit values.\r | |
3093 | \r | |
3094 | This function first calculates the sum of the 16-bit values in the buffer\r | |
3095 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3096 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3097 | is 0, then 0 is returned.\r | |
3098 | \r | |
3099 | If Buffer is NULL, then ASSERT().\r | |
3100 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3101 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3102 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3103 | \r | |
af2dc6a7 | 3104 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3105 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3106 | \r |
af2dc6a7 | 3107 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3108 | \r |
3109 | **/\r | |
3110 | UINT16\r | |
3111 | EFIAPI\r | |
3112 | CalculateCheckSum16 (\r | |
ee6c452c | 3113 | IN CONST UINT16 *Buffer,\r |
3114 | IN UINTN Length\r | |
ac644614 | 3115 | );\r |
3116 | \r | |
3117 | \r | |
3118 | /**\r | |
17f695ed | 3119 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
ac644614 | 3120 | calculation, the carry bits are dropped.\r |
3121 | \r | |
3122 | This function calculates the sum of the 32-bit values in the buffer\r | |
3123 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
17f695ed | 3124 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r |
ac644614 | 3125 | \r |
3126 | If Buffer is NULL, then ASSERT().\r | |
3127 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3128 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3129 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3130 | \r | |
af2dc6a7 | 3131 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3132 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3133 | \r |
3134 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3135 | \r | |
3136 | **/\r | |
3137 | UINT32\r | |
3138 | EFIAPI\r | |
3139 | CalculateSum32 (\r | |
ee6c452c | 3140 | IN CONST UINT32 *Buffer,\r |
3141 | IN UINTN Length\r | |
ac644614 | 3142 | );\r |
3143 | \r | |
3144 | \r | |
3145 | /**\r | |
3146 | Returns the two's complement checksum of all elements in a buffer of\r | |
3147 | 32-bit values.\r | |
3148 | \r | |
3149 | This function first calculates the sum of the 32-bit values in the buffer\r | |
3150 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3151 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3152 | is 0, then 0 is returned.\r | |
3153 | \r | |
3154 | If Buffer is NULL, then ASSERT().\r | |
3155 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3156 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3157 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3158 | \r | |
af2dc6a7 | 3159 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3160 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3161 | \r |
af2dc6a7 | 3162 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3163 | \r |
3164 | **/\r | |
3165 | UINT32\r | |
3166 | EFIAPI\r | |
3167 | CalculateCheckSum32 (\r | |
ee6c452c | 3168 | IN CONST UINT32 *Buffer,\r |
3169 | IN UINTN Length\r | |
ac644614 | 3170 | );\r |
3171 | \r | |
3172 | \r | |
3173 | /**\r | |
3174 | Returns the sum of all elements in a buffer of 64-bit values. During\r | |
3175 | calculation, the carry bits are dropped.\r | |
3176 | \r | |
3177 | This function calculates the sum of the 64-bit values in the buffer\r | |
3178 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3179 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
3180 | \r | |
3181 | If Buffer is NULL, then ASSERT().\r | |
3182 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3183 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3184 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3185 | \r | |
af2dc6a7 | 3186 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3187 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3188 | \r |
3189 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3190 | \r | |
3191 | **/\r | |
3192 | UINT64\r | |
3193 | EFIAPI\r | |
3194 | CalculateSum64 (\r | |
ee6c452c | 3195 | IN CONST UINT64 *Buffer,\r |
3196 | IN UINTN Length\r | |
ac644614 | 3197 | );\r |
3198 | \r | |
3199 | \r | |
3200 | /**\r | |
3201 | Returns the two's complement checksum of all elements in a buffer of\r | |
3202 | 64-bit values.\r | |
3203 | \r | |
3204 | This function first calculates the sum of the 64-bit values in the buffer\r | |
3205 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3206 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3207 | is 0, then 0 is returned.\r | |
3208 | \r | |
3209 | If Buffer is NULL, then ASSERT().\r | |
3210 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3211 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3212 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3213 | \r | |
af2dc6a7 | 3214 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3215 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3216 | \r |
af2dc6a7 | 3217 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3218 | \r |
3219 | **/\r | |
3220 | UINT64\r | |
3221 | EFIAPI\r | |
3222 | CalculateCheckSum64 (\r | |
ee6c452c | 3223 | IN CONST UINT64 *Buffer,\r |
3224 | IN UINTN Length\r | |
ac644614 | 3225 | );\r |
3226 | \r | |
3227 | \r | |
d75f9fc2 | 3228 | //\r |
3229 | // Base Library CPU Functions\r | |
3230 | //\r | |
3231 | \r | |
3232 | /**\r | |
3233 | Function entry point used when a stack switch is requested with SwitchStack()\r | |
3234 | \r | |
3235 | @param Context1 Context1 parameter passed into SwitchStack().\r | |
3236 | @param Context2 Context2 parameter passed into SwitchStack().\r | |
3237 | \r | |
3238 | **/\r | |
ac644614 | 3239 | typedef\r |
3240 | VOID\r | |
9810cdd8 | 3241 | (EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r |
ac644614 | 3242 | IN VOID *Context1, OPTIONAL\r |
3243 | IN VOID *Context2 OPTIONAL\r | |
3244 | );\r | |
3245 | \r | |
3246 | \r | |
3247 | /**\r | |
3248 | Used to serialize load and store operations.\r | |
3249 | \r | |
3250 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
3251 | globally visible when this function returns.\r | |
3252 | \r | |
3253 | **/\r | |
3254 | VOID\r | |
3255 | EFIAPI\r | |
3256 | MemoryFence (\r | |
3257 | VOID\r | |
3258 | );\r | |
3259 | \r | |
3260 | \r | |
3261 | /**\r | |
3262 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
3263 | and returns 0.\r | |
3264 | \r | |
3265 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
3266 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
3267 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
3268 | \r | |
3269 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3270 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
17f695ed | 3271 | \r |
3272 | NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r | |
3273 | The same structure must never be used for more than one CPU architecture context.\r | |
3274 | For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r | |
3275 | SetJump()/LongJump() is not currently supported for the EBC processor type. \r | |
ac644614 | 3276 | \r |
3277 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3278 | \r | |
3279 | @retval 0 Indicates a return from SetJump().\r | |
3280 | \r | |
3281 | **/\r | |
3282 | UINTN\r | |
3283 | EFIAPI\r | |
3284 | SetJump (\r | |
3285 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
3286 | );\r | |
3287 | \r | |
3288 | \r | |
3289 | /**\r | |
3290 | Restores the CPU context that was saved with SetJump().\r | |
3291 | \r | |
3292 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
3293 | function never returns to the caller. Instead is resumes execution based on\r | |
3294 | the state of JumpBuffer.\r | |
3295 | \r | |
3296 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3297 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
ac644614 | 3298 | If Value is 0, then ASSERT().\r |
3299 | \r | |
3300 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3301 | @param Value The value to return when the SetJump() context is\r | |
3302 | restored and must be non-zero.\r | |
3303 | \r | |
3304 | **/\r | |
3305 | VOID\r | |
3306 | EFIAPI\r | |
3307 | LongJump (\r | |
3308 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
3309 | IN UINTN Value\r | |
3310 | );\r | |
3311 | \r | |
3312 | \r | |
3313 | /**\r | |
3314 | Enables CPU interrupts.\r | |
3315 | \r | |
ac644614 | 3316 | **/\r |
3317 | VOID\r | |
3318 | EFIAPI\r | |
3319 | EnableInterrupts (\r | |
3320 | VOID\r | |
3321 | );\r | |
3322 | \r | |
3323 | \r | |
3324 | /**\r | |
3325 | Disables CPU interrupts.\r | |
3326 | \r | |
ac644614 | 3327 | **/\r |
3328 | VOID\r | |
3329 | EFIAPI\r | |
3330 | DisableInterrupts (\r | |
3331 | VOID\r | |
3332 | );\r | |
3333 | \r | |
3334 | \r | |
3335 | /**\r | |
3336 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3337 | operation.\r | |
3338 | \r | |
ac644614 | 3339 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
3340 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
3341 | \r | |
3342 | **/\r | |
3343 | BOOLEAN\r | |
3344 | EFIAPI\r | |
3345 | SaveAndDisableInterrupts (\r | |
3346 | VOID\r | |
3347 | );\r | |
3348 | \r | |
3349 | \r | |
3350 | /**\r | |
3351 | Enables CPU interrupts for the smallest window required to capture any\r | |
3352 | pending interrupts.\r | |
3353 | \r | |
ac644614 | 3354 | **/\r |
3355 | VOID\r | |
3356 | EFIAPI\r | |
3357 | EnableDisableInterrupts (\r | |
3358 | VOID\r | |
3359 | );\r | |
3360 | \r | |
3361 | \r | |
3362 | /**\r | |
3363 | Retrieves the current CPU interrupt state.\r | |
3364 | \r | |
af2dc6a7 | 3365 | Returns TRUE if interrupts are currently enabled. Otherwise\r |
38bbd3d9 | 3366 | returns FALSE.\r |
ac644614 | 3367 | \r |
3368 | @retval TRUE CPU interrupts are enabled.\r | |
3369 | @retval FALSE CPU interrupts are disabled.\r | |
3370 | \r | |
3371 | **/\r | |
3372 | BOOLEAN\r | |
3373 | EFIAPI\r | |
3374 | GetInterruptState (\r | |
3375 | VOID\r | |
3376 | );\r | |
3377 | \r | |
3378 | \r | |
3379 | /**\r | |
3380 | Set the current CPU interrupt state.\r | |
3381 | \r | |
3382 | Sets the current CPU interrupt state to the state specified by\r | |
3383 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
3384 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
3385 | returned.\r | |
3386 | \r | |
3387 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
3388 | interrupts should be disabled.\r | |
3389 | \r | |
3390 | @return InterruptState\r | |
3391 | \r | |
3392 | **/\r | |
3393 | BOOLEAN\r | |
3394 | EFIAPI\r | |
3395 | SetInterruptState (\r | |
3396 | IN BOOLEAN InterruptState\r | |
3397 | );\r | |
3398 | \r | |
3399 | \r | |
3400 | /**\r | |
3401 | Requests CPU to pause for a short period of time.\r | |
3402 | \r | |
3403 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
3404 | systems to prevent memory starvation while waiting for a spin lock.\r | |
3405 | \r | |
3406 | **/\r | |
3407 | VOID\r | |
3408 | EFIAPI\r | |
3409 | CpuPause (\r | |
3410 | VOID\r | |
3411 | );\r | |
3412 | \r | |
3413 | \r | |
3414 | /**\r | |
3415 | Transfers control to a function starting with a new stack.\r | |
3416 | \r | |
3417 | Transfers control to the function specified by EntryPoint using the\r | |
3418 | new stack specified by NewStack and passing in the parameters specified\r | |
3419 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
3420 | be NULL. The function EntryPoint must never return. This function\r | |
3421 | supports a variable number of arguments following the NewStack parameter.\r | |
1a2f870c | 3422 | These additional arguments are ignored on IA-32, x64, and EBC architectures.\r |
3423 | Itanium processors expect one additional parameter of type VOID * that specifies\r | |
ac644614 | 3424 | the new backing store pointer.\r |
3425 | \r | |
3426 | If EntryPoint is NULL, then ASSERT().\r | |
3427 | If NewStack is NULL, then ASSERT().\r | |
3428 | \r | |
3429 | @param EntryPoint A pointer to function to call with the new stack.\r | |
3430 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
3431 | function.\r | |
3432 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
3433 | function.\r | |
3434 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
3435 | function.\r | |
af2dc6a7 | 3436 | @param ... This variable argument list is ignored for IA-32, x64, and \r |
3437 | EBC architectures. For Itanium processors, this variable \r | |
3438 | argument list is expected to contain a single parameter of \r | |
3439 | type VOID * that specifies the new backing store pointer.\r | |
42eedea9 | 3440 | \r |
ac644614 | 3441 | \r |
3442 | **/\r | |
3443 | VOID\r | |
3444 | EFIAPI\r | |
3445 | SwitchStack (\r | |
3446 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
3447 | IN VOID *Context1, OPTIONAL\r | |
3448 | IN VOID *Context2, OPTIONAL\r | |
3449 | IN VOID *NewStack,\r | |
3450 | ...\r | |
3451 | );\r | |
3452 | \r | |
3453 | \r | |
3454 | /**\r | |
3455 | Generates a breakpoint on the CPU.\r | |
3456 | \r | |
3457 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
3458 | that code can resume normal execution after the breakpoint.\r | |
3459 | \r | |
3460 | **/\r | |
3461 | VOID\r | |
3462 | EFIAPI\r | |
3463 | CpuBreakpoint (\r | |
3464 | VOID\r | |
3465 | );\r | |
3466 | \r | |
3467 | \r | |
3468 | /**\r | |
3469 | Executes an infinite loop.\r | |
3470 | \r | |
3471 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
3472 | past the loop and the code that follows the loop must execute properly. This\r | |
3473 | implies that the infinite loop must not cause the code that follow it to be\r | |
3474 | optimized away.\r | |
3475 | \r | |
3476 | **/\r | |
3477 | VOID\r | |
3478 | EFIAPI\r | |
3479 | CpuDeadLoop (\r | |
3480 | VOID\r | |
3481 | );\r | |
2fe241a2 | 3482 | \r |
ac644614 | 3483 | #if defined (MDE_CPU_IPF)\r |
3484 | \r | |
3485 | /**\r | |
3486 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
3487 | CPU.\r | |
3488 | \r | |
cc39b88b | 3489 | Flushes the cache lines specified by Address and Length. If Address is not aligned \r |
3490 | on a cache line boundary, then entire cache line containing Address is flushed. \r | |
3491 | If Address + Length is not aligned on a cache line boundary, then the entire cache \r | |
3492 | line containing Address + Length - 1 is flushed. This function may choose to flush \r | |
3493 | the entire cache if that is more efficient than flushing the specified range. If \r | |
3494 | Length is 0, the no cache lines are flushed. Address is returned. \r | |
1a2f870c | 3495 | This function is only available on Itanium processors.\r |
ac644614 | 3496 | \r |
3497 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
3498 | \r | |
3499 | @param Address The base address of the instruction lines to invalidate. If\r | |
3500 | the CPU is in a physical addressing mode, then Address is a\r | |
3501 | physical address. If the CPU is in a virtual addressing mode,\r | |
3502 | then Address is a virtual address.\r | |
3503 | \r | |
3504 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
3505 | \r | |
cc39b88b | 3506 | @return Address.\r |
ac644614 | 3507 | \r |
3508 | **/\r | |
3509 | VOID *\r | |
3510 | EFIAPI\r | |
cc39b88b | 3511 | AsmFlushCacheRange (\r |
ac644614 | 3512 | IN VOID *Address,\r |
3513 | IN UINTN Length\r | |
3514 | );\r | |
3515 | \r | |
3516 | \r | |
3517 | /**\r | |
af2dc6a7 | 3518 | Executes an FC instruction.\r |
3519 | Executes an FC instruction on the cache line specified by Address.\r | |
ac644614 | 3520 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3521 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3522 | \r |
ee6c452c | 3523 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3524 | \r |
3525 | @return The address of FC instruction executed.\r | |
3526 | \r | |
3527 | **/\r | |
3528 | UINT64\r | |
3529 | EFIAPI\r | |
3530 | AsmFc (\r | |
3531 | IN UINT64 Address\r | |
3532 | );\r | |
3533 | \r | |
3534 | \r | |
3535 | /**\r | |
af2dc6a7 | 3536 | Executes an FC.I instruction.\r |
3537 | Executes an FC.I instruction on the cache line specified by Address.\r | |
ac644614 | 3538 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3539 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3540 | \r |
ee6c452c | 3541 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3542 | \r |
af2dc6a7 | 3543 | @return The address of the FC.I instruction executed.\r |
ac644614 | 3544 | \r |
3545 | **/\r | |
3546 | UINT64\r | |
3547 | EFIAPI\r | |
3548 | AsmFci (\r | |
3549 | IN UINT64 Address\r | |
3550 | );\r | |
3551 | \r | |
3552 | \r | |
3553 | /**\r | |
3554 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
17f695ed | 3555 | \r |
3556 | Reads and returns the current value of Processor Identifier Register specified by Index. \r | |
ac644614 | 3557 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r |
3558 | registers) is determined by CPUID [3] bits {7:0}.\r | |
3559 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
3560 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
3561 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
1a2f870c | 3562 | catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3563 | \r |
ee6c452c | 3564 | @param Index The 8-bit Processor Identifier Register index to read.\r |
ac644614 | 3565 | \r |
3566 | @return The current value of Processor Identifier Register specified by Index.\r | |
3567 | \r | |
3568 | **/\r | |
3569 | UINT64\r | |
3570 | EFIAPI\r | |
3571 | AsmReadCpuid (\r | |
3572 | IN UINT8 Index\r | |
3573 | );\r | |
3574 | \r | |
3575 | \r | |
3576 | /**\r | |
3577 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
1a2f870c | 3578 | This function is only available on Itanium processors.\r |
ac644614 | 3579 | \r |
3580 | @return The current value of PSR.\r | |
3581 | \r | |
3582 | **/\r | |
3583 | UINT64\r | |
3584 | EFIAPI\r | |
3585 | AsmReadPsr (\r | |
3586 | VOID\r | |
3587 | );\r | |
3588 | \r | |
3589 | \r | |
3590 | /**\r | |
3591 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
22388319 | 3592 | \r |
ac644614 | 3593 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
22388319 | 3594 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r |
3595 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
1a2f870c | 3596 | fault handlers to catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3597 | \r |
ee6c452c | 3598 | @param Value The 64-bit value to write to PSR.\r |
ac644614 | 3599 | \r |
3600 | @return The 64-bit value written to the PSR.\r | |
3601 | \r | |
3602 | **/\r | |
3603 | UINT64\r | |
3604 | EFIAPI\r | |
3605 | AsmWritePsr (\r | |
3606 | IN UINT64 Value\r | |
3607 | );\r | |
3608 | \r | |
3609 | \r | |
3610 | /**\r | |
3611 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3612 | \r |
3613 | Reads and returns the current value of KR0. \r | |
1a2f870c | 3614 | This function is only available on Itanium processors.\r |
ac644614 | 3615 | \r |
3616 | @return The current value of KR0.\r | |
3617 | \r | |
3618 | **/\r | |
3619 | UINT64\r | |
3620 | EFIAPI\r | |
3621 | AsmReadKr0 (\r | |
3622 | VOID\r | |
3623 | );\r | |
3624 | \r | |
3625 | \r | |
3626 | /**\r | |
3627 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 3628 | \r |
3629 | Reads and returns the current value of KR1. \r | |
1a2f870c | 3630 | This function is only available on Itanium processors.\r |
ac644614 | 3631 | \r |
3632 | @return The current value of KR1.\r | |
3633 | \r | |
3634 | **/\r | |
3635 | UINT64\r | |
3636 | EFIAPI\r | |
3637 | AsmReadKr1 (\r | |
3638 | VOID\r | |
3639 | );\r | |
3640 | \r | |
3641 | \r | |
3642 | /**\r | |
3643 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 3644 | \r |
3645 | Reads and returns the current value of KR2. \r | |
1a2f870c | 3646 | This function is only available on Itanium processors.\r |
ac644614 | 3647 | \r |
3648 | @return The current value of KR2.\r | |
3649 | \r | |
3650 | **/\r | |
3651 | UINT64\r | |
3652 | EFIAPI\r | |
3653 | AsmReadKr2 (\r | |
3654 | VOID\r | |
3655 | );\r | |
3656 | \r | |
3657 | \r | |
3658 | /**\r | |
3659 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 3660 | \r |
3661 | Reads and returns the current value of KR3. \r | |
1a2f870c | 3662 | This function is only available on Itanium processors.\r |
ac644614 | 3663 | \r |
3664 | @return The current value of KR3.\r | |
3665 | \r | |
3666 | **/\r | |
3667 | UINT64\r | |
3668 | EFIAPI\r | |
3669 | AsmReadKr3 (\r | |
3670 | VOID\r | |
3671 | );\r | |
3672 | \r | |
3673 | \r | |
3674 | /**\r | |
3675 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
ac644614 | 3676 | \r |
2fe241a2 | 3677 | Reads and returns the current value of KR4. \r |
1a2f870c | 3678 | This function is only available on Itanium processors.\r |
2fe241a2 | 3679 | \r |
ac644614 | 3680 | @return The current value of KR4.\r |
3681 | \r | |
3682 | **/\r | |
3683 | UINT64\r | |
3684 | EFIAPI\r | |
3685 | AsmReadKr4 (\r | |
3686 | VOID\r | |
3687 | );\r | |
3688 | \r | |
3689 | \r | |
3690 | /**\r | |
3691 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 3692 | \r |
3693 | Reads and returns the current value of KR5. \r | |
1a2f870c | 3694 | This function is only available on Itanium processors.\r |
ac644614 | 3695 | \r |
3696 | @return The current value of KR5.\r | |
3697 | \r | |
3698 | **/\r | |
3699 | UINT64\r | |
3700 | EFIAPI\r | |
3701 | AsmReadKr5 (\r | |
3702 | VOID\r | |
3703 | );\r | |
3704 | \r | |
3705 | \r | |
3706 | /**\r | |
3707 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 3708 | \r |
3709 | Reads and returns the current value of KR6. \r | |
1a2f870c | 3710 | This function is only available on Itanium processors.\r |
ac644614 | 3711 | \r |
3712 | @return The current value of KR6.\r | |
3713 | \r | |
3714 | **/\r | |
3715 | UINT64\r | |
3716 | EFIAPI\r | |
3717 | AsmReadKr6 (\r | |
3718 | VOID\r | |
3719 | );\r | |
3720 | \r | |
3721 | \r | |
3722 | /**\r | |
3723 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 3724 | \r |
3725 | Reads and returns the current value of KR7. \r | |
1a2f870c | 3726 | This function is only available on Itanium processors.\r |
ac644614 | 3727 | \r |
3728 | @return The current value of KR7.\r | |
3729 | \r | |
3730 | **/\r | |
3731 | UINT64\r | |
3732 | EFIAPI\r | |
3733 | AsmReadKr7 (\r | |
3734 | VOID\r | |
3735 | );\r | |
3736 | \r | |
3737 | \r | |
3738 | /**\r | |
3739 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3740 | \r |
3741 | Writes the current value of KR0. The 64-bit value written to \r | |
1a2f870c | 3742 | the KR0 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3743 | \r |
ee6c452c | 3744 | @param Value The 64-bit value to write to KR0.\r |
ac644614 | 3745 | \r |
3746 | @return The 64-bit value written to the KR0.\r | |
3747 | \r | |
3748 | **/\r | |
3749 | UINT64\r | |
3750 | EFIAPI\r | |
3751 | AsmWriteKr0 (\r | |
3752 | IN UINT64 Value\r | |
3753 | );\r | |
3754 | \r | |
3755 | \r | |
3756 | /**\r | |
3757 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 3758 | \r |
3759 | Writes the current value of KR1. The 64-bit value written to \r | |
1a2f870c | 3760 | the KR1 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3761 | \r |
ee6c452c | 3762 | @param Value The 64-bit value to write to KR1.\r |
ac644614 | 3763 | \r |
3764 | @return The 64-bit value written to the KR1.\r | |
3765 | \r | |
3766 | **/\r | |
3767 | UINT64\r | |
3768 | EFIAPI\r | |
3769 | AsmWriteKr1 (\r | |
3770 | IN UINT64 Value\r | |
3771 | );\r | |
3772 | \r | |
3773 | \r | |
3774 | /**\r | |
3775 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 3776 | \r |
3777 | Writes the current value of KR2. The 64-bit value written to \r | |
1a2f870c | 3778 | the KR2 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3779 | \r |
ee6c452c | 3780 | @param Value The 64-bit value to write to KR2.\r |
ac644614 | 3781 | \r |
3782 | @return The 64-bit value written to the KR2.\r | |
3783 | \r | |
3784 | **/\r | |
3785 | UINT64\r | |
3786 | EFIAPI\r | |
3787 | AsmWriteKr2 (\r | |
3788 | IN UINT64 Value\r | |
3789 | );\r | |
3790 | \r | |
3791 | \r | |
3792 | /**\r | |
3793 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 3794 | \r |
3795 | Writes the current value of KR3. The 64-bit value written to \r | |
1a2f870c | 3796 | the KR3 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3797 | \r |
ee6c452c | 3798 | @param Value The 64-bit value to write to KR3.\r |
ac644614 | 3799 | \r |
3800 | @return The 64-bit value written to the KR3.\r | |
3801 | \r | |
3802 | **/\r | |
3803 | UINT64\r | |
3804 | EFIAPI\r | |
3805 | AsmWriteKr3 (\r | |
3806 | IN UINT64 Value\r | |
3807 | );\r | |
3808 | \r | |
3809 | \r | |
3810 | /**\r | |
3811 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
2fe241a2 | 3812 | \r |
3813 | Writes the current value of KR4. The 64-bit value written to \r | |
1a2f870c | 3814 | the KR4 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3815 | \r |
ee6c452c | 3816 | @param Value The 64-bit value to write to KR4.\r |
ac644614 | 3817 | \r |
3818 | @return The 64-bit value written to the KR4.\r | |
3819 | \r | |
3820 | **/\r | |
3821 | UINT64\r | |
3822 | EFIAPI\r | |
3823 | AsmWriteKr4 (\r | |
3824 | IN UINT64 Value\r | |
3825 | );\r | |
3826 | \r | |
3827 | \r | |
3828 | /**\r | |
3829 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 3830 | \r |
3831 | Writes the current value of KR5. The 64-bit value written to \r | |
1a2f870c | 3832 | the KR5 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3833 | \r |
ee6c452c | 3834 | @param Value The 64-bit value to write to KR5.\r |
ac644614 | 3835 | \r |
3836 | @return The 64-bit value written to the KR5.\r | |
3837 | \r | |
3838 | **/\r | |
3839 | UINT64\r | |
3840 | EFIAPI\r | |
3841 | AsmWriteKr5 (\r | |
3842 | IN UINT64 Value\r | |
3843 | );\r | |
3844 | \r | |
3845 | \r | |
3846 | /**\r | |
3847 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 3848 | \r |
3849 | Writes the current value of KR6. The 64-bit value written to \r | |
1a2f870c | 3850 | the KR6 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3851 | \r |
ee6c452c | 3852 | @param Value The 64-bit value to write to KR6.\r |
ac644614 | 3853 | \r |
3854 | @return The 64-bit value written to the KR6.\r | |
3855 | \r | |
3856 | **/\r | |
3857 | UINT64\r | |
3858 | EFIAPI\r | |
3859 | AsmWriteKr6 (\r | |
3860 | IN UINT64 Value\r | |
3861 | );\r | |
3862 | \r | |
3863 | \r | |
3864 | /**\r | |
3865 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 3866 | \r |
3867 | Writes the current value of KR7. The 64-bit value written to \r | |
1a2f870c | 3868 | the KR7 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3869 | \r |
ee6c452c | 3870 | @param Value The 64-bit value to write to KR7.\r |
ac644614 | 3871 | \r |
3872 | @return The 64-bit value written to the KR7.\r | |
3873 | \r | |
3874 | **/\r | |
3875 | UINT64\r | |
3876 | EFIAPI\r | |
3877 | AsmWriteKr7 (\r | |
3878 | IN UINT64 Value\r | |
3879 | );\r | |
3880 | \r | |
3881 | \r | |
3882 | /**\r | |
3883 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 3884 | \r |
3885 | Reads and returns the current value of ITC.\r | |
1a2f870c | 3886 | This function is only available on Itanium processors.\r |
ac644614 | 3887 | \r |
3888 | @return The current value of ITC.\r | |
3889 | \r | |
3890 | **/\r | |
3891 | UINT64\r | |
3892 | EFIAPI\r | |
3893 | AsmReadItc (\r | |
3894 | VOID\r | |
3895 | );\r | |
3896 | \r | |
3897 | \r | |
3898 | /**\r | |
3899 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 3900 | \r |
3901 | Reads and returns the current value of ITV. \r | |
1a2f870c | 3902 | This function is only available on Itanium processors.\r |
ac644614 | 3903 | \r |
3904 | @return The current value of ITV.\r | |
3905 | \r | |
3906 | **/\r | |
3907 | UINT64\r | |
3908 | EFIAPI\r | |
3909 | AsmReadItv (\r | |
3910 | VOID\r | |
3911 | );\r | |
3912 | \r | |
3913 | \r | |
3914 | /**\r | |
3915 | Reads the current value of Interval Timer Match Register (ITM).\r | |
2fe241a2 | 3916 | \r |
3917 | Reads and returns the current value of ITM.\r | |
1a2f870c | 3918 | This function is only available on Itanium processors.\r |
ac644614 | 3919 | \r |
3920 | @return The current value of ITM.\r | |
3921 | **/\r | |
3922 | UINT64\r | |
3923 | EFIAPI\r | |
3924 | AsmReadItm (\r | |
3925 | VOID\r | |
3926 | );\r | |
3927 | \r | |
3928 | \r | |
3929 | /**\r | |
3930 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 3931 | \r |
3932 | Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r | |
1a2f870c | 3933 | This function is only available on Itanium processors.\r |
ac644614 | 3934 | \r |
ee6c452c | 3935 | @param Value The 64-bit value to write to ITC.\r |
ac644614 | 3936 | \r |
3937 | @return The 64-bit value written to the ITC.\r | |
3938 | \r | |
3939 | **/\r | |
3940 | UINT64\r | |
3941 | EFIAPI\r | |
3942 | AsmWriteItc (\r | |
3943 | IN UINT64 Value\r | |
3944 | );\r | |
3945 | \r | |
3946 | \r | |
3947 | /**\r | |
3948 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
2fe241a2 | 3949 | \r |
3950 | Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r | |
1a2f870c | 3951 | This function is only available on Itanium processors.\r |
ac644614 | 3952 | \r |
ee6c452c | 3953 | @param Value The 64-bit value to write to ITM.\r |
ac644614 | 3954 | \r |
3955 | @return The 64-bit value written to the ITM.\r | |
3956 | \r | |
3957 | **/\r | |
3958 | UINT64\r | |
3959 | EFIAPI\r | |
3960 | AsmWriteItm (\r | |
3961 | IN UINT64 Value\r | |
3962 | );\r | |
3963 | \r | |
3964 | \r | |
3965 | /**\r | |
3966 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 3967 | \r |
3968 | Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r | |
ac644614 | 3969 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
3970 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
3971 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
3972 | fault handlers to catch the faults.\r | |
1a2f870c | 3973 | This function is only available on Itanium processors.\r |
ac644614 | 3974 | \r |
ee6c452c | 3975 | @param Value The 64-bit value to write to ITV.\r |
ac644614 | 3976 | \r |
3977 | @return The 64-bit value written to the ITV.\r | |
3978 | \r | |
3979 | **/\r | |
3980 | UINT64\r | |
3981 | EFIAPI\r | |
3982 | AsmWriteItv (\r | |
3983 | IN UINT64 Value\r | |
3984 | );\r | |
3985 | \r | |
3986 | \r | |
3987 | /**\r | |
3988 | Reads the current value of Default Control Register (DCR).\r | |
2fe241a2 | 3989 | \r |
1a2f870c | 3990 | Reads and returns the current value of DCR. This function is only available on Itanium processors.\r |
ac644614 | 3991 | \r |
3992 | @return The current value of DCR.\r | |
3993 | \r | |
3994 | **/\r | |
3995 | UINT64\r | |
3996 | EFIAPI\r | |
3997 | AsmReadDcr (\r | |
3998 | VOID\r | |
3999 | );\r | |
4000 | \r | |
4001 | \r | |
4002 | /**\r | |
4003 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 4004 | \r |
1a2f870c | 4005 | Reads and returns the current value of IVA. This function is only available on Itanium processors.\r |
ac644614 | 4006 | \r |
4007 | @return The current value of IVA.\r | |
4008 | **/\r | |
4009 | UINT64\r | |
4010 | EFIAPI\r | |
4011 | AsmReadIva (\r | |
4012 | VOID\r | |
4013 | );\r | |
4014 | \r | |
4015 | \r | |
4016 | /**\r | |
4017 | Reads the current value of Page Table Address Register (PTA).\r | |
2fe241a2 | 4018 | \r |
1a2f870c | 4019 | Reads and returns the current value of PTA. This function is only available on Itanium processors.\r |
ac644614 | 4020 | \r |
4021 | @return The current value of PTA.\r | |
4022 | \r | |
4023 | **/\r | |
4024 | UINT64\r | |
4025 | EFIAPI\r | |
4026 | AsmReadPta (\r | |
4027 | VOID\r | |
4028 | );\r | |
4029 | \r | |
4030 | \r | |
4031 | /**\r | |
4032 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
2fe241a2 | 4033 | \r |
4034 | Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r | |
ac644614 | 4035 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4036 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4037 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4038 | fault handlers to catch the faults.\r | |
1a2f870c | 4039 | This function is only available on Itanium processors.\r |
ac644614 | 4040 | \r |
ee6c452c | 4041 | @param Value The 64-bit value to write to DCR.\r |
ac644614 | 4042 | \r |
4043 | @return The 64-bit value written to the DCR.\r | |
4044 | \r | |
4045 | **/\r | |
4046 | UINT64\r | |
4047 | EFIAPI\r | |
4048 | AsmWriteDcr (\r | |
4049 | IN UINT64 Value\r | |
4050 | );\r | |
4051 | \r | |
4052 | \r | |
4053 | /**\r | |
4054 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 4055 | \r |
4056 | Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r | |
ac644614 | 4057 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r |
4058 | the low 15 bits of Value is ignored when written.\r | |
1a2f870c | 4059 | This function is only available on Itanium processors.\r |
ac644614 | 4060 | \r |
ee6c452c | 4061 | @param Value The 64-bit value to write to IVA.\r |
ac644614 | 4062 | \r |
4063 | @return The 64-bit value written to the IVA.\r | |
4064 | \r | |
4065 | **/\r | |
4066 | UINT64\r | |
4067 | EFIAPI\r | |
4068 | AsmWriteIva (\r | |
4069 | IN UINT64 Value\r | |
4070 | );\r | |
4071 | \r | |
4072 | \r | |
4073 | /**\r | |
4074 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
2fe241a2 | 4075 | \r |
4076 | Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r | |
ac644614 | 4077 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4078 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4079 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4080 | fault handlers to catch the faults.\r | |
1a2f870c | 4081 | This function is only available on Itanium processors.\r |
ac644614 | 4082 | \r |
ee6c452c | 4083 | @param Value The 64-bit value to write to PTA.\r |
ac644614 | 4084 | \r |
4085 | @return The 64-bit value written to the PTA.\r | |
4086 | **/\r | |
4087 | UINT64\r | |
4088 | EFIAPI\r | |
4089 | AsmWritePta (\r | |
4090 | IN UINT64 Value\r | |
4091 | );\r | |
4092 | \r | |
4093 | \r | |
4094 | /**\r | |
4095 | Reads the current value of Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4096 | \r |
1a2f870c | 4097 | Reads and returns the current value of LID. This function is only available on Itanium processors.\r |
ac644614 | 4098 | \r |
4099 | @return The current value of LID.\r | |
4100 | \r | |
4101 | **/\r | |
4102 | UINT64\r | |
4103 | EFIAPI\r | |
4104 | AsmReadLid (\r | |
4105 | VOID\r | |
4106 | );\r | |
4107 | \r | |
4108 | \r | |
4109 | /**\r | |
4110 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
2fe241a2 | 4111 | \r |
1a2f870c | 4112 | Reads and returns the current value of IVR. This function is only available on Itanium processors. \r |
ac644614 | 4113 | \r |
4114 | @return The current value of IVR.\r | |
4115 | \r | |
4116 | **/\r | |
4117 | UINT64\r | |
4118 | EFIAPI\r | |
4119 | AsmReadIvr (\r | |
4120 | VOID\r | |
4121 | );\r | |
4122 | \r | |
4123 | \r | |
4124 | /**\r | |
4125 | Reads the current value of Task Priority Register (TPR).\r | |
2fe241a2 | 4126 | \r |
1a2f870c | 4127 | Reads and returns the current value of TPR. This function is only available on Itanium processors. \r |
ac644614 | 4128 | \r |
4129 | @return The current value of TPR.\r | |
4130 | \r | |
4131 | **/\r | |
4132 | UINT64\r | |
4133 | EFIAPI\r | |
4134 | AsmReadTpr (\r | |
4135 | VOID\r | |
4136 | );\r | |
4137 | \r | |
4138 | \r | |
4139 | /**\r | |
4140 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
2fe241a2 | 4141 | \r |
1a2f870c | 4142 | Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r |
ac644614 | 4143 | \r |
4144 | @return The current value of IRR0.\r | |
4145 | \r | |
4146 | **/\r | |
4147 | UINT64\r | |
4148 | EFIAPI\r | |
4149 | AsmReadIrr0 (\r | |
4150 | VOID\r | |
4151 | );\r | |
4152 | \r | |
4153 | \r | |
4154 | /**\r | |
4155 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
2fe241a2 | 4156 | \r |
1a2f870c | 4157 | Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r |
ac644614 | 4158 | \r |
4159 | @return The current value of IRR1.\r | |
4160 | \r | |
4161 | **/\r | |
4162 | UINT64\r | |
4163 | EFIAPI\r | |
4164 | AsmReadIrr1 (\r | |
4165 | VOID\r | |
4166 | );\r | |
4167 | \r | |
4168 | \r | |
4169 | /**\r | |
4170 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
2fe241a2 | 4171 | \r |
1a2f870c | 4172 | Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r |
ac644614 | 4173 | \r |
4174 | @return The current value of IRR2.\r | |
4175 | \r | |
4176 | **/\r | |
4177 | UINT64\r | |
4178 | EFIAPI\r | |
4179 | AsmReadIrr2 (\r | |
4180 | VOID\r | |
4181 | );\r | |
4182 | \r | |
4183 | \r | |
4184 | /**\r | |
4185 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
2fe241a2 | 4186 | \r |
1a2f870c | 4187 | Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r |
ac644614 | 4188 | \r |
4189 | @return The current value of IRR3.\r | |
4190 | \r | |
4191 | **/\r | |
4192 | UINT64\r | |
4193 | EFIAPI\r | |
4194 | AsmReadIrr3 (\r | |
4195 | VOID\r | |
4196 | );\r | |
4197 | \r | |
4198 | \r | |
4199 | /**\r | |
4200 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4201 | \r |
1a2f870c | 4202 | Reads and returns the current value of PMV. This function is only available on Itanium processors. \r |
ac644614 | 4203 | \r |
4204 | @return The current value of PMV.\r | |
4205 | \r | |
4206 | **/\r | |
4207 | UINT64\r | |
4208 | EFIAPI\r | |
4209 | AsmReadPmv (\r | |
4210 | VOID\r | |
4211 | );\r | |
4212 | \r | |
4213 | \r | |
4214 | /**\r | |
4215 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4216 | \r |
1a2f870c | 4217 | Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r |
ac644614 | 4218 | \r |
4219 | @return The current value of CMCV.\r | |
4220 | \r | |
4221 | **/\r | |
4222 | UINT64\r | |
4223 | EFIAPI\r | |
4224 | AsmReadCmcv (\r | |
4225 | VOID\r | |
4226 | );\r | |
4227 | \r | |
4228 | \r | |
4229 | /**\r | |
4230 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4231 | \r |
1a2f870c | 4232 | Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r |
ac644614 | 4233 | \r |
4234 | @return The current value of LRR0.\r | |
4235 | \r | |
4236 | **/\r | |
4237 | UINT64\r | |
4238 | EFIAPI\r | |
4239 | AsmReadLrr0 (\r | |
4240 | VOID\r | |
4241 | );\r | |
4242 | \r | |
4243 | \r | |
4244 | /**\r | |
4245 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4246 | \r |
1a2f870c | 4247 | Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r |
ac644614 | 4248 | \r |
4249 | @return The current value of LRR1.\r | |
4250 | \r | |
4251 | **/\r | |
4252 | UINT64\r | |
4253 | EFIAPI\r | |
4254 | AsmReadLrr1 (\r | |
4255 | VOID\r | |
4256 | );\r | |
4257 | \r | |
4258 | \r | |
4259 | /**\r | |
4260 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4261 | \r |
4262 | Writes the current value of LID. The 64-bit value written to the LID is returned. \r | |
ac644614 | 4263 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4264 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
4265 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4266 | fault handlers to catch the faults.\r | |
1a2f870c | 4267 | This function is only available on Itanium processors.\r |
ac644614 | 4268 | \r |
ee6c452c | 4269 | @param Value The 64-bit value to write to LID.\r |
ac644614 | 4270 | \r |
4271 | @return The 64-bit value written to the LID.\r | |
4272 | \r | |
4273 | **/\r | |
4274 | UINT64\r | |
4275 | EFIAPI\r | |
4276 | AsmWriteLid (\r | |
4277 | IN UINT64 Value\r | |
4278 | );\r | |
4279 | \r | |
4280 | \r | |
4281 | /**\r | |
4282 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
2fe241a2 | 4283 | \r |
4284 | Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r | |
ac644614 | 4285 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4286 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
4287 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4288 | fault handlers to catch the faults.\r | |
1a2f870c | 4289 | This function is only available on Itanium processors.\r |
ac644614 | 4290 | \r |
ee6c452c | 4291 | @param Value The 64-bit value to write to TPR.\r |
ac644614 | 4292 | \r |
4293 | @return The 64-bit value written to the TPR.\r | |
4294 | \r | |
4295 | **/\r | |
4296 | UINT64\r | |
4297 | EFIAPI\r | |
4298 | AsmWriteTpr (\r | |
4299 | IN UINT64 Value\r | |
4300 | );\r | |
4301 | \r | |
4302 | \r | |
4303 | /**\r | |
4304 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
2fe241a2 | 4305 | \r |
1a2f870c | 4306 | Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r |
ac644614 | 4307 | \r |
4308 | **/\r | |
4309 | VOID\r | |
4310 | EFIAPI\r | |
4311 | AsmWriteEoi (\r | |
4312 | VOID\r | |
4313 | );\r | |
4314 | \r | |
4315 | \r | |
4316 | /**\r | |
4317 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4318 | \r |
4319 | Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r | |
ac644614 | 4320 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4321 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
4322 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4323 | fault handlers to catch the faults.\r | |
1a2f870c | 4324 | This function is only available on Itanium processors.\r |
ac644614 | 4325 | \r |
ee6c452c | 4326 | @param Value The 64-bit value to write to PMV.\r |
ac644614 | 4327 | \r |
4328 | @return The 64-bit value written to the PMV.\r | |
4329 | \r | |
4330 | **/\r | |
4331 | UINT64\r | |
4332 | EFIAPI\r | |
4333 | AsmWritePmv (\r | |
4334 | IN UINT64 Value\r | |
4335 | );\r | |
4336 | \r | |
4337 | \r | |
4338 | /**\r | |
4339 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4340 | \r |
4341 | Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r | |
ac644614 | 4342 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4343 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
4344 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4345 | fault handlers to catch the faults.\r | |
1a2f870c | 4346 | This function is only available on Itanium processors.\r |
ac644614 | 4347 | \r |
ee6c452c | 4348 | @param Value The 64-bit value to write to CMCV.\r |
ac644614 | 4349 | \r |
4350 | @return The 64-bit value written to the CMCV.\r | |
4351 | \r | |
4352 | **/\r | |
4353 | UINT64\r | |
4354 | EFIAPI\r | |
4355 | AsmWriteCmcv (\r | |
4356 | IN UINT64 Value\r | |
4357 | );\r | |
4358 | \r | |
4359 | \r | |
4360 | /**\r | |
4361 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4362 | \r |
4363 | Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r | |
ac644614 | 4364 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4365 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
4366 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4367 | fault handlers to catch the faults.\r | |
1a2f870c | 4368 | This function is only available on Itanium processors.\r |
ac644614 | 4369 | \r |
ee6c452c | 4370 | @param Value The 64-bit value to write to LRR0.\r |
ac644614 | 4371 | \r |
4372 | @return The 64-bit value written to the LRR0.\r | |
4373 | \r | |
4374 | **/\r | |
4375 | UINT64\r | |
4376 | EFIAPI\r | |
4377 | AsmWriteLrr0 (\r | |
4378 | IN UINT64 Value\r | |
4379 | );\r | |
4380 | \r | |
4381 | \r | |
4382 | /**\r | |
4383 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4384 | \r |
4385 | Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r | |
ac644614 | 4386 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4387 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
4388 | The caller must either guarantee that Value is valid, or the caller must\r | |
4389 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4390 | This function is only available on Itanium processors.\r |
ac644614 | 4391 | \r |
ee6c452c | 4392 | @param Value The 64-bit value to write to LRR1.\r |
ac644614 | 4393 | \r |
4394 | @return The 64-bit value written to the LRR1.\r | |
4395 | \r | |
4396 | **/\r | |
4397 | UINT64\r | |
4398 | EFIAPI\r | |
4399 | AsmWriteLrr1 (\r | |
4400 | IN UINT64 Value\r | |
4401 | );\r | |
4402 | \r | |
4403 | \r | |
4404 | /**\r | |
4405 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
4406 | \r | |
4407 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4408 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
af2dc6a7 | 4409 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4410 | on all processor models. Implemented registers are contiguous starting with\r |
4411 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
4412 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4413 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4414 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4415 | This function is only available on Itanium processors.\r |
ac644614 | 4416 | \r |
ee6c452c | 4417 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r |
ac644614 | 4418 | \r |
4419 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
4420 | \r | |
4421 | **/\r | |
4422 | UINT64\r | |
4423 | EFIAPI\r | |
4424 | AsmReadIbr (\r | |
4425 | IN UINT8 Index\r | |
4426 | );\r | |
4427 | \r | |
4428 | \r | |
4429 | /**\r | |
4430 | Reads the current value of Data Breakpoint Register (DBR).\r | |
4431 | \r | |
4432 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4433 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4434 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4435 | models. Implemented registers are contiguous starting with register 0.\r |
4436 | No parameter checking is performed on Index. If the Index value is beyond\r | |
4437 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
4438 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
4439 | fault handlers to catch the faults.\r | |
1a2f870c | 4440 | This function is only available on Itanium processors.\r |
ac644614 | 4441 | \r |
ee6c452c | 4442 | @param Index The 8-bit Data Breakpoint Register index to read.\r |
ac644614 | 4443 | \r |
4444 | @return The current value of Data Breakpoint Register specified by Index.\r | |
4445 | \r | |
4446 | **/\r | |
4447 | UINT64\r | |
4448 | EFIAPI\r | |
4449 | AsmReadDbr (\r | |
4450 | IN UINT8 Index\r | |
4451 | );\r | |
4452 | \r | |
4453 | \r | |
4454 | /**\r | |
4455 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
4456 | \r | |
af2dc6a7 | 4457 | All processor implementations provide at least four performance counters\r |
4458 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4459 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4460 | additional implementation-dependent PMC and PMD to increase the number of\r | |
4461 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4462 | register set is implementation dependent. No parameter checking is performed\r | |
4463 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
4464 | zero value will be returned.\r | |
1a2f870c | 4465 | This function is only available on Itanium processors.\r |
ac644614 | 4466 | \r |
ee6c452c | 4467 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r |
ac644614 | 4468 | \r |
2fe241a2 | 4469 | @return The current value of Performance Monitor Configuration Register\r |
4470 | specified by Index.\r | |
ac644614 | 4471 | \r |
4472 | **/\r | |
4473 | UINT64\r | |
4474 | EFIAPI\r | |
4475 | AsmReadPmc (\r | |
4476 | IN UINT8 Index\r | |
4477 | );\r | |
4478 | \r | |
4479 | \r | |
4480 | /**\r | |
4481 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
4482 | \r | |
4483 | All processor implementations provide at least 4 performance counters\r | |
4484 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
4485 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r | |
4486 | provide additional implementation-dependent PMC and PMD to increase the number\r | |
4487 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4488 | register set is implementation dependent. No parameter checking is performed\r | |
4489 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
4490 | zero value will be returned.\r | |
1a2f870c | 4491 | This function is only available on Itanium processors.\r |
ac644614 | 4492 | \r |
ee6c452c | 4493 | @param Index The 8-bit Performance Monitor Data Register index to read.\r |
ac644614 | 4494 | \r |
4495 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
4496 | \r | |
4497 | **/\r | |
4498 | UINT64\r | |
4499 | EFIAPI\r | |
4500 | AsmReadPmd (\r | |
4501 | IN UINT8 Index\r | |
4502 | );\r | |
4503 | \r | |
4504 | \r | |
4505 | /**\r | |
4506 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
4507 | \r | |
4508 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
4509 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4510 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
af2dc6a7 | 4511 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4512 | on all processor models. Implemented registers are contiguous starting with\r |
4513 | register 0. No parameter checking is performed on Index. If the Index value\r | |
4514 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4515 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4516 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4517 | This function is only available on Itanium processors.\r |
ac644614 | 4518 | \r |
ee6c452c | 4519 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r |
4520 | @param Value The 64-bit value to write to IBR.\r | |
ac644614 | 4521 | \r |
4522 | @return The 64-bit value written to the IBR.\r | |
4523 | \r | |
4524 | **/\r | |
4525 | UINT64\r | |
4526 | EFIAPI\r | |
4527 | AsmWriteIbr (\r | |
4528 | IN UINT8 Index,\r | |
4529 | IN UINT64 Value\r | |
4530 | );\r | |
4531 | \r | |
4532 | \r | |
4533 | /**\r | |
4534 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
4535 | \r | |
4536 | Writes current value of Data Breakpoint Register specified by Index.\r | |
4537 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4538 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4539 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4540 | models. Implemented registers are contiguous starting with register 0. No parameter\r |
4541 | checking is performed on Index. If the Index value is beyond the implemented\r | |
4542 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
4543 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
4544 | catch the faults.\r | |
1a2f870c | 4545 | This function is only available on Itanium processors.\r |
ac644614 | 4546 | \r |
ee6c452c | 4547 | @param Index The 8-bit Data Breakpoint Register index to write.\r |
4548 | @param Value The 64-bit value to write to DBR.\r | |
ac644614 | 4549 | \r |
4550 | @return The 64-bit value written to the DBR.\r | |
4551 | \r | |
4552 | **/\r | |
4553 | UINT64\r | |
4554 | EFIAPI\r | |
4555 | AsmWriteDbr (\r | |
4556 | IN UINT8 Index,\r | |
4557 | IN UINT64 Value\r | |
4558 | );\r | |
4559 | \r | |
4560 | \r | |
4561 | /**\r | |
4562 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
4563 | \r | |
4564 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
af2dc6a7 | 4565 | All processor implementations provide at least four performance counters\r |
4566 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status\r | |
ac644614 | 4567 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r |
4568 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
4569 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r | |
4570 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
4571 | beyond the implemented PMC register range, the write is ignored.\r | |
1a2f870c | 4572 | This function is only available on Itanium processors.\r |
ac644614 | 4573 | \r |
ee6c452c | 4574 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r |
4575 | @param Value The 64-bit value to write to PMC.\r | |
ac644614 | 4576 | \r |
4577 | @return The 64-bit value written to the PMC.\r | |
4578 | \r | |
4579 | **/\r | |
4580 | UINT64\r | |
4581 | EFIAPI\r | |
4582 | AsmWritePmc (\r | |
4583 | IN UINT8 Index,\r | |
4584 | IN UINT64 Value\r | |
4585 | );\r | |
4586 | \r | |
4587 | \r | |
4588 | /**\r | |
4589 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
4590 | \r | |
4591 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
af2dc6a7 | 4592 | All processor implementations provide at least four performance counters\r |
4593 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4594 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4595 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
4596 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r | |
4597 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
4598 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
1a2f870c | 4599 | This function is only available on Itanium processors.\r |
ac644614 | 4600 | \r |
ee6c452c | 4601 | @param Index The 8-bit Performance Monitor Data Register index to write.\r |
4602 | @param Value The 64-bit value to write to PMD.\r | |
ac644614 | 4603 | \r |
4604 | @return The 64-bit value written to the PMD.\r | |
4605 | \r | |
4606 | **/\r | |
4607 | UINT64\r | |
4608 | EFIAPI\r | |
4609 | AsmWritePmd (\r | |
4610 | IN UINT8 Index,\r | |
4611 | IN UINT64 Value\r | |
4612 | );\r | |
4613 | \r | |
4614 | \r | |
4615 | /**\r | |
4616 | Reads the current value of 64-bit Global Pointer (GP).\r | |
4617 | \r | |
4618 | Reads and returns the current value of GP.\r | |
1a2f870c | 4619 | This function is only available on Itanium processors.\r |
ac644614 | 4620 | \r |
4621 | @return The current value of GP.\r | |
4622 | \r | |
4623 | **/\r | |
4624 | UINT64\r | |
4625 | EFIAPI\r | |
4626 | AsmReadGp (\r | |
4627 | VOID\r | |
4628 | );\r | |
4629 | \r | |
4630 | \r | |
4631 | /**\r | |
4632 | Write the current value of 64-bit Global Pointer (GP).\r | |
4633 | \r | |
4634 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
4635 | No parameter checking is performed on Value.\r | |
1a2f870c | 4636 | This function is only available on Itanium processors.\r |
ac644614 | 4637 | \r |
4638 | @param Value The 64-bit value to write to GP.\r | |
4639 | \r | |
4640 | @return The 64-bit value written to the GP.\r | |
4641 | \r | |
4642 | **/\r | |
4643 | UINT64\r | |
4644 | EFIAPI\r | |
4645 | AsmWriteGp (\r | |
4646 | IN UINT64 Value\r | |
4647 | );\r | |
4648 | \r | |
4649 | \r | |
4650 | /**\r | |
4651 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
4652 | \r | |
4653 | Reads and returns the current value of SP.\r | |
1a2f870c | 4654 | This function is only available on Itanium processors.\r |
ac644614 | 4655 | \r |
4656 | @return The current value of SP.\r | |
4657 | \r | |
4658 | **/\r | |
4659 | UINT64\r | |
4660 | EFIAPI\r | |
4661 | AsmReadSp (\r | |
4662 | VOID\r | |
4663 | );\r | |
4664 | \r | |
4665 | \r | |
aad6137d | 4666 | ///\r |
af2dc6a7 | 4667 | /// Valid Index value for AsmReadControlRegister().\r |
aad6137d | 4668 | ///\r |
4669 | #define IPF_CONTROL_REGISTER_DCR 0\r | |
4670 | #define IPF_CONTROL_REGISTER_ITM 1\r | |
4671 | #define IPF_CONTROL_REGISTER_IVA 2\r | |
4672 | #define IPF_CONTROL_REGISTER_PTA 8\r | |
4673 | #define IPF_CONTROL_REGISTER_IPSR 16\r | |
4674 | #define IPF_CONTROL_REGISTER_ISR 17\r | |
4675 | #define IPF_CONTROL_REGISTER_IIP 19\r | |
4676 | #define IPF_CONTROL_REGISTER_IFA 20\r | |
4677 | #define IPF_CONTROL_REGISTER_ITIR 21\r | |
4678 | #define IPF_CONTROL_REGISTER_IIPA 22\r | |
4679 | #define IPF_CONTROL_REGISTER_IFS 23\r | |
4680 | #define IPF_CONTROL_REGISTER_IIM 24\r | |
4681 | #define IPF_CONTROL_REGISTER_IHA 25\r | |
4682 | #define IPF_CONTROL_REGISTER_LID 64\r | |
4683 | #define IPF_CONTROL_REGISTER_IVR 65\r | |
4684 | #define IPF_CONTROL_REGISTER_TPR 66\r | |
4685 | #define IPF_CONTROL_REGISTER_EOI 67\r | |
4686 | #define IPF_CONTROL_REGISTER_IRR0 68\r | |
4687 | #define IPF_CONTROL_REGISTER_IRR1 69\r | |
4688 | #define IPF_CONTROL_REGISTER_IRR2 70\r | |
4689 | #define IPF_CONTROL_REGISTER_IRR3 71\r | |
4690 | #define IPF_CONTROL_REGISTER_ITV 72\r | |
4691 | #define IPF_CONTROL_REGISTER_PMV 73\r | |
4692 | #define IPF_CONTROL_REGISTER_CMCV 74\r | |
4693 | #define IPF_CONTROL_REGISTER_LRR0 80\r | |
4694 | #define IPF_CONTROL_REGISTER_LRR1 81\r | |
4695 | \r | |
4696 | /**\r | |
4697 | Reads a 64-bit control register.\r | |
4698 | \r | |
af2dc6a7 | 4699 | Reads and returns the control register specified by Index. The valid Index valued \r |
4700 | are defined above in "Related Definitions".\r | |
4701 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
4702 | available on Itanium processors.\r | |
aad6137d | 4703 | \r |
4704 | @param Index The index of the control register to read.\r | |
4705 | \r | |
4706 | @return The control register specified by Index.\r | |
4707 | \r | |
4708 | **/\r | |
4709 | UINT64\r | |
4710 | EFIAPI\r | |
4711 | AsmReadControlRegister (\r | |
4712 | IN UINT64 Index\r | |
4713 | );\r | |
4714 | \r | |
4715 | \r | |
4716 | ///\r | |
af2dc6a7 | 4717 | /// Valid Index value for AsmReadApplicationRegister().\r |
aad6137d | 4718 | ///\r |
4719 | #define IPF_APPLICATION_REGISTER_K0 0\r | |
4720 | #define IPF_APPLICATION_REGISTER_K1 1\r | |
4721 | #define IPF_APPLICATION_REGISTER_K2 2\r | |
4722 | #define IPF_APPLICATION_REGISTER_K3 3\r | |
4723 | #define IPF_APPLICATION_REGISTER_K4 4\r | |
4724 | #define IPF_APPLICATION_REGISTER_K5 5\r | |
4725 | #define IPF_APPLICATION_REGISTER_K6 6\r | |
4726 | #define IPF_APPLICATION_REGISTER_K7 7\r | |
4727 | #define IPF_APPLICATION_REGISTER_RSC 16\r | |
4728 | #define IPF_APPLICATION_REGISTER_BSP 17\r | |
4729 | #define IPF_APPLICATION_REGISTER_BSPSTORE 18\r | |
4730 | #define IPF_APPLICATION_REGISTER_RNAT 19\r | |
4731 | #define IPF_APPLICATION_REGISTER_FCR 21\r | |
4732 | #define IPF_APPLICATION_REGISTER_EFLAG 24\r | |
4733 | #define IPF_APPLICATION_REGISTER_CSD 25\r | |
4734 | #define IPF_APPLICATION_REGISTER_SSD 26\r | |
4735 | #define IPF_APPLICATION_REGISTER_CFLG 27\r | |
4736 | #define IPF_APPLICATION_REGISTER_FSR 28\r | |
4737 | #define IPF_APPLICATION_REGISTER_FIR 29\r | |
4738 | #define IPF_APPLICATION_REGISTER_FDR 30\r | |
4739 | #define IPF_APPLICATION_REGISTER_CCV 32\r | |
4740 | #define IPF_APPLICATION_REGISTER_UNAT 36\r | |
4741 | #define IPF_APPLICATION_REGISTER_FPSR 40\r | |
4742 | #define IPF_APPLICATION_REGISTER_ITC 44\r | |
4743 | #define IPF_APPLICATION_REGISTER_PFS 64\r | |
4744 | #define IPF_APPLICATION_REGISTER_LC 65\r | |
4745 | #define IPF_APPLICATION_REGISTER_EC 66\r | |
4746 | \r | |
4747 | /**\r | |
4748 | Reads a 64-bit application register.\r | |
4749 | \r | |
af2dc6a7 | 4750 | Reads and returns the application register specified by Index. The valid Index \r |
4751 | valued are defined above in "Related Definitions".\r | |
4752 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
4753 | available on Itanium processors.\r | |
aad6137d | 4754 | \r |
4755 | @param Index The index of the application register to read.\r | |
4756 | \r | |
4757 | @return The application register specified by Index.\r | |
4758 | \r | |
4759 | **/\r | |
4760 | UINT64\r | |
4761 | EFIAPI\r | |
4762 | AsmReadApplicationRegister (\r | |
4763 | IN UINT64 Index\r | |
4764 | );\r | |
4765 | \r | |
4766 | \r | |
59e0bb0c | 4767 | /**\r |
4768 | Reads the current value of a Machine Specific Register (MSR).\r | |
4769 | \r | |
4770 | Reads and returns the current value of the Machine Specific Register specified by Index. No\r | |
4771 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
4772 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
4773 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 4774 | only available on Itanium processors.\r |
59e0bb0c | 4775 | \r |
4776 | @param Index The 8-bit Machine Specific Register index to read.\r | |
4777 | \r | |
4778 | @return The current value of the Machine Specific Register specified by Index. \r | |
4779 | \r | |
4780 | **/\r | |
4781 | UINT64\r | |
4782 | EFIAPI\r | |
4783 | AsmReadMsr (\r | |
4784 | IN UINT8 Index \r | |
4785 | );\r | |
4786 | \r | |
4787 | \r | |
4788 | /**\r | |
4789 | Writes the current value of a Machine Specific Register (MSR).\r | |
4790 | \r | |
4791 | Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r | |
4792 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
4793 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
4794 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 4795 | only available on Itanium processors.\r |
59e0bb0c | 4796 | \r |
4797 | @param Index The 8-bit Machine Specific Register index to write.\r | |
4798 | @param Value The 64-bit value to write to the Machine Specific Register.\r | |
4799 | \r | |
4800 | @return The 64-bit value to write to the Machine Specific Register. \r | |
4801 | \r | |
4802 | **/\r | |
4803 | UINT64\r | |
4804 | EFIAPI\r | |
4805 | AsmWriteMsr (\r | |
4806 | IN UINT8 Index, \r | |
4807 | IN UINT64 Value \r | |
4808 | );\r | |
4809 | \r | |
4810 | \r | |
ac644614 | 4811 | /**\r |
4812 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
4813 | \r | |
4814 | Determines the current execution mode of the CPU.\r | |
4815 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
4816 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
4817 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
4818 | and -1 is returned.\r | |
1a2f870c | 4819 | This function is only available on Itanium processors.\r |
ac644614 | 4820 | \r |
17f695ed | 4821 | @retval 1 The CPU is in virtual mode.\r |
4822 | @retval 0 The CPU is in physical mode.\r | |
4823 | @retval -1 The CPU is in mixed mode.\r | |
ac644614 | 4824 | \r |
4825 | **/\r | |
4826 | INT64\r | |
4827 | EFIAPI\r | |
4828 | AsmCpuVirtual (\r | |
4829 | VOID\r | |
4830 | );\r | |
4831 | \r | |
4832 | \r | |
4833 | /**\r | |
4834 | Makes a PAL procedure call.\r | |
4835 | \r | |
4836 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
4837 | value this API will make static or stacked PAL call. The following table\r | |
4838 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
4839 | may be designated as required or optional. If a PAL procedure is specified\r | |
4840 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
4841 | Status field of the PAL_CALL_RETURN structure.\r | |
4842 | This indicates that the procedure is not present in this PAL implementation.\r | |
4843 | It is the caller's responsibility to check for this return code after calling\r | |
4844 | any optional PAL procedure.\r | |
4845 | No parameter checking is performed on the 5 input parameters, but there are\r | |
4846 | some common rules that the caller should follow when making a PAL call. Any\r | |
4847 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
4848 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
4849 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
4850 | argument return value may be returned or undefined result may occur during the\r | |
4851 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
4852 | PAL entry point then the system behavior is undefined. This function is only\r | |
1a2f870c | 4853 | available on Itanium processors.\r |
ac644614 | 4854 | \r |
ee6c452c | 4855 | @param PalEntryPoint The PAL procedure calls entry point.\r |
4856 | @param Index The PAL procedure Index number.\r | |
4857 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
4858 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
4859 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
ac644614 | 4860 | \r |
4861 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
4862 | \r | |
4863 | **/\r | |
4864 | PAL_CALL_RETURN\r | |
4865 | EFIAPI\r | |
4866 | AsmPalCall (\r | |
4867 | IN UINT64 PalEntryPoint,\r | |
4868 | IN UINT64 Index,\r | |
4869 | IN UINT64 Arg2,\r | |
4870 | IN UINT64 Arg3,\r | |
4871 | IN UINT64 Arg4\r | |
4872 | );\r | |
fd163050 | 4873 | #endif\r |
ac644614 | 4874 | \r |
fd163050 | 4875 | #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r |
1106ffe1 | 4876 | ///\r |
af2dc6a7 | 4877 | /// IA32 and x64 Specific Functions.\r |
4878 | /// Byte packed structure for 16-bit Real Mode EFLAGS.\r | |
1106ffe1 | 4879 | ///\r |
ac644614 | 4880 | typedef union {\r |
4881 | struct {\r | |
af2dc6a7 | 4882 | UINT32 CF:1; ///< Carry Flag.\r |
4883 | UINT32 Reserved_0:1; ///< Reserved.\r | |
4884 | UINT32 PF:1; ///< Parity Flag.\r | |
4885 | UINT32 Reserved_1:1; ///< Reserved.\r | |
4886 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
4887 | UINT32 Reserved_2:1; ///< Reserved.\r | |
4888 | UINT32 ZF:1; ///< Zero Flag.\r | |
4889 | UINT32 SF:1; ///< Sign Flag.\r | |
4890 | UINT32 TF:1; ///< Trap Flag.\r | |
4891 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
4892 | UINT32 DF:1; ///< Direction Flag.\r | |
4893 | UINT32 OF:1; ///< Overflow Flag.\r | |
4894 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
4895 | UINT32 NT:1; ///< Nested Task.\r | |
4896 | UINT32 Reserved_3:1; ///< Reserved.\r | |
ac644614 | 4897 | } Bits;\r |
4898 | UINT16 Uint16;\r | |
4899 | } IA32_FLAGS16;\r | |
4900 | \r | |
1106ffe1 | 4901 | ///\r |
af2dc6a7 | 4902 | /// Byte packed structure for EFLAGS/RFLAGS.\r |
4903 | /// 32-bits on IA-32.\r | |
4904 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 4905 | ///\r |
ac644614 | 4906 | typedef union {\r |
4907 | struct {\r | |
af2dc6a7 | 4908 | UINT32 CF:1; ///< Carry Flag.\r |
4909 | UINT32 Reserved_0:1; ///< Reserved.\r | |
4910 | UINT32 PF:1; ///< Parity Flag.\r | |
4911 | UINT32 Reserved_1:1; ///< Reserved.\r | |
4912 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
4913 | UINT32 Reserved_2:1; ///< Reserved.\r | |
4914 | UINT32 ZF:1; ///< Zero Flag.\r | |
4915 | UINT32 SF:1; ///< Sign Flag.\r | |
4916 | UINT32 TF:1; ///< Trap Flag.\r | |
4917 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
4918 | UINT32 DF:1; ///< Direction Flag.\r | |
4919 | UINT32 OF:1; ///< Overflow Flag.\r | |
4920 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
4921 | UINT32 NT:1; ///< Nested Task.\r | |
4922 | UINT32 Reserved_3:1; ///< Reserved.\r | |
4923 | UINT32 RF:1; ///< Resume Flag.\r | |
4924 | UINT32 VM:1; ///< Virtual 8086 Mode.\r | |
4925 | UINT32 AC:1; ///< Alignment Check.\r | |
4926 | UINT32 VIF:1; ///< Virtual Interrupt Flag.\r | |
4927 | UINT32 VIP:1; ///< Virtual Interrupt Pending.\r | |
4928 | UINT32 ID:1; ///< ID Flag.\r | |
4929 | UINT32 Reserved_4:10; ///< Reserved.\r | |
ac644614 | 4930 | } Bits;\r |
4931 | UINTN UintN;\r | |
4932 | } IA32_EFLAGS32;\r | |
4933 | \r | |
1106ffe1 | 4934 | ///\r |
af2dc6a7 | 4935 | /// Byte packed structure for Control Register 0 (CR0).\r |
4936 | /// 32-bits on IA-32.\r | |
4937 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 4938 | ///\r |
ac644614 | 4939 | typedef union {\r |
4940 | struct {\r | |
af2dc6a7 | 4941 | UINT32 PE:1; ///< Protection Enable.\r |
4942 | UINT32 MP:1; ///< Monitor Coprocessor.\r | |
4943 | UINT32 EM:1; ///< Emulation.\r | |
4944 | UINT32 TS:1; ///< Task Switched.\r | |
4945 | UINT32 ET:1; ///< Extension Type.\r | |
4946 | UINT32 NE:1; ///< Numeric Error.\r | |
4947 | UINT32 Reserved_0:10; ///< Reserved.\r | |
4948 | UINT32 WP:1; ///< Write Protect.\r | |
4949 | UINT32 Reserved_1:1; ///< Reserved.\r | |
4950 | UINT32 AM:1; ///< Alignment Mask.\r | |
4951 | UINT32 Reserved_2:10; ///< Reserved.\r | |
4952 | UINT32 NW:1; ///< Mot Write-through.\r | |
4953 | UINT32 CD:1; ///< Cache Disable.\r | |
4954 | UINT32 PG:1; ///< Paging.\r | |
ac644614 | 4955 | } Bits;\r |
4956 | UINTN UintN;\r | |
4957 | } IA32_CR0;\r | |
4958 | \r | |
1106ffe1 | 4959 | ///\r |
af2dc6a7 | 4960 | /// Byte packed structure for Control Register 4 (CR4).\r |
4961 | /// 32-bits on IA-32.\r | |
4962 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 4963 | ///\r |
ac644614 | 4964 | typedef union {\r |
4965 | struct {\r | |
af2dc6a7 | 4966 | UINT32 VME:1; ///< Virtual-8086 Mode Extensions.\r |
4967 | UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.\r | |
4968 | UINT32 TSD:1; ///< Time Stamp Disable.\r | |
4969 | UINT32 DE:1; ///< Debugging Extensions.\r | |
4970 | UINT32 PSE:1; ///< Page Size Extensions.\r | |
4971 | UINT32 PAE:1; ///< Physical Address Extension.\r | |
4972 | UINT32 MCE:1; ///< Machine Check Enable.\r | |
4973 | UINT32 PGE:1; ///< Page Global Enable.\r | |
2a53dabf | 4974 | UINT32 PCE:1; ///< Performance Monitoring Counter\r |
af2dc6a7 | 4975 | ///< Enable.\r |
2a53dabf LG |
4976 | UINT32 OSFXSR:1; ///< Operating System Support for\r |
4977 | ///< FXSAVE and FXRSTOR instructions\r | |
4978 | UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r | |
4979 | ///< Unmasked SIMD Floating Point\r | |
af2dc6a7 | 4980 | ///< Exceptions.\r |
4981 | UINT32 Reserved_0:2; ///< Reserved.\r | |
2a53dabf | 4982 | UINT32 VMXE:1; ///< VMX Enable\r |
af2dc6a7 | 4983 | UINT32 Reserved_1:18; ///< Reserved.\r |
ac644614 | 4984 | } Bits;\r |
4985 | UINTN UintN;\r | |
4986 | } IA32_CR4;\r | |
4987 | \r | |
6088db38 | 4988 | ///\r |
4989 | /// Byte packed structure for a segment descriptor in a GDT/LDT.\r | |
4990 | ///\r | |
4991 | typedef union {\r | |
4992 | struct {\r | |
4993 | UINT32 LimitLow:16;\r | |
4994 | UINT32 BaseLow:16;\r | |
4995 | UINT32 BaseMid:8;\r | |
4996 | UINT32 Type:4;\r | |
4997 | UINT32 S:1;\r | |
4998 | UINT32 DPL:2;\r | |
4999 | UINT32 P:1;\r | |
5000 | UINT32 LimitHigh:4;\r | |
5001 | UINT32 AVL:1;\r | |
5002 | UINT32 L:1;\r | |
5003 | UINT32 DB:1;\r | |
5004 | UINT32 G:1;\r | |
5005 | UINT32 BaseHigh:8;\r | |
5006 | } Bits;\r | |
5007 | UINT64 Uint64;\r | |
5008 | } IA32_SEGMENT_DESCRIPTOR;\r | |
5009 | \r | |
1106ffe1 | 5010 | ///\r |
af2dc6a7 | 5011 | /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.\r |
1106ffe1 | 5012 | ///\r |
ac644614 | 5013 | #pragma pack (1)\r |
5014 | typedef struct {\r | |
5015 | UINT16 Limit;\r | |
5016 | UINTN Base;\r | |
5017 | } IA32_DESCRIPTOR;\r | |
5018 | #pragma pack ()\r | |
5019 | \r | |
5020 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
5021 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
5022 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
5023 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
5024 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
5025 | \r | |
6f4aad3b | 5026 | \r |
5027 | #if defined (MDE_CPU_IA32)\r | |
1106ffe1 | 5028 | ///\r |
af2dc6a7 | 5029 | /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.\r |
1106ffe1 | 5030 | ///\r |
dc317713 | 5031 | typedef union {\r |
5032 | struct {\r | |
af2dc6a7 | 5033 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
5034 | UINT32 Selector:16; ///< Selector.\r | |
5035 | UINT32 Reserved_0:8; ///< Reserved.\r | |
5036 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
5037 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
dc317713 | 5038 | } Bits;\r |
5039 | UINT64 Uint64;\r | |
5040 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
5041 | \r | |
5042 | #endif\r | |
5043 | \r | |
5044 | #if defined (MDE_CPU_X64)\r | |
6f4aad3b | 5045 | ///\r |
af2dc6a7 | 5046 | /// Byte packed structure for an x64 Interrupt Gate Descriptor.\r |
6f4aad3b | 5047 | ///\r |
ac644614 | 5048 | typedef union {\r |
5049 | struct {\r | |
af2dc6a7 | 5050 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
5051 | UINT32 Selector:16; ///< Selector.\r | |
5052 | UINT32 Reserved_0:8; ///< Reserved.\r | |
5053 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
5054 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
5055 | UINT32 OffsetUpper:32; ///< Offset bits 63..32.\r | |
5056 | UINT32 Reserved_1:32; ///< Reserved.\r | |
ac644614 | 5057 | } Bits;\r |
6f4aad3b | 5058 | struct {\r |
5059 | UINT64 Uint64;\r | |
5060 | UINT64 Uint64_1;\r | |
5061 | } Uint128; \r | |
ac644614 | 5062 | } IA32_IDT_GATE_DESCRIPTOR;\r |
5063 | \r | |
dc317713 | 5064 | #endif\r |
5065 | \r | |
1106ffe1 | 5066 | ///\r |
af2dc6a7 | 5067 | /// Byte packed structure for an FP/SSE/SSE2 context.\r |
1106ffe1 | 5068 | ///\r |
ac644614 | 5069 | typedef struct {\r |
5070 | UINT8 Buffer[512];\r | |
5071 | } IA32_FX_BUFFER;\r | |
5072 | \r | |
1106ffe1 | 5073 | ///\r |
af2dc6a7 | 5074 | /// Structures for the 16-bit real mode thunks.\r |
1106ffe1 | 5075 | ///\r |
ac644614 | 5076 | typedef struct {\r |
5077 | UINT32 Reserved1;\r | |
5078 | UINT32 Reserved2;\r | |
5079 | UINT32 Reserved3;\r | |
5080 | UINT32 Reserved4;\r | |
5081 | UINT8 BL;\r | |
5082 | UINT8 BH;\r | |
5083 | UINT16 Reserved5;\r | |
5084 | UINT8 DL;\r | |
5085 | UINT8 DH;\r | |
5086 | UINT16 Reserved6;\r | |
5087 | UINT8 CL;\r | |
5088 | UINT8 CH;\r | |
5089 | UINT16 Reserved7;\r | |
5090 | UINT8 AL;\r | |
5091 | UINT8 AH;\r | |
5092 | UINT16 Reserved8;\r | |
5093 | } IA32_BYTE_REGS;\r | |
5094 | \r | |
5095 | typedef struct {\r | |
5096 | UINT16 DI;\r | |
5097 | UINT16 Reserved1;\r | |
5098 | UINT16 SI;\r | |
5099 | UINT16 Reserved2;\r | |
5100 | UINT16 BP;\r | |
5101 | UINT16 Reserved3;\r | |
5102 | UINT16 SP;\r | |
5103 | UINT16 Reserved4;\r | |
5104 | UINT16 BX;\r | |
5105 | UINT16 Reserved5;\r | |
5106 | UINT16 DX;\r | |
5107 | UINT16 Reserved6;\r | |
5108 | UINT16 CX;\r | |
5109 | UINT16 Reserved7;\r | |
5110 | UINT16 AX;\r | |
5111 | UINT16 Reserved8;\r | |
5112 | } IA32_WORD_REGS;\r | |
5113 | \r | |
5114 | typedef struct {\r | |
5115 | UINT32 EDI;\r | |
5116 | UINT32 ESI;\r | |
5117 | UINT32 EBP;\r | |
5118 | UINT32 ESP;\r | |
5119 | UINT32 EBX;\r | |
5120 | UINT32 EDX;\r | |
5121 | UINT32 ECX;\r | |
5122 | UINT32 EAX;\r | |
5123 | UINT16 DS;\r | |
5124 | UINT16 ES;\r | |
5125 | UINT16 FS;\r | |
5126 | UINT16 GS;\r | |
5127 | IA32_EFLAGS32 EFLAGS;\r | |
5128 | UINT32 Eip;\r | |
5129 | UINT16 CS;\r | |
5130 | UINT16 SS;\r | |
5131 | } IA32_DWORD_REGS;\r | |
5132 | \r | |
5133 | typedef union {\r | |
5134 | IA32_DWORD_REGS E;\r | |
5135 | IA32_WORD_REGS X;\r | |
5136 | IA32_BYTE_REGS H;\r | |
5137 | } IA32_REGISTER_SET;\r | |
5138 | \r | |
1106ffe1 | 5139 | ///\r |
af2dc6a7 | 5140 | /// Byte packed structure for an 16-bit real mode thunks.\r |
1106ffe1 | 5141 | ///\r |
ac644614 | 5142 | typedef struct {\r |
5143 | IA32_REGISTER_SET *RealModeState;\r | |
5144 | VOID *RealModeBuffer;\r | |
5145 | UINT32 RealModeBufferSize;\r | |
5146 | UINT32 ThunkAttributes;\r | |
5147 | } THUNK_CONTEXT;\r | |
5148 | \r | |
5149 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
5150 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
5151 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
5152 | \r | |
5153 | /**\r | |
5154 | Retrieves CPUID information.\r | |
5155 | \r | |
5156 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
5157 | This function always returns Index.\r | |
5158 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5159 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5160 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5161 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
030cd1a2 | 5162 | This function is only available on IA-32 and x64.\r |
ac644614 | 5163 | \r |
5164 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
5165 | instruction.\r | |
af2dc6a7 | 5166 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5167 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5168 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5169 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5170 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5171 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5172 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5173 | instruction. This is an optional parameter that may be NULL.\r |
5174 | \r | |
2fe241a2 | 5175 | @return Index.\r |
ac644614 | 5176 | \r |
5177 | **/\r | |
5178 | UINT32\r | |
5179 | EFIAPI\r | |
5180 | AsmCpuid (\r | |
5181 | IN UINT32 Index,\r | |
5182 | OUT UINT32 *Eax, OPTIONAL\r | |
5183 | OUT UINT32 *Ebx, OPTIONAL\r | |
5184 | OUT UINT32 *Ecx, OPTIONAL\r | |
5185 | OUT UINT32 *Edx OPTIONAL\r | |
5186 | );\r | |
5187 | \r | |
5188 | \r | |
5189 | /**\r | |
5190 | Retrieves CPUID information using an extended leaf identifier.\r | |
5191 | \r | |
5192 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
5193 | and ECX set to the value specified by SubIndex. This function always returns\r | |
5194 | Index. This function is only available on IA-32 and x64.\r | |
5195 | \r | |
5196 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5197 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5198 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5199 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5200 | \r | |
5201 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
5202 | CPUID instruction.\r | |
5203 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
5204 | CPUID instruction.\r | |
af2dc6a7 | 5205 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5206 | instruction. This is an optional parameter that may be\r |
5207 | NULL.\r | |
af2dc6a7 | 5208 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5209 | instruction. This is an optional parameter that may be\r |
5210 | NULL.\r | |
af2dc6a7 | 5211 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5212 | instruction. This is an optional parameter that may be\r |
5213 | NULL.\r | |
af2dc6a7 | 5214 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5215 | instruction. This is an optional parameter that may be\r |
5216 | NULL.\r | |
5217 | \r | |
2fe241a2 | 5218 | @return Index.\r |
ac644614 | 5219 | \r |
5220 | **/\r | |
5221 | UINT32\r | |
5222 | EFIAPI\r | |
5223 | AsmCpuidEx (\r | |
5224 | IN UINT32 Index,\r | |
5225 | IN UINT32 SubIndex,\r | |
5226 | OUT UINT32 *Eax, OPTIONAL\r | |
5227 | OUT UINT32 *Ebx, OPTIONAL\r | |
5228 | OUT UINT32 *Ecx, OPTIONAL\r | |
5229 | OUT UINT32 *Edx OPTIONAL\r | |
5230 | );\r | |
5231 | \r | |
5232 | \r | |
be5f1614 | 5233 | /**\r |
5234 | Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r | |
5235 | \r | |
5236 | Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r | |
5237 | and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r | |
5238 | \r | |
5239 | **/\r | |
5240 | VOID\r | |
5241 | EFIAPI\r | |
5242 | AsmDisableCache (\r | |
5243 | VOID\r | |
5244 | );\r | |
5245 | \r | |
5246 | \r | |
5247 | /**\r | |
5248 | Perform a WBINVD and clear both the CD and NW bits of CR0.\r | |
5249 | \r | |
5250 | Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r | |
5251 | bits of CR0 to 0. This function is only available on IA-32 and x64.\r | |
5252 | \r | |
5253 | **/\r | |
5254 | VOID\r | |
5255 | EFIAPI\r | |
5256 | AsmEnableCache (\r | |
5257 | VOID\r | |
5258 | );\r | |
5259 | \r | |
5260 | \r | |
ac644614 | 5261 | /**\r |
5262 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
5263 | \r | |
5264 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
5265 | No parameter checking is performed on Index, and some Index values may cause\r | |
5266 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
5267 | caller must set up exception handlers to catch the exceptions. This function\r | |
030cd1a2 | 5268 | is only available on IA-32 and x64.\r |
ac644614 | 5269 | \r |
5270 | @param Index The 32-bit MSR index to read.\r | |
5271 | \r | |
5272 | @return The lower 32 bits of the MSR identified by Index.\r | |
5273 | \r | |
5274 | **/\r | |
5275 | UINT32\r | |
5276 | EFIAPI\r | |
5277 | AsmReadMsr32 (\r | |
5278 | IN UINT32 Index\r | |
5279 | );\r | |
5280 | \r | |
5281 | \r | |
5282 | /**\r | |
17f695ed | 5283 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
5284 | The upper 32-bits of the MSR are set to zero.\r | |
ac644614 | 5285 | \r |
5286 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
5287 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
5288 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
5289 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
5290 | that Index and Value are valid, or the caller must establish proper exception\r | |
030cd1a2 | 5291 | handlers. This function is only available on IA-32 and x64.\r |
ac644614 | 5292 | \r |
5293 | @param Index The 32-bit MSR index to write.\r | |
5294 | @param Value The 32-bit value to write to the MSR.\r | |
5295 | \r | |
5296 | @return Value\r | |
5297 | \r | |
5298 | **/\r | |
5299 | UINT32\r | |
5300 | EFIAPI\r | |
5301 | AsmWriteMsr32 (\r | |
5302 | IN UINT32 Index,\r | |
5303 | IN UINT32 Value\r | |
5304 | );\r | |
5305 | \r | |
5306 | \r | |
5307 | /**\r | |
62991af2 | 5308 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
ac644614 | 5309 | writes the result back to the 64-bit MSR.\r |
5310 | \r | |
62991af2 | 5311 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5312 | between the lower 32-bits of the read result and the value specified by\r |
5313 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
5314 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
5315 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
5316 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
5317 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5318 | IA-32 and x64.\r |
ac644614 | 5319 | \r |
5320 | @param Index The 32-bit MSR index to write.\r | |
5321 | @param OrData The value to OR with the read value from the MSR.\r | |
5322 | \r | |
5323 | @return The lower 32-bit value written to the MSR.\r | |
5324 | \r | |
5325 | **/\r | |
5326 | UINT32\r | |
5327 | EFIAPI\r | |
5328 | AsmMsrOr32 (\r | |
5329 | IN UINT32 Index,\r | |
5330 | IN UINT32 OrData\r | |
5331 | );\r | |
5332 | \r | |
5333 | \r | |
5334 | /**\r | |
5335 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
5336 | the result back to the 64-bit MSR.\r | |
5337 | \r | |
5338 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5339 | lower 32-bits of the read result and the value specified by AndData, and\r | |
5340 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
5341 | the value written to the MSR is returned. No parameter checking is performed\r | |
5342 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
5343 | must either guarantee that Index and AndData are valid, or the caller must\r | |
5344 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5345 | and x64.\r |
ac644614 | 5346 | \r |
5347 | @param Index The 32-bit MSR index to write.\r | |
5348 | @param AndData The value to AND with the read value from the MSR.\r | |
5349 | \r | |
5350 | @return The lower 32-bit value written to the MSR.\r | |
5351 | \r | |
5352 | **/\r | |
5353 | UINT32\r | |
5354 | EFIAPI\r | |
5355 | AsmMsrAnd32 (\r | |
5356 | IN UINT32 Index,\r | |
5357 | IN UINT32 AndData\r | |
5358 | );\r | |
5359 | \r | |
5360 | \r | |
5361 | /**\r | |
62991af2 | 5362 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
ac644614 | 5363 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
5364 | \r | |
5365 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5366 | lower 32-bits of the read result and the value specified by AndData\r | |
62991af2 | 5367 | preserving the upper 32-bits, performs a bitwise OR between the\r |
ac644614 | 5368 | result of the AND operation and the value specified by OrData, and writes the\r |
5369 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
5370 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
5371 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
5372 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
5373 | caller must establish proper exception handlers. This function is only\r | |
030cd1a2 | 5374 | available on IA-32 and x64.\r |
ac644614 | 5375 | \r |
5376 | @param Index The 32-bit MSR index to write.\r | |
5377 | @param AndData The value to AND with the read value from the MSR.\r | |
5378 | @param OrData The value to OR with the result of the AND operation.\r | |
5379 | \r | |
5380 | @return The lower 32-bit value written to the MSR.\r | |
5381 | \r | |
5382 | **/\r | |
5383 | UINT32\r | |
5384 | EFIAPI\r | |
5385 | AsmMsrAndThenOr32 (\r | |
5386 | IN UINT32 Index,\r | |
5387 | IN UINT32 AndData,\r | |
5388 | IN UINT32 OrData\r | |
5389 | );\r | |
5390 | \r | |
5391 | \r | |
5392 | /**\r | |
5393 | Reads a bit field of an MSR.\r | |
5394 | \r | |
5395 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
5396 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
5397 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
5398 | must set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5399 | available on IA-32 and x64.\r |
ac644614 | 5400 | \r |
5401 | If StartBit is greater than 31, then ASSERT().\r | |
5402 | If EndBit is greater than 31, then ASSERT().\r | |
5403 | If EndBit is less than StartBit, then ASSERT().\r | |
5404 | \r | |
5405 | @param Index The 32-bit MSR index to read.\r | |
5406 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5407 | Range 0..31.\r | |
5408 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5409 | Range 0..31.\r | |
5410 | \r | |
5411 | @return The bit field read from the MSR.\r | |
5412 | \r | |
5413 | **/\r | |
5414 | UINT32\r | |
5415 | EFIAPI\r | |
5416 | AsmMsrBitFieldRead32 (\r | |
5417 | IN UINT32 Index,\r | |
5418 | IN UINTN StartBit,\r | |
5419 | IN UINTN EndBit\r | |
5420 | );\r | |
5421 | \r | |
5422 | \r | |
5423 | /**\r | |
5424 | Writes a bit field to an MSR.\r | |
5425 | \r | |
2fe241a2 | 5426 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
ac644614 | 5427 | field is specified by the StartBit and the EndBit. All other bits in the\r |
5428 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
62991af2 | 5429 | returned. The caller must either guarantee that Index and the data written \r |
5430 | is valid, or the caller must set up exception handlers to catch the exceptions. \r | |
5431 | This function is only available on IA-32 and x64.\r | |
ac644614 | 5432 | \r |
5433 | If StartBit is greater than 31, then ASSERT().\r | |
5434 | If EndBit is greater than 31, then ASSERT().\r | |
5435 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5436 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5437 | \r |
5438 | @param Index The 32-bit MSR index to write.\r | |
5439 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5440 | Range 0..31.\r | |
5441 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5442 | Range 0..31.\r | |
5443 | @param Value New value of the bit field.\r | |
5444 | \r | |
5445 | @return The lower 32-bit of the value written to the MSR.\r | |
5446 | \r | |
5447 | **/\r | |
5448 | UINT32\r | |
5449 | EFIAPI\r | |
5450 | AsmMsrBitFieldWrite32 (\r | |
5451 | IN UINT32 Index,\r | |
5452 | IN UINTN StartBit,\r | |
5453 | IN UINTN EndBit,\r | |
5454 | IN UINT32 Value\r | |
5455 | );\r | |
5456 | \r | |
5457 | \r | |
5458 | /**\r | |
5459 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
5460 | result back to the bit field in the 64-bit MSR.\r | |
5461 | \r | |
62991af2 | 5462 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5463 | between the read result and the value specified by OrData, and writes the\r |
5464 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
5465 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
5466 | caller must either guarantee that Index and the data written is valid, or\r | |
5467 | the caller must set up exception handlers to catch the exceptions. This\r | |
030cd1a2 | 5468 | function is only available on IA-32 and x64.\r |
ac644614 | 5469 | \r |
5470 | If StartBit is greater than 31, then ASSERT().\r | |
5471 | If EndBit is greater than 31, then ASSERT().\r | |
5472 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5473 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5474 | \r |
5475 | @param Index The 32-bit MSR index to write.\r | |
5476 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5477 | Range 0..31.\r | |
5478 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5479 | Range 0..31.\r | |
5480 | @param OrData The value to OR with the read value from the MSR.\r | |
5481 | \r | |
5482 | @return The lower 32-bit of the value written to the MSR.\r | |
5483 | \r | |
5484 | **/\r | |
5485 | UINT32\r | |
5486 | EFIAPI\r | |
5487 | AsmMsrBitFieldOr32 (\r | |
5488 | IN UINT32 Index,\r | |
5489 | IN UINTN StartBit,\r | |
5490 | IN UINTN EndBit,\r | |
5491 | IN UINT32 OrData\r | |
5492 | );\r | |
5493 | \r | |
5494 | \r | |
5495 | /**\r | |
5496 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5497 | result back to the bit field in the 64-bit MSR.\r | |
5498 | \r | |
5499 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5500 | read result and the value specified by AndData, and writes the result to the\r | |
5501 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
5502 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
5503 | either guarantee that Index and the data written is valid, or the caller must\r | |
5504 | set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5505 | available on IA-32 and x64.\r |
ac644614 | 5506 | \r |
5507 | If StartBit is greater than 31, then ASSERT().\r | |
5508 | If EndBit is greater than 31, then ASSERT().\r | |
5509 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5510 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5511 | \r |
5512 | @param Index The 32-bit MSR index to write.\r | |
5513 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5514 | Range 0..31.\r | |
5515 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5516 | Range 0..31.\r | |
5517 | @param AndData The value to AND with the read value from the MSR.\r | |
5518 | \r | |
5519 | @return The lower 32-bit of the value written to the MSR.\r | |
5520 | \r | |
5521 | **/\r | |
5522 | UINT32\r | |
5523 | EFIAPI\r | |
5524 | AsmMsrBitFieldAnd32 (\r | |
5525 | IN UINT32 Index,\r | |
5526 | IN UINTN StartBit,\r | |
5527 | IN UINTN EndBit,\r | |
5528 | IN UINT32 AndData\r | |
5529 | );\r | |
5530 | \r | |
5531 | \r | |
5532 | /**\r | |
5533 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5534 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5535 | 64-bit MSR.\r |
5536 | \r | |
5537 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
62991af2 | 5538 | bitwise OR between the read result and the value specified by\r |
ac644614 | 5539 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5540 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
5541 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
5542 | that Index and the data written is valid, or the caller must set up exception\r | |
5543 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5544 | and x64.\r |
ac644614 | 5545 | \r |
5546 | If StartBit is greater than 31, then ASSERT().\r | |
5547 | If EndBit is greater than 31, then ASSERT().\r | |
5548 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
5549 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
5550 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 5551 | \r |
5552 | @param Index The 32-bit MSR index to write.\r | |
5553 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5554 | Range 0..31.\r | |
5555 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5556 | Range 0..31.\r | |
5557 | @param AndData The value to AND with the read value from the MSR.\r | |
5558 | @param OrData The value to OR with the result of the AND operation.\r | |
5559 | \r | |
5560 | @return The lower 32-bit of the value written to the MSR.\r | |
5561 | \r | |
5562 | **/\r | |
5563 | UINT32\r | |
5564 | EFIAPI\r | |
5565 | AsmMsrBitFieldAndThenOr32 (\r | |
5566 | IN UINT32 Index,\r | |
5567 | IN UINTN StartBit,\r | |
5568 | IN UINTN EndBit,\r | |
5569 | IN UINT32 AndData,\r | |
5570 | IN UINT32 OrData\r | |
5571 | );\r | |
5572 | \r | |
5573 | \r | |
5574 | /**\r | |
5575 | Returns a 64-bit Machine Specific Register(MSR).\r | |
5576 | \r | |
5577 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
5578 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
5579 | caller must either guarantee that Index is valid, or the caller must set up\r | |
5580 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5581 | on IA-32 and x64.\r |
ac644614 | 5582 | \r |
5583 | @param Index The 32-bit MSR index to read.\r | |
5584 | \r | |
5585 | @return The value of the MSR identified by Index.\r | |
5586 | \r | |
5587 | **/\r | |
5588 | UINT64\r | |
5589 | EFIAPI\r | |
5590 | AsmReadMsr64 (\r | |
5591 | IN UINT32 Index\r | |
5592 | );\r | |
5593 | \r | |
5594 | \r | |
5595 | /**\r | |
5596 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
5597 | value.\r | |
5598 | \r | |
5599 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
5600 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
5601 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
5602 | caller must either guarantee that Index and Value are valid, or the caller\r | |
5603 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5604 | IA-32 and x64.\r |
ac644614 | 5605 | \r |
5606 | @param Index The 32-bit MSR index to write.\r | |
5607 | @param Value The 64-bit value to write to the MSR.\r | |
5608 | \r | |
5609 | @return Value\r | |
5610 | \r | |
5611 | **/\r | |
5612 | UINT64\r | |
5613 | EFIAPI\r | |
5614 | AsmWriteMsr64 (\r | |
5615 | IN UINT32 Index,\r | |
5616 | IN UINT64 Value\r | |
5617 | );\r | |
5618 | \r | |
5619 | \r | |
5620 | /**\r | |
62991af2 | 5621 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
ac644614 | 5622 | back to the 64-bit MSR.\r |
5623 | \r | |
62991af2 | 5624 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5625 | between the read result and the value specified by OrData, and writes the\r |
5626 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5627 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
5628 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
5629 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
030cd1a2 | 5630 | This function is only available on IA-32 and x64.\r |
ac644614 | 5631 | \r |
5632 | @param Index The 32-bit MSR index to write.\r | |
5633 | @param OrData The value to OR with the read value from the MSR.\r | |
5634 | \r | |
5635 | @return The value written back to the MSR.\r | |
5636 | \r | |
5637 | **/\r | |
5638 | UINT64\r | |
5639 | EFIAPI\r | |
5640 | AsmMsrOr64 (\r | |
5641 | IN UINT32 Index,\r | |
5642 | IN UINT64 OrData\r | |
5643 | );\r | |
5644 | \r | |
5645 | \r | |
5646 | /**\r | |
5647 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
5648 | 64-bit MSR.\r | |
5649 | \r | |
5650 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5651 | read result and the value specified by OrData, and writes the result to the\r | |
5652 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
5653 | parameter checking is performed on Index or OrData, and some of these may\r | |
5654 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
5655 | are valid, or the caller must establish proper exception handlers. This\r | |
030cd1a2 | 5656 | function is only available on IA-32 and x64.\r |
ac644614 | 5657 | \r |
5658 | @param Index The 32-bit MSR index to write.\r | |
5659 | @param AndData The value to AND with the read value from the MSR.\r | |
5660 | \r | |
5661 | @return The value written back to the MSR.\r | |
5662 | \r | |
5663 | **/\r | |
5664 | UINT64\r | |
5665 | EFIAPI\r | |
5666 | AsmMsrAnd64 (\r | |
5667 | IN UINT32 Index,\r | |
5668 | IN UINT64 AndData\r | |
5669 | );\r | |
5670 | \r | |
5671 | \r | |
5672 | /**\r | |
62991af2 | 5673 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r |
ac644614 | 5674 | OR, and writes the result back to the 64-bit MSR.\r |
5675 | \r | |
5676 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
62991af2 | 5677 | result and the value specified by AndData, performs a bitwise OR\r |
ac644614 | 5678 | between the result of the AND operation and the value specified by OrData,\r |
5679 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
5680 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
5681 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
5682 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
5683 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5684 | and x64.\r |
ac644614 | 5685 | \r |
5686 | @param Index The 32-bit MSR index to write.\r | |
5687 | @param AndData The value to AND with the read value from the MSR.\r | |
5688 | @param OrData The value to OR with the result of the AND operation.\r | |
5689 | \r | |
5690 | @return The value written back to the MSR.\r | |
5691 | \r | |
5692 | **/\r | |
5693 | UINT64\r | |
5694 | EFIAPI\r | |
5695 | AsmMsrAndThenOr64 (\r | |
5696 | IN UINT32 Index,\r | |
5697 | IN UINT64 AndData,\r | |
5698 | IN UINT64 OrData\r | |
5699 | );\r | |
5700 | \r | |
5701 | \r | |
5702 | /**\r | |
5703 | Reads a bit field of an MSR.\r | |
5704 | \r | |
5705 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
5706 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
5707 | must either guarantee that Index is valid, or the caller must set up\r | |
5708 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5709 | on IA-32 and x64.\r |
ac644614 | 5710 | \r |
5711 | If StartBit is greater than 63, then ASSERT().\r | |
5712 | If EndBit is greater than 63, then ASSERT().\r | |
5713 | If EndBit is less than StartBit, then ASSERT().\r | |
5714 | \r | |
5715 | @param Index The 32-bit MSR index to read.\r | |
5716 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5717 | Range 0..63.\r | |
5718 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5719 | Range 0..63.\r | |
5720 | \r | |
5721 | @return The value read from the MSR.\r | |
5722 | \r | |
5723 | **/\r | |
5724 | UINT64\r | |
5725 | EFIAPI\r | |
5726 | AsmMsrBitFieldRead64 (\r | |
5727 | IN UINT32 Index,\r | |
5728 | IN UINTN StartBit,\r | |
5729 | IN UINTN EndBit\r | |
5730 | );\r | |
5731 | \r | |
5732 | \r | |
5733 | /**\r | |
5734 | Writes a bit field to an MSR.\r | |
5735 | \r | |
5736 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
5737 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
62991af2 | 5738 | preserved. The MSR written is returned. The caller must either guarantee \r |
5739 | that Index and the data written is valid, or the caller must set up exception \r | |
5740 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r | |
ac644614 | 5741 | \r |
5742 | If StartBit is greater than 63, then ASSERT().\r | |
5743 | If EndBit is greater than 63, then ASSERT().\r | |
5744 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5745 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5746 | \r |
5747 | @param Index The 32-bit MSR index to write.\r | |
5748 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5749 | Range 0..63.\r | |
5750 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5751 | Range 0..63.\r | |
5752 | @param Value New value of the bit field.\r | |
5753 | \r | |
5754 | @return The value written back to the MSR.\r | |
5755 | \r | |
5756 | **/\r | |
5757 | UINT64\r | |
5758 | EFIAPI\r | |
5759 | AsmMsrBitFieldWrite64 (\r | |
5760 | IN UINT32 Index,\r | |
5761 | IN UINTN StartBit,\r | |
5762 | IN UINTN EndBit,\r | |
5763 | IN UINT64 Value\r | |
5764 | );\r | |
5765 | \r | |
5766 | \r | |
5767 | /**\r | |
62991af2 | 5768 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
ac644614 | 5769 | writes the result back to the bit field in the 64-bit MSR.\r |
5770 | \r | |
62991af2 | 5771 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5772 | between the read result and the value specified by OrData, and writes the\r |
5773 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5774 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
5775 | guarantee that Index and the data written is valid, or the caller must set up\r | |
5776 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5777 | on IA-32 and x64.\r |
ac644614 | 5778 | \r |
5779 | If StartBit is greater than 63, then ASSERT().\r | |
5780 | If EndBit is greater than 63, then ASSERT().\r | |
5781 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5782 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5783 | \r |
5784 | @param Index The 32-bit MSR index to write.\r | |
5785 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5786 | Range 0..63.\r | |
5787 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5788 | Range 0..63.\r | |
5789 | @param OrData The value to OR with the read value from the bit field.\r | |
5790 | \r | |
5791 | @return The value written back to the MSR.\r | |
5792 | \r | |
5793 | **/\r | |
5794 | UINT64\r | |
5795 | EFIAPI\r | |
5796 | AsmMsrBitFieldOr64 (\r | |
5797 | IN UINT32 Index,\r | |
5798 | IN UINTN StartBit,\r | |
5799 | IN UINTN EndBit,\r | |
5800 | IN UINT64 OrData\r | |
5801 | );\r | |
5802 | \r | |
5803 | \r | |
5804 | /**\r | |
5805 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5806 | result back to the bit field in the 64-bit MSR.\r | |
5807 | \r | |
5808 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5809 | read result and the value specified by AndData, and writes the result to the\r | |
5810 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
5811 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
5812 | that Index and the data written is valid, or the caller must set up exception\r | |
5813 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5814 | and x64.\r |
ac644614 | 5815 | \r |
5816 | If StartBit is greater than 63, then ASSERT().\r | |
5817 | If EndBit is greater than 63, then ASSERT().\r | |
5818 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5819 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5820 | \r |
5821 | @param Index The 32-bit MSR index to write.\r | |
5822 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5823 | Range 0..63.\r | |
5824 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5825 | Range 0..63.\r | |
5826 | @param AndData The value to AND with the read value from the bit field.\r | |
5827 | \r | |
5828 | @return The value written back to the MSR.\r | |
5829 | \r | |
5830 | **/\r | |
5831 | UINT64\r | |
5832 | EFIAPI\r | |
5833 | AsmMsrBitFieldAnd64 (\r | |
5834 | IN UINT32 Index,\r | |
5835 | IN UINTN StartBit,\r | |
5836 | IN UINTN EndBit,\r | |
5837 | IN UINT64 AndData\r | |
5838 | );\r | |
5839 | \r | |
5840 | \r | |
5841 | /**\r | |
5842 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5843 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5844 | 64-bit MSR.\r |
5845 | \r | |
5846 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
62991af2 | 5847 | a bitwise OR between the read result and the value specified by\r |
ac644614 | 5848 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5849 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
5850 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
5851 | written is valid, or the caller must set up exception handlers to catch the\r | |
030cd1a2 | 5852 | exceptions. This function is only available on IA-32 and x64.\r |
ac644614 | 5853 | \r |
5854 | If StartBit is greater than 63, then ASSERT().\r | |
5855 | If EndBit is greater than 63, then ASSERT().\r | |
5856 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
5857 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
5858 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 5859 | \r |
5860 | @param Index The 32-bit MSR index to write.\r | |
5861 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5862 | Range 0..63.\r | |
5863 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5864 | Range 0..63.\r | |
5865 | @param AndData The value to AND with the read value from the bit field.\r | |
5866 | @param OrData The value to OR with the result of the AND operation.\r | |
5867 | \r | |
5868 | @return The value written back to the MSR.\r | |
5869 | \r | |
5870 | **/\r | |
5871 | UINT64\r | |
5872 | EFIAPI\r | |
5873 | AsmMsrBitFieldAndThenOr64 (\r | |
5874 | IN UINT32 Index,\r | |
5875 | IN UINTN StartBit,\r | |
5876 | IN UINTN EndBit,\r | |
5877 | IN UINT64 AndData,\r | |
5878 | IN UINT64 OrData\r | |
5879 | );\r | |
5880 | \r | |
5881 | \r | |
5882 | /**\r | |
5883 | Reads the current value of the EFLAGS register.\r | |
5884 | \r | |
5885 | Reads and returns the current value of the EFLAGS register. This function is\r | |
030cd1a2 | 5886 | only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r |
5887 | 64-bit value on x64.\r | |
ac644614 | 5888 | \r |
030cd1a2 | 5889 | @return EFLAGS on IA-32 or RFLAGS on x64.\r |
ac644614 | 5890 | \r |
5891 | **/\r | |
5892 | UINTN\r | |
5893 | EFIAPI\r | |
5894 | AsmReadEflags (\r | |
5895 | VOID\r | |
5896 | );\r | |
5897 | \r | |
5898 | \r | |
5899 | /**\r | |
5900 | Reads the current value of the Control Register 0 (CR0).\r | |
5901 | \r | |
5902 | Reads and returns the current value of CR0. This function is only available\r | |
030cd1a2 | 5903 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5904 | x64.\r | |
ac644614 | 5905 | \r |
5906 | @return The value of the Control Register 0 (CR0).\r | |
5907 | \r | |
5908 | **/\r | |
5909 | UINTN\r | |
5910 | EFIAPI\r | |
5911 | AsmReadCr0 (\r | |
5912 | VOID\r | |
5913 | );\r | |
5914 | \r | |
5915 | \r | |
5916 | /**\r | |
5917 | Reads the current value of the Control Register 2 (CR2).\r | |
5918 | \r | |
5919 | Reads and returns the current value of CR2. This function is only available\r | |
030cd1a2 | 5920 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5921 | x64.\r | |
ac644614 | 5922 | \r |
5923 | @return The value of the Control Register 2 (CR2).\r | |
5924 | \r | |
5925 | **/\r | |
5926 | UINTN\r | |
5927 | EFIAPI\r | |
5928 | AsmReadCr2 (\r | |
5929 | VOID\r | |
5930 | );\r | |
5931 | \r | |
5932 | \r | |
5933 | /**\r | |
5934 | Reads the current value of the Control Register 3 (CR3).\r | |
5935 | \r | |
5936 | Reads and returns the current value of CR3. This function is only available\r | |
030cd1a2 | 5937 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5938 | x64.\r | |
ac644614 | 5939 | \r |
5940 | @return The value of the Control Register 3 (CR3).\r | |
5941 | \r | |
5942 | **/\r | |
5943 | UINTN\r | |
5944 | EFIAPI\r | |
5945 | AsmReadCr3 (\r | |
5946 | VOID\r | |
5947 | );\r | |
5948 | \r | |
5949 | \r | |
5950 | /**\r | |
5951 | Reads the current value of the Control Register 4 (CR4).\r | |
5952 | \r | |
5953 | Reads and returns the current value of CR4. This function is only available\r | |
030cd1a2 | 5954 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5955 | x64.\r | |
ac644614 | 5956 | \r |
5957 | @return The value of the Control Register 4 (CR4).\r | |
5958 | \r | |
5959 | **/\r | |
5960 | UINTN\r | |
5961 | EFIAPI\r | |
5962 | AsmReadCr4 (\r | |
5963 | VOID\r | |
5964 | );\r | |
5965 | \r | |
5966 | \r | |
5967 | /**\r | |
5968 | Writes a value to Control Register 0 (CR0).\r | |
5969 | \r | |
5970 | Writes and returns a new value to CR0. This function is only available on\r | |
030cd1a2 | 5971 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5972 | \r |
5973 | @param Cr0 The value to write to CR0.\r | |
5974 | \r | |
5975 | @return The value written to CR0.\r | |
5976 | \r | |
5977 | **/\r | |
5978 | UINTN\r | |
5979 | EFIAPI\r | |
5980 | AsmWriteCr0 (\r | |
5981 | UINTN Cr0\r | |
5982 | );\r | |
5983 | \r | |
5984 | \r | |
5985 | /**\r | |
5986 | Writes a value to Control Register 2 (CR2).\r | |
5987 | \r | |
5988 | Writes and returns a new value to CR2. This function is only available on\r | |
030cd1a2 | 5989 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5990 | \r |
5991 | @param Cr2 The value to write to CR2.\r | |
5992 | \r | |
5993 | @return The value written to CR2.\r | |
5994 | \r | |
5995 | **/\r | |
5996 | UINTN\r | |
5997 | EFIAPI\r | |
5998 | AsmWriteCr2 (\r | |
5999 | UINTN Cr2\r | |
6000 | );\r | |
6001 | \r | |
6002 | \r | |
6003 | /**\r | |
6004 | Writes a value to Control Register 3 (CR3).\r | |
6005 | \r | |
6006 | Writes and returns a new value to CR3. This function is only available on\r | |
030cd1a2 | 6007 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6008 | \r |
6009 | @param Cr3 The value to write to CR3.\r | |
6010 | \r | |
6011 | @return The value written to CR3.\r | |
6012 | \r | |
6013 | **/\r | |
6014 | UINTN\r | |
6015 | EFIAPI\r | |
6016 | AsmWriteCr3 (\r | |
6017 | UINTN Cr3\r | |
6018 | );\r | |
6019 | \r | |
6020 | \r | |
6021 | /**\r | |
6022 | Writes a value to Control Register 4 (CR4).\r | |
6023 | \r | |
6024 | Writes and returns a new value to CR4. This function is only available on\r | |
030cd1a2 | 6025 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6026 | \r |
6027 | @param Cr4 The value to write to CR4.\r | |
6028 | \r | |
6029 | @return The value written to CR4.\r | |
6030 | \r | |
6031 | **/\r | |
6032 | UINTN\r | |
6033 | EFIAPI\r | |
6034 | AsmWriteCr4 (\r | |
6035 | UINTN Cr4\r | |
6036 | );\r | |
6037 | \r | |
6038 | \r | |
6039 | /**\r | |
6040 | Reads the current value of Debug Register 0 (DR0).\r | |
6041 | \r | |
6042 | Reads and returns the current value of DR0. This function is only available\r | |
030cd1a2 | 6043 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6044 | x64.\r | |
ac644614 | 6045 | \r |
6046 | @return The value of Debug Register 0 (DR0).\r | |
6047 | \r | |
6048 | **/\r | |
6049 | UINTN\r | |
6050 | EFIAPI\r | |
6051 | AsmReadDr0 (\r | |
6052 | VOID\r | |
6053 | );\r | |
6054 | \r | |
6055 | \r | |
6056 | /**\r | |
6057 | Reads the current value of Debug Register 1 (DR1).\r | |
6058 | \r | |
6059 | Reads and returns the current value of DR1. This function is only available\r | |
030cd1a2 | 6060 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6061 | x64.\r | |
ac644614 | 6062 | \r |
6063 | @return The value of Debug Register 1 (DR1).\r | |
6064 | \r | |
6065 | **/\r | |
6066 | UINTN\r | |
6067 | EFIAPI\r | |
6068 | AsmReadDr1 (\r | |
6069 | VOID\r | |
6070 | );\r | |
6071 | \r | |
6072 | \r | |
6073 | /**\r | |
6074 | Reads the current value of Debug Register 2 (DR2).\r | |
6075 | \r | |
6076 | Reads and returns the current value of DR2. This function is only available\r | |
030cd1a2 | 6077 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6078 | x64.\r | |
ac644614 | 6079 | \r |
6080 | @return The value of Debug Register 2 (DR2).\r | |
6081 | \r | |
6082 | **/\r | |
6083 | UINTN\r | |
6084 | EFIAPI\r | |
6085 | AsmReadDr2 (\r | |
6086 | VOID\r | |
6087 | );\r | |
6088 | \r | |
6089 | \r | |
6090 | /**\r | |
6091 | Reads the current value of Debug Register 3 (DR3).\r | |
6092 | \r | |
6093 | Reads and returns the current value of DR3. This function is only available\r | |
030cd1a2 | 6094 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6095 | x64.\r | |
ac644614 | 6096 | \r |
6097 | @return The value of Debug Register 3 (DR3).\r | |
6098 | \r | |
6099 | **/\r | |
6100 | UINTN\r | |
6101 | EFIAPI\r | |
6102 | AsmReadDr3 (\r | |
6103 | VOID\r | |
6104 | );\r | |
6105 | \r | |
6106 | \r | |
6107 | /**\r | |
6108 | Reads the current value of Debug Register 4 (DR4).\r | |
6109 | \r | |
6110 | Reads and returns the current value of DR4. This function is only available\r | |
030cd1a2 | 6111 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6112 | x64.\r | |
ac644614 | 6113 | \r |
6114 | @return The value of Debug Register 4 (DR4).\r | |
6115 | \r | |
6116 | **/\r | |
6117 | UINTN\r | |
6118 | EFIAPI\r | |
6119 | AsmReadDr4 (\r | |
6120 | VOID\r | |
6121 | );\r | |
6122 | \r | |
6123 | \r | |
6124 | /**\r | |
6125 | Reads the current value of Debug Register 5 (DR5).\r | |
6126 | \r | |
6127 | Reads and returns the current value of DR5. This function is only available\r | |
030cd1a2 | 6128 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6129 | x64.\r | |
ac644614 | 6130 | \r |
6131 | @return The value of Debug Register 5 (DR5).\r | |
6132 | \r | |
6133 | **/\r | |
6134 | UINTN\r | |
6135 | EFIAPI\r | |
6136 | AsmReadDr5 (\r | |
6137 | VOID\r | |
6138 | );\r | |
6139 | \r | |
6140 | \r | |
6141 | /**\r | |
6142 | Reads the current value of Debug Register 6 (DR6).\r | |
6143 | \r | |
6144 | Reads and returns the current value of DR6. This function is only available\r | |
030cd1a2 | 6145 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6146 | x64.\r | |
ac644614 | 6147 | \r |
6148 | @return The value of Debug Register 6 (DR6).\r | |
6149 | \r | |
6150 | **/\r | |
6151 | UINTN\r | |
6152 | EFIAPI\r | |
6153 | AsmReadDr6 (\r | |
6154 | VOID\r | |
6155 | );\r | |
6156 | \r | |
6157 | \r | |
6158 | /**\r | |
6159 | Reads the current value of Debug Register 7 (DR7).\r | |
6160 | \r | |
6161 | Reads and returns the current value of DR7. This function is only available\r | |
030cd1a2 | 6162 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6163 | x64.\r | |
ac644614 | 6164 | \r |
6165 | @return The value of Debug Register 7 (DR7).\r | |
6166 | \r | |
6167 | **/\r | |
6168 | UINTN\r | |
6169 | EFIAPI\r | |
6170 | AsmReadDr7 (\r | |
6171 | VOID\r | |
6172 | );\r | |
6173 | \r | |
6174 | \r | |
6175 | /**\r | |
6176 | Writes a value to Debug Register 0 (DR0).\r | |
6177 | \r | |
6178 | Writes and returns a new value to DR0. This function is only available on\r | |
030cd1a2 | 6179 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6180 | \r |
6181 | @param Dr0 The value to write to Dr0.\r | |
6182 | \r | |
6183 | @return The value written to Debug Register 0 (DR0).\r | |
6184 | \r | |
6185 | **/\r | |
6186 | UINTN\r | |
6187 | EFIAPI\r | |
6188 | AsmWriteDr0 (\r | |
6189 | UINTN Dr0\r | |
6190 | );\r | |
6191 | \r | |
6192 | \r | |
6193 | /**\r | |
6194 | Writes a value to Debug Register 1 (DR1).\r | |
6195 | \r | |
6196 | Writes and returns a new value to DR1. This function is only available on\r | |
030cd1a2 | 6197 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6198 | \r |
6199 | @param Dr1 The value to write to Dr1.\r | |
6200 | \r | |
6201 | @return The value written to Debug Register 1 (DR1).\r | |
6202 | \r | |
6203 | **/\r | |
6204 | UINTN\r | |
6205 | EFIAPI\r | |
6206 | AsmWriteDr1 (\r | |
6207 | UINTN Dr1\r | |
6208 | );\r | |
6209 | \r | |
6210 | \r | |
6211 | /**\r | |
6212 | Writes a value to Debug Register 2 (DR2).\r | |
6213 | \r | |
6214 | Writes and returns a new value to DR2. This function is only available on\r | |
030cd1a2 | 6215 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6216 | \r |
6217 | @param Dr2 The value to write to Dr2.\r | |
6218 | \r | |
6219 | @return The value written to Debug Register 2 (DR2).\r | |
6220 | \r | |
6221 | **/\r | |
6222 | UINTN\r | |
6223 | EFIAPI\r | |
6224 | AsmWriteDr2 (\r | |
6225 | UINTN Dr2\r | |
6226 | );\r | |
6227 | \r | |
6228 | \r | |
6229 | /**\r | |
6230 | Writes a value to Debug Register 3 (DR3).\r | |
6231 | \r | |
6232 | Writes and returns a new value to DR3. This function is only available on\r | |
030cd1a2 | 6233 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6234 | \r |
6235 | @param Dr3 The value to write to Dr3.\r | |
6236 | \r | |
6237 | @return The value written to Debug Register 3 (DR3).\r | |
6238 | \r | |
6239 | **/\r | |
6240 | UINTN\r | |
6241 | EFIAPI\r | |
6242 | AsmWriteDr3 (\r | |
6243 | UINTN Dr3\r | |
6244 | );\r | |
6245 | \r | |
6246 | \r | |
6247 | /**\r | |
6248 | Writes a value to Debug Register 4 (DR4).\r | |
6249 | \r | |
6250 | Writes and returns a new value to DR4. This function is only available on\r | |
030cd1a2 | 6251 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6252 | \r |
6253 | @param Dr4 The value to write to Dr4.\r | |
6254 | \r | |
6255 | @return The value written to Debug Register 4 (DR4).\r | |
6256 | \r | |
6257 | **/\r | |
6258 | UINTN\r | |
6259 | EFIAPI\r | |
6260 | AsmWriteDr4 (\r | |
6261 | UINTN Dr4\r | |
6262 | );\r | |
6263 | \r | |
6264 | \r | |
6265 | /**\r | |
6266 | Writes a value to Debug Register 5 (DR5).\r | |
6267 | \r | |
6268 | Writes and returns a new value to DR5. This function is only available on\r | |
030cd1a2 | 6269 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6270 | \r |
6271 | @param Dr5 The value to write to Dr5.\r | |
6272 | \r | |
6273 | @return The value written to Debug Register 5 (DR5).\r | |
6274 | \r | |
6275 | **/\r | |
6276 | UINTN\r | |
6277 | EFIAPI\r | |
6278 | AsmWriteDr5 (\r | |
6279 | UINTN Dr5\r | |
6280 | );\r | |
6281 | \r | |
6282 | \r | |
6283 | /**\r | |
6284 | Writes a value to Debug Register 6 (DR6).\r | |
6285 | \r | |
6286 | Writes and returns a new value to DR6. This function is only available on\r | |
030cd1a2 | 6287 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6288 | \r |
6289 | @param Dr6 The value to write to Dr6.\r | |
6290 | \r | |
6291 | @return The value written to Debug Register 6 (DR6).\r | |
6292 | \r | |
6293 | **/\r | |
6294 | UINTN\r | |
6295 | EFIAPI\r | |
6296 | AsmWriteDr6 (\r | |
6297 | UINTN Dr6\r | |
6298 | );\r | |
6299 | \r | |
6300 | \r | |
6301 | /**\r | |
6302 | Writes a value to Debug Register 7 (DR7).\r | |
6303 | \r | |
6304 | Writes and returns a new value to DR7. This function is only available on\r | |
030cd1a2 | 6305 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6306 | \r |
6307 | @param Dr7 The value to write to Dr7.\r | |
6308 | \r | |
6309 | @return The value written to Debug Register 7 (DR7).\r | |
6310 | \r | |
6311 | **/\r | |
6312 | UINTN\r | |
6313 | EFIAPI\r | |
6314 | AsmWriteDr7 (\r | |
6315 | UINTN Dr7\r | |
6316 | );\r | |
6317 | \r | |
6318 | \r | |
6319 | /**\r | |
6320 | Reads the current value of Code Segment Register (CS).\r | |
6321 | \r | |
6322 | Reads and returns the current value of CS. This function is only available on\r | |
030cd1a2 | 6323 | IA-32 and x64.\r |
ac644614 | 6324 | \r |
6325 | @return The current value of CS.\r | |
6326 | \r | |
6327 | **/\r | |
6328 | UINT16\r | |
6329 | EFIAPI\r | |
6330 | AsmReadCs (\r | |
6331 | VOID\r | |
6332 | );\r | |
6333 | \r | |
6334 | \r | |
6335 | /**\r | |
6336 | Reads the current value of Data Segment Register (DS).\r | |
6337 | \r | |
6338 | Reads and returns the current value of DS. This function is only available on\r | |
030cd1a2 | 6339 | IA-32 and x64.\r |
ac644614 | 6340 | \r |
6341 | @return The current value of DS.\r | |
6342 | \r | |
6343 | **/\r | |
6344 | UINT16\r | |
6345 | EFIAPI\r | |
6346 | AsmReadDs (\r | |
6347 | VOID\r | |
6348 | );\r | |
6349 | \r | |
6350 | \r | |
6351 | /**\r | |
6352 | Reads the current value of Extra Segment Register (ES).\r | |
6353 | \r | |
6354 | Reads and returns the current value of ES. This function is only available on\r | |
030cd1a2 | 6355 | IA-32 and x64.\r |
ac644614 | 6356 | \r |
6357 | @return The current value of ES.\r | |
6358 | \r | |
6359 | **/\r | |
6360 | UINT16\r | |
6361 | EFIAPI\r | |
6362 | AsmReadEs (\r | |
6363 | VOID\r | |
6364 | );\r | |
6365 | \r | |
6366 | \r | |
6367 | /**\r | |
6368 | Reads the current value of FS Data Segment Register (FS).\r | |
6369 | \r | |
6370 | Reads and returns the current value of FS. This function is only available on\r | |
030cd1a2 | 6371 | IA-32 and x64.\r |
ac644614 | 6372 | \r |
6373 | @return The current value of FS.\r | |
6374 | \r | |
6375 | **/\r | |
6376 | UINT16\r | |
6377 | EFIAPI\r | |
6378 | AsmReadFs (\r | |
6379 | VOID\r | |
6380 | );\r | |
6381 | \r | |
6382 | \r | |
6383 | /**\r | |
6384 | Reads the current value of GS Data Segment Register (GS).\r | |
6385 | \r | |
6386 | Reads and returns the current value of GS. This function is only available on\r | |
030cd1a2 | 6387 | IA-32 and x64.\r |
ac644614 | 6388 | \r |
6389 | @return The current value of GS.\r | |
6390 | \r | |
6391 | **/\r | |
6392 | UINT16\r | |
6393 | EFIAPI\r | |
6394 | AsmReadGs (\r | |
6395 | VOID\r | |
6396 | );\r | |
6397 | \r | |
6398 | \r | |
6399 | /**\r | |
6400 | Reads the current value of Stack Segment Register (SS).\r | |
6401 | \r | |
6402 | Reads and returns the current value of SS. This function is only available on\r | |
030cd1a2 | 6403 | IA-32 and x64.\r |
ac644614 | 6404 | \r |
6405 | @return The current value of SS.\r | |
6406 | \r | |
6407 | **/\r | |
6408 | UINT16\r | |
6409 | EFIAPI\r | |
6410 | AsmReadSs (\r | |
6411 | VOID\r | |
6412 | );\r | |
6413 | \r | |
6414 | \r | |
6415 | /**\r | |
6416 | Reads the current value of Task Register (TR).\r | |
6417 | \r | |
6418 | Reads and returns the current value of TR. This function is only available on\r | |
030cd1a2 | 6419 | IA-32 and x64.\r |
ac644614 | 6420 | \r |
6421 | @return The current value of TR.\r | |
6422 | \r | |
6423 | **/\r | |
6424 | UINT16\r | |
6425 | EFIAPI\r | |
6426 | AsmReadTr (\r | |
6427 | VOID\r | |
6428 | );\r | |
6429 | \r | |
6430 | \r | |
6431 | /**\r | |
6432 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
6433 | \r | |
6434 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
030cd1a2 | 6435 | function is only available on IA-32 and x64.\r |
ac644614 | 6436 | \r |
6437 | If Gdtr is NULL, then ASSERT().\r | |
6438 | \r | |
af2dc6a7 | 6439 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6440 | \r |
6441 | **/\r | |
6442 | VOID\r | |
6443 | EFIAPI\r | |
6444 | AsmReadGdtr (\r | |
6445 | OUT IA32_DESCRIPTOR *Gdtr\r | |
6446 | );\r | |
6447 | \r | |
6448 | \r | |
6449 | /**\r | |
6450 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
6451 | \r | |
6452 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
030cd1a2 | 6453 | only available on IA-32 and x64.\r |
ac644614 | 6454 | \r |
6455 | If Gdtr is NULL, then ASSERT().\r | |
6456 | \r | |
af2dc6a7 | 6457 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6458 | \r |
6459 | **/\r | |
6460 | VOID\r | |
6461 | EFIAPI\r | |
6462 | AsmWriteGdtr (\r | |
6463 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
6464 | );\r | |
6465 | \r | |
6466 | \r | |
6467 | /**\r | |
17f695ed | 6468 | Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6469 | \r |
6470 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
030cd1a2 | 6471 | function is only available on IA-32 and x64.\r |
ac644614 | 6472 | \r |
6473 | If Idtr is NULL, then ASSERT().\r | |
6474 | \r | |
af2dc6a7 | 6475 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6476 | \r |
6477 | **/\r | |
6478 | VOID\r | |
6479 | EFIAPI\r | |
6480 | AsmReadIdtr (\r | |
6481 | OUT IA32_DESCRIPTOR *Idtr\r | |
6482 | );\r | |
6483 | \r | |
6484 | \r | |
6485 | /**\r | |
17f695ed | 6486 | Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6487 | \r |
6488 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
030cd1a2 | 6489 | only available on IA-32 and x64.\r |
ac644614 | 6490 | \r |
6491 | If Idtr is NULL, then ASSERT().\r | |
6492 | \r | |
af2dc6a7 | 6493 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6494 | \r |
6495 | **/\r | |
6496 | VOID\r | |
6497 | EFIAPI\r | |
6498 | AsmWriteIdtr (\r | |
6499 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
6500 | );\r | |
6501 | \r | |
6502 | \r | |
6503 | /**\r | |
6504 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
6505 | \r | |
6506 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
030cd1a2 | 6507 | only available on IA-32 and x64.\r |
ac644614 | 6508 | \r |
6509 | @return The current selector of LDT.\r | |
6510 | \r | |
6511 | **/\r | |
6512 | UINT16\r | |
6513 | EFIAPI\r | |
6514 | AsmReadLdtr (\r | |
6515 | VOID\r | |
6516 | );\r | |
6517 | \r | |
6518 | \r | |
6519 | /**\r | |
17f695ed | 6520 | Writes the current Local Descriptor Table Register (LDTR) selector.\r |
ac644614 | 6521 | \r |
6522 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
030cd1a2 | 6523 | only available on IA-32 and x64.\r |
ac644614 | 6524 | \r |
6525 | @param Ldtr 16-bit LDTR selector value.\r | |
6526 | \r | |
6527 | **/\r | |
6528 | VOID\r | |
6529 | EFIAPI\r | |
6530 | AsmWriteLdtr (\r | |
6531 | IN UINT16 Ldtr\r | |
6532 | );\r | |
6533 | \r | |
6534 | \r | |
6535 | /**\r | |
6536 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
6537 | \r | |
6538 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
6539 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
030cd1a2 | 6540 | available on IA-32 and x64.\r |
ac644614 | 6541 | \r |
6542 | If Buffer is NULL, then ASSERT().\r | |
6543 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6544 | \r | |
af2dc6a7 | 6545 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6546 | \r |
6547 | **/\r | |
6548 | VOID\r | |
6549 | EFIAPI\r | |
6550 | AsmFxSave (\r | |
6551 | OUT IA32_FX_BUFFER *Buffer\r | |
6552 | );\r | |
6553 | \r | |
6554 | \r | |
6555 | /**\r | |
6556 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
6557 | \r | |
6558 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
6559 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
030cd1a2 | 6560 | only available on IA-32 and x64.\r |
ac644614 | 6561 | \r |
6562 | If Buffer is NULL, then ASSERT().\r | |
6563 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6564 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
6565 | \r | |
af2dc6a7 | 6566 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6567 | \r |
6568 | **/\r | |
6569 | VOID\r | |
6570 | EFIAPI\r | |
6571 | AsmFxRestore (\r | |
6572 | IN CONST IA32_FX_BUFFER *Buffer\r | |
6573 | );\r | |
6574 | \r | |
6575 | \r | |
6576 | /**\r | |
6577 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
6578 | \r | |
6579 | Reads and returns the current value of MM0. This function is only available\r | |
030cd1a2 | 6580 | on IA-32 and x64.\r |
ac644614 | 6581 | \r |
6582 | @return The current value of MM0.\r | |
6583 | \r | |
6584 | **/\r | |
6585 | UINT64\r | |
6586 | EFIAPI\r | |
6587 | AsmReadMm0 (\r | |
6588 | VOID\r | |
6589 | );\r | |
6590 | \r | |
6591 | \r | |
6592 | /**\r | |
6593 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
6594 | \r | |
6595 | Reads and returns the current value of MM1. This function is only available\r | |
030cd1a2 | 6596 | on IA-32 and x64.\r |
ac644614 | 6597 | \r |
6598 | @return The current value of MM1.\r | |
6599 | \r | |
6600 | **/\r | |
6601 | UINT64\r | |
6602 | EFIAPI\r | |
6603 | AsmReadMm1 (\r | |
6604 | VOID\r | |
6605 | );\r | |
6606 | \r | |
6607 | \r | |
6608 | /**\r | |
6609 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
6610 | \r | |
6611 | Reads and returns the current value of MM2. This function is only available\r | |
030cd1a2 | 6612 | on IA-32 and x64.\r |
ac644614 | 6613 | \r |
6614 | @return The current value of MM2.\r | |
6615 | \r | |
6616 | **/\r | |
6617 | UINT64\r | |
6618 | EFIAPI\r | |
6619 | AsmReadMm2 (\r | |
6620 | VOID\r | |
6621 | );\r | |
6622 | \r | |
6623 | \r | |
6624 | /**\r | |
6625 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
6626 | \r | |
6627 | Reads and returns the current value of MM3. This function is only available\r | |
030cd1a2 | 6628 | on IA-32 and x64.\r |
ac644614 | 6629 | \r |
6630 | @return The current value of MM3.\r | |
6631 | \r | |
6632 | **/\r | |
6633 | UINT64\r | |
6634 | EFIAPI\r | |
6635 | AsmReadMm3 (\r | |
6636 | VOID\r | |
6637 | );\r | |
6638 | \r | |
6639 | \r | |
6640 | /**\r | |
6641 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
6642 | \r | |
6643 | Reads and returns the current value of MM4. This function is only available\r | |
030cd1a2 | 6644 | on IA-32 and x64.\r |
ac644614 | 6645 | \r |
6646 | @return The current value of MM4.\r | |
6647 | \r | |
6648 | **/\r | |
6649 | UINT64\r | |
6650 | EFIAPI\r | |
6651 | AsmReadMm4 (\r | |
6652 | VOID\r | |
6653 | );\r | |
6654 | \r | |
6655 | \r | |
6656 | /**\r | |
6657 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
6658 | \r | |
6659 | Reads and returns the current value of MM5. This function is only available\r | |
030cd1a2 | 6660 | on IA-32 and x64.\r |
ac644614 | 6661 | \r |
6662 | @return The current value of MM5.\r | |
6663 | \r | |
6664 | **/\r | |
6665 | UINT64\r | |
6666 | EFIAPI\r | |
6667 | AsmReadMm5 (\r | |
6668 | VOID\r | |
6669 | );\r | |
6670 | \r | |
6671 | \r | |
6672 | /**\r | |
6673 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
6674 | \r | |
6675 | Reads and returns the current value of MM6. This function is only available\r | |
030cd1a2 | 6676 | on IA-32 and x64.\r |
ac644614 | 6677 | \r |
6678 | @return The current value of MM6.\r | |
6679 | \r | |
6680 | **/\r | |
6681 | UINT64\r | |
6682 | EFIAPI\r | |
6683 | AsmReadMm6 (\r | |
6684 | VOID\r | |
6685 | );\r | |
6686 | \r | |
6687 | \r | |
6688 | /**\r | |
6689 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
6690 | \r | |
6691 | Reads and returns the current value of MM7. This function is only available\r | |
030cd1a2 | 6692 | on IA-32 and x64.\r |
ac644614 | 6693 | \r |
6694 | @return The current value of MM7.\r | |
6695 | \r | |
6696 | **/\r | |
6697 | UINT64\r | |
6698 | EFIAPI\r | |
6699 | AsmReadMm7 (\r | |
6700 | VOID\r | |
6701 | );\r | |
6702 | \r | |
6703 | \r | |
6704 | /**\r | |
6705 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
6706 | \r | |
6707 | Writes the current value of MM0. This function is only available on IA32 and\r | |
030cd1a2 | 6708 | x64.\r |
ac644614 | 6709 | \r |
6710 | @param Value The 64-bit value to write to MM0.\r | |
6711 | \r | |
6712 | **/\r | |
6713 | VOID\r | |
6714 | EFIAPI\r | |
6715 | AsmWriteMm0 (\r | |
6716 | IN UINT64 Value\r | |
6717 | );\r | |
6718 | \r | |
6719 | \r | |
6720 | /**\r | |
6721 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
6722 | \r | |
6723 | Writes the current value of MM1. This function is only available on IA32 and\r | |
030cd1a2 | 6724 | x64.\r |
ac644614 | 6725 | \r |
6726 | @param Value The 64-bit value to write to MM1.\r | |
6727 | \r | |
6728 | **/\r | |
6729 | VOID\r | |
6730 | EFIAPI\r | |
6731 | AsmWriteMm1 (\r | |
6732 | IN UINT64 Value\r | |
6733 | );\r | |
6734 | \r | |
6735 | \r | |
6736 | /**\r | |
6737 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
6738 | \r | |
6739 | Writes the current value of MM2. This function is only available on IA32 and\r | |
030cd1a2 | 6740 | x64.\r |
ac644614 | 6741 | \r |
6742 | @param Value The 64-bit value to write to MM2.\r | |
6743 | \r | |
6744 | **/\r | |
6745 | VOID\r | |
6746 | EFIAPI\r | |
6747 | AsmWriteMm2 (\r | |
6748 | IN UINT64 Value\r | |
6749 | );\r | |
6750 | \r | |
6751 | \r | |
6752 | /**\r | |
6753 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
6754 | \r | |
6755 | Writes the current value of MM3. This function is only available on IA32 and\r | |
030cd1a2 | 6756 | x64.\r |
ac644614 | 6757 | \r |
6758 | @param Value The 64-bit value to write to MM3.\r | |
6759 | \r | |
6760 | **/\r | |
6761 | VOID\r | |
6762 | EFIAPI\r | |
6763 | AsmWriteMm3 (\r | |
6764 | IN UINT64 Value\r | |
6765 | );\r | |
6766 | \r | |
6767 | \r | |
6768 | /**\r | |
6769 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
6770 | \r | |
6771 | Writes the current value of MM4. This function is only available on IA32 and\r | |
030cd1a2 | 6772 | x64.\r |
ac644614 | 6773 | \r |
6774 | @param Value The 64-bit value to write to MM4.\r | |
6775 | \r | |
6776 | **/\r | |
6777 | VOID\r | |
6778 | EFIAPI\r | |
6779 | AsmWriteMm4 (\r | |
6780 | IN UINT64 Value\r | |
6781 | );\r | |
6782 | \r | |
6783 | \r | |
6784 | /**\r | |
6785 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
6786 | \r | |
6787 | Writes the current value of MM5. This function is only available on IA32 and\r | |
030cd1a2 | 6788 | x64.\r |
ac644614 | 6789 | \r |
6790 | @param Value The 64-bit value to write to MM5.\r | |
6791 | \r | |
6792 | **/\r | |
6793 | VOID\r | |
6794 | EFIAPI\r | |
6795 | AsmWriteMm5 (\r | |
6796 | IN UINT64 Value\r | |
6797 | );\r | |
6798 | \r | |
6799 | \r | |
6800 | /**\r | |
6801 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
6802 | \r | |
6803 | Writes the current value of MM6. This function is only available on IA32 and\r | |
030cd1a2 | 6804 | x64.\r |
ac644614 | 6805 | \r |
6806 | @param Value The 64-bit value to write to MM6.\r | |
6807 | \r | |
6808 | **/\r | |
6809 | VOID\r | |
6810 | EFIAPI\r | |
6811 | AsmWriteMm6 (\r | |
6812 | IN UINT64 Value\r | |
6813 | );\r | |
6814 | \r | |
6815 | \r | |
6816 | /**\r | |
6817 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
6818 | \r | |
6819 | Writes the current value of MM7. This function is only available on IA32 and\r | |
030cd1a2 | 6820 | x64.\r |
ac644614 | 6821 | \r |
6822 | @param Value The 64-bit value to write to MM7.\r | |
6823 | \r | |
6824 | **/\r | |
6825 | VOID\r | |
6826 | EFIAPI\r | |
6827 | AsmWriteMm7 (\r | |
6828 | IN UINT64 Value\r | |
6829 | );\r | |
6830 | \r | |
6831 | \r | |
6832 | /**\r | |
6833 | Reads the current value of Time Stamp Counter (TSC).\r | |
6834 | \r | |
6835 | Reads and returns the current value of TSC. This function is only available\r | |
030cd1a2 | 6836 | on IA-32 and x64.\r |
ac644614 | 6837 | \r |
6838 | @return The current value of TSC\r | |
6839 | \r | |
6840 | **/\r | |
6841 | UINT64\r | |
6842 | EFIAPI\r | |
6843 | AsmReadTsc (\r | |
6844 | VOID\r | |
6845 | );\r | |
6846 | \r | |
6847 | \r | |
6848 | /**\r | |
6849 | Reads the current value of a Performance Counter (PMC).\r | |
6850 | \r | |
6851 | Reads and returns the current value of performance counter specified by\r | |
030cd1a2 | 6852 | Index. This function is only available on IA-32 and x64.\r |
ac644614 | 6853 | \r |
6854 | @param Index The 32-bit Performance Counter index to read.\r | |
6855 | \r | |
6856 | @return The value of the PMC specified by Index.\r | |
6857 | \r | |
6858 | **/\r | |
6859 | UINT64\r | |
6860 | EFIAPI\r | |
6861 | AsmReadPmc (\r | |
6862 | IN UINT32 Index\r | |
6863 | );\r | |
6864 | \r | |
6865 | \r | |
6866 | /**\r | |
6867 | Sets up a monitor buffer that is used by AsmMwait().\r | |
6868 | \r | |
6869 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
030cd1a2 | 6870 | and Edx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 6871 | \r |
6872 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6873 | instruction.\r | |
6874 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6875 | instruction.\r | |
6876 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
6877 | instruction.\r | |
6878 | \r | |
6879 | @return Eax\r | |
6880 | \r | |
6881 | **/\r | |
6882 | UINTN\r | |
6883 | EFIAPI\r | |
6884 | AsmMonitor (\r | |
6885 | IN UINTN Eax,\r | |
6886 | IN UINTN Ecx,\r | |
6887 | IN UINTN Edx\r | |
6888 | );\r | |
6889 | \r | |
6890 | \r | |
6891 | /**\r | |
6892 | Executes an MWAIT instruction.\r | |
6893 | \r | |
6894 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
030cd1a2 | 6895 | Ecx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 6896 | \r |
6897 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6898 | instruction.\r | |
6899 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6900 | instruction.\r | |
6901 | \r | |
6902 | @return Eax\r | |
6903 | \r | |
6904 | **/\r | |
6905 | UINTN\r | |
6906 | EFIAPI\r | |
6907 | AsmMwait (\r | |
6908 | IN UINTN Eax,\r | |
6909 | IN UINTN Ecx\r | |
6910 | );\r | |
6911 | \r | |
6912 | \r | |
6913 | /**\r | |
6914 | Executes a WBINVD instruction.\r | |
6915 | \r | |
6916 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 6917 | x64.\r |
ac644614 | 6918 | \r |
6919 | **/\r | |
6920 | VOID\r | |
6921 | EFIAPI\r | |
6922 | AsmWbinvd (\r | |
6923 | VOID\r | |
6924 | );\r | |
6925 | \r | |
6926 | \r | |
6927 | /**\r | |
6928 | Executes a INVD instruction.\r | |
6929 | \r | |
6930 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 6931 | x64.\r |
ac644614 | 6932 | \r |
6933 | **/\r | |
6934 | VOID\r | |
6935 | EFIAPI\r | |
6936 | AsmInvd (\r | |
6937 | VOID\r | |
6938 | );\r | |
6939 | \r | |
6940 | \r | |
6941 | /**\r | |
6942 | Flushes a cache line from all the instruction and data caches within the\r | |
6943 | coherency domain of the CPU.\r | |
6944 | \r | |
6945 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
030cd1a2 | 6946 | This function is only available on IA-32 and x64.\r |
ac644614 | 6947 | \r |
6948 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
6949 | in a physical addressing mode, then LinearAddress is a\r | |
6950 | physical address. If the CPU is in a virtual\r | |
6951 | addressing mode, then LinearAddress is a virtual\r | |
6952 | address.\r | |
6953 | \r | |
af2dc6a7 | 6954 | @return LinearAddress.\r |
ac644614 | 6955 | **/\r |
6956 | VOID *\r | |
6957 | EFIAPI\r | |
6958 | AsmFlushCacheLine (\r | |
6959 | IN VOID *LinearAddress\r | |
6960 | );\r | |
6961 | \r | |
6962 | \r | |
6963 | /**\r | |
6964 | Enables the 32-bit paging mode on the CPU.\r | |
6965 | \r | |
6966 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
6967 | must be properly initialized prior to calling this service. This function\r | |
6968 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
6969 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
6970 | transferred to the function specified by EntryPoint using the new stack\r | |
6971 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
6972 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
6973 | EntryPoint must never return.\r | |
6974 | \r | |
6975 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
6976 | If EntryPoint is NULL, then ASSERT().\r | |
6977 | If NewStack is NULL, then ASSERT().\r | |
6978 | \r | |
6979 | There are a number of constraints that must be followed before calling this\r | |
6980 | function:\r | |
6981 | 1) Interrupts must be disabled.\r | |
6982 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
6983 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
6984 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
6985 | descriptors.\r | |
6986 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
6987 | is complete, and those page tables must guarantee that the pages for this\r | |
6988 | function and the stack are identity mapped.\r | |
6989 | \r | |
6990 | @param EntryPoint A pointer to function to call with the new stack after\r | |
6991 | paging is enabled.\r | |
6992 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
6993 | function as the first parameter after paging is enabled.\r | |
6994 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
6995 | function as the second parameter after paging is enabled.\r | |
6996 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
6997 | function after paging is enabled.\r | |
6998 | \r | |
6999 | **/\r | |
7000 | VOID\r | |
7001 | EFIAPI\r | |
7002 | AsmEnablePaging32 (\r | |
7003 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7004 | IN VOID *Context1, OPTIONAL\r | |
7005 | IN VOID *Context2, OPTIONAL\r | |
7006 | IN VOID *NewStack\r | |
7007 | );\r | |
7008 | \r | |
7009 | \r | |
7010 | /**\r | |
7011 | Disables the 32-bit paging mode on the CPU.\r | |
7012 | \r | |
7013 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
7014 | mode. This function assumes the current execution mode is 32-paged protected\r | |
7015 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
7016 | is disabled, control is transferred to the function specified by EntryPoint\r | |
7017 | using the new stack specified by NewStack and passing in the parameters\r | |
7018 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7019 | may be NULL. The function EntryPoint must never return.\r | |
7020 | \r | |
7021 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
7022 | If EntryPoint is NULL, then ASSERT().\r | |
7023 | If NewStack is NULL, then ASSERT().\r | |
7024 | \r | |
7025 | There are a number of constraints that must be followed before calling this\r | |
7026 | function:\r | |
7027 | 1) Interrupts must be disabled.\r | |
7028 | 2) The caller must be in 32-bit paged mode.\r | |
7029 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
7030 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
7031 | this function and the stack are identity mapped.\r | |
7032 | \r | |
7033 | @param EntryPoint A pointer to function to call with the new stack after\r | |
7034 | paging is disabled.\r | |
7035 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
7036 | function as the first parameter after paging is disabled.\r | |
7037 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
7038 | function as the second parameter after paging is\r | |
7039 | disabled.\r | |
7040 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
7041 | function after paging is disabled.\r | |
7042 | \r | |
7043 | **/\r | |
7044 | VOID\r | |
7045 | EFIAPI\r | |
7046 | AsmDisablePaging32 (\r | |
7047 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7048 | IN VOID *Context1, OPTIONAL\r | |
7049 | IN VOID *Context2, OPTIONAL\r | |
7050 | IN VOID *NewStack\r | |
7051 | );\r | |
7052 | \r | |
7053 | \r | |
7054 | /**\r | |
7055 | Enables the 64-bit paging mode on the CPU.\r | |
7056 | \r | |
7057 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7058 | must be properly initialized prior to calling this service. This function\r | |
7059 | assumes the current execution mode is 32-bit protected mode with flat\r | |
7060 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
7061 | paging mode is enabled, control is transferred to the function specified by\r | |
7062 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
7063 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
7064 | optional and may be 0. The function EntryPoint must never return.\r | |
7065 | \r | |
7066 | If the current execution mode is not 32-bit protected mode with flat\r | |
7067 | descriptors, then ASSERT().\r | |
7068 | If EntryPoint is 0, then ASSERT().\r | |
7069 | If NewStack is 0, then ASSERT().\r | |
7070 | \r | |
17f695ed | 7071 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7072 | is called. The descriptor in the GDT that this selector\r |
7073 | references must be setup for long mode.\r | |
7074 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7075 | the new stack after paging is enabled.\r | |
7076 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7077 | the EntryPoint function as the first parameter after\r | |
7078 | paging is enabled.\r | |
7079 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7080 | the EntryPoint function as the second parameter after\r | |
7081 | paging is enabled.\r | |
7082 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7083 | the EntryPoint function after paging is enabled.\r | |
7084 | \r | |
7085 | **/\r | |
7086 | VOID\r | |
7087 | EFIAPI\r | |
7088 | AsmEnablePaging64 (\r | |
17f695ed | 7089 | IN UINT16 Cs,\r |
ac644614 | 7090 | IN UINT64 EntryPoint,\r |
7091 | IN UINT64 Context1, OPTIONAL\r | |
7092 | IN UINT64 Context2, OPTIONAL\r | |
7093 | IN UINT64 NewStack\r | |
7094 | );\r | |
7095 | \r | |
7096 | \r | |
7097 | /**\r | |
7098 | Disables the 64-bit paging mode on the CPU.\r | |
7099 | \r | |
7100 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
7101 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
030cd1a2 | 7102 | This function is only available on x64. After the 64-bit paging mode is\r |
ac644614 | 7103 | disabled, control is transferred to the function specified by EntryPoint\r |
7104 | using the new stack specified by NewStack and passing in the parameters\r | |
7105 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7106 | may be 0. The function EntryPoint must never return.\r | |
7107 | \r | |
7108 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
7109 | If EntryPoint is 0, then ASSERT().\r | |
7110 | If NewStack is 0, then ASSERT().\r | |
7111 | \r | |
17f695ed | 7112 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7113 | is called. The descriptor in the GDT that this selector\r |
7114 | references must be setup for 32-bit protected mode.\r | |
7115 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7116 | the new stack after paging is disabled.\r | |
7117 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7118 | the EntryPoint function as the first parameter after\r | |
7119 | paging is disabled.\r | |
7120 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7121 | the EntryPoint function as the second parameter after\r | |
7122 | paging is disabled.\r | |
7123 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7124 | the EntryPoint function after paging is disabled.\r | |
7125 | \r | |
7126 | **/\r | |
7127 | VOID\r | |
7128 | EFIAPI\r | |
7129 | AsmDisablePaging64 (\r | |
17f695ed | 7130 | IN UINT16 Cs,\r |
ac644614 | 7131 | IN UINT32 EntryPoint,\r |
7132 | IN UINT32 Context1, OPTIONAL\r | |
7133 | IN UINT32 Context2, OPTIONAL\r | |
7134 | IN UINT32 NewStack\r | |
7135 | );\r | |
7136 | \r | |
7137 | \r | |
7138 | //\r | |
7139 | // 16-bit thunking services\r | |
7140 | //\r | |
7141 | \r | |
7142 | /**\r | |
7143 | Retrieves the properties for 16-bit thunk functions.\r | |
7144 | \r | |
7145 | Computes the size of the buffer and stack below 1MB required to use the\r | |
7146 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
7147 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
7148 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
7149 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
7150 | of bytes that need to be passed to the 16-bit real mode code.\r | |
52fa075c | 7151 | \r |
ac644614 | 7152 | If RealModeBufferSize is NULL, then ASSERT().\r |
7153 | If ExtraStackSize is NULL, then ASSERT().\r | |
7154 | \r | |
7155 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
7156 | required to use the 16-bit thunk functions.\r | |
7157 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
7158 | that the 16-bit thunk functions require for\r | |
7159 | temporary storage in the transition to and from\r | |
7160 | 16-bit real mode.\r | |
7161 | \r | |
7162 | **/\r | |
7163 | VOID\r | |
7164 | EFIAPI\r | |
7165 | AsmGetThunk16Properties (\r | |
7166 | OUT UINT32 *RealModeBufferSize,\r | |
7167 | OUT UINT32 *ExtraStackSize\r | |
7168 | );\r | |
7169 | \r | |
7170 | \r | |
7171 | /**\r | |
7172 | Prepares all structures a code required to use AsmThunk16().\r | |
7173 | \r | |
7174 | Prepares all structures and code required to use AsmThunk16().\r | |
52fa075c | 7175 | \r |
8243b089 | 7176 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7177 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
ac644614 | 7178 | \r |
7179 | If ThunkContext is NULL, then ASSERT().\r | |
7180 | \r | |
7181 | @param ThunkContext A pointer to the context structure that describes the\r | |
7182 | 16-bit real mode code to call.\r | |
7183 | \r | |
7184 | **/\r | |
7185 | VOID\r | |
7186 | EFIAPI\r | |
7187 | AsmPrepareThunk16 (\r | |
1445300f | 7188 | IN OUT THUNK_CONTEXT *ThunkContext\r |
ac644614 | 7189 | );\r |
7190 | \r | |
7191 | \r | |
7192 | /**\r | |
7193 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7194 | \r | |
7195 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
17f695ed | 7196 | AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r |
7197 | This function must be called with interrupts disabled.\r | |
7198 | \r | |
7199 | The register state from the RealModeState field of ThunkContext is restored just prior \r | |
7200 | to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r | |
7201 | which is used to set the interrupt state when a 16-bit real mode entry point is called.\r | |
7202 | Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r | |
7203 | The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r | |
7204 | the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r | |
7205 | The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r | |
7206 | so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r | |
7207 | and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r | |
7208 | point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r | |
7209 | after the RETF instruction is executed.\r | |
7210 | \r | |
7211 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7212 | or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r | |
7213 | the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r | |
7214 | \r | |
7215 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7216 | then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r | |
7217 | This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r | |
7218 | \r | |
7219 | If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r | |
7220 | is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r | |
7221 | \r | |
7222 | If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r | |
7223 | ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r | |
7224 | disable the A20 mask.\r | |
7225 | \r | |
7226 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r | |
7227 | ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r | |
7228 | then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7229 | \r | |
7230 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r | |
7231 | ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7232 | \r | |
ac644614 | 7233 | If ThunkContext is NULL, then ASSERT().\r |
7234 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
17f695ed | 7235 | If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r |
7236 | ThunkAttributes, then ASSERT().\r | |
ac644614 | 7237 | \r |
8243b089 | 7238 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
af2dc6a7 | 7239 | virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.\r |
52fa075c | 7240 | \r |
ac644614 | 7241 | @param ThunkContext A pointer to the context structure that describes the\r |
7242 | 16-bit real mode code to call.\r | |
7243 | \r | |
7244 | **/\r | |
7245 | VOID\r | |
7246 | EFIAPI\r | |
7247 | AsmThunk16 (\r | |
7248 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7249 | );\r | |
7250 | \r | |
7251 | \r | |
7252 | /**\r | |
7253 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7254 | control to a 16-bit real mode entry point, and returns the results.\r | |
7255 | \r | |
7256 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7257 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
7258 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
7259 | service should be used. If the caller intends to make more than one 16-bit\r | |
7260 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
7261 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
7262 | \r | |
8243b089 | 7263 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7264 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
52fa075c | 7265 | \r |
17f695ed | 7266 | See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r |
ac644614 | 7267 | \r |
7268 | @param ThunkContext A pointer to the context structure that describes the\r | |
7269 | 16-bit real mode code to call.\r | |
7270 | \r | |
7271 | **/\r | |
7272 | VOID\r | |
7273 | EFIAPI\r | |
7274 | AsmPrepareAndThunk16 (\r | |
7275 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7276 | );\r | |
7277 | \r | |
ac644614 | 7278 | #endif\r |
e3a7917f | 7279 | #endif\r |
ac644614 | 7280 | \r |
7281 | \r |