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ac644614 | 1 | /** @file\r |
50a64e5b | 2 | Provides string functions, linked list functions, math functions, synchronization\r |
1a2f870c | 3 | functions, and CPU architecture-specific functions.\r |
ac644614 | 4 | \r |
9df063a0 HT |
5 | Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r |
6 | Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
7 | This program and the accompanying materials\r | |
50a64e5b | 8 | are licensed and made available under the terms and conditions of the BSD License\r |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
af2dc6a7 | 10 | http://opensource.org/licenses/bsd-license.php.\r |
ac644614 | 11 | \r |
50a64e5b | 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
ac644614 | 14 | \r |
15 | **/\r | |
16 | \r | |
17 | #ifndef __BASE_LIB__\r | |
18 | #define __BASE_LIB__\r | |
19 | \r | |
1106ffe1 | 20 | //\r |
1a2f870c | 21 | // Definitions for architecture-specific types\r |
1106ffe1 | 22 | //\r |
ac644614 | 23 | #if defined (MDE_CPU_IA32)\r |
fc30687f | 24 | ///\r |
af2dc6a7 | 25 | /// The IA-32 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 26 | ///\r |
ac644614 | 27 | typedef struct {\r |
28 | UINT32 Ebx;\r | |
29 | UINT32 Esi;\r | |
30 | UINT32 Edi;\r | |
31 | UINT32 Ebp;\r | |
32 | UINT32 Esp;\r | |
33 | UINT32 Eip;\r | |
34 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
35 | \r | |
36 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
37 | \r | |
aa4df547 | 38 | #endif // defined (MDE_CPU_IA32)\r |
39 | \r | |
40 | #if defined (MDE_CPU_IPF)\r | |
ac644614 | 41 | \r |
fc30687f | 42 | ///\r |
af2dc6a7 | 43 | /// The Itanium architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 44 | ///\r |
ac644614 | 45 | typedef struct {\r |
46 | UINT64 F2[2];\r | |
47 | UINT64 F3[2];\r | |
48 | UINT64 F4[2];\r | |
49 | UINT64 F5[2];\r | |
50 | UINT64 F16[2];\r | |
51 | UINT64 F17[2];\r | |
52 | UINT64 F18[2];\r | |
53 | UINT64 F19[2];\r | |
54 | UINT64 F20[2];\r | |
55 | UINT64 F21[2];\r | |
56 | UINT64 F22[2];\r | |
57 | UINT64 F23[2];\r | |
58 | UINT64 F24[2];\r | |
59 | UINT64 F25[2];\r | |
60 | UINT64 F26[2];\r | |
61 | UINT64 F27[2];\r | |
62 | UINT64 F28[2];\r | |
63 | UINT64 F29[2];\r | |
64 | UINT64 F30[2];\r | |
65 | UINT64 F31[2];\r | |
66 | UINT64 R4;\r | |
67 | UINT64 R5;\r | |
68 | UINT64 R6;\r | |
69 | UINT64 R7;\r | |
70 | UINT64 SP;\r | |
71 | UINT64 BR0;\r | |
72 | UINT64 BR1;\r | |
73 | UINT64 BR2;\r | |
74 | UINT64 BR3;\r | |
75 | UINT64 BR4;\r | |
76 | UINT64 BR5;\r | |
77 | UINT64 InitialUNAT;\r | |
78 | UINT64 AfterSpillUNAT;\r | |
79 | UINT64 PFS;\r | |
80 | UINT64 BSP;\r | |
81 | UINT64 Predicates;\r | |
82 | UINT64 LoopCount;\r | |
83 | UINT64 FPSR;\r | |
84 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
85 | \r | |
86 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
87 | \r | |
aa4df547 | 88 | #endif // defined (MDE_CPU_IPF)\r |
89 | \r | |
90 | #if defined (MDE_CPU_X64)\r | |
fc30687f | 91 | ///\r |
af2dc6a7 | 92 | /// The x64 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 93 | ///\r |
ac644614 | 94 | typedef struct {\r |
95 | UINT64 Rbx;\r | |
96 | UINT64 Rsp;\r | |
97 | UINT64 Rbp;\r | |
98 | UINT64 Rdi;\r | |
99 | UINT64 Rsi;\r | |
100 | UINT64 R12;\r | |
101 | UINT64 R13;\r | |
102 | UINT64 R14;\r | |
103 | UINT64 R15;\r | |
104 | UINT64 Rip;\r | |
9b9641c6 | 105 | UINT64 MxCsr;\r |
af2dc6a7 | 106 | UINT8 XmmBuffer[160]; ///< XMM6-XMM15.\r |
ac644614 | 107 | } BASE_LIBRARY_JUMP_BUFFER;\r |
108 | \r | |
109 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
110 | \r | |
aa4df547 | 111 | #endif // defined (MDE_CPU_X64)\r |
112 | \r | |
113 | #if defined (MDE_CPU_EBC)\r | |
fc30687f | 114 | ///\r |
af2dc6a7 | 115 | /// The EBC context buffer used by SetJump() and LongJump().\r |
fc30687f | 116 | ///\r |
ac644614 | 117 | typedef struct {\r |
118 | UINT64 R0;\r | |
119 | UINT64 R1;\r | |
120 | UINT64 R2;\r | |
121 | UINT64 R3;\r | |
122 | UINT64 IP;\r | |
123 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
124 | \r | |
125 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
126 | \r | |
aa4df547 | 127 | #endif // defined (MDE_CPU_EBC)\r |
ac644614 | 128 | \r |
ebd04fc2 | 129 | #if defined (MDE_CPU_ARM)\r |
130 | \r | |
131 | typedef struct {\r | |
af2dc6a7 | 132 | UINT32 R3; ///< A copy of R13.\r |
01a54966 | 133 | UINT32 R4;\r |
134 | UINT32 R5;\r | |
135 | UINT32 R6;\r | |
136 | UINT32 R7;\r | |
137 | UINT32 R8;\r | |
138 | UINT32 R9;\r | |
139 | UINT32 R10;\r | |
140 | UINT32 R11;\r | |
141 | UINT32 R12;\r | |
142 | UINT32 R14;\r | |
ebd04fc2 | 143 | } BASE_LIBRARY_JUMP_BUFFER;\r |
144 | \r | |
145 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
146 | \r | |
147 | #endif // defined (MDE_CPU_ARM)\r | |
148 | \r | |
ac644614 | 149 | //\r |
150 | // String Services\r | |
151 | //\r | |
152 | \r | |
153 | /**\r | |
154 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
155 | string and returns the new Unicode string.\r | |
156 | \r | |
157 | This function copies the contents of the Unicode string Source to the Unicode\r | |
158 | string Destination, and returns Destination. If Source and Destination\r | |
159 | overlap, then the results are undefined.\r | |
160 | \r | |
161 | If Destination is NULL, then ASSERT().\r | |
162 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
163 | If Source is NULL, then ASSERT().\r | |
164 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
165 | If Source and Destination overlap, then ASSERT().\r | |
166 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
167 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
168 | Null-terminator, then ASSERT().\r | |
169 | \r | |
af2dc6a7 | 170 | @param Destination The pointer to a Null-terminated Unicode string.\r |
171 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 172 | \r |
9aa049d9 | 173 | @return Destination.\r |
ac644614 | 174 | \r |
175 | **/\r | |
176 | CHAR16 *\r | |
177 | EFIAPI\r | |
178 | StrCpy (\r | |
179 | OUT CHAR16 *Destination,\r | |
180 | IN CONST CHAR16 *Source\r | |
181 | );\r | |
182 | \r | |
183 | \r | |
184 | /**\r | |
af2dc6a7 | 185 | Copies up to a specified length from one Null-terminated Unicode string to \r |
17f695ed | 186 | another Null-terminated Unicode string and returns the new Unicode string.\r |
ac644614 | 187 | \r |
188 | This function copies the contents of the Unicode string Source to the Unicode\r | |
189 | string Destination, and returns Destination. At most, Length Unicode\r | |
190 | characters are copied from Source to Destination. If Length is 0, then\r | |
191 | Destination is returned unmodified. If Length is greater that the number of\r | |
192 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
193 | characters. If Source and Destination overlap, then the results are\r | |
194 | undefined.\r | |
195 | \r | |
196 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
197 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
198 | If Length > 0 and Source is NULL, then ASSERT().\r | |
77f863ee | 199 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 200 | If Source and Destination overlap, then ASSERT().\r |
50c247fd | 201 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
202 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 203 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
50c247fd | 204 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r |
205 | then ASSERT().\r | |
ac644614 | 206 | \r |
af2dc6a7 | 207 | @param Destination The pointer to a Null-terminated Unicode string.\r |
208 | @param Source The pointer to a Null-terminated Unicode string.\r | |
209 | @param Length The maximum number of Unicode characters to copy.\r | |
ac644614 | 210 | \r |
9aa049d9 | 211 | @return Destination.\r |
ac644614 | 212 | \r |
213 | **/\r | |
214 | CHAR16 *\r | |
215 | EFIAPI\r | |
216 | StrnCpy (\r | |
217 | OUT CHAR16 *Destination,\r | |
218 | IN CONST CHAR16 *Source,\r | |
219 | IN UINTN Length\r | |
220 | );\r | |
221 | \r | |
222 | \r | |
223 | /**\r | |
224 | Returns the length of a Null-terminated Unicode string.\r | |
225 | \r | |
226 | This function returns the number of Unicode characters in the Null-terminated\r | |
227 | Unicode string specified by String.\r | |
228 | \r | |
229 | If String is NULL, then ASSERT().\r | |
230 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
231 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
232 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
233 | Null-terminator, then ASSERT().\r | |
234 | \r | |
235 | @param String Pointer to a Null-terminated Unicode string.\r | |
236 | \r | |
237 | @return The length of String.\r | |
238 | \r | |
239 | **/\r | |
240 | UINTN\r | |
241 | EFIAPI\r | |
242 | StrLen (\r | |
243 | IN CONST CHAR16 *String\r | |
244 | );\r | |
245 | \r | |
246 | \r | |
247 | /**\r | |
248 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
249 | Null terminator.\r | |
250 | \r | |
17f695ed | 251 | This function returns the size, in bytes, of the Null-terminated Unicode string \r |
252 | specified by String.\r | |
ac644614 | 253 | \r |
254 | If String is NULL, then ASSERT().\r | |
255 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
256 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
257 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
258 | Null-terminator, then ASSERT().\r | |
259 | \r | |
af2dc6a7 | 260 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 261 | \r |
262 | @return The size of String.\r | |
263 | \r | |
264 | **/\r | |
265 | UINTN\r | |
266 | EFIAPI\r | |
267 | StrSize (\r | |
268 | IN CONST CHAR16 *String\r | |
269 | );\r | |
270 | \r | |
271 | \r | |
272 | /**\r | |
273 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
274 | between the first mismatched Unicode characters.\r | |
275 | \r | |
276 | This function compares the Null-terminated Unicode string FirstString to the\r | |
277 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
278 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
279 | mismatched Unicode character in SecondString subtracted from the first\r | |
280 | mismatched Unicode character in FirstString.\r | |
281 | \r | |
282 | If FirstString is NULL, then ASSERT().\r | |
283 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
284 | If SecondString is NULL, then ASSERT().\r | |
285 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
286 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
287 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
288 | Null-terminator, then ASSERT().\r | |
289 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
af2dc6a7 | 290 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 291 | Null-terminator, then ASSERT().\r |
292 | \r | |
af2dc6a7 | 293 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
294 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 295 | \r |
1106ffe1 | 296 | @retval 0 FirstString is identical to SecondString.\r |
297 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 298 | \r |
299 | **/\r | |
300 | INTN\r | |
301 | EFIAPI\r | |
302 | StrCmp (\r | |
303 | IN CONST CHAR16 *FirstString,\r | |
304 | IN CONST CHAR16 *SecondString\r | |
305 | );\r | |
306 | \r | |
307 | \r | |
308 | /**\r | |
17f695ed | 309 | Compares up to a specified length the contents of two Null-terminated Unicode strings,\r |
310 | and returns the difference between the first mismatched Unicode characters.\r | |
311 | \r | |
ac644614 | 312 | This function compares the Null-terminated Unicode string FirstString to the\r |
313 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
314 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
315 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
316 | value returned is the first mismatched Unicode character in SecondString\r | |
317 | subtracted from the first mismatched Unicode character in FirstString.\r | |
318 | \r | |
319 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
77f863ee | 320 | If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 321 | If Length > 0 and SecondString is NULL, then ASSERT().\r |
77f863ee | 322 | If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r |
50c247fd | 323 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r |
324 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
325 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r | |
326 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
327 | then ASSERT().\r | |
328 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r | |
329 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
330 | then ASSERT().\r | |
ac644614 | 331 | \r |
af2dc6a7 | 332 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
333 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
334 | @param Length The maximum number of Unicode characters to compare.\r | |
ac644614 | 335 | \r |
1106ffe1 | 336 | @retval 0 FirstString is identical to SecondString.\r |
337 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 338 | \r |
339 | **/\r | |
340 | INTN\r | |
341 | EFIAPI\r | |
342 | StrnCmp (\r | |
343 | IN CONST CHAR16 *FirstString,\r | |
344 | IN CONST CHAR16 *SecondString,\r | |
345 | IN UINTN Length\r | |
346 | );\r | |
347 | \r | |
348 | \r | |
349 | /**\r | |
350 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
351 | Unicode string, and returns the concatenated Unicode string.\r | |
352 | \r | |
353 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
354 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
355 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
356 | Unicode String is returned. If Source and Destination overlap, then the\r | |
357 | results are undefined.\r | |
358 | \r | |
359 | If Destination is NULL, then ASSERT().\r | |
77f863ee | 360 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 361 | If Source is NULL, then ASSERT().\r |
77f863ee | 362 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 363 | If Source and Destination overlap, then ASSERT().\r |
364 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
af2dc6a7 | 365 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 366 | Null-terminator, then ASSERT().\r |
367 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
af2dc6a7 | 368 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 369 | Null-terminator, then ASSERT().\r |
370 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
371 | and Source results in a Unicode string with more than\r | |
af2dc6a7 | 372 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 373 | Null-terminator, then ASSERT().\r |
374 | \r | |
af2dc6a7 | 375 | @param Destination The pointer to a Null-terminated Unicode string.\r |
376 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 377 | \r |
9aa049d9 | 378 | @return Destination.\r |
ac644614 | 379 | \r |
380 | **/\r | |
381 | CHAR16 *\r | |
382 | EFIAPI\r | |
383 | StrCat (\r | |
384 | IN OUT CHAR16 *Destination,\r | |
385 | IN CONST CHAR16 *Source\r | |
386 | );\r | |
387 | \r | |
388 | \r | |
389 | /**\r | |
17f695ed | 390 | Concatenates up to a specified length one Null-terminated Unicode to the end \r |
391 | of another Null-terminated Unicode string, and returns the concatenated \r | |
ac644614 | 392 | Unicode string.\r |
393 | \r | |
394 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
395 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
396 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
397 | most, Length Unicode characters are concatenated from Source to the end of\r | |
398 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
399 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
400 | the results are undefined.\r | |
401 | \r | |
402 | If Destination is NULL, then ASSERT().\r | |
403 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
404 | If Length > 0 and Source is NULL, then ASSERT().\r | |
405 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
406 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 407 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
408 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 409 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
50c247fd | 410 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 411 | Null-terminator, then ASSERT().\r |
412 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
50c247fd | 413 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 414 | Null-terminator, then ASSERT().\r |
415 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
50c247fd | 416 | and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r |
417 | Unicode characters, not including the Null-terminator, then ASSERT().\r | |
ac644614 | 418 | \r |
af2dc6a7 | 419 | @param Destination The pointer to a Null-terminated Unicode string.\r |
420 | @param Source The pointer to a Null-terminated Unicode string.\r | |
421 | @param Length The maximum number of Unicode characters to concatenate from\r | |
ac644614 | 422 | Source.\r |
423 | \r | |
9aa049d9 | 424 | @return Destination.\r |
ac644614 | 425 | \r |
426 | **/\r | |
427 | CHAR16 *\r | |
428 | EFIAPI\r | |
429 | StrnCat (\r | |
430 | IN OUT CHAR16 *Destination,\r | |
431 | IN CONST CHAR16 *Source,\r | |
432 | IN UINTN Length\r | |
433 | );\r | |
434 | \r | |
435 | /**\r | |
9aa049d9 | 436 | Returns the first occurrence of a Null-terminated Unicode sub-string\r |
ac644614 | 437 | in a Null-terminated Unicode string.\r |
438 | \r | |
439 | This function scans the contents of the Null-terminated Unicode string\r | |
440 | specified by String and returns the first occurrence of SearchString.\r | |
441 | If SearchString is not found in String, then NULL is returned. If\r | |
af2dc6a7 | 442 | the length of SearchString is zero, then String is returned.\r |
ac644614 | 443 | \r |
444 | If String is NULL, then ASSERT().\r | |
445 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
446 | If SearchString is NULL, then ASSERT().\r | |
447 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
448 | \r | |
449 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r | |
450 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
af2dc6a7 | 451 | characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 452 | \r |
af2dc6a7 | 453 | @param String The pointer to a Null-terminated Unicode string.\r |
454 | @param SearchString The pointer to a Null-terminated Unicode string to search for.\r | |
ac644614 | 455 | \r |
456 | @retval NULL If the SearchString does not appear in String.\r | |
1106ffe1 | 457 | @return others If there is a match.\r |
ac644614 | 458 | \r |
459 | **/\r | |
460 | CHAR16 *\r | |
461 | EFIAPI\r | |
462 | StrStr (\r | |
17f695ed | 463 | IN CONST CHAR16 *String,\r |
464 | IN CONST CHAR16 *SearchString\r | |
ac644614 | 465 | );\r |
466 | \r | |
467 | /**\r | |
468 | Convert a Null-terminated Unicode decimal string to a value of\r | |
469 | type UINTN.\r | |
470 | \r | |
471 | This function returns a value of type UINTN by interpreting the contents\r | |
472 | of the Unicode string specified by String as a decimal number. The format\r | |
473 | of the input Unicode string String is:\r | |
474 | \r | |
475 | [spaces] [decimal digits].\r | |
476 | \r | |
477 | The valid decimal digit character is in the range [0-9]. The\r | |
478 | function will ignore the pad space, which includes spaces or\r | |
479 | tab characters, before [decimal digits]. The running zero in the\r | |
480 | beginning of [decimal digits] will be ignored. Then, the function\r | |
481 | stops at the first character that is a not a valid decimal character\r | |
482 | or a Null-terminator, whichever one comes first.\r | |
483 | \r | |
484 | If String is NULL, then ASSERT().\r | |
485 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
486 | If String has only pad spaces, then 0 is returned.\r | |
487 | If String has no pad spaces or valid decimal digits,\r | |
488 | then 0 is returned.\r | |
489 | If the number represented by String overflows according\r | |
490 | to the range defined by UINTN, then ASSERT().\r | |
491 | \r | |
492 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
493 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
494 | the Null-terminator, then ASSERT().\r | |
495 | \r | |
af2dc6a7 | 496 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 497 | \r |
38bbd3d9 | 498 | @retval Value translated from String.\r |
ac644614 | 499 | \r |
500 | **/\r | |
501 | UINTN\r | |
502 | EFIAPI\r | |
503 | StrDecimalToUintn (\r | |
17f695ed | 504 | IN CONST CHAR16 *String\r |
ac644614 | 505 | );\r |
506 | \r | |
507 | /**\r | |
508 | Convert a Null-terminated Unicode decimal string to a value of\r | |
509 | type UINT64.\r | |
510 | \r | |
511 | This function returns a value of type UINT64 by interpreting the contents\r | |
512 | of the Unicode string specified by String as a decimal number. The format\r | |
513 | of the input Unicode string String is:\r | |
514 | \r | |
515 | [spaces] [decimal digits].\r | |
516 | \r | |
517 | The valid decimal digit character is in the range [0-9]. The\r | |
518 | function will ignore the pad space, which includes spaces or\r | |
519 | tab characters, before [decimal digits]. The running zero in the\r | |
520 | beginning of [decimal digits] will be ignored. Then, the function\r | |
521 | stops at the first character that is a not a valid decimal character\r | |
522 | or a Null-terminator, whichever one comes first.\r | |
523 | \r | |
524 | If String is NULL, then ASSERT().\r | |
525 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
526 | If String has only pad spaces, then 0 is returned.\r | |
527 | If String has no pad spaces or valid decimal digits,\r | |
528 | then 0 is returned.\r | |
529 | If the number represented by String overflows according\r | |
530 | to the range defined by UINT64, then ASSERT().\r | |
531 | \r | |
532 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
533 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
534 | the Null-terminator, then ASSERT().\r | |
535 | \r | |
af2dc6a7 | 536 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 537 | \r |
38bbd3d9 | 538 | @retval Value translated from String.\r |
ac644614 | 539 | \r |
540 | **/\r | |
541 | UINT64\r | |
542 | EFIAPI\r | |
543 | StrDecimalToUint64 (\r | |
17f695ed | 544 | IN CONST CHAR16 *String\r |
ac644614 | 545 | );\r |
546 | \r | |
547 | \r | |
548 | /**\r | |
549 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
550 | \r | |
551 | This function returns a value of type UINTN by interpreting the contents\r | |
552 | of the Unicode string specified by String as a hexadecimal number.\r | |
553 | The format of the input Unicode string String is:\r | |
554 | \r | |
555 | [spaces][zeros][x][hexadecimal digits].\r | |
556 | \r | |
557 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
558 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
559 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
560 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
561 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
562 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
af2dc6a7 | 563 | first valid hexadecimal digit. Then, the function stops at the first character \r |
564 | that is a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
ac644614 | 565 | \r |
566 | If String is NULL, then ASSERT().\r | |
567 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
568 | If String has only pad spaces, then zero is returned.\r | |
569 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
570 | then zero is returned.\r | |
571 | If the number represented by String overflows according to the range defined by\r | |
572 | UINTN, then ASSERT().\r | |
573 | \r | |
574 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
575 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
576 | then ASSERT().\r | |
577 | \r | |
af2dc6a7 | 578 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 579 | \r |
38bbd3d9 | 580 | @retval Value translated from String.\r |
ac644614 | 581 | \r |
582 | **/\r | |
583 | UINTN\r | |
584 | EFIAPI\r | |
585 | StrHexToUintn (\r | |
17f695ed | 586 | IN CONST CHAR16 *String\r |
ac644614 | 587 | );\r |
588 | \r | |
589 | \r | |
590 | /**\r | |
591 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
592 | \r | |
593 | This function returns a value of type UINT64 by interpreting the contents\r | |
594 | of the Unicode string specified by String as a hexadecimal number.\r | |
595 | The format of the input Unicode string String is\r | |
596 | \r | |
597 | [spaces][zeros][x][hexadecimal digits].\r | |
598 | \r | |
599 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
600 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
601 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
602 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
603 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
604 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
605 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
606 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
607 | \r | |
608 | If String is NULL, then ASSERT().\r | |
609 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
610 | If String has only pad spaces, then zero is returned.\r | |
611 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
612 | then zero is returned.\r | |
613 | If the number represented by String overflows according to the range defined by\r | |
614 | UINT64, then ASSERT().\r | |
615 | \r | |
616 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
617 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
618 | then ASSERT().\r | |
619 | \r | |
af2dc6a7 | 620 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 621 | \r |
38bbd3d9 | 622 | @retval Value translated from String.\r |
ac644614 | 623 | \r |
624 | **/\r | |
625 | UINT64\r | |
626 | EFIAPI\r | |
627 | StrHexToUint64 (\r | |
17f695ed | 628 | IN CONST CHAR16 *String\r |
ac644614 | 629 | );\r |
630 | \r | |
ac644614 | 631 | /**\r |
17f695ed | 632 | Convert a Null-terminated Unicode string to a Null-terminated\r |
ac644614 | 633 | ASCII string and returns the ASCII string.\r |
634 | \r | |
635 | This function converts the content of the Unicode string Source\r | |
636 | to the ASCII string Destination by copying the lower 8 bits of\r | |
637 | each Unicode character. It returns Destination.\r | |
638 | \r | |
639 | If any Unicode characters in Source contain non-zero value in\r | |
640 | the upper 8 bits, then ASSERT().\r | |
641 | \r | |
642 | If Destination is NULL, then ASSERT().\r | |
643 | If Source is NULL, then ASSERT().\r | |
644 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
645 | If Source and Destination overlap, then ASSERT().\r | |
646 | \r | |
647 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
648 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
649 | the Null-terminator, then ASSERT().\r | |
650 | \r | |
651 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
652 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
653 | Null-terminator, then ASSERT().\r | |
654 | \r | |
af2dc6a7 | 655 | @param Source The pointer to a Null-terminated Unicode string.\r |
656 | @param Destination The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 657 | \r |
9aa049d9 | 658 | @return Destination.\r |
ac644614 | 659 | \r |
660 | **/\r | |
661 | CHAR8 *\r | |
662 | EFIAPI\r | |
663 | UnicodeStrToAsciiStr (\r | |
17f695ed | 664 | IN CONST CHAR16 *Source,\r |
665 | OUT CHAR8 *Destination\r | |
ac644614 | 666 | );\r |
667 | \r | |
668 | \r | |
669 | /**\r | |
670 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
671 | string and returns the new ASCII string.\r | |
672 | \r | |
673 | This function copies the contents of the ASCII string Source to the ASCII\r | |
674 | string Destination, and returns Destination. If Source and Destination\r | |
675 | overlap, then the results are undefined.\r | |
676 | \r | |
677 | If Destination is NULL, then ASSERT().\r | |
678 | If Source is NULL, then ASSERT().\r | |
679 | If Source and Destination overlap, then ASSERT().\r | |
680 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
681 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
682 | then ASSERT().\r | |
683 | \r | |
af2dc6a7 | 684 | @param Destination The pointer to a Null-terminated ASCII string.\r |
685 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 686 | \r |
687 | @return Destination\r | |
688 | \r | |
689 | **/\r | |
690 | CHAR8 *\r | |
691 | EFIAPI\r | |
692 | AsciiStrCpy (\r | |
693 | OUT CHAR8 *Destination,\r | |
694 | IN CONST CHAR8 *Source\r | |
695 | );\r | |
696 | \r | |
697 | \r | |
698 | /**\r | |
17f695ed | 699 | Copies up to a specified length one Null-terminated ASCII string to another \r |
700 | Null-terminated ASCII string and returns the new ASCII string.\r | |
ac644614 | 701 | \r |
702 | This function copies the contents of the ASCII string Source to the ASCII\r | |
703 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
704 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
705 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
706 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
707 | and Destination overlap, then the results are undefined.\r | |
708 | \r | |
709 | If Destination is NULL, then ASSERT().\r | |
710 | If Source is NULL, then ASSERT().\r | |
711 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 712 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
713 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 714 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
50c247fd | 715 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 716 | then ASSERT().\r |
717 | \r | |
af2dc6a7 | 718 | @param Destination The pointer to a Null-terminated ASCII string.\r |
719 | @param Source The pointer to a Null-terminated ASCII string.\r | |
720 | @param Length The maximum number of ASCII characters to copy.\r | |
ac644614 | 721 | \r |
722 | @return Destination\r | |
723 | \r | |
724 | **/\r | |
725 | CHAR8 *\r | |
726 | EFIAPI\r | |
727 | AsciiStrnCpy (\r | |
728 | OUT CHAR8 *Destination,\r | |
729 | IN CONST CHAR8 *Source,\r | |
730 | IN UINTN Length\r | |
731 | );\r | |
732 | \r | |
733 | \r | |
734 | /**\r | |
735 | Returns the length of a Null-terminated ASCII string.\r | |
736 | \r | |
737 | This function returns the number of ASCII characters in the Null-terminated\r | |
738 | ASCII string specified by String.\r | |
739 | \r | |
740 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
741 | If Length > 0 and Source is NULL, then ASSERT().\r | |
742 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
743 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
744 | then ASSERT().\r | |
745 | \r | |
af2dc6a7 | 746 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 747 | \r |
748 | @return The length of String.\r | |
749 | \r | |
750 | **/\r | |
751 | UINTN\r | |
752 | EFIAPI\r | |
753 | AsciiStrLen (\r | |
754 | IN CONST CHAR8 *String\r | |
755 | );\r | |
756 | \r | |
757 | \r | |
758 | /**\r | |
759 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
760 | Null terminator.\r | |
761 | \r | |
762 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
763 | specified by String.\r | |
764 | \r | |
765 | If String is NULL, then ASSERT().\r | |
766 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
767 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
768 | then ASSERT().\r | |
769 | \r | |
af2dc6a7 | 770 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 771 | \r |
772 | @return The size of String.\r | |
773 | \r | |
774 | **/\r | |
775 | UINTN\r | |
776 | EFIAPI\r | |
777 | AsciiStrSize (\r | |
778 | IN CONST CHAR8 *String\r | |
779 | );\r | |
780 | \r | |
781 | \r | |
782 | /**\r | |
783 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
784 | between the first mismatched ASCII characters.\r | |
785 | \r | |
786 | This function compares the Null-terminated ASCII string FirstString to the\r | |
787 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
788 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
789 | mismatched ASCII character in SecondString subtracted from the first\r | |
790 | mismatched ASCII character in FirstString.\r | |
791 | \r | |
792 | If FirstString is NULL, then ASSERT().\r | |
793 | If SecondString is NULL, then ASSERT().\r | |
794 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
795 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
796 | then ASSERT().\r | |
797 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
798 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
799 | Null-terminator, then ASSERT().\r | |
800 | \r | |
af2dc6a7 | 801 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
802 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 803 | \r |
17f695ed | 804 | @retval ==0 FirstString is identical to SecondString.\r |
805 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 806 | \r |
807 | **/\r | |
808 | INTN\r | |
809 | EFIAPI\r | |
810 | AsciiStrCmp (\r | |
811 | IN CONST CHAR8 *FirstString,\r | |
812 | IN CONST CHAR8 *SecondString\r | |
813 | );\r | |
814 | \r | |
815 | \r | |
816 | /**\r | |
817 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
818 | and returns the difference between the first mismatched ASCII characters.\r | |
819 | \r | |
820 | This function performs a case insensitive comparison of the Null-terminated\r | |
821 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
822 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
823 | value returned is the first mismatched lower case ASCII character in\r | |
824 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
825 | in FirstString.\r | |
826 | \r | |
827 | If FirstString is NULL, then ASSERT().\r | |
828 | If SecondString is NULL, then ASSERT().\r | |
829 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
830 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
831 | then ASSERT().\r | |
832 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
833 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
834 | Null-terminator, then ASSERT().\r | |
835 | \r | |
af2dc6a7 | 836 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
837 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 838 | \r |
17f695ed | 839 | @retval ==0 FirstString is identical to SecondString using case insensitive\r |
1106ffe1 | 840 | comparisons.\r |
17f695ed | 841 | @retval !=0 FirstString is not identical to SecondString using case\r |
1106ffe1 | 842 | insensitive comparisons.\r |
ac644614 | 843 | \r |
844 | **/\r | |
845 | INTN\r | |
846 | EFIAPI\r | |
847 | AsciiStriCmp (\r | |
848 | IN CONST CHAR8 *FirstString,\r | |
849 | IN CONST CHAR8 *SecondString\r | |
850 | );\r | |
851 | \r | |
852 | \r | |
853 | /**\r | |
854 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
855 | the difference between the first mismatched ASCII characters.\r | |
856 | \r | |
857 | This function compares the Null-terminated ASCII string FirstString to the\r | |
858 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
859 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
860 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
861 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
862 | first mismatched ASCII character in FirstString.\r | |
863 | \r | |
864 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
865 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
50c247fd | 866 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
867 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
868 | If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r | |
869 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 870 | then ASSERT().\r |
50c247fd | 871 | If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r |
872 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 873 | then ASSERT().\r |
874 | \r | |
af2dc6a7 | 875 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
876 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
877 | @param Length The maximum number of ASCII characters for compare.\r | |
ac644614 | 878 | \r |
17f695ed | 879 | @retval ==0 FirstString is identical to SecondString.\r |
880 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 881 | \r |
882 | **/\r | |
883 | INTN\r | |
884 | EFIAPI\r | |
885 | AsciiStrnCmp (\r | |
886 | IN CONST CHAR8 *FirstString,\r | |
887 | IN CONST CHAR8 *SecondString,\r | |
888 | IN UINTN Length\r | |
889 | );\r | |
890 | \r | |
891 | \r | |
892 | /**\r | |
893 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
894 | ASCII string, and returns the concatenated ASCII string.\r | |
895 | \r | |
896 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
897 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
898 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
899 | String is returned.\r | |
900 | \r | |
901 | If Destination is NULL, then ASSERT().\r | |
902 | If Source is NULL, then ASSERT().\r | |
903 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
904 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
905 | then ASSERT().\r | |
906 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
907 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
908 | then ASSERT().\r | |
909 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
910 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
911 | ASCII characters, then ASSERT().\r | |
912 | \r | |
af2dc6a7 | 913 | @param Destination The pointer to a Null-terminated ASCII string.\r |
914 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 915 | \r |
916 | @return Destination\r | |
917 | \r | |
918 | **/\r | |
919 | CHAR8 *\r | |
920 | EFIAPI\r | |
921 | AsciiStrCat (\r | |
922 | IN OUT CHAR8 *Destination,\r | |
923 | IN CONST CHAR8 *Source\r | |
924 | );\r | |
925 | \r | |
926 | \r | |
927 | /**\r | |
17f695ed | 928 | Concatenates up to a specified length one Null-terminated ASCII string to \r |
929 | the end of another Null-terminated ASCII string, and returns the \r | |
930 | concatenated ASCII string.\r | |
ac644614 | 931 | \r |
932 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
933 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
934 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
935 | Length ASCII characters are concatenated from Source to the end of\r | |
936 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
937 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
938 | the results are undefined.\r | |
939 | \r | |
940 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
941 | If Length > 0 and Source is NULL, then ASSERT().\r | |
942 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 943 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r |
944 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 945 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
50c247fd | 946 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 947 | then ASSERT().\r |
948 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
50c247fd | 949 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 950 | then ASSERT().\r |
951 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
952 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
50c247fd | 953 | ASCII characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 954 | \r |
af2dc6a7 | 955 | @param Destination The pointer to a Null-terminated ASCII string.\r |
956 | @param Source The pointer to a Null-terminated ASCII string.\r | |
957 | @param Length The maximum number of ASCII characters to concatenate from\r | |
ac644614 | 958 | Source.\r |
959 | \r | |
960 | @return Destination\r | |
961 | \r | |
962 | **/\r | |
963 | CHAR8 *\r | |
964 | EFIAPI\r | |
965 | AsciiStrnCat (\r | |
966 | IN OUT CHAR8 *Destination,\r | |
967 | IN CONST CHAR8 *Source,\r | |
968 | IN UINTN Length\r | |
969 | );\r | |
970 | \r | |
971 | \r | |
972 | /**\r | |
9aa049d9 | 973 | Returns the first occurrence of a Null-terminated ASCII sub-string\r |
ac644614 | 974 | in a Null-terminated ASCII string.\r |
975 | \r | |
976 | This function scans the contents of the ASCII string specified by String\r | |
977 | and returns the first occurrence of SearchString. If SearchString is not\r | |
978 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
979 | then String is returned.\r | |
980 | \r | |
981 | If String is NULL, then ASSERT().\r | |
982 | If SearchString is NULL, then ASSERT().\r | |
983 | \r | |
984 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r | |
985 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
986 | not including the Null-terminator, then ASSERT().\r | |
987 | \r | |
af2dc6a7 | 988 | @param String The pointer to a Null-terminated ASCII string.\r |
989 | @param SearchString The pointer to a Null-terminated ASCII string to search for.\r | |
ac644614 | 990 | \r |
991 | @retval NULL If the SearchString does not appear in String.\r | |
17f695ed | 992 | @retval others If there is a match return the first occurrence of SearchingString.\r |
9aa049d9 | 993 | If the length of SearchString is zero,return String.\r |
ac644614 | 994 | \r |
995 | **/\r | |
996 | CHAR8 *\r | |
997 | EFIAPI\r | |
998 | AsciiStrStr (\r | |
17f695ed | 999 | IN CONST CHAR8 *String,\r |
1000 | IN CONST CHAR8 *SearchString\r | |
ac644614 | 1001 | );\r |
1002 | \r | |
1003 | \r | |
1004 | /**\r | |
1005 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1006 | UINTN.\r | |
1007 | \r | |
1008 | This function returns a value of type UINTN by interpreting the contents\r | |
1009 | of the ASCII string String as a decimal number. The format of the input\r | |
1010 | ASCII string String is:\r | |
1011 | \r | |
1012 | [spaces] [decimal digits].\r | |
1013 | \r | |
1014 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1015 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1016 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1017 | function stops at the first character that is a not a valid decimal character or\r | |
1018 | Null-terminator, whichever on comes first.\r | |
1019 | \r | |
1020 | If String has only pad spaces, then 0 is returned.\r | |
1021 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1022 | If the number represented by String overflows according to the range defined by\r | |
1023 | UINTN, then ASSERT().\r | |
1024 | If String is NULL, then ASSERT().\r | |
1025 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1026 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1027 | then ASSERT().\r | |
1028 | \r | |
af2dc6a7 | 1029 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1030 | \r |
af2dc6a7 | 1031 | @retval The value translated from String.\r |
ac644614 | 1032 | \r |
1033 | **/\r | |
1034 | UINTN\r | |
1035 | EFIAPI\r | |
1036 | AsciiStrDecimalToUintn (\r | |
1037 | IN CONST CHAR8 *String\r | |
1038 | );\r | |
1039 | \r | |
1040 | \r | |
1041 | /**\r | |
1042 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1043 | UINT64.\r | |
1044 | \r | |
1045 | This function returns a value of type UINT64 by interpreting the contents\r | |
1046 | of the ASCII string String as a decimal number. The format of the input\r | |
1047 | ASCII string String is:\r | |
1048 | \r | |
1049 | [spaces] [decimal digits].\r | |
1050 | \r | |
1051 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1052 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1053 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1054 | function stops at the first character that is a not a valid decimal character or\r | |
1055 | Null-terminator, whichever on comes first.\r | |
1056 | \r | |
1057 | If String has only pad spaces, then 0 is returned.\r | |
1058 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1059 | If the number represented by String overflows according to the range defined by\r | |
1060 | UINT64, then ASSERT().\r | |
1061 | If String is NULL, then ASSERT().\r | |
1062 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1063 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1064 | then ASSERT().\r | |
1065 | \r | |
af2dc6a7 | 1066 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1067 | \r |
38bbd3d9 | 1068 | @retval Value translated from String.\r |
ac644614 | 1069 | \r |
1070 | **/\r | |
1071 | UINT64\r | |
1072 | EFIAPI\r | |
1073 | AsciiStrDecimalToUint64 (\r | |
17f695ed | 1074 | IN CONST CHAR8 *String\r |
ac644614 | 1075 | );\r |
1076 | \r | |
1077 | \r | |
1078 | /**\r | |
1079 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
1080 | \r | |
1081 | This function returns a value of type UINTN by interpreting the contents of\r | |
1082 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1083 | string String is:\r | |
1084 | \r | |
1085 | [spaces][zeros][x][hexadecimal digits].\r | |
1086 | \r | |
1087 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1088 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1089 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1090 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1091 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1092 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1093 | digit. Then, the function stops at the first character that is a not a valid\r | |
1094 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1095 | \r | |
1096 | If String has only pad spaces, then 0 is returned.\r | |
1097 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1098 | 0 is returned.\r | |
1099 | \r | |
1100 | If the number represented by String overflows according to the range defined by UINTN,\r | |
1101 | then ASSERT().\r | |
1102 | If String is NULL, then ASSERT().\r | |
1103 | If PcdMaximumAsciiStringLength is not zero,\r | |
1104 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1105 | the Null-terminator, then ASSERT().\r | |
1106 | \r | |
af2dc6a7 | 1107 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1108 | \r |
38bbd3d9 | 1109 | @retval Value translated from String.\r |
ac644614 | 1110 | \r |
1111 | **/\r | |
1112 | UINTN\r | |
1113 | EFIAPI\r | |
1114 | AsciiStrHexToUintn (\r | |
17f695ed | 1115 | IN CONST CHAR8 *String\r |
ac644614 | 1116 | );\r |
1117 | \r | |
1118 | \r | |
1119 | /**\r | |
1120 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
1121 | \r | |
1122 | This function returns a value of type UINT64 by interpreting the contents of\r | |
1123 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1124 | string String is:\r | |
1125 | \r | |
1126 | [spaces][zeros][x][hexadecimal digits].\r | |
1127 | \r | |
1128 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1129 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1130 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1131 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1132 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1133 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1134 | digit. Then, the function stops at the first character that is a not a valid\r | |
1135 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1136 | \r | |
1137 | If String has only pad spaces, then 0 is returned.\r | |
1138 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1139 | 0 is returned.\r | |
1140 | \r | |
1141 | If the number represented by String overflows according to the range defined by UINT64,\r | |
1142 | then ASSERT().\r | |
1143 | If String is NULL, then ASSERT().\r | |
1144 | If PcdMaximumAsciiStringLength is not zero,\r | |
1145 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1146 | the Null-terminator, then ASSERT().\r | |
1147 | \r | |
af2dc6a7 | 1148 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1149 | \r |
38bbd3d9 | 1150 | @retval Value translated from String.\r |
ac644614 | 1151 | \r |
1152 | **/\r | |
1153 | UINT64\r | |
1154 | EFIAPI\r | |
1155 | AsciiStrHexToUint64 (\r | |
17f695ed | 1156 | IN CONST CHAR8 *String\r |
ac644614 | 1157 | );\r |
1158 | \r | |
1159 | \r | |
1160 | /**\r | |
1161 | Convert one Null-terminated ASCII string to a Null-terminated\r | |
1162 | Unicode string and returns the Unicode string.\r | |
1163 | \r | |
1164 | This function converts the contents of the ASCII string Source to the Unicode\r | |
1165 | string Destination, and returns Destination. The function terminates the\r | |
1166 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
1167 | The caller is responsible to make sure Destination points to a buffer with size\r | |
1168 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r | |
1169 | \r | |
1170 | If Destination is NULL, then ASSERT().\r | |
1171 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
1172 | If Source is NULL, then ASSERT().\r | |
1173 | If Source and Destination overlap, then ASSERT().\r | |
1174 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
1175 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1176 | then ASSERT().\r | |
1177 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
1178 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
1179 | Null-terminator, then ASSERT().\r | |
1180 | \r | |
af2dc6a7 | 1181 | @param Source The pointer to a Null-terminated ASCII string.\r |
1182 | @param Destination The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 1183 | \r |
9aa049d9 | 1184 | @return Destination.\r |
ac644614 | 1185 | \r |
1186 | **/\r | |
1187 | CHAR16 *\r | |
1188 | EFIAPI\r | |
1189 | AsciiStrToUnicodeStr (\r | |
17f695ed | 1190 | IN CONST CHAR8 *Source,\r |
1191 | OUT CHAR16 *Destination\r | |
ac644614 | 1192 | );\r |
1193 | \r | |
1194 | \r | |
1195 | /**\r | |
1196 | Converts an 8-bit value to an 8-bit BCD value.\r | |
1197 | \r | |
1198 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
1199 | returned.\r | |
1200 | \r | |
1201 | If Value >= 100, then ASSERT().\r | |
1202 | \r | |
1203 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
1204 | \r | |
9aa049d9 | 1205 | @return The BCD value.\r |
ac644614 | 1206 | \r |
1207 | **/\r | |
1208 | UINT8\r | |
1209 | EFIAPI\r | |
1210 | DecimalToBcd8 (\r | |
1211 | IN UINT8 Value\r | |
1212 | );\r | |
1213 | \r | |
1214 | \r | |
1215 | /**\r | |
1216 | Converts an 8-bit BCD value to an 8-bit value.\r | |
1217 | \r | |
1218 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
1219 | value is returned.\r | |
1220 | \r | |
1221 | If Value >= 0xA0, then ASSERT().\r | |
1222 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
1223 | \r | |
1224 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
1225 | \r | |
1226 | @return The 8-bit value is returned.\r | |
1227 | \r | |
1228 | **/\r | |
1229 | UINT8\r | |
1230 | EFIAPI\r | |
1231 | BcdToDecimal8 (\r | |
1232 | IN UINT8 Value\r | |
1233 | );\r | |
1234 | \r | |
1235 | \r | |
1236 | //\r | |
1237 | // Linked List Functions and Macros\r | |
1238 | //\r | |
1239 | \r | |
1240 | /**\r | |
1241 | Initializes the head node of a doubly linked list that is declared as a\r | |
1242 | global variable in a module.\r | |
1243 | \r | |
1244 | Initializes the forward and backward links of a new linked list. After\r | |
1245 | initializing a linked list with this macro, the other linked list functions\r | |
1246 | may be used to add and remove nodes from the linked list. This macro results\r | |
1247 | in smaller executables by initializing the linked list in the data section,\r | |
1248 | instead if calling the InitializeListHead() function to perform the\r | |
1249 | equivalent operation.\r | |
1250 | \r | |
77f863ee | 1251 | @param ListHead The head note of a list to initialize.\r |
ac644614 | 1252 | \r |
1253 | **/\r | |
17f695ed | 1254 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r |
ac644614 | 1255 | \r |
1256 | \r | |
1257 | /**\r | |
1258 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
1259 | the head node of the doubly linked list.\r | |
1260 | \r | |
1261 | Initializes the forward and backward links of a new linked list. After\r | |
1262 | initializing a linked list with this function, the other linked list\r | |
1263 | functions may be used to add and remove nodes from the linked list. It is up\r | |
1264 | to the caller of this function to allocate the memory for ListHead.\r | |
1265 | \r | |
1266 | If ListHead is NULL, then ASSERT().\r | |
1267 | \r | |
1268 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
1269 | \r | |
1270 | @return ListHead\r | |
1271 | \r | |
1272 | **/\r | |
1273 | LIST_ENTRY *\r | |
1274 | EFIAPI\r | |
1275 | InitializeListHead (\r | |
aa0583c7 | 1276 | IN OUT LIST_ENTRY *ListHead\r |
ac644614 | 1277 | );\r |
1278 | \r | |
1279 | \r | |
1280 | /**\r | |
1281 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
1282 | to the head node of the doubly linked list.\r | |
1283 | \r | |
1284 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
1285 | ListHead, and returns ListHead.\r | |
1286 | \r | |
1287 | If ListHead is NULL, then ASSERT().\r | |
1288 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1289 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1290 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1291 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
1292 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1293 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1294 | \r | |
1295 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1296 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
1297 | of a doubly linked list.\r | |
1298 | \r | |
1299 | @return ListHead\r | |
1300 | \r | |
1301 | **/\r | |
1302 | LIST_ENTRY *\r | |
1303 | EFIAPI\r | |
1304 | InsertHeadList (\r | |
aa0583c7 | 1305 | IN OUT LIST_ENTRY *ListHead,\r |
1306 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1307 | );\r |
1308 | \r | |
1309 | \r | |
1310 | /**\r | |
1311 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
1312 | the head node of the doubly linked list.\r | |
1313 | \r | |
1314 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
1315 | and returns ListHead.\r | |
1316 | \r | |
1317 | If ListHead is NULL, then ASSERT().\r | |
1318 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1319 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1320 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1321 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
1322 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1323 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1324 | \r | |
1325 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1326 | @param Entry A pointer to a node that is to be added at the end of the\r | |
1327 | doubly linked list.\r | |
1328 | \r | |
1329 | @return ListHead\r | |
1330 | \r | |
1331 | **/\r | |
1332 | LIST_ENTRY *\r | |
1333 | EFIAPI\r | |
1334 | InsertTailList (\r | |
aa0583c7 | 1335 | IN OUT LIST_ENTRY *ListHead,\r |
1336 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1337 | );\r |
1338 | \r | |
1339 | \r | |
1340 | /**\r | |
1341 | Retrieves the first node of a doubly linked list.\r | |
1342 | \r | |
17f695ed | 1343 | Returns the first node of a doubly linked list. List must have been \r |
1344 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r | |
1345 | If List is empty, then List is returned.\r | |
ac644614 | 1346 | \r |
1347 | If List is NULL, then ASSERT().\r | |
17f695ed | 1348 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1349 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1350 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1351 | in List, including the List node, is greater than or equal to\r | |
1352 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1353 | \r | |
1354 | @param List A pointer to the head node of a doubly linked list.\r | |
1355 | \r | |
1356 | @return The first node of a doubly linked list.\r | |
1357 | @retval NULL The list is empty.\r | |
1358 | \r | |
1359 | **/\r | |
1360 | LIST_ENTRY *\r | |
1361 | EFIAPI\r | |
1362 | GetFirstNode (\r | |
1363 | IN CONST LIST_ENTRY *List\r | |
1364 | );\r | |
1365 | \r | |
1366 | \r | |
1367 | /**\r | |
1368 | Retrieves the next node of a doubly linked list.\r | |
1369 | \r | |
17f695ed | 1370 | Returns the node of a doubly linked list that follows Node. \r |
1371 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1372 | or InitializeListHead(). If List is empty, then List is returned.\r | |
ac644614 | 1373 | \r |
1374 | If List is NULL, then ASSERT().\r | |
1375 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1376 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1377 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1378 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r |
1379 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
1081f624 | 1380 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1381 | \r |
1382 | @param List A pointer to the head node of a doubly linked list.\r | |
1383 | @param Node A pointer to a node in the doubly linked list.\r | |
1384 | \r | |
af2dc6a7 | 1385 | @return The pointer to the next node if one exists. Otherwise List is returned.\r |
ac644614 | 1386 | \r |
1387 | **/\r | |
1388 | LIST_ENTRY *\r | |
1389 | EFIAPI\r | |
1390 | GetNextNode (\r | |
1391 | IN CONST LIST_ENTRY *List,\r | |
1392 | IN CONST LIST_ENTRY *Node\r | |
1393 | );\r | |
1394 | \r | |
cbca8de5 | 1395 | \r |
1396 | /**\r | |
1397 | Retrieves the previous node of a doubly linked list.\r | |
1398 | \r | |
1399 | Returns the node of a doubly linked list that precedes Node. \r | |
1400 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1401 | or InitializeListHead(). If List is empty, then List is returned.\r | |
1402 | \r | |
1403 | If List is NULL, then ASSERT().\r | |
1404 | If Node is NULL, then ASSERT().\r | |
1405 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r | |
1406 | InitializeListHead(), then ASSERT().\r | |
1407 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
1408 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
1409 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r | |
1410 | \r | |
1411 | @param List A pointer to the head node of a doubly linked list.\r | |
1412 | @param Node A pointer to a node in the doubly linked list.\r | |
1413 | \r | |
af2dc6a7 | 1414 | @return The pointer to the previous node if one exists. Otherwise List is returned.\r |
cbca8de5 | 1415 | \r |
1416 | **/\r | |
1417 | LIST_ENTRY *\r | |
1418 | EFIAPI\r | |
1419 | GetPreviousNode (\r | |
1420 | IN CONST LIST_ENTRY *List,\r | |
1421 | IN CONST LIST_ENTRY *Node\r | |
1422 | );\r | |
ac644614 | 1423 | \r |
cbca8de5 | 1424 | \r |
ac644614 | 1425 | /**\r |
1426 | Checks to see if a doubly linked list is empty or not.\r | |
1427 | \r | |
1428 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
1429 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
1430 | \r | |
1431 | If ListHead is NULL, then ASSERT().\r | |
17f695ed | 1432 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1433 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1434 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1435 | in List, including the List node, is greater than or equal to\r | |
1436 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1437 | \r | |
1438 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1439 | \r | |
1440 | @retval TRUE The linked list is empty.\r | |
1441 | @retval FALSE The linked list is not empty.\r | |
1442 | \r | |
1443 | **/\r | |
1444 | BOOLEAN\r | |
1445 | EFIAPI\r | |
1446 | IsListEmpty (\r | |
1447 | IN CONST LIST_ENTRY *ListHead\r | |
1448 | );\r | |
1449 | \r | |
1450 | \r | |
1451 | /**\r | |
aa0583c7 | 1452 | Determines if a node in a doubly linked list is the head node of a the same\r |
1453 | doubly linked list. This function is typically used to terminate a loop that\r | |
1454 | traverses all the nodes in a doubly linked list starting with the head node.\r | |
ac644614 | 1455 | \r |
aa0583c7 | 1456 | Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r |
1457 | nodes in the doubly linked list specified by List. List must have been\r | |
17f695ed | 1458 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1459 | \r |
1460 | If List is NULL, then ASSERT().\r | |
1461 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1462 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r |
1463 | then ASSERT().\r | |
ac644614 | 1464 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1465 | in List, including the List node, is greater than or equal to\r | |
1466 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1467 | If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r |
1468 | to List, then ASSERT().\r | |
ac644614 | 1469 | \r |
1470 | @param List A pointer to the head node of a doubly linked list.\r | |
1471 | @param Node A pointer to a node in the doubly linked list.\r | |
1472 | \r | |
1473 | @retval TRUE Node is one of the nodes in the doubly linked list.\r | |
1474 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r | |
1475 | \r | |
1476 | **/\r | |
1477 | BOOLEAN\r | |
1478 | EFIAPI\r | |
1479 | IsNull (\r | |
1480 | IN CONST LIST_ENTRY *List,\r | |
1481 | IN CONST LIST_ENTRY *Node\r | |
1482 | );\r | |
1483 | \r | |
1484 | \r | |
1485 | /**\r | |
1486 | Determines if a node the last node in a doubly linked list.\r | |
1487 | \r | |
1488 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
1489 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
17f695ed | 1490 | INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1491 | \r |
1492 | If List is NULL, then ASSERT().\r | |
1493 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1494 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1495 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1496 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1497 | in List, including the List node, is greater than or equal to\r | |
1498 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1499 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1500 | \r |
1501 | @param List A pointer to the head node of a doubly linked list.\r | |
1502 | @param Node A pointer to a node in the doubly linked list.\r | |
1503 | \r | |
1504 | @retval TRUE Node is the last node in the linked list.\r | |
1505 | @retval FALSE Node is not the last node in the linked list.\r | |
1506 | \r | |
1507 | **/\r | |
1508 | BOOLEAN\r | |
1509 | EFIAPI\r | |
1510 | IsNodeAtEnd (\r | |
1511 | IN CONST LIST_ENTRY *List,\r | |
1512 | IN CONST LIST_ENTRY *Node\r | |
1513 | );\r | |
1514 | \r | |
1515 | \r | |
1516 | /**\r | |
1517 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
1518 | first node after the swap.\r | |
1519 | \r | |
1520 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
1521 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
1522 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
1523 | same double linked list as FirstEntry and that double linked list must have\r | |
17f695ed | 1524 | been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r |
1525 | SecondEntry is returned after the nodes are swapped.\r | |
ac644614 | 1526 | \r |
1527 | If FirstEntry is NULL, then ASSERT().\r | |
1528 | If SecondEntry is NULL, then ASSERT().\r | |
1081f624 | 1529 | If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r |
1530 | same linked list, then ASSERT().\r | |
ac644614 | 1531 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
1532 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
1533 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
1534 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1535 | \r | |
1536 | @param FirstEntry A pointer to a node in a linked list.\r | |
1537 | @param SecondEntry A pointer to another node in the same linked list.\r | |
38bbd3d9 | 1538 | \r |
9aa049d9 | 1539 | @return SecondEntry.\r |
ac644614 | 1540 | \r |
1541 | **/\r | |
1542 | LIST_ENTRY *\r | |
1543 | EFIAPI\r | |
1544 | SwapListEntries (\r | |
aa0583c7 | 1545 | IN OUT LIST_ENTRY *FirstEntry,\r |
1546 | IN OUT LIST_ENTRY *SecondEntry\r | |
ac644614 | 1547 | );\r |
1548 | \r | |
1549 | \r | |
1550 | /**\r | |
1551 | Removes a node from a doubly linked list, and returns the node that follows\r | |
1552 | the removed node.\r | |
1553 | \r | |
1554 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
1555 | this function to release the memory used by this node if that is required. On\r | |
1556 | exit, the node following Entry in the doubly linked list is returned. If\r | |
1557 | Entry is the only node in the linked list, then the head node of the linked\r | |
1558 | list is returned.\r | |
1559 | \r | |
1560 | If Entry is NULL, then ASSERT().\r | |
1561 | If Entry is the head node of an empty list, then ASSERT().\r | |
1562 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1563 | linked list containing Entry, including the Entry node, is greater than\r | |
1564 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1565 | \r | |
9aa049d9 | 1566 | @param Entry A pointer to a node in a linked list.\r |
ac644614 | 1567 | \r |
9aa049d9 | 1568 | @return Entry.\r |
ac644614 | 1569 | \r |
1570 | **/\r | |
1571 | LIST_ENTRY *\r | |
1572 | EFIAPI\r | |
1573 | RemoveEntryList (\r | |
1574 | IN CONST LIST_ENTRY *Entry\r | |
1575 | );\r | |
1576 | \r | |
1577 | //\r | |
1578 | // Math Services\r | |
1579 | //\r | |
1580 | \r | |
1581 | /**\r | |
1582 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
1583 | with zeros. The shifted value is returned.\r | |
1584 | \r | |
1585 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
1586 | low Count bits are set to zero. The shifted value is returned.\r | |
1587 | \r | |
1588 | If Count is greater than 63, then ASSERT().\r | |
1589 | \r | |
1590 | @param Operand The 64-bit operand to shift left.\r | |
1591 | @param Count The number of bits to shift left.\r | |
1592 | \r | |
9aa049d9 | 1593 | @return Operand << Count.\r |
ac644614 | 1594 | \r |
1595 | **/\r | |
1596 | UINT64\r | |
1597 | EFIAPI\r | |
1598 | LShiftU64 (\r | |
1599 | IN UINT64 Operand,\r | |
1600 | IN UINTN Count\r | |
1601 | );\r | |
1602 | \r | |
1603 | \r | |
1604 | /**\r | |
1605 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
1606 | filled with zeros. The shifted value is returned.\r | |
1607 | \r | |
1608 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1609 | high Count bits are set to zero. The shifted value is returned.\r | |
1610 | \r | |
1611 | If Count is greater than 63, then ASSERT().\r | |
1612 | \r | |
1613 | @param Operand The 64-bit operand to shift right.\r | |
1614 | @param Count The number of bits to shift right.\r | |
1615 | \r | |
1616 | @return Operand >> Count\r | |
1617 | \r | |
1618 | **/\r | |
1619 | UINT64\r | |
1620 | EFIAPI\r | |
1621 | RShiftU64 (\r | |
1622 | IN UINT64 Operand,\r | |
1623 | IN UINTN Count\r | |
1624 | );\r | |
1625 | \r | |
1626 | \r | |
1627 | /**\r | |
1628 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
1629 | with original integer's bit 63. The shifted value is returned.\r | |
1630 | \r | |
1631 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1632 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
1633 | \r | |
1634 | If Count is greater than 63, then ASSERT().\r | |
1635 | \r | |
1636 | @param Operand The 64-bit operand to shift right.\r | |
1637 | @param Count The number of bits to shift right.\r | |
1638 | \r | |
1639 | @return Operand >> Count\r | |
1640 | \r | |
1641 | **/\r | |
1642 | UINT64\r | |
1643 | EFIAPI\r | |
1644 | ARShiftU64 (\r | |
1645 | IN UINT64 Operand,\r | |
1646 | IN UINTN Count\r | |
1647 | );\r | |
1648 | \r | |
1649 | \r | |
1650 | /**\r | |
1651 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
1652 | with the high bits that were rotated.\r | |
1653 | \r | |
1654 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
1655 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1656 | value is returned.\r | |
1657 | \r | |
1658 | If Count is greater than 31, then ASSERT().\r | |
1659 | \r | |
1660 | @param Operand The 32-bit operand to rotate left.\r | |
1661 | @param Count The number of bits to rotate left.\r | |
1662 | \r | |
17f695ed | 1663 | @return Operand << Count\r |
ac644614 | 1664 | \r |
1665 | **/\r | |
1666 | UINT32\r | |
1667 | EFIAPI\r | |
1668 | LRotU32 (\r | |
1669 | IN UINT32 Operand,\r | |
1670 | IN UINTN Count\r | |
1671 | );\r | |
1672 | \r | |
1673 | \r | |
1674 | /**\r | |
1675 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
1676 | with the low bits that were rotated.\r | |
1677 | \r | |
1678 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
1679 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1680 | value is returned.\r | |
1681 | \r | |
1682 | If Count is greater than 31, then ASSERT().\r | |
1683 | \r | |
1684 | @param Operand The 32-bit operand to rotate right.\r | |
1685 | @param Count The number of bits to rotate right.\r | |
1686 | \r | |
2fe241a2 | 1687 | @return Operand >> Count\r |
ac644614 | 1688 | \r |
1689 | **/\r | |
1690 | UINT32\r | |
1691 | EFIAPI\r | |
1692 | RRotU32 (\r | |
1693 | IN UINT32 Operand,\r | |
1694 | IN UINTN Count\r | |
1695 | );\r | |
1696 | \r | |
1697 | \r | |
1698 | /**\r | |
1699 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
1700 | with the high bits that were rotated.\r | |
1701 | \r | |
1702 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
1703 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1704 | value is returned.\r | |
1705 | \r | |
1706 | If Count is greater than 63, then ASSERT().\r | |
1707 | \r | |
1708 | @param Operand The 64-bit operand to rotate left.\r | |
1709 | @param Count The number of bits to rotate left.\r | |
1710 | \r | |
17f695ed | 1711 | @return Operand << Count\r |
ac644614 | 1712 | \r |
1713 | **/\r | |
1714 | UINT64\r | |
1715 | EFIAPI\r | |
1716 | LRotU64 (\r | |
1717 | IN UINT64 Operand,\r | |
1718 | IN UINTN Count\r | |
1719 | );\r | |
1720 | \r | |
1721 | \r | |
1722 | /**\r | |
1723 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
1724 | with the high low bits that were rotated.\r | |
1725 | \r | |
1726 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
1727 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1728 | value is returned.\r | |
1729 | \r | |
1730 | If Count is greater than 63, then ASSERT().\r | |
1731 | \r | |
1732 | @param Operand The 64-bit operand to rotate right.\r | |
1733 | @param Count The number of bits to rotate right.\r | |
1734 | \r | |
17f695ed | 1735 | @return Operand >> Count\r |
ac644614 | 1736 | \r |
1737 | **/\r | |
1738 | UINT64\r | |
1739 | EFIAPI\r | |
1740 | RRotU64 (\r | |
1741 | IN UINT64 Operand,\r | |
1742 | IN UINTN Count\r | |
1743 | );\r | |
1744 | \r | |
1745 | \r | |
1746 | /**\r | |
1747 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
1748 | \r | |
1749 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
1750 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1751 | Otherwise, a value between 0 and 31 is returned.\r | |
1752 | \r | |
1753 | @param Operand The 32-bit operand to evaluate.\r | |
1754 | \r | |
9aa049d9 | 1755 | @retval 0..31 The lowest bit set in Operand was found.\r |
17f695ed | 1756 | @retval -1 Operand is zero.\r |
ac644614 | 1757 | \r |
1758 | **/\r | |
1759 | INTN\r | |
1760 | EFIAPI\r | |
1761 | LowBitSet32 (\r | |
1762 | IN UINT32 Operand\r | |
1763 | );\r | |
1764 | \r | |
1765 | \r | |
1766 | /**\r | |
1767 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
1768 | \r | |
1769 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
1770 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1771 | Otherwise, a value between 0 and 63 is returned.\r | |
1772 | \r | |
1773 | @param Operand The 64-bit operand to evaluate.\r | |
1774 | \r | |
9aa049d9 | 1775 | @retval 0..63 The lowest bit set in Operand was found.\r |
17f695ed | 1776 | @retval -1 Operand is zero.\r |
1777 | \r | |
ac644614 | 1778 | \r |
1779 | **/\r | |
1780 | INTN\r | |
1781 | EFIAPI\r | |
1782 | LowBitSet64 (\r | |
1783 | IN UINT64 Operand\r | |
1784 | );\r | |
1785 | \r | |
1786 | \r | |
1787 | /**\r | |
1788 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
1789 | to log2(x).\r | |
1790 | \r | |
1791 | This function computes the bit position of the highest bit set in the 32-bit\r | |
1792 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1793 | Otherwise, a value between 0 and 31 is returned.\r | |
1794 | \r | |
1795 | @param Operand The 32-bit operand to evaluate.\r | |
1796 | \r | |
9aa049d9 | 1797 | @retval 0..31 Position of the highest bit set in Operand if found.\r |
17f695ed | 1798 | @retval -1 Operand is zero.\r |
ac644614 | 1799 | \r |
1800 | **/\r | |
1801 | INTN\r | |
1802 | EFIAPI\r | |
1803 | HighBitSet32 (\r | |
1804 | IN UINT32 Operand\r | |
1805 | );\r | |
1806 | \r | |
1807 | \r | |
1808 | /**\r | |
1809 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
1810 | to log2(x).\r | |
1811 | \r | |
1812 | This function computes the bit position of the highest bit set in the 64-bit\r | |
1813 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1814 | Otherwise, a value between 0 and 63 is returned.\r | |
1815 | \r | |
1816 | @param Operand The 64-bit operand to evaluate.\r | |
1817 | \r | |
9aa049d9 | 1818 | @retval 0..63 Position of the highest bit set in Operand if found.\r |
17f695ed | 1819 | @retval -1 Operand is zero.\r |
ac644614 | 1820 | \r |
1821 | **/\r | |
1822 | INTN\r | |
1823 | EFIAPI\r | |
1824 | HighBitSet64 (\r | |
1825 | IN UINT64 Operand\r | |
1826 | );\r | |
1827 | \r | |
1828 | \r | |
1829 | /**\r | |
1830 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
17f695ed | 1831 | 1 << log2(x).\r |
ac644614 | 1832 | \r |
1833 | This function computes the value of the highest bit set in the 32-bit value\r | |
1834 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1835 | \r | |
1836 | @param Operand The 32-bit operand to evaluate.\r | |
1837 | \r | |
1838 | @return 1 << HighBitSet32(Operand)\r | |
1839 | @retval 0 Operand is zero.\r | |
1840 | \r | |
1841 | **/\r | |
1842 | UINT32\r | |
1843 | EFIAPI\r | |
1844 | GetPowerOfTwo32 (\r | |
1845 | IN UINT32 Operand\r | |
1846 | );\r | |
1847 | \r | |
1848 | \r | |
1849 | /**\r | |
1850 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
17f695ed | 1851 | 1 << log2(x).\r |
ac644614 | 1852 | \r |
1853 | This function computes the value of the highest bit set in the 64-bit value\r | |
1854 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1855 | \r | |
1856 | @param Operand The 64-bit operand to evaluate.\r | |
1857 | \r | |
1858 | @return 1 << HighBitSet64(Operand)\r | |
1859 | @retval 0 Operand is zero.\r | |
1860 | \r | |
1861 | **/\r | |
1862 | UINT64\r | |
1863 | EFIAPI\r | |
1864 | GetPowerOfTwo64 (\r | |
1865 | IN UINT64 Operand\r | |
1866 | );\r | |
1867 | \r | |
1868 | \r | |
1869 | /**\r | |
af2dc6a7 | 1870 | Switches the endianness of a 16-bit integer.\r |
ac644614 | 1871 | \r |
1872 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
1873 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1874 | returned.\r | |
1875 | \r | |
2a53dabf | 1876 | @param Value A 16-bit unsigned value.\r |
ac644614 | 1877 | \r |
efb23117 | 1878 | @return The byte swapped Value.\r |
ac644614 | 1879 | \r |
1880 | **/\r | |
1881 | UINT16\r | |
1882 | EFIAPI\r | |
1883 | SwapBytes16 (\r | |
1884 | IN UINT16 Value\r | |
1885 | );\r | |
1886 | \r | |
1887 | \r | |
1888 | /**\r | |
af2dc6a7 | 1889 | Switches the endianness of a 32-bit integer.\r |
ac644614 | 1890 | \r |
1891 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
1892 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1893 | returned.\r | |
1894 | \r | |
2a53dabf | 1895 | @param Value A 32-bit unsigned value.\r |
ac644614 | 1896 | \r |
efb23117 | 1897 | @return The byte swapped Value.\r |
ac644614 | 1898 | \r |
1899 | **/\r | |
1900 | UINT32\r | |
1901 | EFIAPI\r | |
1902 | SwapBytes32 (\r | |
1903 | IN UINT32 Value\r | |
1904 | );\r | |
1905 | \r | |
1906 | \r | |
1907 | /**\r | |
af2dc6a7 | 1908 | Switches the endianness of a 64-bit integer.\r |
ac644614 | 1909 | \r |
1910 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
1911 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1912 | returned.\r | |
1913 | \r | |
2a53dabf | 1914 | @param Value A 64-bit unsigned value.\r |
ac644614 | 1915 | \r |
efb23117 | 1916 | @return The byte swapped Value.\r |
ac644614 | 1917 | \r |
1918 | **/\r | |
1919 | UINT64\r | |
1920 | EFIAPI\r | |
1921 | SwapBytes64 (\r | |
1922 | IN UINT64 Value\r | |
1923 | );\r | |
1924 | \r | |
1925 | \r | |
1926 | /**\r | |
1927 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
1928 | generates a 64-bit unsigned result.\r | |
1929 | \r | |
1930 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
1931 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1932 | bit unsigned result is returned.\r | |
1933 | \r | |
ac644614 | 1934 | @param Multiplicand A 64-bit unsigned value.\r |
1935 | @param Multiplier A 32-bit unsigned value.\r | |
1936 | \r | |
1937 | @return Multiplicand * Multiplier\r | |
1938 | \r | |
1939 | **/\r | |
1940 | UINT64\r | |
1941 | EFIAPI\r | |
1942 | MultU64x32 (\r | |
1943 | IN UINT64 Multiplicand,\r | |
1944 | IN UINT32 Multiplier\r | |
1945 | );\r | |
1946 | \r | |
1947 | \r | |
1948 | /**\r | |
1949 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
1950 | generates a 64-bit unsigned result.\r | |
1951 | \r | |
1952 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
1953 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1954 | bit unsigned result is returned.\r | |
1955 | \r | |
ac644614 | 1956 | @param Multiplicand A 64-bit unsigned value.\r |
1957 | @param Multiplier A 64-bit unsigned value.\r | |
1958 | \r | |
af2dc6a7 | 1959 | @return Multiplicand * Multiplier.\r |
ac644614 | 1960 | \r |
1961 | **/\r | |
1962 | UINT64\r | |
1963 | EFIAPI\r | |
1964 | MultU64x64 (\r | |
1965 | IN UINT64 Multiplicand,\r | |
1966 | IN UINT64 Multiplier\r | |
1967 | );\r | |
1968 | \r | |
1969 | \r | |
1970 | /**\r | |
1971 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
1972 | 64-bit signed result.\r | |
1973 | \r | |
1974 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
1975 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
1976 | signed result is returned.\r | |
1977 | \r | |
ac644614 | 1978 | @param Multiplicand A 64-bit signed value.\r |
1979 | @param Multiplier A 64-bit signed value.\r | |
1980 | \r | |
1981 | @return Multiplicand * Multiplier\r | |
1982 | \r | |
1983 | **/\r | |
1984 | INT64\r | |
1985 | EFIAPI\r | |
1986 | MultS64x64 (\r | |
1987 | IN INT64 Multiplicand,\r | |
1988 | IN INT64 Multiplier\r | |
1989 | );\r | |
1990 | \r | |
1991 | \r | |
1992 | /**\r | |
1993 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1994 | a 64-bit unsigned result.\r | |
1995 | \r | |
1996 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1997 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
1998 | function returns the 64-bit unsigned quotient.\r | |
1999 | \r | |
2000 | If Divisor is 0, then ASSERT().\r | |
2001 | \r | |
2002 | @param Dividend A 64-bit unsigned value.\r | |
2003 | @param Divisor A 32-bit unsigned value.\r | |
2004 | \r | |
af2dc6a7 | 2005 | @return Dividend / Divisor.\r |
ac644614 | 2006 | \r |
2007 | **/\r | |
2008 | UINT64\r | |
2009 | EFIAPI\r | |
2010 | DivU64x32 (\r | |
2011 | IN UINT64 Dividend,\r | |
2012 | IN UINT32 Divisor\r | |
2013 | );\r | |
2014 | \r | |
2015 | \r | |
2016 | /**\r | |
2017 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2018 | a 32-bit unsigned remainder.\r | |
2019 | \r | |
2020 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2021 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
2022 | returns the 32-bit unsigned remainder.\r | |
2023 | \r | |
2024 | If Divisor is 0, then ASSERT().\r | |
2025 | \r | |
2026 | @param Dividend A 64-bit unsigned value.\r | |
2027 | @param Divisor A 32-bit unsigned value.\r | |
2028 | \r | |
af2dc6a7 | 2029 | @return Dividend % Divisor.\r |
ac644614 | 2030 | \r |
2031 | **/\r | |
2032 | UINT32\r | |
2033 | EFIAPI\r | |
2034 | ModU64x32 (\r | |
2035 | IN UINT64 Dividend,\r | |
2036 | IN UINT32 Divisor\r | |
2037 | );\r | |
2038 | \r | |
2039 | \r | |
2040 | /**\r | |
2041 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2042 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
2043 | \r | |
2044 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2045 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2046 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
2047 | This function returns the 64-bit unsigned quotient.\r | |
2048 | \r | |
2049 | If Divisor is 0, then ASSERT().\r | |
2050 | \r | |
2051 | @param Dividend A 64-bit unsigned value.\r | |
2052 | @param Divisor A 32-bit unsigned value.\r | |
2053 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
2054 | optional and may be NULL.\r | |
2055 | \r | |
af2dc6a7 | 2056 | @return Dividend / Divisor.\r |
ac644614 | 2057 | \r |
2058 | **/\r | |
2059 | UINT64\r | |
2060 | EFIAPI\r | |
2061 | DivU64x32Remainder (\r | |
2062 | IN UINT64 Dividend,\r | |
2063 | IN UINT32 Divisor,\r | |
2064 | OUT UINT32 *Remainder OPTIONAL\r | |
2065 | );\r | |
2066 | \r | |
2067 | \r | |
2068 | /**\r | |
2069 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
2070 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
2071 | \r | |
2072 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
2073 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2074 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
2075 | This function returns the 64-bit unsigned quotient.\r | |
2076 | \r | |
2077 | If Divisor is 0, then ASSERT().\r | |
2078 | \r | |
2079 | @param Dividend A 64-bit unsigned value.\r | |
2080 | @param Divisor A 64-bit unsigned value.\r | |
2081 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
2082 | optional and may be NULL.\r | |
2083 | \r | |
af2dc6a7 | 2084 | @return Dividend / Divisor.\r |
ac644614 | 2085 | \r |
2086 | **/\r | |
2087 | UINT64\r | |
2088 | EFIAPI\r | |
2089 | DivU64x64Remainder (\r | |
2090 | IN UINT64 Dividend,\r | |
2091 | IN UINT64 Divisor,\r | |
2092 | OUT UINT64 *Remainder OPTIONAL\r | |
2093 | );\r | |
2094 | \r | |
2095 | \r | |
2096 | /**\r | |
2097 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2098 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
2099 | \r | |
2100 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
2101 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
2102 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
2103 | function returns the 64-bit signed quotient.\r | |
2104 | \r | |
9aa049d9 | 2105 | It is the caller's responsibility to not call this function with a Divisor of 0.\r |
17f695ed | 2106 | If Divisor is 0, then the quotient and remainder should be assumed to be \r |
2107 | the largest negative integer.\r | |
2108 | \r | |
ac644614 | 2109 | If Divisor is 0, then ASSERT().\r |
2110 | \r | |
2111 | @param Dividend A 64-bit signed value.\r | |
2112 | @param Divisor A 64-bit signed value.\r | |
2113 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
2114 | optional and may be NULL.\r | |
2115 | \r | |
af2dc6a7 | 2116 | @return Dividend / Divisor.\r |
ac644614 | 2117 | \r |
2118 | **/\r | |
2119 | INT64\r | |
2120 | EFIAPI\r | |
2121 | DivS64x64Remainder (\r | |
2122 | IN INT64 Dividend,\r | |
2123 | IN INT64 Divisor,\r | |
2124 | OUT INT64 *Remainder OPTIONAL\r | |
2125 | );\r | |
2126 | \r | |
2127 | \r | |
2128 | /**\r | |
2129 | Reads a 16-bit value from memory that may be unaligned.\r | |
2130 | \r | |
2131 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
2132 | guarantees that the read operation does not produce an alignment fault.\r | |
2133 | \r | |
2134 | If the Buffer is NULL, then ASSERT().\r | |
2135 | \r | |
af2dc6a7 | 2136 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2137 | \r |
5385a579 | 2138 | @return The 16-bit value read from Buffer.\r |
ac644614 | 2139 | \r |
2140 | **/\r | |
2141 | UINT16\r | |
2142 | EFIAPI\r | |
2143 | ReadUnaligned16 (\r | |
5385a579 | 2144 | IN CONST UINT16 *Buffer\r |
ac644614 | 2145 | );\r |
2146 | \r | |
2147 | \r | |
2148 | /**\r | |
2149 | Writes a 16-bit value to memory that may be unaligned.\r | |
2150 | \r | |
2151 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
2152 | returned. The function guarantees that the write operation does not produce\r | |
2153 | an alignment fault.\r | |
2154 | \r | |
2155 | If the Buffer is NULL, then ASSERT().\r | |
2156 | \r | |
af2dc6a7 | 2157 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2158 | @param Value 16-bit value to write to Buffer.\r |
2159 | \r | |
5385a579 | 2160 | @return The 16-bit value to write to Buffer.\r |
ac644614 | 2161 | \r |
2162 | **/\r | |
2163 | UINT16\r | |
2164 | EFIAPI\r | |
2165 | WriteUnaligned16 (\r | |
5385a579 | 2166 | OUT UINT16 *Buffer,\r |
2167 | IN UINT16 Value\r | |
ac644614 | 2168 | );\r |
2169 | \r | |
2170 | \r | |
2171 | /**\r | |
2172 | Reads a 24-bit value from memory that may be unaligned.\r | |
2173 | \r | |
2174 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
2175 | guarantees that the read operation does not produce an alignment fault.\r | |
2176 | \r | |
2177 | If the Buffer is NULL, then ASSERT().\r | |
2178 | \r | |
af2dc6a7 | 2179 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2180 | \r |
5385a579 | 2181 | @return The 24-bit value read from Buffer.\r |
ac644614 | 2182 | \r |
2183 | **/\r | |
2184 | UINT32\r | |
2185 | EFIAPI\r | |
2186 | ReadUnaligned24 (\r | |
5385a579 | 2187 | IN CONST UINT32 *Buffer\r |
ac644614 | 2188 | );\r |
2189 | \r | |
2190 | \r | |
2191 | /**\r | |
2192 | Writes a 24-bit value to memory that may be unaligned.\r | |
2193 | \r | |
2194 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
2195 | returned. The function guarantees that the write operation does not produce\r | |
2196 | an alignment fault.\r | |
2197 | \r | |
2198 | If the Buffer is NULL, then ASSERT().\r | |
2199 | \r | |
af2dc6a7 | 2200 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2201 | @param Value 24-bit value to write to Buffer.\r |
2202 | \r | |
5385a579 | 2203 | @return The 24-bit value to write to Buffer.\r |
ac644614 | 2204 | \r |
2205 | **/\r | |
2206 | UINT32\r | |
2207 | EFIAPI\r | |
2208 | WriteUnaligned24 (\r | |
5385a579 | 2209 | OUT UINT32 *Buffer,\r |
2210 | IN UINT32 Value\r | |
ac644614 | 2211 | );\r |
2212 | \r | |
2213 | \r | |
2214 | /**\r | |
2215 | Reads a 32-bit value from memory that may be unaligned.\r | |
2216 | \r | |
2217 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
2218 | guarantees that the read operation does not produce an alignment fault.\r | |
2219 | \r | |
2220 | If the Buffer is NULL, then ASSERT().\r | |
2221 | \r | |
af2dc6a7 | 2222 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2223 | \r |
5385a579 | 2224 | @return The 32-bit value read from Buffer.\r |
ac644614 | 2225 | \r |
2226 | **/\r | |
2227 | UINT32\r | |
2228 | EFIAPI\r | |
2229 | ReadUnaligned32 (\r | |
5385a579 | 2230 | IN CONST UINT32 *Buffer\r |
ac644614 | 2231 | );\r |
2232 | \r | |
2233 | \r | |
2234 | /**\r | |
2235 | Writes a 32-bit value to memory that may be unaligned.\r | |
2236 | \r | |
2237 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
2238 | returned. The function guarantees that the write operation does not produce\r | |
2239 | an alignment fault.\r | |
2240 | \r | |
2241 | If the Buffer is NULL, then ASSERT().\r | |
2242 | \r | |
af2dc6a7 | 2243 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2244 | @param Value 32-bit value to write to Buffer.\r |
2245 | \r | |
5385a579 | 2246 | @return The 32-bit value to write to Buffer.\r |
ac644614 | 2247 | \r |
2248 | **/\r | |
2249 | UINT32\r | |
2250 | EFIAPI\r | |
2251 | WriteUnaligned32 (\r | |
5385a579 | 2252 | OUT UINT32 *Buffer,\r |
2253 | IN UINT32 Value\r | |
ac644614 | 2254 | );\r |
2255 | \r | |
2256 | \r | |
2257 | /**\r | |
2258 | Reads a 64-bit value from memory that may be unaligned.\r | |
2259 | \r | |
2260 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
2261 | guarantees that the read operation does not produce an alignment fault.\r | |
2262 | \r | |
2263 | If the Buffer is NULL, then ASSERT().\r | |
2264 | \r | |
af2dc6a7 | 2265 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2266 | \r |
5385a579 | 2267 | @return The 64-bit value read from Buffer.\r |
ac644614 | 2268 | \r |
2269 | **/\r | |
2270 | UINT64\r | |
2271 | EFIAPI\r | |
2272 | ReadUnaligned64 (\r | |
5385a579 | 2273 | IN CONST UINT64 *Buffer\r |
ac644614 | 2274 | );\r |
2275 | \r | |
2276 | \r | |
2277 | /**\r | |
2278 | Writes a 64-bit value to memory that may be unaligned.\r | |
2279 | \r | |
2280 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
2281 | returned. The function guarantees that the write operation does not produce\r | |
2282 | an alignment fault.\r | |
2283 | \r | |
2284 | If the Buffer is NULL, then ASSERT().\r | |
2285 | \r | |
af2dc6a7 | 2286 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2287 | @param Value 64-bit value to write to Buffer.\r |
2288 | \r | |
5385a579 | 2289 | @return The 64-bit value to write to Buffer.\r |
ac644614 | 2290 | \r |
2291 | **/\r | |
2292 | UINT64\r | |
2293 | EFIAPI\r | |
2294 | WriteUnaligned64 (\r | |
5385a579 | 2295 | OUT UINT64 *Buffer,\r |
2296 | IN UINT64 Value\r | |
ac644614 | 2297 | );\r |
2298 | \r | |
2299 | \r | |
2300 | //\r | |
2301 | // Bit Field Functions\r | |
2302 | //\r | |
2303 | \r | |
2304 | /**\r | |
2305 | Returns a bit field from an 8-bit value.\r | |
2306 | \r | |
2307 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2308 | \r | |
2309 | If 8-bit operations are not supported, then ASSERT().\r | |
2310 | If StartBit is greater than 7, then ASSERT().\r | |
2311 | If EndBit is greater than 7, then ASSERT().\r | |
2312 | If EndBit is less than StartBit, then ASSERT().\r | |
2313 | \r | |
2314 | @param Operand Operand on which to perform the bitfield operation.\r | |
2315 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2316 | Range 0..7.\r | |
2317 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2318 | Range 0..7.\r | |
2319 | \r | |
2320 | @return The bit field read.\r | |
2321 | \r | |
2322 | **/\r | |
2323 | UINT8\r | |
2324 | EFIAPI\r | |
2325 | BitFieldRead8 (\r | |
2326 | IN UINT8 Operand,\r | |
2327 | IN UINTN StartBit,\r | |
2328 | IN UINTN EndBit\r | |
2329 | );\r | |
2330 | \r | |
2331 | \r | |
2332 | /**\r | |
2333 | Writes a bit field to an 8-bit value, and returns the result.\r | |
2334 | \r | |
2335 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2336 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
2337 | returned.\r | |
2338 | \r | |
2339 | If 8-bit operations are not supported, then ASSERT().\r | |
2340 | If StartBit is greater than 7, then ASSERT().\r | |
2341 | If EndBit is greater than 7, then ASSERT().\r | |
2342 | If EndBit is less than StartBit, then ASSERT().\r | |
2343 | \r | |
2344 | @param Operand Operand on which to perform the bitfield operation.\r | |
2345 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2346 | Range 0..7.\r | |
2347 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2348 | Range 0..7.\r | |
2349 | @param Value New value of the bit field.\r | |
2350 | \r | |
2351 | @return The new 8-bit value.\r | |
2352 | \r | |
2353 | **/\r | |
2354 | UINT8\r | |
2355 | EFIAPI\r | |
2356 | BitFieldWrite8 (\r | |
2357 | IN UINT8 Operand,\r | |
2358 | IN UINTN StartBit,\r | |
2359 | IN UINTN EndBit,\r | |
2360 | IN UINT8 Value\r | |
2361 | );\r | |
2362 | \r | |
2363 | \r | |
2364 | /**\r | |
2365 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
2366 | result.\r | |
2367 | \r | |
62991af2 | 2368 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2369 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2370 | Operand are preserved. The new 8-bit value is returned.\r | |
2371 | \r | |
2372 | If 8-bit operations are not supported, then ASSERT().\r | |
2373 | If StartBit is greater than 7, then ASSERT().\r | |
2374 | If EndBit is greater than 7, then ASSERT().\r | |
2375 | If EndBit is less than StartBit, then ASSERT().\r | |
2376 | \r | |
2377 | @param Operand Operand on which to perform the bitfield operation.\r | |
2378 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2379 | Range 0..7.\r | |
2380 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2381 | Range 0..7.\r | |
2382 | @param OrData The value to OR with the read value from the value\r | |
2383 | \r | |
2384 | @return The new 8-bit value.\r | |
2385 | \r | |
2386 | **/\r | |
2387 | UINT8\r | |
2388 | EFIAPI\r | |
2389 | BitFieldOr8 (\r | |
2390 | IN UINT8 Operand,\r | |
2391 | IN UINTN StartBit,\r | |
2392 | IN UINTN EndBit,\r | |
2393 | IN UINT8 OrData\r | |
2394 | );\r | |
2395 | \r | |
2396 | \r | |
2397 | /**\r | |
2398 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
2399 | the result.\r | |
2400 | \r | |
2401 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2402 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2403 | preserved. The new 8-bit value is returned.\r | |
2404 | \r | |
2405 | If 8-bit operations are not supported, then ASSERT().\r | |
2406 | If StartBit is greater than 7, then ASSERT().\r | |
2407 | If EndBit is greater than 7, then ASSERT().\r | |
2408 | If EndBit is less than StartBit, then ASSERT().\r | |
2409 | \r | |
2410 | @param Operand Operand on which to perform the bitfield operation.\r | |
2411 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2412 | Range 0..7.\r | |
2413 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2414 | Range 0..7.\r | |
2415 | @param AndData The value to AND with the read value from the value.\r | |
2416 | \r | |
2417 | @return The new 8-bit value.\r | |
2418 | \r | |
2419 | **/\r | |
2420 | UINT8\r | |
2421 | EFIAPI\r | |
2422 | BitFieldAnd8 (\r | |
2423 | IN UINT8 Operand,\r | |
2424 | IN UINTN StartBit,\r | |
2425 | IN UINTN EndBit,\r | |
2426 | IN UINT8 AndData\r | |
2427 | );\r | |
2428 | \r | |
2429 | \r | |
2430 | /**\r | |
2431 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
2432 | bitwise OR, and returns the result.\r | |
2433 | \r | |
2434 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2435 | in Operand and the value specified by AndData, followed by a bitwise \r |
2436 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2437 | preserved. The new 8-bit value is returned.\r |
2438 | \r | |
2439 | If 8-bit operations are not supported, then ASSERT().\r | |
2440 | If StartBit is greater than 7, then ASSERT().\r | |
2441 | If EndBit is greater than 7, then ASSERT().\r | |
2442 | If EndBit is less than StartBit, then ASSERT().\r | |
2443 | \r | |
2444 | @param Operand Operand on which to perform the bitfield operation.\r | |
2445 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2446 | Range 0..7.\r | |
2447 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2448 | Range 0..7.\r | |
2449 | @param AndData The value to AND with the read value from the value.\r | |
2450 | @param OrData The value to OR with the result of the AND operation.\r | |
2451 | \r | |
2452 | @return The new 8-bit value.\r | |
2453 | \r | |
2454 | **/\r | |
2455 | UINT8\r | |
2456 | EFIAPI\r | |
2457 | BitFieldAndThenOr8 (\r | |
2458 | IN UINT8 Operand,\r | |
2459 | IN UINTN StartBit,\r | |
2460 | IN UINTN EndBit,\r | |
2461 | IN UINT8 AndData,\r | |
2462 | IN UINT8 OrData\r | |
2463 | );\r | |
2464 | \r | |
2465 | \r | |
2466 | /**\r | |
2467 | Returns a bit field from a 16-bit value.\r | |
2468 | \r | |
2469 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2470 | \r | |
2471 | If 16-bit operations are not supported, then ASSERT().\r | |
2472 | If StartBit is greater than 15, then ASSERT().\r | |
2473 | If EndBit is greater than 15, then ASSERT().\r | |
2474 | If EndBit is less than StartBit, then ASSERT().\r | |
2475 | \r | |
2476 | @param Operand Operand on which to perform the bitfield operation.\r | |
2477 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2478 | Range 0..15.\r | |
2479 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2480 | Range 0..15.\r | |
2481 | \r | |
2482 | @return The bit field read.\r | |
2483 | \r | |
2484 | **/\r | |
2485 | UINT16\r | |
2486 | EFIAPI\r | |
2487 | BitFieldRead16 (\r | |
2488 | IN UINT16 Operand,\r | |
2489 | IN UINTN StartBit,\r | |
2490 | IN UINTN EndBit\r | |
2491 | );\r | |
2492 | \r | |
2493 | \r | |
2494 | /**\r | |
2495 | Writes a bit field to a 16-bit value, and returns the result.\r | |
2496 | \r | |
2497 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2498 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
2499 | returned.\r | |
2500 | \r | |
2501 | If 16-bit operations are not supported, then ASSERT().\r | |
2502 | If StartBit is greater than 15, then ASSERT().\r | |
2503 | If EndBit is greater than 15, then ASSERT().\r | |
2504 | If EndBit is less than StartBit, then ASSERT().\r | |
2505 | \r | |
2506 | @param Operand Operand on which to perform the bitfield operation.\r | |
2507 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2508 | Range 0..15.\r | |
2509 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2510 | Range 0..15.\r | |
2511 | @param Value New value of the bit field.\r | |
2512 | \r | |
2513 | @return The new 16-bit value.\r | |
2514 | \r | |
2515 | **/\r | |
2516 | UINT16\r | |
2517 | EFIAPI\r | |
2518 | BitFieldWrite16 (\r | |
2519 | IN UINT16 Operand,\r | |
2520 | IN UINTN StartBit,\r | |
2521 | IN UINTN EndBit,\r | |
2522 | IN UINT16 Value\r | |
2523 | );\r | |
2524 | \r | |
2525 | \r | |
2526 | /**\r | |
2527 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
2528 | result.\r | |
2529 | \r | |
62991af2 | 2530 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2531 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2532 | Operand are preserved. The new 16-bit value is returned.\r | |
2533 | \r | |
2534 | If 16-bit operations are not supported, then ASSERT().\r | |
2535 | If StartBit is greater than 15, then ASSERT().\r | |
2536 | If EndBit is greater than 15, then ASSERT().\r | |
2537 | If EndBit is less than StartBit, then ASSERT().\r | |
2538 | \r | |
2539 | @param Operand Operand on which to perform the bitfield operation.\r | |
2540 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2541 | Range 0..15.\r | |
2542 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2543 | Range 0..15.\r | |
2544 | @param OrData The value to OR with the read value from the value\r | |
2545 | \r | |
2546 | @return The new 16-bit value.\r | |
2547 | \r | |
2548 | **/\r | |
2549 | UINT16\r | |
2550 | EFIAPI\r | |
2551 | BitFieldOr16 (\r | |
2552 | IN UINT16 Operand,\r | |
2553 | IN UINTN StartBit,\r | |
2554 | IN UINTN EndBit,\r | |
2555 | IN UINT16 OrData\r | |
2556 | );\r | |
2557 | \r | |
2558 | \r | |
2559 | /**\r | |
2560 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
2561 | the result.\r | |
2562 | \r | |
2563 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2564 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2565 | preserved. The new 16-bit value is returned.\r | |
2566 | \r | |
2567 | If 16-bit operations are not supported, then ASSERT().\r | |
2568 | If StartBit is greater than 15, then ASSERT().\r | |
2569 | If EndBit is greater than 15, then ASSERT().\r | |
2570 | If EndBit is less than StartBit, then ASSERT().\r | |
2571 | \r | |
2572 | @param Operand Operand on which to perform the bitfield operation.\r | |
2573 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2574 | Range 0..15.\r | |
2575 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2576 | Range 0..15.\r | |
2577 | @param AndData The value to AND with the read value from the value\r | |
2578 | \r | |
2579 | @return The new 16-bit value.\r | |
2580 | \r | |
2581 | **/\r | |
2582 | UINT16\r | |
2583 | EFIAPI\r | |
2584 | BitFieldAnd16 (\r | |
2585 | IN UINT16 Operand,\r | |
2586 | IN UINTN StartBit,\r | |
2587 | IN UINTN EndBit,\r | |
2588 | IN UINT16 AndData\r | |
2589 | );\r | |
2590 | \r | |
2591 | \r | |
2592 | /**\r | |
2593 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
2594 | bitwise OR, and returns the result.\r | |
2595 | \r | |
2596 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2597 | in Operand and the value specified by AndData, followed by a bitwise \r |
2598 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2599 | preserved. The new 16-bit value is returned.\r |
2600 | \r | |
2601 | If 16-bit operations are not supported, then ASSERT().\r | |
2602 | If StartBit is greater than 15, then ASSERT().\r | |
2603 | If EndBit is greater than 15, then ASSERT().\r | |
2604 | If EndBit is less than StartBit, then ASSERT().\r | |
2605 | \r | |
2606 | @param Operand Operand on which to perform the bitfield operation.\r | |
2607 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2608 | Range 0..15.\r | |
2609 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2610 | Range 0..15.\r | |
2611 | @param AndData The value to AND with the read value from the value.\r | |
2612 | @param OrData The value to OR with the result of the AND operation.\r | |
2613 | \r | |
2614 | @return The new 16-bit value.\r | |
2615 | \r | |
2616 | **/\r | |
2617 | UINT16\r | |
2618 | EFIAPI\r | |
2619 | BitFieldAndThenOr16 (\r | |
2620 | IN UINT16 Operand,\r | |
2621 | IN UINTN StartBit,\r | |
2622 | IN UINTN EndBit,\r | |
2623 | IN UINT16 AndData,\r | |
2624 | IN UINT16 OrData\r | |
2625 | );\r | |
2626 | \r | |
2627 | \r | |
2628 | /**\r | |
2629 | Returns a bit field from a 32-bit value.\r | |
2630 | \r | |
2631 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2632 | \r | |
2633 | If 32-bit operations are not supported, then ASSERT().\r | |
2634 | If StartBit is greater than 31, then ASSERT().\r | |
2635 | If EndBit is greater than 31, then ASSERT().\r | |
2636 | If EndBit is less than StartBit, then ASSERT().\r | |
2637 | \r | |
2638 | @param Operand Operand on which to perform the bitfield operation.\r | |
2639 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2640 | Range 0..31.\r | |
2641 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2642 | Range 0..31.\r | |
2643 | \r | |
2644 | @return The bit field read.\r | |
2645 | \r | |
2646 | **/\r | |
2647 | UINT32\r | |
2648 | EFIAPI\r | |
2649 | BitFieldRead32 (\r | |
2650 | IN UINT32 Operand,\r | |
2651 | IN UINTN StartBit,\r | |
2652 | IN UINTN EndBit\r | |
2653 | );\r | |
2654 | \r | |
2655 | \r | |
2656 | /**\r | |
2657 | Writes a bit field to a 32-bit value, and returns the result.\r | |
2658 | \r | |
2659 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2660 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
2661 | returned.\r | |
2662 | \r | |
2663 | If 32-bit operations are not supported, then ASSERT().\r | |
2664 | If StartBit is greater than 31, then ASSERT().\r | |
2665 | If EndBit is greater than 31, then ASSERT().\r | |
2666 | If EndBit is less than StartBit, then ASSERT().\r | |
2667 | \r | |
2668 | @param Operand Operand on which to perform the bitfield operation.\r | |
2669 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2670 | Range 0..31.\r | |
2671 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2672 | Range 0..31.\r | |
2673 | @param Value New value of the bit field.\r | |
2674 | \r | |
2675 | @return The new 32-bit value.\r | |
2676 | \r | |
2677 | **/\r | |
2678 | UINT32\r | |
2679 | EFIAPI\r | |
2680 | BitFieldWrite32 (\r | |
2681 | IN UINT32 Operand,\r | |
2682 | IN UINTN StartBit,\r | |
2683 | IN UINTN EndBit,\r | |
2684 | IN UINT32 Value\r | |
2685 | );\r | |
2686 | \r | |
2687 | \r | |
2688 | /**\r | |
2689 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
2690 | result.\r | |
2691 | \r | |
62991af2 | 2692 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2693 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2694 | Operand are preserved. The new 32-bit value is returned.\r | |
2695 | \r | |
2696 | If 32-bit operations are not supported, then ASSERT().\r | |
2697 | If StartBit is greater than 31, then ASSERT().\r | |
2698 | If EndBit is greater than 31, then ASSERT().\r | |
2699 | If EndBit is less than StartBit, then ASSERT().\r | |
2700 | \r | |
2701 | @param Operand Operand on which to perform the bitfield operation.\r | |
2702 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2703 | Range 0..31.\r | |
2704 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2705 | Range 0..31.\r | |
af2dc6a7 | 2706 | @param OrData The value to OR with the read value from the value.\r |
ac644614 | 2707 | \r |
2708 | @return The new 32-bit value.\r | |
2709 | \r | |
2710 | **/\r | |
2711 | UINT32\r | |
2712 | EFIAPI\r | |
2713 | BitFieldOr32 (\r | |
2714 | IN UINT32 Operand,\r | |
2715 | IN UINTN StartBit,\r | |
2716 | IN UINTN EndBit,\r | |
2717 | IN UINT32 OrData\r | |
2718 | );\r | |
2719 | \r | |
2720 | \r | |
2721 | /**\r | |
2722 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
2723 | the result.\r | |
2724 | \r | |
2725 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2726 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2727 | preserved. The new 32-bit value is returned.\r | |
2728 | \r | |
2729 | If 32-bit operations are not supported, then ASSERT().\r | |
2730 | If StartBit is greater than 31, then ASSERT().\r | |
2731 | If EndBit is greater than 31, then ASSERT().\r | |
2732 | If EndBit is less than StartBit, then ASSERT().\r | |
2733 | \r | |
2734 | @param Operand Operand on which to perform the bitfield operation.\r | |
2735 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2736 | Range 0..31.\r | |
2737 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2738 | Range 0..31.\r | |
2739 | @param AndData The value to AND with the read value from the value\r | |
2740 | \r | |
2741 | @return The new 32-bit value.\r | |
2742 | \r | |
2743 | **/\r | |
2744 | UINT32\r | |
2745 | EFIAPI\r | |
2746 | BitFieldAnd32 (\r | |
2747 | IN UINT32 Operand,\r | |
2748 | IN UINTN StartBit,\r | |
2749 | IN UINTN EndBit,\r | |
2750 | IN UINT32 AndData\r | |
2751 | );\r | |
2752 | \r | |
2753 | \r | |
2754 | /**\r | |
2755 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
2756 | bitwise OR, and returns the result.\r | |
2757 | \r | |
2758 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2759 | in Operand and the value specified by AndData, followed by a bitwise \r |
2760 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2761 | preserved. The new 32-bit value is returned.\r |
2762 | \r | |
2763 | If 32-bit operations are not supported, then ASSERT().\r | |
2764 | If StartBit is greater than 31, then ASSERT().\r | |
2765 | If EndBit is greater than 31, then ASSERT().\r | |
2766 | If EndBit is less than StartBit, then ASSERT().\r | |
2767 | \r | |
2768 | @param Operand Operand on which to perform the bitfield operation.\r | |
2769 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2770 | Range 0..31.\r | |
2771 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2772 | Range 0..31.\r | |
2773 | @param AndData The value to AND with the read value from the value.\r | |
2774 | @param OrData The value to OR with the result of the AND operation.\r | |
2775 | \r | |
2776 | @return The new 32-bit value.\r | |
2777 | \r | |
2778 | **/\r | |
2779 | UINT32\r | |
2780 | EFIAPI\r | |
2781 | BitFieldAndThenOr32 (\r | |
2782 | IN UINT32 Operand,\r | |
2783 | IN UINTN StartBit,\r | |
2784 | IN UINTN EndBit,\r | |
2785 | IN UINT32 AndData,\r | |
2786 | IN UINT32 OrData\r | |
2787 | );\r | |
2788 | \r | |
2789 | \r | |
2790 | /**\r | |
2791 | Returns a bit field from a 64-bit value.\r | |
2792 | \r | |
2793 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2794 | \r | |
2795 | If 64-bit operations are not supported, then ASSERT().\r | |
2796 | If StartBit is greater than 63, then ASSERT().\r | |
2797 | If EndBit is greater than 63, then ASSERT().\r | |
2798 | If EndBit is less than StartBit, then ASSERT().\r | |
2799 | \r | |
2800 | @param Operand Operand on which to perform the bitfield operation.\r | |
2801 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2802 | Range 0..63.\r | |
2803 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2804 | Range 0..63.\r | |
2805 | \r | |
2806 | @return The bit field read.\r | |
2807 | \r | |
2808 | **/\r | |
2809 | UINT64\r | |
2810 | EFIAPI\r | |
2811 | BitFieldRead64 (\r | |
2812 | IN UINT64 Operand,\r | |
2813 | IN UINTN StartBit,\r | |
2814 | IN UINTN EndBit\r | |
2815 | );\r | |
2816 | \r | |
2817 | \r | |
2818 | /**\r | |
2819 | Writes a bit field to a 64-bit value, and returns the result.\r | |
2820 | \r | |
2821 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2822 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
2823 | returned.\r | |
2824 | \r | |
2825 | If 64-bit operations are not supported, then ASSERT().\r | |
2826 | If StartBit is greater than 63, then ASSERT().\r | |
2827 | If EndBit is greater than 63, then ASSERT().\r | |
2828 | If EndBit is less than StartBit, then ASSERT().\r | |
2829 | \r | |
2830 | @param Operand Operand on which to perform the bitfield operation.\r | |
2831 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2832 | Range 0..63.\r | |
2833 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2834 | Range 0..63.\r | |
2835 | @param Value New value of the bit field.\r | |
2836 | \r | |
2837 | @return The new 64-bit value.\r | |
2838 | \r | |
2839 | **/\r | |
2840 | UINT64\r | |
2841 | EFIAPI\r | |
2842 | BitFieldWrite64 (\r | |
2843 | IN UINT64 Operand,\r | |
2844 | IN UINTN StartBit,\r | |
2845 | IN UINTN EndBit,\r | |
2846 | IN UINT64 Value\r | |
2847 | );\r | |
2848 | \r | |
2849 | \r | |
2850 | /**\r | |
2851 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
2852 | result.\r | |
2853 | \r | |
62991af2 | 2854 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2855 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2856 | Operand are preserved. The new 64-bit value is returned.\r | |
2857 | \r | |
2858 | If 64-bit operations are not supported, then ASSERT().\r | |
2859 | If StartBit is greater than 63, then ASSERT().\r | |
2860 | If EndBit is greater than 63, then ASSERT().\r | |
2861 | If EndBit is less than StartBit, then ASSERT().\r | |
2862 | \r | |
2863 | @param Operand Operand on which to perform the bitfield operation.\r | |
2864 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2865 | Range 0..63.\r | |
2866 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2867 | Range 0..63.\r | |
2868 | @param OrData The value to OR with the read value from the value\r | |
2869 | \r | |
2870 | @return The new 64-bit value.\r | |
2871 | \r | |
2872 | **/\r | |
2873 | UINT64\r | |
2874 | EFIAPI\r | |
2875 | BitFieldOr64 (\r | |
2876 | IN UINT64 Operand,\r | |
2877 | IN UINTN StartBit,\r | |
2878 | IN UINTN EndBit,\r | |
2879 | IN UINT64 OrData\r | |
2880 | );\r | |
2881 | \r | |
2882 | \r | |
2883 | /**\r | |
2884 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
2885 | the result.\r | |
2886 | \r | |
2887 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2888 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2889 | preserved. The new 64-bit value is returned.\r | |
2890 | \r | |
2891 | If 64-bit operations are not supported, then ASSERT().\r | |
2892 | If StartBit is greater than 63, then ASSERT().\r | |
2893 | If EndBit is greater than 63, then ASSERT().\r | |
2894 | If EndBit is less than StartBit, then ASSERT().\r | |
2895 | \r | |
2896 | @param Operand Operand on which to perform the bitfield operation.\r | |
2897 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2898 | Range 0..63.\r | |
2899 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2900 | Range 0..63.\r | |
2901 | @param AndData The value to AND with the read value from the value\r | |
2902 | \r | |
2903 | @return The new 64-bit value.\r | |
2904 | \r | |
2905 | **/\r | |
2906 | UINT64\r | |
2907 | EFIAPI\r | |
2908 | BitFieldAnd64 (\r | |
2909 | IN UINT64 Operand,\r | |
2910 | IN UINTN StartBit,\r | |
2911 | IN UINTN EndBit,\r | |
2912 | IN UINT64 AndData\r | |
2913 | );\r | |
2914 | \r | |
2915 | \r | |
2916 | /**\r | |
2917 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
2918 | bitwise OR, and returns the result.\r | |
2919 | \r | |
2920 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2921 | in Operand and the value specified by AndData, followed by a bitwise \r |
2922 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2923 | preserved. The new 64-bit value is returned.\r |
2924 | \r | |
2925 | If 64-bit operations are not supported, then ASSERT().\r | |
2926 | If StartBit is greater than 63, then ASSERT().\r | |
2927 | If EndBit is greater than 63, then ASSERT().\r | |
2928 | If EndBit is less than StartBit, then ASSERT().\r | |
2929 | \r | |
2930 | @param Operand Operand on which to perform the bitfield operation.\r | |
2931 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2932 | Range 0..63.\r | |
2933 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2934 | Range 0..63.\r | |
2935 | @param AndData The value to AND with the read value from the value.\r | |
2936 | @param OrData The value to OR with the result of the AND operation.\r | |
2937 | \r | |
2938 | @return The new 64-bit value.\r | |
2939 | \r | |
2940 | **/\r | |
2941 | UINT64\r | |
2942 | EFIAPI\r | |
2943 | BitFieldAndThenOr64 (\r | |
2944 | IN UINT64 Operand,\r | |
2945 | IN UINTN StartBit,\r | |
2946 | IN UINTN EndBit,\r | |
2947 | IN UINT64 AndData,\r | |
2948 | IN UINT64 OrData\r | |
2949 | );\r | |
2950 | \r | |
ac644614 | 2951 | //\r |
2952 | // Base Library Checksum Functions\r | |
2953 | //\r | |
2954 | \r | |
2955 | /**\r | |
17f695ed | 2956 | Returns the sum of all elements in a buffer in unit of UINT8.\r |
ac644614 | 2957 | During calculation, the carry bits are dropped.\r |
2958 | \r | |
2959 | This function calculates the sum of all elements in a buffer\r | |
2960 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
2961 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
2962 | returned.\r | |
2963 | \r | |
2964 | If Buffer is NULL, then ASSERT().\r | |
2965 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
2966 | \r | |
af2dc6a7 | 2967 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
17f695ed | 2968 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 2969 | \r |
2970 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
2971 | \r | |
2972 | **/\r | |
2973 | UINT8\r | |
2974 | EFIAPI\r | |
2975 | CalculateSum8 (\r | |
ee6c452c | 2976 | IN CONST UINT8 *Buffer,\r |
2977 | IN UINTN Length\r | |
ac644614 | 2978 | );\r |
2979 | \r | |
2980 | \r | |
2981 | /**\r | |
2982 | Returns the two's complement checksum of all elements in a buffer\r | |
2983 | of 8-bit values.\r | |
2984 | \r | |
2985 | This function first calculates the sum of the 8-bit values in the\r | |
2986 | buffer specified by Buffer and Length. The carry bits in the result\r | |
2987 | of addition are dropped. Then, the two's complement of the sum is\r | |
2988 | returned. If Length is 0, then 0 is returned.\r | |
2989 | \r | |
2990 | If Buffer is NULL, then ASSERT().\r | |
2991 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
2992 | \r | |
af2dc6a7 | 2993 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 2994 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 2995 | \r |
af2dc6a7 | 2996 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 2997 | \r |
2998 | **/\r | |
2999 | UINT8\r | |
3000 | EFIAPI\r | |
3001 | CalculateCheckSum8 (\r | |
ee6c452c | 3002 | IN CONST UINT8 *Buffer,\r |
3003 | IN UINTN Length\r | |
ac644614 | 3004 | );\r |
3005 | \r | |
3006 | \r | |
3007 | /**\r | |
3008 | Returns the sum of all elements in a buffer of 16-bit values. During\r | |
3009 | calculation, the carry bits are dropped.\r | |
3010 | \r | |
3011 | This function calculates the sum of the 16-bit values in the buffer\r | |
3012 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3013 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
3014 | \r | |
3015 | If Buffer is NULL, then ASSERT().\r | |
3016 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3017 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3018 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3019 | \r | |
af2dc6a7 | 3020 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3021 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3022 | \r |
3023 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3024 | \r | |
3025 | **/\r | |
3026 | UINT16\r | |
3027 | EFIAPI\r | |
3028 | CalculateSum16 (\r | |
ee6c452c | 3029 | IN CONST UINT16 *Buffer,\r |
3030 | IN UINTN Length\r | |
ac644614 | 3031 | );\r |
3032 | \r | |
3033 | \r | |
3034 | /**\r | |
3035 | Returns the two's complement checksum of all elements in a buffer of\r | |
3036 | 16-bit values.\r | |
3037 | \r | |
3038 | This function first calculates the sum of the 16-bit values in the buffer\r | |
3039 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3040 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3041 | is 0, then 0 is returned.\r | |
3042 | \r | |
3043 | If Buffer is NULL, then ASSERT().\r | |
3044 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3045 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3046 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3047 | \r | |
af2dc6a7 | 3048 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3049 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3050 | \r |
af2dc6a7 | 3051 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3052 | \r |
3053 | **/\r | |
3054 | UINT16\r | |
3055 | EFIAPI\r | |
3056 | CalculateCheckSum16 (\r | |
ee6c452c | 3057 | IN CONST UINT16 *Buffer,\r |
3058 | IN UINTN Length\r | |
ac644614 | 3059 | );\r |
3060 | \r | |
3061 | \r | |
3062 | /**\r | |
17f695ed | 3063 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
ac644614 | 3064 | calculation, the carry bits are dropped.\r |
3065 | \r | |
3066 | This function calculates the sum of the 32-bit values in the buffer\r | |
3067 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
17f695ed | 3068 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r |
ac644614 | 3069 | \r |
3070 | If Buffer is NULL, then ASSERT().\r | |
3071 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3072 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3073 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3074 | \r | |
af2dc6a7 | 3075 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3076 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3077 | \r |
3078 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3079 | \r | |
3080 | **/\r | |
3081 | UINT32\r | |
3082 | EFIAPI\r | |
3083 | CalculateSum32 (\r | |
ee6c452c | 3084 | IN CONST UINT32 *Buffer,\r |
3085 | IN UINTN Length\r | |
ac644614 | 3086 | );\r |
3087 | \r | |
3088 | \r | |
3089 | /**\r | |
3090 | Returns the two's complement checksum of all elements in a buffer of\r | |
3091 | 32-bit values.\r | |
3092 | \r | |
3093 | This function first calculates the sum of the 32-bit values in the buffer\r | |
3094 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3095 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3096 | is 0, then 0 is returned.\r | |
3097 | \r | |
3098 | If Buffer is NULL, then ASSERT().\r | |
3099 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3100 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3101 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3102 | \r | |
af2dc6a7 | 3103 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3104 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3105 | \r |
af2dc6a7 | 3106 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3107 | \r |
3108 | **/\r | |
3109 | UINT32\r | |
3110 | EFIAPI\r | |
3111 | CalculateCheckSum32 (\r | |
ee6c452c | 3112 | IN CONST UINT32 *Buffer,\r |
3113 | IN UINTN Length\r | |
ac644614 | 3114 | );\r |
3115 | \r | |
3116 | \r | |
3117 | /**\r | |
3118 | Returns the sum of all elements in a buffer of 64-bit values. During\r | |
3119 | calculation, the carry bits are dropped.\r | |
3120 | \r | |
3121 | This function calculates the sum of the 64-bit values in the buffer\r | |
3122 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3123 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
3124 | \r | |
3125 | If Buffer is NULL, then ASSERT().\r | |
3126 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3127 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3128 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3129 | \r | |
af2dc6a7 | 3130 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3131 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3132 | \r |
3133 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3134 | \r | |
3135 | **/\r | |
3136 | UINT64\r | |
3137 | EFIAPI\r | |
3138 | CalculateSum64 (\r | |
ee6c452c | 3139 | IN CONST UINT64 *Buffer,\r |
3140 | IN UINTN Length\r | |
ac644614 | 3141 | );\r |
3142 | \r | |
3143 | \r | |
3144 | /**\r | |
3145 | Returns the two's complement checksum of all elements in a buffer of\r | |
3146 | 64-bit values.\r | |
3147 | \r | |
3148 | This function first calculates the sum of the 64-bit values in the buffer\r | |
3149 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3150 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3151 | is 0, then 0 is returned.\r | |
3152 | \r | |
3153 | If Buffer is NULL, then ASSERT().\r | |
3154 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3155 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3156 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3157 | \r | |
af2dc6a7 | 3158 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3159 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3160 | \r |
af2dc6a7 | 3161 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3162 | \r |
3163 | **/\r | |
3164 | UINT64\r | |
3165 | EFIAPI\r | |
3166 | CalculateCheckSum64 (\r | |
ee6c452c | 3167 | IN CONST UINT64 *Buffer,\r |
3168 | IN UINTN Length\r | |
ac644614 | 3169 | );\r |
3170 | \r | |
3171 | \r | |
d75f9fc2 | 3172 | //\r |
3173 | // Base Library CPU Functions\r | |
3174 | //\r | |
3175 | \r | |
3176 | /**\r | |
3177 | Function entry point used when a stack switch is requested with SwitchStack()\r | |
3178 | \r | |
3179 | @param Context1 Context1 parameter passed into SwitchStack().\r | |
3180 | @param Context2 Context2 parameter passed into SwitchStack().\r | |
3181 | \r | |
3182 | **/\r | |
ac644614 | 3183 | typedef\r |
3184 | VOID\r | |
9810cdd8 | 3185 | (EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r |
ac644614 | 3186 | IN VOID *Context1, OPTIONAL\r |
3187 | IN VOID *Context2 OPTIONAL\r | |
3188 | );\r | |
3189 | \r | |
3190 | \r | |
3191 | /**\r | |
3192 | Used to serialize load and store operations.\r | |
3193 | \r | |
3194 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
3195 | globally visible when this function returns.\r | |
3196 | \r | |
3197 | **/\r | |
3198 | VOID\r | |
3199 | EFIAPI\r | |
3200 | MemoryFence (\r | |
3201 | VOID\r | |
3202 | );\r | |
3203 | \r | |
3204 | \r | |
3205 | /**\r | |
3206 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
3207 | and returns 0.\r | |
3208 | \r | |
3209 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
3210 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
3211 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
3212 | \r | |
3213 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3214 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
17f695ed | 3215 | \r |
3216 | NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r | |
3217 | The same structure must never be used for more than one CPU architecture context.\r | |
3218 | For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r | |
3219 | SetJump()/LongJump() is not currently supported for the EBC processor type. \r | |
ac644614 | 3220 | \r |
3221 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3222 | \r | |
3223 | @retval 0 Indicates a return from SetJump().\r | |
3224 | \r | |
3225 | **/\r | |
3226 | UINTN\r | |
3227 | EFIAPI\r | |
3228 | SetJump (\r | |
3229 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
3230 | );\r | |
3231 | \r | |
3232 | \r | |
3233 | /**\r | |
3234 | Restores the CPU context that was saved with SetJump().\r | |
3235 | \r | |
3236 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
3237 | function never returns to the caller. Instead is resumes execution based on\r | |
3238 | the state of JumpBuffer.\r | |
3239 | \r | |
3240 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3241 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
ac644614 | 3242 | If Value is 0, then ASSERT().\r |
3243 | \r | |
3244 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3245 | @param Value The value to return when the SetJump() context is\r | |
3246 | restored and must be non-zero.\r | |
3247 | \r | |
3248 | **/\r | |
3249 | VOID\r | |
3250 | EFIAPI\r | |
3251 | LongJump (\r | |
3252 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
3253 | IN UINTN Value\r | |
3254 | );\r | |
3255 | \r | |
3256 | \r | |
3257 | /**\r | |
3258 | Enables CPU interrupts.\r | |
3259 | \r | |
ac644614 | 3260 | **/\r |
3261 | VOID\r | |
3262 | EFIAPI\r | |
3263 | EnableInterrupts (\r | |
3264 | VOID\r | |
3265 | );\r | |
3266 | \r | |
3267 | \r | |
3268 | /**\r | |
3269 | Disables CPU interrupts.\r | |
3270 | \r | |
ac644614 | 3271 | **/\r |
3272 | VOID\r | |
3273 | EFIAPI\r | |
3274 | DisableInterrupts (\r | |
3275 | VOID\r | |
3276 | );\r | |
3277 | \r | |
3278 | \r | |
3279 | /**\r | |
3280 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3281 | operation.\r | |
3282 | \r | |
ac644614 | 3283 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
3284 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
3285 | \r | |
3286 | **/\r | |
3287 | BOOLEAN\r | |
3288 | EFIAPI\r | |
3289 | SaveAndDisableInterrupts (\r | |
3290 | VOID\r | |
3291 | );\r | |
3292 | \r | |
3293 | \r | |
3294 | /**\r | |
3295 | Enables CPU interrupts for the smallest window required to capture any\r | |
3296 | pending interrupts.\r | |
3297 | \r | |
ac644614 | 3298 | **/\r |
3299 | VOID\r | |
3300 | EFIAPI\r | |
3301 | EnableDisableInterrupts (\r | |
3302 | VOID\r | |
3303 | );\r | |
3304 | \r | |
3305 | \r | |
3306 | /**\r | |
3307 | Retrieves the current CPU interrupt state.\r | |
3308 | \r | |
af2dc6a7 | 3309 | Returns TRUE if interrupts are currently enabled. Otherwise\r |
38bbd3d9 | 3310 | returns FALSE.\r |
ac644614 | 3311 | \r |
3312 | @retval TRUE CPU interrupts are enabled.\r | |
3313 | @retval FALSE CPU interrupts are disabled.\r | |
3314 | \r | |
3315 | **/\r | |
3316 | BOOLEAN\r | |
3317 | EFIAPI\r | |
3318 | GetInterruptState (\r | |
3319 | VOID\r | |
3320 | );\r | |
3321 | \r | |
3322 | \r | |
3323 | /**\r | |
3324 | Set the current CPU interrupt state.\r | |
3325 | \r | |
3326 | Sets the current CPU interrupt state to the state specified by\r | |
3327 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
3328 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
3329 | returned.\r | |
3330 | \r | |
3331 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
3332 | interrupts should be disabled.\r | |
3333 | \r | |
3334 | @return InterruptState\r | |
3335 | \r | |
3336 | **/\r | |
3337 | BOOLEAN\r | |
3338 | EFIAPI\r | |
3339 | SetInterruptState (\r | |
3340 | IN BOOLEAN InterruptState\r | |
3341 | );\r | |
3342 | \r | |
3343 | \r | |
3344 | /**\r | |
3345 | Requests CPU to pause for a short period of time.\r | |
3346 | \r | |
3347 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
3348 | systems to prevent memory starvation while waiting for a spin lock.\r | |
3349 | \r | |
3350 | **/\r | |
3351 | VOID\r | |
3352 | EFIAPI\r | |
3353 | CpuPause (\r | |
3354 | VOID\r | |
3355 | );\r | |
3356 | \r | |
3357 | \r | |
3358 | /**\r | |
3359 | Transfers control to a function starting with a new stack.\r | |
3360 | \r | |
3361 | Transfers control to the function specified by EntryPoint using the\r | |
3362 | new stack specified by NewStack and passing in the parameters specified\r | |
3363 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
3364 | be NULL. The function EntryPoint must never return. This function\r | |
3365 | supports a variable number of arguments following the NewStack parameter.\r | |
1a2f870c | 3366 | These additional arguments are ignored on IA-32, x64, and EBC architectures.\r |
3367 | Itanium processors expect one additional parameter of type VOID * that specifies\r | |
ac644614 | 3368 | the new backing store pointer.\r |
3369 | \r | |
3370 | If EntryPoint is NULL, then ASSERT().\r | |
3371 | If NewStack is NULL, then ASSERT().\r | |
3372 | \r | |
3373 | @param EntryPoint A pointer to function to call with the new stack.\r | |
3374 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
3375 | function.\r | |
3376 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
3377 | function.\r | |
3378 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
3379 | function.\r | |
af2dc6a7 | 3380 | @param ... This variable argument list is ignored for IA-32, x64, and \r |
3381 | EBC architectures. For Itanium processors, this variable \r | |
3382 | argument list is expected to contain a single parameter of \r | |
3383 | type VOID * that specifies the new backing store pointer.\r | |
42eedea9 | 3384 | \r |
ac644614 | 3385 | \r |
3386 | **/\r | |
3387 | VOID\r | |
3388 | EFIAPI\r | |
3389 | SwitchStack (\r | |
3390 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
3391 | IN VOID *Context1, OPTIONAL\r | |
3392 | IN VOID *Context2, OPTIONAL\r | |
3393 | IN VOID *NewStack,\r | |
3394 | ...\r | |
3395 | );\r | |
3396 | \r | |
3397 | \r | |
3398 | /**\r | |
3399 | Generates a breakpoint on the CPU.\r | |
3400 | \r | |
3401 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
3402 | that code can resume normal execution after the breakpoint.\r | |
3403 | \r | |
3404 | **/\r | |
3405 | VOID\r | |
3406 | EFIAPI\r | |
3407 | CpuBreakpoint (\r | |
3408 | VOID\r | |
3409 | );\r | |
3410 | \r | |
3411 | \r | |
3412 | /**\r | |
3413 | Executes an infinite loop.\r | |
3414 | \r | |
3415 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
3416 | past the loop and the code that follows the loop must execute properly. This\r | |
3417 | implies that the infinite loop must not cause the code that follow it to be\r | |
3418 | optimized away.\r | |
3419 | \r | |
3420 | **/\r | |
3421 | VOID\r | |
3422 | EFIAPI\r | |
3423 | CpuDeadLoop (\r | |
3424 | VOID\r | |
3425 | );\r | |
2fe241a2 | 3426 | \r |
ac644614 | 3427 | #if defined (MDE_CPU_IPF)\r |
3428 | \r | |
3429 | /**\r | |
3430 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
3431 | CPU.\r | |
3432 | \r | |
cc39b88b | 3433 | Flushes the cache lines specified by Address and Length. If Address is not aligned \r |
3434 | on a cache line boundary, then entire cache line containing Address is flushed. \r | |
3435 | If Address + Length is not aligned on a cache line boundary, then the entire cache \r | |
3436 | line containing Address + Length - 1 is flushed. This function may choose to flush \r | |
3437 | the entire cache if that is more efficient than flushing the specified range. If \r | |
3438 | Length is 0, the no cache lines are flushed. Address is returned. \r | |
1a2f870c | 3439 | This function is only available on Itanium processors.\r |
ac644614 | 3440 | \r |
3441 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
3442 | \r | |
3443 | @param Address The base address of the instruction lines to invalidate. If\r | |
3444 | the CPU is in a physical addressing mode, then Address is a\r | |
3445 | physical address. If the CPU is in a virtual addressing mode,\r | |
3446 | then Address is a virtual address.\r | |
3447 | \r | |
3448 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
3449 | \r | |
cc39b88b | 3450 | @return Address.\r |
ac644614 | 3451 | \r |
3452 | **/\r | |
3453 | VOID *\r | |
3454 | EFIAPI\r | |
cc39b88b | 3455 | AsmFlushCacheRange (\r |
ac644614 | 3456 | IN VOID *Address,\r |
3457 | IN UINTN Length\r | |
3458 | );\r | |
3459 | \r | |
3460 | \r | |
3461 | /**\r | |
af2dc6a7 | 3462 | Executes an FC instruction.\r |
3463 | Executes an FC instruction on the cache line specified by Address.\r | |
ac644614 | 3464 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3465 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3466 | \r |
ee6c452c | 3467 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3468 | \r |
3469 | @return The address of FC instruction executed.\r | |
3470 | \r | |
3471 | **/\r | |
3472 | UINT64\r | |
3473 | EFIAPI\r | |
3474 | AsmFc (\r | |
3475 | IN UINT64 Address\r | |
3476 | );\r | |
3477 | \r | |
3478 | \r | |
3479 | /**\r | |
af2dc6a7 | 3480 | Executes an FC.I instruction.\r |
3481 | Executes an FC.I instruction on the cache line specified by Address.\r | |
ac644614 | 3482 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3483 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3484 | \r |
ee6c452c | 3485 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3486 | \r |
af2dc6a7 | 3487 | @return The address of the FC.I instruction executed.\r |
ac644614 | 3488 | \r |
3489 | **/\r | |
3490 | UINT64\r | |
3491 | EFIAPI\r | |
3492 | AsmFci (\r | |
3493 | IN UINT64 Address\r | |
3494 | );\r | |
3495 | \r | |
3496 | \r | |
3497 | /**\r | |
3498 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
17f695ed | 3499 | \r |
3500 | Reads and returns the current value of Processor Identifier Register specified by Index. \r | |
ac644614 | 3501 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r |
3502 | registers) is determined by CPUID [3] bits {7:0}.\r | |
3503 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
3504 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
3505 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
1a2f870c | 3506 | catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3507 | \r |
ee6c452c | 3508 | @param Index The 8-bit Processor Identifier Register index to read.\r |
ac644614 | 3509 | \r |
3510 | @return The current value of Processor Identifier Register specified by Index.\r | |
3511 | \r | |
3512 | **/\r | |
3513 | UINT64\r | |
3514 | EFIAPI\r | |
3515 | AsmReadCpuid (\r | |
3516 | IN UINT8 Index\r | |
3517 | );\r | |
3518 | \r | |
3519 | \r | |
3520 | /**\r | |
3521 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
1a2f870c | 3522 | This function is only available on Itanium processors.\r |
ac644614 | 3523 | \r |
3524 | @return The current value of PSR.\r | |
3525 | \r | |
3526 | **/\r | |
3527 | UINT64\r | |
3528 | EFIAPI\r | |
3529 | AsmReadPsr (\r | |
3530 | VOID\r | |
3531 | );\r | |
3532 | \r | |
3533 | \r | |
3534 | /**\r | |
3535 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
22388319 | 3536 | \r |
ac644614 | 3537 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
22388319 | 3538 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r |
3539 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
1a2f870c | 3540 | fault handlers to catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3541 | \r |
ee6c452c | 3542 | @param Value The 64-bit value to write to PSR.\r |
ac644614 | 3543 | \r |
3544 | @return The 64-bit value written to the PSR.\r | |
3545 | \r | |
3546 | **/\r | |
3547 | UINT64\r | |
3548 | EFIAPI\r | |
3549 | AsmWritePsr (\r | |
3550 | IN UINT64 Value\r | |
3551 | );\r | |
3552 | \r | |
3553 | \r | |
3554 | /**\r | |
3555 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3556 | \r |
3557 | Reads and returns the current value of KR0. \r | |
1a2f870c | 3558 | This function is only available on Itanium processors.\r |
ac644614 | 3559 | \r |
3560 | @return The current value of KR0.\r | |
3561 | \r | |
3562 | **/\r | |
3563 | UINT64\r | |
3564 | EFIAPI\r | |
3565 | AsmReadKr0 (\r | |
3566 | VOID\r | |
3567 | );\r | |
3568 | \r | |
3569 | \r | |
3570 | /**\r | |
3571 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 3572 | \r |
3573 | Reads and returns the current value of KR1. \r | |
1a2f870c | 3574 | This function is only available on Itanium processors.\r |
ac644614 | 3575 | \r |
3576 | @return The current value of KR1.\r | |
3577 | \r | |
3578 | **/\r | |
3579 | UINT64\r | |
3580 | EFIAPI\r | |
3581 | AsmReadKr1 (\r | |
3582 | VOID\r | |
3583 | );\r | |
3584 | \r | |
3585 | \r | |
3586 | /**\r | |
3587 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 3588 | \r |
3589 | Reads and returns the current value of KR2. \r | |
1a2f870c | 3590 | This function is only available on Itanium processors.\r |
ac644614 | 3591 | \r |
3592 | @return The current value of KR2.\r | |
3593 | \r | |
3594 | **/\r | |
3595 | UINT64\r | |
3596 | EFIAPI\r | |
3597 | AsmReadKr2 (\r | |
3598 | VOID\r | |
3599 | );\r | |
3600 | \r | |
3601 | \r | |
3602 | /**\r | |
3603 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 3604 | \r |
3605 | Reads and returns the current value of KR3. \r | |
1a2f870c | 3606 | This function is only available on Itanium processors.\r |
ac644614 | 3607 | \r |
3608 | @return The current value of KR3.\r | |
3609 | \r | |
3610 | **/\r | |
3611 | UINT64\r | |
3612 | EFIAPI\r | |
3613 | AsmReadKr3 (\r | |
3614 | VOID\r | |
3615 | );\r | |
3616 | \r | |
3617 | \r | |
3618 | /**\r | |
3619 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
ac644614 | 3620 | \r |
2fe241a2 | 3621 | Reads and returns the current value of KR4. \r |
1a2f870c | 3622 | This function is only available on Itanium processors.\r |
2fe241a2 | 3623 | \r |
ac644614 | 3624 | @return The current value of KR4.\r |
3625 | \r | |
3626 | **/\r | |
3627 | UINT64\r | |
3628 | EFIAPI\r | |
3629 | AsmReadKr4 (\r | |
3630 | VOID\r | |
3631 | );\r | |
3632 | \r | |
3633 | \r | |
3634 | /**\r | |
3635 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 3636 | \r |
3637 | Reads and returns the current value of KR5. \r | |
1a2f870c | 3638 | This function is only available on Itanium processors.\r |
ac644614 | 3639 | \r |
3640 | @return The current value of KR5.\r | |
3641 | \r | |
3642 | **/\r | |
3643 | UINT64\r | |
3644 | EFIAPI\r | |
3645 | AsmReadKr5 (\r | |
3646 | VOID\r | |
3647 | );\r | |
3648 | \r | |
3649 | \r | |
3650 | /**\r | |
3651 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 3652 | \r |
3653 | Reads and returns the current value of KR6. \r | |
1a2f870c | 3654 | This function is only available on Itanium processors.\r |
ac644614 | 3655 | \r |
3656 | @return The current value of KR6.\r | |
3657 | \r | |
3658 | **/\r | |
3659 | UINT64\r | |
3660 | EFIAPI\r | |
3661 | AsmReadKr6 (\r | |
3662 | VOID\r | |
3663 | );\r | |
3664 | \r | |
3665 | \r | |
3666 | /**\r | |
3667 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 3668 | \r |
3669 | Reads and returns the current value of KR7. \r | |
1a2f870c | 3670 | This function is only available on Itanium processors.\r |
ac644614 | 3671 | \r |
3672 | @return The current value of KR7.\r | |
3673 | \r | |
3674 | **/\r | |
3675 | UINT64\r | |
3676 | EFIAPI\r | |
3677 | AsmReadKr7 (\r | |
3678 | VOID\r | |
3679 | );\r | |
3680 | \r | |
3681 | \r | |
3682 | /**\r | |
3683 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3684 | \r |
3685 | Writes the current value of KR0. The 64-bit value written to \r | |
1a2f870c | 3686 | the KR0 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3687 | \r |
ee6c452c | 3688 | @param Value The 64-bit value to write to KR0.\r |
ac644614 | 3689 | \r |
3690 | @return The 64-bit value written to the KR0.\r | |
3691 | \r | |
3692 | **/\r | |
3693 | UINT64\r | |
3694 | EFIAPI\r | |
3695 | AsmWriteKr0 (\r | |
3696 | IN UINT64 Value\r | |
3697 | );\r | |
3698 | \r | |
3699 | \r | |
3700 | /**\r | |
3701 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 3702 | \r |
3703 | Writes the current value of KR1. The 64-bit value written to \r | |
1a2f870c | 3704 | the KR1 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3705 | \r |
ee6c452c | 3706 | @param Value The 64-bit value to write to KR1.\r |
ac644614 | 3707 | \r |
3708 | @return The 64-bit value written to the KR1.\r | |
3709 | \r | |
3710 | **/\r | |
3711 | UINT64\r | |
3712 | EFIAPI\r | |
3713 | AsmWriteKr1 (\r | |
3714 | IN UINT64 Value\r | |
3715 | );\r | |
3716 | \r | |
3717 | \r | |
3718 | /**\r | |
3719 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 3720 | \r |
3721 | Writes the current value of KR2. The 64-bit value written to \r | |
1a2f870c | 3722 | the KR2 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3723 | \r |
ee6c452c | 3724 | @param Value The 64-bit value to write to KR2.\r |
ac644614 | 3725 | \r |
3726 | @return The 64-bit value written to the KR2.\r | |
3727 | \r | |
3728 | **/\r | |
3729 | UINT64\r | |
3730 | EFIAPI\r | |
3731 | AsmWriteKr2 (\r | |
3732 | IN UINT64 Value\r | |
3733 | );\r | |
3734 | \r | |
3735 | \r | |
3736 | /**\r | |
3737 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 3738 | \r |
3739 | Writes the current value of KR3. The 64-bit value written to \r | |
1a2f870c | 3740 | the KR3 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3741 | \r |
ee6c452c | 3742 | @param Value The 64-bit value to write to KR3.\r |
ac644614 | 3743 | \r |
3744 | @return The 64-bit value written to the KR3.\r | |
3745 | \r | |
3746 | **/\r | |
3747 | UINT64\r | |
3748 | EFIAPI\r | |
3749 | AsmWriteKr3 (\r | |
3750 | IN UINT64 Value\r | |
3751 | );\r | |
3752 | \r | |
3753 | \r | |
3754 | /**\r | |
3755 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
2fe241a2 | 3756 | \r |
3757 | Writes the current value of KR4. The 64-bit value written to \r | |
1a2f870c | 3758 | the KR4 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3759 | \r |
ee6c452c | 3760 | @param Value The 64-bit value to write to KR4.\r |
ac644614 | 3761 | \r |
3762 | @return The 64-bit value written to the KR4.\r | |
3763 | \r | |
3764 | **/\r | |
3765 | UINT64\r | |
3766 | EFIAPI\r | |
3767 | AsmWriteKr4 (\r | |
3768 | IN UINT64 Value\r | |
3769 | );\r | |
3770 | \r | |
3771 | \r | |
3772 | /**\r | |
3773 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 3774 | \r |
3775 | Writes the current value of KR5. The 64-bit value written to \r | |
1a2f870c | 3776 | the KR5 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3777 | \r |
ee6c452c | 3778 | @param Value The 64-bit value to write to KR5.\r |
ac644614 | 3779 | \r |
3780 | @return The 64-bit value written to the KR5.\r | |
3781 | \r | |
3782 | **/\r | |
3783 | UINT64\r | |
3784 | EFIAPI\r | |
3785 | AsmWriteKr5 (\r | |
3786 | IN UINT64 Value\r | |
3787 | );\r | |
3788 | \r | |
3789 | \r | |
3790 | /**\r | |
3791 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 3792 | \r |
3793 | Writes the current value of KR6. The 64-bit value written to \r | |
1a2f870c | 3794 | the KR6 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3795 | \r |
ee6c452c | 3796 | @param Value The 64-bit value to write to KR6.\r |
ac644614 | 3797 | \r |
3798 | @return The 64-bit value written to the KR6.\r | |
3799 | \r | |
3800 | **/\r | |
3801 | UINT64\r | |
3802 | EFIAPI\r | |
3803 | AsmWriteKr6 (\r | |
3804 | IN UINT64 Value\r | |
3805 | );\r | |
3806 | \r | |
3807 | \r | |
3808 | /**\r | |
3809 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 3810 | \r |
3811 | Writes the current value of KR7. The 64-bit value written to \r | |
1a2f870c | 3812 | the KR7 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3813 | \r |
ee6c452c | 3814 | @param Value The 64-bit value to write to KR7.\r |
ac644614 | 3815 | \r |
3816 | @return The 64-bit value written to the KR7.\r | |
3817 | \r | |
3818 | **/\r | |
3819 | UINT64\r | |
3820 | EFIAPI\r | |
3821 | AsmWriteKr7 (\r | |
3822 | IN UINT64 Value\r | |
3823 | );\r | |
3824 | \r | |
3825 | \r | |
3826 | /**\r | |
3827 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 3828 | \r |
3829 | Reads and returns the current value of ITC.\r | |
1a2f870c | 3830 | This function is only available on Itanium processors.\r |
ac644614 | 3831 | \r |
3832 | @return The current value of ITC.\r | |
3833 | \r | |
3834 | **/\r | |
3835 | UINT64\r | |
3836 | EFIAPI\r | |
3837 | AsmReadItc (\r | |
3838 | VOID\r | |
3839 | );\r | |
3840 | \r | |
3841 | \r | |
3842 | /**\r | |
3843 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 3844 | \r |
3845 | Reads and returns the current value of ITV. \r | |
1a2f870c | 3846 | This function is only available on Itanium processors.\r |
ac644614 | 3847 | \r |
3848 | @return The current value of ITV.\r | |
3849 | \r | |
3850 | **/\r | |
3851 | UINT64\r | |
3852 | EFIAPI\r | |
3853 | AsmReadItv (\r | |
3854 | VOID\r | |
3855 | );\r | |
3856 | \r | |
3857 | \r | |
3858 | /**\r | |
3859 | Reads the current value of Interval Timer Match Register (ITM).\r | |
2fe241a2 | 3860 | \r |
3861 | Reads and returns the current value of ITM.\r | |
1a2f870c | 3862 | This function is only available on Itanium processors.\r |
ac644614 | 3863 | \r |
3864 | @return The current value of ITM.\r | |
3865 | **/\r | |
3866 | UINT64\r | |
3867 | EFIAPI\r | |
3868 | AsmReadItm (\r | |
3869 | VOID\r | |
3870 | );\r | |
3871 | \r | |
3872 | \r | |
3873 | /**\r | |
3874 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 3875 | \r |
3876 | Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r | |
1a2f870c | 3877 | This function is only available on Itanium processors.\r |
ac644614 | 3878 | \r |
ee6c452c | 3879 | @param Value The 64-bit value to write to ITC.\r |
ac644614 | 3880 | \r |
3881 | @return The 64-bit value written to the ITC.\r | |
3882 | \r | |
3883 | **/\r | |
3884 | UINT64\r | |
3885 | EFIAPI\r | |
3886 | AsmWriteItc (\r | |
3887 | IN UINT64 Value\r | |
3888 | );\r | |
3889 | \r | |
3890 | \r | |
3891 | /**\r | |
3892 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
2fe241a2 | 3893 | \r |
3894 | Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r | |
1a2f870c | 3895 | This function is only available on Itanium processors.\r |
ac644614 | 3896 | \r |
ee6c452c | 3897 | @param Value The 64-bit value to write to ITM.\r |
ac644614 | 3898 | \r |
3899 | @return The 64-bit value written to the ITM.\r | |
3900 | \r | |
3901 | **/\r | |
3902 | UINT64\r | |
3903 | EFIAPI\r | |
3904 | AsmWriteItm (\r | |
3905 | IN UINT64 Value\r | |
3906 | );\r | |
3907 | \r | |
3908 | \r | |
3909 | /**\r | |
3910 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 3911 | \r |
3912 | Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r | |
ac644614 | 3913 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
3914 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
3915 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
3916 | fault handlers to catch the faults.\r | |
1a2f870c | 3917 | This function is only available on Itanium processors.\r |
ac644614 | 3918 | \r |
ee6c452c | 3919 | @param Value The 64-bit value to write to ITV.\r |
ac644614 | 3920 | \r |
3921 | @return The 64-bit value written to the ITV.\r | |
3922 | \r | |
3923 | **/\r | |
3924 | UINT64\r | |
3925 | EFIAPI\r | |
3926 | AsmWriteItv (\r | |
3927 | IN UINT64 Value\r | |
3928 | );\r | |
3929 | \r | |
3930 | \r | |
3931 | /**\r | |
3932 | Reads the current value of Default Control Register (DCR).\r | |
2fe241a2 | 3933 | \r |
1a2f870c | 3934 | Reads and returns the current value of DCR. This function is only available on Itanium processors.\r |
ac644614 | 3935 | \r |
3936 | @return The current value of DCR.\r | |
3937 | \r | |
3938 | **/\r | |
3939 | UINT64\r | |
3940 | EFIAPI\r | |
3941 | AsmReadDcr (\r | |
3942 | VOID\r | |
3943 | );\r | |
3944 | \r | |
3945 | \r | |
3946 | /**\r | |
3947 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 3948 | \r |
1a2f870c | 3949 | Reads and returns the current value of IVA. This function is only available on Itanium processors.\r |
ac644614 | 3950 | \r |
3951 | @return The current value of IVA.\r | |
3952 | **/\r | |
3953 | UINT64\r | |
3954 | EFIAPI\r | |
3955 | AsmReadIva (\r | |
3956 | VOID\r | |
3957 | );\r | |
3958 | \r | |
3959 | \r | |
3960 | /**\r | |
3961 | Reads the current value of Page Table Address Register (PTA).\r | |
2fe241a2 | 3962 | \r |
1a2f870c | 3963 | Reads and returns the current value of PTA. This function is only available on Itanium processors.\r |
ac644614 | 3964 | \r |
3965 | @return The current value of PTA.\r | |
3966 | \r | |
3967 | **/\r | |
3968 | UINT64\r | |
3969 | EFIAPI\r | |
3970 | AsmReadPta (\r | |
3971 | VOID\r | |
3972 | );\r | |
3973 | \r | |
3974 | \r | |
3975 | /**\r | |
3976 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
2fe241a2 | 3977 | \r |
3978 | Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r | |
ac644614 | 3979 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
3980 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
3981 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
3982 | fault handlers to catch the faults.\r | |
1a2f870c | 3983 | This function is only available on Itanium processors.\r |
ac644614 | 3984 | \r |
ee6c452c | 3985 | @param Value The 64-bit value to write to DCR.\r |
ac644614 | 3986 | \r |
3987 | @return The 64-bit value written to the DCR.\r | |
3988 | \r | |
3989 | **/\r | |
3990 | UINT64\r | |
3991 | EFIAPI\r | |
3992 | AsmWriteDcr (\r | |
3993 | IN UINT64 Value\r | |
3994 | );\r | |
3995 | \r | |
3996 | \r | |
3997 | /**\r | |
3998 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 3999 | \r |
4000 | Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r | |
ac644614 | 4001 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r |
4002 | the low 15 bits of Value is ignored when written.\r | |
1a2f870c | 4003 | This function is only available on Itanium processors.\r |
ac644614 | 4004 | \r |
ee6c452c | 4005 | @param Value The 64-bit value to write to IVA.\r |
ac644614 | 4006 | \r |
4007 | @return The 64-bit value written to the IVA.\r | |
4008 | \r | |
4009 | **/\r | |
4010 | UINT64\r | |
4011 | EFIAPI\r | |
4012 | AsmWriteIva (\r | |
4013 | IN UINT64 Value\r | |
4014 | );\r | |
4015 | \r | |
4016 | \r | |
4017 | /**\r | |
4018 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
2fe241a2 | 4019 | \r |
4020 | Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r | |
ac644614 | 4021 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4022 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4023 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4024 | fault handlers to catch the faults.\r | |
1a2f870c | 4025 | This function is only available on Itanium processors.\r |
ac644614 | 4026 | \r |
ee6c452c | 4027 | @param Value The 64-bit value to write to PTA.\r |
ac644614 | 4028 | \r |
4029 | @return The 64-bit value written to the PTA.\r | |
4030 | **/\r | |
4031 | UINT64\r | |
4032 | EFIAPI\r | |
4033 | AsmWritePta (\r | |
4034 | IN UINT64 Value\r | |
4035 | );\r | |
4036 | \r | |
4037 | \r | |
4038 | /**\r | |
4039 | Reads the current value of Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4040 | \r |
1a2f870c | 4041 | Reads and returns the current value of LID. This function is only available on Itanium processors.\r |
ac644614 | 4042 | \r |
4043 | @return The current value of LID.\r | |
4044 | \r | |
4045 | **/\r | |
4046 | UINT64\r | |
4047 | EFIAPI\r | |
4048 | AsmReadLid (\r | |
4049 | VOID\r | |
4050 | );\r | |
4051 | \r | |
4052 | \r | |
4053 | /**\r | |
4054 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
2fe241a2 | 4055 | \r |
1a2f870c | 4056 | Reads and returns the current value of IVR. This function is only available on Itanium processors. \r |
ac644614 | 4057 | \r |
4058 | @return The current value of IVR.\r | |
4059 | \r | |
4060 | **/\r | |
4061 | UINT64\r | |
4062 | EFIAPI\r | |
4063 | AsmReadIvr (\r | |
4064 | VOID\r | |
4065 | );\r | |
4066 | \r | |
4067 | \r | |
4068 | /**\r | |
4069 | Reads the current value of Task Priority Register (TPR).\r | |
2fe241a2 | 4070 | \r |
1a2f870c | 4071 | Reads and returns the current value of TPR. This function is only available on Itanium processors. \r |
ac644614 | 4072 | \r |
4073 | @return The current value of TPR.\r | |
4074 | \r | |
4075 | **/\r | |
4076 | UINT64\r | |
4077 | EFIAPI\r | |
4078 | AsmReadTpr (\r | |
4079 | VOID\r | |
4080 | );\r | |
4081 | \r | |
4082 | \r | |
4083 | /**\r | |
4084 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
2fe241a2 | 4085 | \r |
1a2f870c | 4086 | Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r |
ac644614 | 4087 | \r |
4088 | @return The current value of IRR0.\r | |
4089 | \r | |
4090 | **/\r | |
4091 | UINT64\r | |
4092 | EFIAPI\r | |
4093 | AsmReadIrr0 (\r | |
4094 | VOID\r | |
4095 | );\r | |
4096 | \r | |
4097 | \r | |
4098 | /**\r | |
4099 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
2fe241a2 | 4100 | \r |
1a2f870c | 4101 | Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r |
ac644614 | 4102 | \r |
4103 | @return The current value of IRR1.\r | |
4104 | \r | |
4105 | **/\r | |
4106 | UINT64\r | |
4107 | EFIAPI\r | |
4108 | AsmReadIrr1 (\r | |
4109 | VOID\r | |
4110 | );\r | |
4111 | \r | |
4112 | \r | |
4113 | /**\r | |
4114 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
2fe241a2 | 4115 | \r |
1a2f870c | 4116 | Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r |
ac644614 | 4117 | \r |
4118 | @return The current value of IRR2.\r | |
4119 | \r | |
4120 | **/\r | |
4121 | UINT64\r | |
4122 | EFIAPI\r | |
4123 | AsmReadIrr2 (\r | |
4124 | VOID\r | |
4125 | );\r | |
4126 | \r | |
4127 | \r | |
4128 | /**\r | |
4129 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
2fe241a2 | 4130 | \r |
1a2f870c | 4131 | Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r |
ac644614 | 4132 | \r |
4133 | @return The current value of IRR3.\r | |
4134 | \r | |
4135 | **/\r | |
4136 | UINT64\r | |
4137 | EFIAPI\r | |
4138 | AsmReadIrr3 (\r | |
4139 | VOID\r | |
4140 | );\r | |
4141 | \r | |
4142 | \r | |
4143 | /**\r | |
4144 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4145 | \r |
1a2f870c | 4146 | Reads and returns the current value of PMV. This function is only available on Itanium processors. \r |
ac644614 | 4147 | \r |
4148 | @return The current value of PMV.\r | |
4149 | \r | |
4150 | **/\r | |
4151 | UINT64\r | |
4152 | EFIAPI\r | |
4153 | AsmReadPmv (\r | |
4154 | VOID\r | |
4155 | );\r | |
4156 | \r | |
4157 | \r | |
4158 | /**\r | |
4159 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4160 | \r |
1a2f870c | 4161 | Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r |
ac644614 | 4162 | \r |
4163 | @return The current value of CMCV.\r | |
4164 | \r | |
4165 | **/\r | |
4166 | UINT64\r | |
4167 | EFIAPI\r | |
4168 | AsmReadCmcv (\r | |
4169 | VOID\r | |
4170 | );\r | |
4171 | \r | |
4172 | \r | |
4173 | /**\r | |
4174 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4175 | \r |
1a2f870c | 4176 | Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r |
ac644614 | 4177 | \r |
4178 | @return The current value of LRR0.\r | |
4179 | \r | |
4180 | **/\r | |
4181 | UINT64\r | |
4182 | EFIAPI\r | |
4183 | AsmReadLrr0 (\r | |
4184 | VOID\r | |
4185 | );\r | |
4186 | \r | |
4187 | \r | |
4188 | /**\r | |
4189 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4190 | \r |
1a2f870c | 4191 | Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r |
ac644614 | 4192 | \r |
4193 | @return The current value of LRR1.\r | |
4194 | \r | |
4195 | **/\r | |
4196 | UINT64\r | |
4197 | EFIAPI\r | |
4198 | AsmReadLrr1 (\r | |
4199 | VOID\r | |
4200 | );\r | |
4201 | \r | |
4202 | \r | |
4203 | /**\r | |
4204 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4205 | \r |
4206 | Writes the current value of LID. The 64-bit value written to the LID is returned. \r | |
ac644614 | 4207 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4208 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
4209 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4210 | fault handlers to catch the faults.\r | |
1a2f870c | 4211 | This function is only available on Itanium processors.\r |
ac644614 | 4212 | \r |
ee6c452c | 4213 | @param Value The 64-bit value to write to LID.\r |
ac644614 | 4214 | \r |
4215 | @return The 64-bit value written to the LID.\r | |
4216 | \r | |
4217 | **/\r | |
4218 | UINT64\r | |
4219 | EFIAPI\r | |
4220 | AsmWriteLid (\r | |
4221 | IN UINT64 Value\r | |
4222 | );\r | |
4223 | \r | |
4224 | \r | |
4225 | /**\r | |
4226 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
2fe241a2 | 4227 | \r |
4228 | Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r | |
ac644614 | 4229 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4230 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
4231 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4232 | fault handlers to catch the faults.\r | |
1a2f870c | 4233 | This function is only available on Itanium processors.\r |
ac644614 | 4234 | \r |
ee6c452c | 4235 | @param Value The 64-bit value to write to TPR.\r |
ac644614 | 4236 | \r |
4237 | @return The 64-bit value written to the TPR.\r | |
4238 | \r | |
4239 | **/\r | |
4240 | UINT64\r | |
4241 | EFIAPI\r | |
4242 | AsmWriteTpr (\r | |
4243 | IN UINT64 Value\r | |
4244 | );\r | |
4245 | \r | |
4246 | \r | |
4247 | /**\r | |
4248 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
2fe241a2 | 4249 | \r |
1a2f870c | 4250 | Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r |
ac644614 | 4251 | \r |
4252 | **/\r | |
4253 | VOID\r | |
4254 | EFIAPI\r | |
4255 | AsmWriteEoi (\r | |
4256 | VOID\r | |
4257 | );\r | |
4258 | \r | |
4259 | \r | |
4260 | /**\r | |
4261 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4262 | \r |
4263 | Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r | |
ac644614 | 4264 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4265 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
4266 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4267 | fault handlers to catch the faults.\r | |
1a2f870c | 4268 | This function is only available on Itanium processors.\r |
ac644614 | 4269 | \r |
ee6c452c | 4270 | @param Value The 64-bit value to write to PMV.\r |
ac644614 | 4271 | \r |
4272 | @return The 64-bit value written to the PMV.\r | |
4273 | \r | |
4274 | **/\r | |
4275 | UINT64\r | |
4276 | EFIAPI\r | |
4277 | AsmWritePmv (\r | |
4278 | IN UINT64 Value\r | |
4279 | );\r | |
4280 | \r | |
4281 | \r | |
4282 | /**\r | |
4283 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4284 | \r |
4285 | Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r | |
ac644614 | 4286 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4287 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
4288 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4289 | fault handlers to catch the faults.\r | |
1a2f870c | 4290 | This function is only available on Itanium processors.\r |
ac644614 | 4291 | \r |
ee6c452c | 4292 | @param Value The 64-bit value to write to CMCV.\r |
ac644614 | 4293 | \r |
4294 | @return The 64-bit value written to the CMCV.\r | |
4295 | \r | |
4296 | **/\r | |
4297 | UINT64\r | |
4298 | EFIAPI\r | |
4299 | AsmWriteCmcv (\r | |
4300 | IN UINT64 Value\r | |
4301 | );\r | |
4302 | \r | |
4303 | \r | |
4304 | /**\r | |
4305 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4306 | \r |
4307 | Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r | |
ac644614 | 4308 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4309 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
4310 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4311 | fault handlers to catch the faults.\r | |
1a2f870c | 4312 | This function is only available on Itanium processors.\r |
ac644614 | 4313 | \r |
ee6c452c | 4314 | @param Value The 64-bit value to write to LRR0.\r |
ac644614 | 4315 | \r |
4316 | @return The 64-bit value written to the LRR0.\r | |
4317 | \r | |
4318 | **/\r | |
4319 | UINT64\r | |
4320 | EFIAPI\r | |
4321 | AsmWriteLrr0 (\r | |
4322 | IN UINT64 Value\r | |
4323 | );\r | |
4324 | \r | |
4325 | \r | |
4326 | /**\r | |
4327 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4328 | \r |
4329 | Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r | |
ac644614 | 4330 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4331 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
4332 | The caller must either guarantee that Value is valid, or the caller must\r | |
4333 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4334 | This function is only available on Itanium processors.\r |
ac644614 | 4335 | \r |
ee6c452c | 4336 | @param Value The 64-bit value to write to LRR1.\r |
ac644614 | 4337 | \r |
4338 | @return The 64-bit value written to the LRR1.\r | |
4339 | \r | |
4340 | **/\r | |
4341 | UINT64\r | |
4342 | EFIAPI\r | |
4343 | AsmWriteLrr1 (\r | |
4344 | IN UINT64 Value\r | |
4345 | );\r | |
4346 | \r | |
4347 | \r | |
4348 | /**\r | |
4349 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
4350 | \r | |
4351 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4352 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
af2dc6a7 | 4353 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4354 | on all processor models. Implemented registers are contiguous starting with\r |
4355 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
4356 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4357 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4358 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4359 | This function is only available on Itanium processors.\r |
ac644614 | 4360 | \r |
ee6c452c | 4361 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r |
ac644614 | 4362 | \r |
4363 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
4364 | \r | |
4365 | **/\r | |
4366 | UINT64\r | |
4367 | EFIAPI\r | |
4368 | AsmReadIbr (\r | |
4369 | IN UINT8 Index\r | |
4370 | );\r | |
4371 | \r | |
4372 | \r | |
4373 | /**\r | |
4374 | Reads the current value of Data Breakpoint Register (DBR).\r | |
4375 | \r | |
4376 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4377 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4378 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4379 | models. Implemented registers are contiguous starting with register 0.\r |
4380 | No parameter checking is performed on Index. If the Index value is beyond\r | |
4381 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
4382 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
4383 | fault handlers to catch the faults.\r | |
1a2f870c | 4384 | This function is only available on Itanium processors.\r |
ac644614 | 4385 | \r |
ee6c452c | 4386 | @param Index The 8-bit Data Breakpoint Register index to read.\r |
ac644614 | 4387 | \r |
4388 | @return The current value of Data Breakpoint Register specified by Index.\r | |
4389 | \r | |
4390 | **/\r | |
4391 | UINT64\r | |
4392 | EFIAPI\r | |
4393 | AsmReadDbr (\r | |
4394 | IN UINT8 Index\r | |
4395 | );\r | |
4396 | \r | |
4397 | \r | |
4398 | /**\r | |
4399 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
4400 | \r | |
af2dc6a7 | 4401 | All processor implementations provide at least four performance counters\r |
4402 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4403 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4404 | additional implementation-dependent PMC and PMD to increase the number of\r | |
4405 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4406 | register set is implementation dependent. No parameter checking is performed\r | |
4407 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
4408 | zero value will be returned.\r | |
1a2f870c | 4409 | This function is only available on Itanium processors.\r |
ac644614 | 4410 | \r |
ee6c452c | 4411 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r |
ac644614 | 4412 | \r |
2fe241a2 | 4413 | @return The current value of Performance Monitor Configuration Register\r |
4414 | specified by Index.\r | |
ac644614 | 4415 | \r |
4416 | **/\r | |
4417 | UINT64\r | |
4418 | EFIAPI\r | |
4419 | AsmReadPmc (\r | |
4420 | IN UINT8 Index\r | |
4421 | );\r | |
4422 | \r | |
4423 | \r | |
4424 | /**\r | |
4425 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
4426 | \r | |
4427 | All processor implementations provide at least 4 performance counters\r | |
4428 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
4429 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r | |
4430 | provide additional implementation-dependent PMC and PMD to increase the number\r | |
4431 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4432 | register set is implementation dependent. No parameter checking is performed\r | |
4433 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
4434 | zero value will be returned.\r | |
1a2f870c | 4435 | This function is only available on Itanium processors.\r |
ac644614 | 4436 | \r |
ee6c452c | 4437 | @param Index The 8-bit Performance Monitor Data Register index to read.\r |
ac644614 | 4438 | \r |
4439 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
4440 | \r | |
4441 | **/\r | |
4442 | UINT64\r | |
4443 | EFIAPI\r | |
4444 | AsmReadPmd (\r | |
4445 | IN UINT8 Index\r | |
4446 | );\r | |
4447 | \r | |
4448 | \r | |
4449 | /**\r | |
4450 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
4451 | \r | |
4452 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
4453 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4454 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
af2dc6a7 | 4455 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4456 | on all processor models. Implemented registers are contiguous starting with\r |
4457 | register 0. No parameter checking is performed on Index. If the Index value\r | |
4458 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4459 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4460 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4461 | This function is only available on Itanium processors.\r |
ac644614 | 4462 | \r |
ee6c452c | 4463 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r |
4464 | @param Value The 64-bit value to write to IBR.\r | |
ac644614 | 4465 | \r |
4466 | @return The 64-bit value written to the IBR.\r | |
4467 | \r | |
4468 | **/\r | |
4469 | UINT64\r | |
4470 | EFIAPI\r | |
4471 | AsmWriteIbr (\r | |
4472 | IN UINT8 Index,\r | |
4473 | IN UINT64 Value\r | |
4474 | );\r | |
4475 | \r | |
4476 | \r | |
4477 | /**\r | |
4478 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
4479 | \r | |
4480 | Writes current value of Data Breakpoint Register specified by Index.\r | |
4481 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4482 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4483 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4484 | models. Implemented registers are contiguous starting with register 0. No parameter\r |
4485 | checking is performed on Index. If the Index value is beyond the implemented\r | |
4486 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
4487 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
4488 | catch the faults.\r | |
1a2f870c | 4489 | This function is only available on Itanium processors.\r |
ac644614 | 4490 | \r |
ee6c452c | 4491 | @param Index The 8-bit Data Breakpoint Register index to write.\r |
4492 | @param Value The 64-bit value to write to DBR.\r | |
ac644614 | 4493 | \r |
4494 | @return The 64-bit value written to the DBR.\r | |
4495 | \r | |
4496 | **/\r | |
4497 | UINT64\r | |
4498 | EFIAPI\r | |
4499 | AsmWriteDbr (\r | |
4500 | IN UINT8 Index,\r | |
4501 | IN UINT64 Value\r | |
4502 | );\r | |
4503 | \r | |
4504 | \r | |
4505 | /**\r | |
4506 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
4507 | \r | |
4508 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
af2dc6a7 | 4509 | All processor implementations provide at least four performance counters\r |
4510 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status\r | |
ac644614 | 4511 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r |
4512 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
4513 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r | |
4514 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
4515 | beyond the implemented PMC register range, the write is ignored.\r | |
1a2f870c | 4516 | This function is only available on Itanium processors.\r |
ac644614 | 4517 | \r |
ee6c452c | 4518 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r |
4519 | @param Value The 64-bit value to write to PMC.\r | |
ac644614 | 4520 | \r |
4521 | @return The 64-bit value written to the PMC.\r | |
4522 | \r | |
4523 | **/\r | |
4524 | UINT64\r | |
4525 | EFIAPI\r | |
4526 | AsmWritePmc (\r | |
4527 | IN UINT8 Index,\r | |
4528 | IN UINT64 Value\r | |
4529 | );\r | |
4530 | \r | |
4531 | \r | |
4532 | /**\r | |
4533 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
4534 | \r | |
4535 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
af2dc6a7 | 4536 | All processor implementations provide at least four performance counters\r |
4537 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4538 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4539 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
4540 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r | |
4541 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
4542 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
1a2f870c | 4543 | This function is only available on Itanium processors.\r |
ac644614 | 4544 | \r |
ee6c452c | 4545 | @param Index The 8-bit Performance Monitor Data Register index to write.\r |
4546 | @param Value The 64-bit value to write to PMD.\r | |
ac644614 | 4547 | \r |
4548 | @return The 64-bit value written to the PMD.\r | |
4549 | \r | |
4550 | **/\r | |
4551 | UINT64\r | |
4552 | EFIAPI\r | |
4553 | AsmWritePmd (\r | |
4554 | IN UINT8 Index,\r | |
4555 | IN UINT64 Value\r | |
4556 | );\r | |
4557 | \r | |
4558 | \r | |
4559 | /**\r | |
4560 | Reads the current value of 64-bit Global Pointer (GP).\r | |
4561 | \r | |
4562 | Reads and returns the current value of GP.\r | |
1a2f870c | 4563 | This function is only available on Itanium processors.\r |
ac644614 | 4564 | \r |
4565 | @return The current value of GP.\r | |
4566 | \r | |
4567 | **/\r | |
4568 | UINT64\r | |
4569 | EFIAPI\r | |
4570 | AsmReadGp (\r | |
4571 | VOID\r | |
4572 | );\r | |
4573 | \r | |
4574 | \r | |
4575 | /**\r | |
4576 | Write the current value of 64-bit Global Pointer (GP).\r | |
4577 | \r | |
4578 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
4579 | No parameter checking is performed on Value.\r | |
1a2f870c | 4580 | This function is only available on Itanium processors.\r |
ac644614 | 4581 | \r |
4582 | @param Value The 64-bit value to write to GP.\r | |
4583 | \r | |
4584 | @return The 64-bit value written to the GP.\r | |
4585 | \r | |
4586 | **/\r | |
4587 | UINT64\r | |
4588 | EFIAPI\r | |
4589 | AsmWriteGp (\r | |
4590 | IN UINT64 Value\r | |
4591 | );\r | |
4592 | \r | |
4593 | \r | |
4594 | /**\r | |
4595 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
4596 | \r | |
4597 | Reads and returns the current value of SP.\r | |
1a2f870c | 4598 | This function is only available on Itanium processors.\r |
ac644614 | 4599 | \r |
4600 | @return The current value of SP.\r | |
4601 | \r | |
4602 | **/\r | |
4603 | UINT64\r | |
4604 | EFIAPI\r | |
4605 | AsmReadSp (\r | |
4606 | VOID\r | |
4607 | );\r | |
4608 | \r | |
4609 | \r | |
aad6137d | 4610 | ///\r |
af2dc6a7 | 4611 | /// Valid Index value for AsmReadControlRegister().\r |
aad6137d | 4612 | ///\r |
4613 | #define IPF_CONTROL_REGISTER_DCR 0\r | |
4614 | #define IPF_CONTROL_REGISTER_ITM 1\r | |
4615 | #define IPF_CONTROL_REGISTER_IVA 2\r | |
4616 | #define IPF_CONTROL_REGISTER_PTA 8\r | |
4617 | #define IPF_CONTROL_REGISTER_IPSR 16\r | |
4618 | #define IPF_CONTROL_REGISTER_ISR 17\r | |
4619 | #define IPF_CONTROL_REGISTER_IIP 19\r | |
4620 | #define IPF_CONTROL_REGISTER_IFA 20\r | |
4621 | #define IPF_CONTROL_REGISTER_ITIR 21\r | |
4622 | #define IPF_CONTROL_REGISTER_IIPA 22\r | |
4623 | #define IPF_CONTROL_REGISTER_IFS 23\r | |
4624 | #define IPF_CONTROL_REGISTER_IIM 24\r | |
4625 | #define IPF_CONTROL_REGISTER_IHA 25\r | |
4626 | #define IPF_CONTROL_REGISTER_LID 64\r | |
4627 | #define IPF_CONTROL_REGISTER_IVR 65\r | |
4628 | #define IPF_CONTROL_REGISTER_TPR 66\r | |
4629 | #define IPF_CONTROL_REGISTER_EOI 67\r | |
4630 | #define IPF_CONTROL_REGISTER_IRR0 68\r | |
4631 | #define IPF_CONTROL_REGISTER_IRR1 69\r | |
4632 | #define IPF_CONTROL_REGISTER_IRR2 70\r | |
4633 | #define IPF_CONTROL_REGISTER_IRR3 71\r | |
4634 | #define IPF_CONTROL_REGISTER_ITV 72\r | |
4635 | #define IPF_CONTROL_REGISTER_PMV 73\r | |
4636 | #define IPF_CONTROL_REGISTER_CMCV 74\r | |
4637 | #define IPF_CONTROL_REGISTER_LRR0 80\r | |
4638 | #define IPF_CONTROL_REGISTER_LRR1 81\r | |
4639 | \r | |
4640 | /**\r | |
4641 | Reads a 64-bit control register.\r | |
4642 | \r | |
af2dc6a7 | 4643 | Reads and returns the control register specified by Index. The valid Index valued \r |
4644 | are defined above in "Related Definitions".\r | |
4645 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
4646 | available on Itanium processors.\r | |
aad6137d | 4647 | \r |
4648 | @param Index The index of the control register to read.\r | |
4649 | \r | |
4650 | @return The control register specified by Index.\r | |
4651 | \r | |
4652 | **/\r | |
4653 | UINT64\r | |
4654 | EFIAPI\r | |
4655 | AsmReadControlRegister (\r | |
4656 | IN UINT64 Index\r | |
4657 | );\r | |
4658 | \r | |
4659 | \r | |
4660 | ///\r | |
af2dc6a7 | 4661 | /// Valid Index value for AsmReadApplicationRegister().\r |
aad6137d | 4662 | ///\r |
4663 | #define IPF_APPLICATION_REGISTER_K0 0\r | |
4664 | #define IPF_APPLICATION_REGISTER_K1 1\r | |
4665 | #define IPF_APPLICATION_REGISTER_K2 2\r | |
4666 | #define IPF_APPLICATION_REGISTER_K3 3\r | |
4667 | #define IPF_APPLICATION_REGISTER_K4 4\r | |
4668 | #define IPF_APPLICATION_REGISTER_K5 5\r | |
4669 | #define IPF_APPLICATION_REGISTER_K6 6\r | |
4670 | #define IPF_APPLICATION_REGISTER_K7 7\r | |
4671 | #define IPF_APPLICATION_REGISTER_RSC 16\r | |
4672 | #define IPF_APPLICATION_REGISTER_BSP 17\r | |
4673 | #define IPF_APPLICATION_REGISTER_BSPSTORE 18\r | |
4674 | #define IPF_APPLICATION_REGISTER_RNAT 19\r | |
4675 | #define IPF_APPLICATION_REGISTER_FCR 21\r | |
4676 | #define IPF_APPLICATION_REGISTER_EFLAG 24\r | |
4677 | #define IPF_APPLICATION_REGISTER_CSD 25\r | |
4678 | #define IPF_APPLICATION_REGISTER_SSD 26\r | |
4679 | #define IPF_APPLICATION_REGISTER_CFLG 27\r | |
4680 | #define IPF_APPLICATION_REGISTER_FSR 28\r | |
4681 | #define IPF_APPLICATION_REGISTER_FIR 29\r | |
4682 | #define IPF_APPLICATION_REGISTER_FDR 30\r | |
4683 | #define IPF_APPLICATION_REGISTER_CCV 32\r | |
4684 | #define IPF_APPLICATION_REGISTER_UNAT 36\r | |
4685 | #define IPF_APPLICATION_REGISTER_FPSR 40\r | |
4686 | #define IPF_APPLICATION_REGISTER_ITC 44\r | |
4687 | #define IPF_APPLICATION_REGISTER_PFS 64\r | |
4688 | #define IPF_APPLICATION_REGISTER_LC 65\r | |
4689 | #define IPF_APPLICATION_REGISTER_EC 66\r | |
4690 | \r | |
4691 | /**\r | |
4692 | Reads a 64-bit application register.\r | |
4693 | \r | |
af2dc6a7 | 4694 | Reads and returns the application register specified by Index. The valid Index \r |
4695 | valued are defined above in "Related Definitions".\r | |
4696 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
4697 | available on Itanium processors.\r | |
aad6137d | 4698 | \r |
4699 | @param Index The index of the application register to read.\r | |
4700 | \r | |
4701 | @return The application register specified by Index.\r | |
4702 | \r | |
4703 | **/\r | |
4704 | UINT64\r | |
4705 | EFIAPI\r | |
4706 | AsmReadApplicationRegister (\r | |
4707 | IN UINT64 Index\r | |
4708 | );\r | |
4709 | \r | |
4710 | \r | |
59e0bb0c | 4711 | /**\r |
4712 | Reads the current value of a Machine Specific Register (MSR).\r | |
4713 | \r | |
4714 | Reads and returns the current value of the Machine Specific Register specified by Index. No\r | |
4715 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
4716 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
4717 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 4718 | only available on Itanium processors.\r |
59e0bb0c | 4719 | \r |
4720 | @param Index The 8-bit Machine Specific Register index to read.\r | |
4721 | \r | |
4722 | @return The current value of the Machine Specific Register specified by Index. \r | |
4723 | \r | |
4724 | **/\r | |
4725 | UINT64\r | |
4726 | EFIAPI\r | |
4727 | AsmReadMsr (\r | |
4728 | IN UINT8 Index \r | |
4729 | );\r | |
4730 | \r | |
4731 | \r | |
4732 | /**\r | |
4733 | Writes the current value of a Machine Specific Register (MSR).\r | |
4734 | \r | |
4735 | Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r | |
4736 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
4737 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
4738 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 4739 | only available on Itanium processors.\r |
59e0bb0c | 4740 | \r |
4741 | @param Index The 8-bit Machine Specific Register index to write.\r | |
4742 | @param Value The 64-bit value to write to the Machine Specific Register.\r | |
4743 | \r | |
4744 | @return The 64-bit value to write to the Machine Specific Register. \r | |
4745 | \r | |
4746 | **/\r | |
4747 | UINT64\r | |
4748 | EFIAPI\r | |
4749 | AsmWriteMsr (\r | |
4750 | IN UINT8 Index, \r | |
4751 | IN UINT64 Value \r | |
4752 | );\r | |
4753 | \r | |
4754 | \r | |
ac644614 | 4755 | /**\r |
4756 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
4757 | \r | |
4758 | Determines the current execution mode of the CPU.\r | |
4759 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
4760 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
4761 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
4762 | and -1 is returned.\r | |
1a2f870c | 4763 | This function is only available on Itanium processors.\r |
ac644614 | 4764 | \r |
17f695ed | 4765 | @retval 1 The CPU is in virtual mode.\r |
4766 | @retval 0 The CPU is in physical mode.\r | |
4767 | @retval -1 The CPU is in mixed mode.\r | |
ac644614 | 4768 | \r |
4769 | **/\r | |
4770 | INT64\r | |
4771 | EFIAPI\r | |
4772 | AsmCpuVirtual (\r | |
4773 | VOID\r | |
4774 | );\r | |
4775 | \r | |
4776 | \r | |
4777 | /**\r | |
4778 | Makes a PAL procedure call.\r | |
4779 | \r | |
4780 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
4781 | value this API will make static or stacked PAL call. The following table\r | |
4782 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
4783 | may be designated as required or optional. If a PAL procedure is specified\r | |
4784 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
4785 | Status field of the PAL_CALL_RETURN structure.\r | |
4786 | This indicates that the procedure is not present in this PAL implementation.\r | |
4787 | It is the caller's responsibility to check for this return code after calling\r | |
4788 | any optional PAL procedure.\r | |
4789 | No parameter checking is performed on the 5 input parameters, but there are\r | |
4790 | some common rules that the caller should follow when making a PAL call. Any\r | |
4791 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
4792 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
4793 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
4794 | argument return value may be returned or undefined result may occur during the\r | |
4795 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
4796 | PAL entry point then the system behavior is undefined. This function is only\r | |
1a2f870c | 4797 | available on Itanium processors.\r |
ac644614 | 4798 | \r |
ee6c452c | 4799 | @param PalEntryPoint The PAL procedure calls entry point.\r |
4800 | @param Index The PAL procedure Index number.\r | |
4801 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
4802 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
4803 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
ac644614 | 4804 | \r |
4805 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
4806 | \r | |
4807 | **/\r | |
4808 | PAL_CALL_RETURN\r | |
4809 | EFIAPI\r | |
4810 | AsmPalCall (\r | |
4811 | IN UINT64 PalEntryPoint,\r | |
4812 | IN UINT64 Index,\r | |
4813 | IN UINT64 Arg2,\r | |
4814 | IN UINT64 Arg3,\r | |
4815 | IN UINT64 Arg4\r | |
4816 | );\r | |
fd163050 | 4817 | #endif\r |
ac644614 | 4818 | \r |
fd163050 | 4819 | #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r |
1106ffe1 | 4820 | ///\r |
af2dc6a7 | 4821 | /// IA32 and x64 Specific Functions.\r |
4822 | /// Byte packed structure for 16-bit Real Mode EFLAGS.\r | |
1106ffe1 | 4823 | ///\r |
ac644614 | 4824 | typedef union {\r |
4825 | struct {\r | |
af2dc6a7 | 4826 | UINT32 CF:1; ///< Carry Flag.\r |
4827 | UINT32 Reserved_0:1; ///< Reserved.\r | |
4828 | UINT32 PF:1; ///< Parity Flag.\r | |
4829 | UINT32 Reserved_1:1; ///< Reserved.\r | |
4830 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
4831 | UINT32 Reserved_2:1; ///< Reserved.\r | |
4832 | UINT32 ZF:1; ///< Zero Flag.\r | |
4833 | UINT32 SF:1; ///< Sign Flag.\r | |
4834 | UINT32 TF:1; ///< Trap Flag.\r | |
4835 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
4836 | UINT32 DF:1; ///< Direction Flag.\r | |
4837 | UINT32 OF:1; ///< Overflow Flag.\r | |
4838 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
4839 | UINT32 NT:1; ///< Nested Task.\r | |
4840 | UINT32 Reserved_3:1; ///< Reserved.\r | |
ac644614 | 4841 | } Bits;\r |
4842 | UINT16 Uint16;\r | |
4843 | } IA32_FLAGS16;\r | |
4844 | \r | |
1106ffe1 | 4845 | ///\r |
af2dc6a7 | 4846 | /// Byte packed structure for EFLAGS/RFLAGS.\r |
4847 | /// 32-bits on IA-32.\r | |
4848 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 4849 | ///\r |
ac644614 | 4850 | typedef union {\r |
4851 | struct {\r | |
af2dc6a7 | 4852 | UINT32 CF:1; ///< Carry Flag.\r |
4853 | UINT32 Reserved_0:1; ///< Reserved.\r | |
4854 | UINT32 PF:1; ///< Parity Flag.\r | |
4855 | UINT32 Reserved_1:1; ///< Reserved.\r | |
4856 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
4857 | UINT32 Reserved_2:1; ///< Reserved.\r | |
4858 | UINT32 ZF:1; ///< Zero Flag.\r | |
4859 | UINT32 SF:1; ///< Sign Flag.\r | |
4860 | UINT32 TF:1; ///< Trap Flag.\r | |
4861 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
4862 | UINT32 DF:1; ///< Direction Flag.\r | |
4863 | UINT32 OF:1; ///< Overflow Flag.\r | |
4864 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
4865 | UINT32 NT:1; ///< Nested Task.\r | |
4866 | UINT32 Reserved_3:1; ///< Reserved.\r | |
4867 | UINT32 RF:1; ///< Resume Flag.\r | |
4868 | UINT32 VM:1; ///< Virtual 8086 Mode.\r | |
4869 | UINT32 AC:1; ///< Alignment Check.\r | |
4870 | UINT32 VIF:1; ///< Virtual Interrupt Flag.\r | |
4871 | UINT32 VIP:1; ///< Virtual Interrupt Pending.\r | |
4872 | UINT32 ID:1; ///< ID Flag.\r | |
4873 | UINT32 Reserved_4:10; ///< Reserved.\r | |
ac644614 | 4874 | } Bits;\r |
4875 | UINTN UintN;\r | |
4876 | } IA32_EFLAGS32;\r | |
4877 | \r | |
1106ffe1 | 4878 | ///\r |
af2dc6a7 | 4879 | /// Byte packed structure for Control Register 0 (CR0).\r |
4880 | /// 32-bits on IA-32.\r | |
4881 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 4882 | ///\r |
ac644614 | 4883 | typedef union {\r |
4884 | struct {\r | |
af2dc6a7 | 4885 | UINT32 PE:1; ///< Protection Enable.\r |
4886 | UINT32 MP:1; ///< Monitor Coprocessor.\r | |
4887 | UINT32 EM:1; ///< Emulation.\r | |
4888 | UINT32 TS:1; ///< Task Switched.\r | |
4889 | UINT32 ET:1; ///< Extension Type.\r | |
4890 | UINT32 NE:1; ///< Numeric Error.\r | |
4891 | UINT32 Reserved_0:10; ///< Reserved.\r | |
4892 | UINT32 WP:1; ///< Write Protect.\r | |
4893 | UINT32 Reserved_1:1; ///< Reserved.\r | |
4894 | UINT32 AM:1; ///< Alignment Mask.\r | |
4895 | UINT32 Reserved_2:10; ///< Reserved.\r | |
4896 | UINT32 NW:1; ///< Mot Write-through.\r | |
4897 | UINT32 CD:1; ///< Cache Disable.\r | |
4898 | UINT32 PG:1; ///< Paging.\r | |
ac644614 | 4899 | } Bits;\r |
4900 | UINTN UintN;\r | |
4901 | } IA32_CR0;\r | |
4902 | \r | |
1106ffe1 | 4903 | ///\r |
af2dc6a7 | 4904 | /// Byte packed structure for Control Register 4 (CR4).\r |
4905 | /// 32-bits on IA-32.\r | |
4906 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 4907 | ///\r |
ac644614 | 4908 | typedef union {\r |
4909 | struct {\r | |
af2dc6a7 | 4910 | UINT32 VME:1; ///< Virtual-8086 Mode Extensions.\r |
4911 | UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.\r | |
4912 | UINT32 TSD:1; ///< Time Stamp Disable.\r | |
4913 | UINT32 DE:1; ///< Debugging Extensions.\r | |
4914 | UINT32 PSE:1; ///< Page Size Extensions.\r | |
4915 | UINT32 PAE:1; ///< Physical Address Extension.\r | |
4916 | UINT32 MCE:1; ///< Machine Check Enable.\r | |
4917 | UINT32 PGE:1; ///< Page Global Enable.\r | |
2a53dabf | 4918 | UINT32 PCE:1; ///< Performance Monitoring Counter\r |
af2dc6a7 | 4919 | ///< Enable.\r |
2a53dabf LG |
4920 | UINT32 OSFXSR:1; ///< Operating System Support for\r |
4921 | ///< FXSAVE and FXRSTOR instructions\r | |
4922 | UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r | |
4923 | ///< Unmasked SIMD Floating Point\r | |
af2dc6a7 | 4924 | ///< Exceptions.\r |
4925 | UINT32 Reserved_0:2; ///< Reserved.\r | |
2a53dabf | 4926 | UINT32 VMXE:1; ///< VMX Enable\r |
af2dc6a7 | 4927 | UINT32 Reserved_1:18; ///< Reserved.\r |
ac644614 | 4928 | } Bits;\r |
4929 | UINTN UintN;\r | |
4930 | } IA32_CR4;\r | |
4931 | \r | |
1106ffe1 | 4932 | ///\r |
af2dc6a7 | 4933 | /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.\r |
1106ffe1 | 4934 | ///\r |
ac644614 | 4935 | #pragma pack (1)\r |
4936 | typedef struct {\r | |
4937 | UINT16 Limit;\r | |
4938 | UINTN Base;\r | |
4939 | } IA32_DESCRIPTOR;\r | |
4940 | #pragma pack ()\r | |
4941 | \r | |
4942 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
4943 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
4944 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
4945 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
4946 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
4947 | \r | |
6f4aad3b | 4948 | \r |
4949 | #if defined (MDE_CPU_IA32)\r | |
1106ffe1 | 4950 | ///\r |
af2dc6a7 | 4951 | /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.\r |
1106ffe1 | 4952 | ///\r |
dc317713 | 4953 | typedef union {\r |
4954 | struct {\r | |
af2dc6a7 | 4955 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
4956 | UINT32 Selector:16; ///< Selector.\r | |
4957 | UINT32 Reserved_0:8; ///< Reserved.\r | |
4958 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
4959 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
dc317713 | 4960 | } Bits;\r |
4961 | UINT64 Uint64;\r | |
4962 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
4963 | \r | |
4964 | #endif\r | |
4965 | \r | |
4966 | #if defined (MDE_CPU_X64)\r | |
6f4aad3b | 4967 | ///\r |
af2dc6a7 | 4968 | /// Byte packed structure for an x64 Interrupt Gate Descriptor.\r |
6f4aad3b | 4969 | ///\r |
ac644614 | 4970 | typedef union {\r |
4971 | struct {\r | |
af2dc6a7 | 4972 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
4973 | UINT32 Selector:16; ///< Selector.\r | |
4974 | UINT32 Reserved_0:8; ///< Reserved.\r | |
4975 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
4976 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
4977 | UINT32 OffsetUpper:32; ///< Offset bits 63..32.\r | |
4978 | UINT32 Reserved_1:32; ///< Reserved.\r | |
ac644614 | 4979 | } Bits;\r |
6f4aad3b | 4980 | struct {\r |
4981 | UINT64 Uint64;\r | |
4982 | UINT64 Uint64_1;\r | |
4983 | } Uint128; \r | |
ac644614 | 4984 | } IA32_IDT_GATE_DESCRIPTOR;\r |
4985 | \r | |
dc317713 | 4986 | #endif\r |
4987 | \r | |
1106ffe1 | 4988 | ///\r |
af2dc6a7 | 4989 | /// Byte packed structure for an FP/SSE/SSE2 context.\r |
1106ffe1 | 4990 | ///\r |
ac644614 | 4991 | typedef struct {\r |
4992 | UINT8 Buffer[512];\r | |
4993 | } IA32_FX_BUFFER;\r | |
4994 | \r | |
1106ffe1 | 4995 | ///\r |
af2dc6a7 | 4996 | /// Structures for the 16-bit real mode thunks.\r |
1106ffe1 | 4997 | ///\r |
ac644614 | 4998 | typedef struct {\r |
4999 | UINT32 Reserved1;\r | |
5000 | UINT32 Reserved2;\r | |
5001 | UINT32 Reserved3;\r | |
5002 | UINT32 Reserved4;\r | |
5003 | UINT8 BL;\r | |
5004 | UINT8 BH;\r | |
5005 | UINT16 Reserved5;\r | |
5006 | UINT8 DL;\r | |
5007 | UINT8 DH;\r | |
5008 | UINT16 Reserved6;\r | |
5009 | UINT8 CL;\r | |
5010 | UINT8 CH;\r | |
5011 | UINT16 Reserved7;\r | |
5012 | UINT8 AL;\r | |
5013 | UINT8 AH;\r | |
5014 | UINT16 Reserved8;\r | |
5015 | } IA32_BYTE_REGS;\r | |
5016 | \r | |
5017 | typedef struct {\r | |
5018 | UINT16 DI;\r | |
5019 | UINT16 Reserved1;\r | |
5020 | UINT16 SI;\r | |
5021 | UINT16 Reserved2;\r | |
5022 | UINT16 BP;\r | |
5023 | UINT16 Reserved3;\r | |
5024 | UINT16 SP;\r | |
5025 | UINT16 Reserved4;\r | |
5026 | UINT16 BX;\r | |
5027 | UINT16 Reserved5;\r | |
5028 | UINT16 DX;\r | |
5029 | UINT16 Reserved6;\r | |
5030 | UINT16 CX;\r | |
5031 | UINT16 Reserved7;\r | |
5032 | UINT16 AX;\r | |
5033 | UINT16 Reserved8;\r | |
5034 | } IA32_WORD_REGS;\r | |
5035 | \r | |
5036 | typedef struct {\r | |
5037 | UINT32 EDI;\r | |
5038 | UINT32 ESI;\r | |
5039 | UINT32 EBP;\r | |
5040 | UINT32 ESP;\r | |
5041 | UINT32 EBX;\r | |
5042 | UINT32 EDX;\r | |
5043 | UINT32 ECX;\r | |
5044 | UINT32 EAX;\r | |
5045 | UINT16 DS;\r | |
5046 | UINT16 ES;\r | |
5047 | UINT16 FS;\r | |
5048 | UINT16 GS;\r | |
5049 | IA32_EFLAGS32 EFLAGS;\r | |
5050 | UINT32 Eip;\r | |
5051 | UINT16 CS;\r | |
5052 | UINT16 SS;\r | |
5053 | } IA32_DWORD_REGS;\r | |
5054 | \r | |
5055 | typedef union {\r | |
5056 | IA32_DWORD_REGS E;\r | |
5057 | IA32_WORD_REGS X;\r | |
5058 | IA32_BYTE_REGS H;\r | |
5059 | } IA32_REGISTER_SET;\r | |
5060 | \r | |
1106ffe1 | 5061 | ///\r |
af2dc6a7 | 5062 | /// Byte packed structure for an 16-bit real mode thunks.\r |
1106ffe1 | 5063 | ///\r |
ac644614 | 5064 | typedef struct {\r |
5065 | IA32_REGISTER_SET *RealModeState;\r | |
5066 | VOID *RealModeBuffer;\r | |
5067 | UINT32 RealModeBufferSize;\r | |
5068 | UINT32 ThunkAttributes;\r | |
5069 | } THUNK_CONTEXT;\r | |
5070 | \r | |
5071 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
5072 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
5073 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
5074 | \r | |
5075 | /**\r | |
5076 | Retrieves CPUID information.\r | |
5077 | \r | |
5078 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
5079 | This function always returns Index.\r | |
5080 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5081 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5082 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5083 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
030cd1a2 | 5084 | This function is only available on IA-32 and x64.\r |
ac644614 | 5085 | \r |
5086 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
5087 | instruction.\r | |
af2dc6a7 | 5088 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5089 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5090 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5091 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5092 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5093 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5094 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5095 | instruction. This is an optional parameter that may be NULL.\r |
5096 | \r | |
2fe241a2 | 5097 | @return Index.\r |
ac644614 | 5098 | \r |
5099 | **/\r | |
5100 | UINT32\r | |
5101 | EFIAPI\r | |
5102 | AsmCpuid (\r | |
5103 | IN UINT32 Index,\r | |
5104 | OUT UINT32 *Eax, OPTIONAL\r | |
5105 | OUT UINT32 *Ebx, OPTIONAL\r | |
5106 | OUT UINT32 *Ecx, OPTIONAL\r | |
5107 | OUT UINT32 *Edx OPTIONAL\r | |
5108 | );\r | |
5109 | \r | |
5110 | \r | |
5111 | /**\r | |
5112 | Retrieves CPUID information using an extended leaf identifier.\r | |
5113 | \r | |
5114 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
5115 | and ECX set to the value specified by SubIndex. This function always returns\r | |
5116 | Index. This function is only available on IA-32 and x64.\r | |
5117 | \r | |
5118 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5119 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5120 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5121 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5122 | \r | |
5123 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
5124 | CPUID instruction.\r | |
5125 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
5126 | CPUID instruction.\r | |
af2dc6a7 | 5127 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5128 | instruction. This is an optional parameter that may be\r |
5129 | NULL.\r | |
af2dc6a7 | 5130 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5131 | instruction. This is an optional parameter that may be\r |
5132 | NULL.\r | |
af2dc6a7 | 5133 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5134 | instruction. This is an optional parameter that may be\r |
5135 | NULL.\r | |
af2dc6a7 | 5136 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5137 | instruction. This is an optional parameter that may be\r |
5138 | NULL.\r | |
5139 | \r | |
2fe241a2 | 5140 | @return Index.\r |
ac644614 | 5141 | \r |
5142 | **/\r | |
5143 | UINT32\r | |
5144 | EFIAPI\r | |
5145 | AsmCpuidEx (\r | |
5146 | IN UINT32 Index,\r | |
5147 | IN UINT32 SubIndex,\r | |
5148 | OUT UINT32 *Eax, OPTIONAL\r | |
5149 | OUT UINT32 *Ebx, OPTIONAL\r | |
5150 | OUT UINT32 *Ecx, OPTIONAL\r | |
5151 | OUT UINT32 *Edx OPTIONAL\r | |
5152 | );\r | |
5153 | \r | |
5154 | \r | |
be5f1614 | 5155 | /**\r |
5156 | Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r | |
5157 | \r | |
5158 | Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r | |
5159 | and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r | |
5160 | \r | |
5161 | **/\r | |
5162 | VOID\r | |
5163 | EFIAPI\r | |
5164 | AsmDisableCache (\r | |
5165 | VOID\r | |
5166 | );\r | |
5167 | \r | |
5168 | \r | |
5169 | /**\r | |
5170 | Perform a WBINVD and clear both the CD and NW bits of CR0.\r | |
5171 | \r | |
5172 | Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r | |
5173 | bits of CR0 to 0. This function is only available on IA-32 and x64.\r | |
5174 | \r | |
5175 | **/\r | |
5176 | VOID\r | |
5177 | EFIAPI\r | |
5178 | AsmEnableCache (\r | |
5179 | VOID\r | |
5180 | );\r | |
5181 | \r | |
5182 | \r | |
ac644614 | 5183 | /**\r |
5184 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
5185 | \r | |
5186 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
5187 | No parameter checking is performed on Index, and some Index values may cause\r | |
5188 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
5189 | caller must set up exception handlers to catch the exceptions. This function\r | |
030cd1a2 | 5190 | is only available on IA-32 and x64.\r |
ac644614 | 5191 | \r |
5192 | @param Index The 32-bit MSR index to read.\r | |
5193 | \r | |
5194 | @return The lower 32 bits of the MSR identified by Index.\r | |
5195 | \r | |
5196 | **/\r | |
5197 | UINT32\r | |
5198 | EFIAPI\r | |
5199 | AsmReadMsr32 (\r | |
5200 | IN UINT32 Index\r | |
5201 | );\r | |
5202 | \r | |
5203 | \r | |
5204 | /**\r | |
17f695ed | 5205 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
5206 | The upper 32-bits of the MSR are set to zero.\r | |
ac644614 | 5207 | \r |
5208 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
5209 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
5210 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
5211 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
5212 | that Index and Value are valid, or the caller must establish proper exception\r | |
030cd1a2 | 5213 | handlers. This function is only available on IA-32 and x64.\r |
ac644614 | 5214 | \r |
5215 | @param Index The 32-bit MSR index to write.\r | |
5216 | @param Value The 32-bit value to write to the MSR.\r | |
5217 | \r | |
5218 | @return Value\r | |
5219 | \r | |
5220 | **/\r | |
5221 | UINT32\r | |
5222 | EFIAPI\r | |
5223 | AsmWriteMsr32 (\r | |
5224 | IN UINT32 Index,\r | |
5225 | IN UINT32 Value\r | |
5226 | );\r | |
5227 | \r | |
5228 | \r | |
5229 | /**\r | |
62991af2 | 5230 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
ac644614 | 5231 | writes the result back to the 64-bit MSR.\r |
5232 | \r | |
62991af2 | 5233 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5234 | between the lower 32-bits of the read result and the value specified by\r |
5235 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
5236 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
5237 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
5238 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
5239 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5240 | IA-32 and x64.\r |
ac644614 | 5241 | \r |
5242 | @param Index The 32-bit MSR index to write.\r | |
5243 | @param OrData The value to OR with the read value from the MSR.\r | |
5244 | \r | |
5245 | @return The lower 32-bit value written to the MSR.\r | |
5246 | \r | |
5247 | **/\r | |
5248 | UINT32\r | |
5249 | EFIAPI\r | |
5250 | AsmMsrOr32 (\r | |
5251 | IN UINT32 Index,\r | |
5252 | IN UINT32 OrData\r | |
5253 | );\r | |
5254 | \r | |
5255 | \r | |
5256 | /**\r | |
5257 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
5258 | the result back to the 64-bit MSR.\r | |
5259 | \r | |
5260 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5261 | lower 32-bits of the read result and the value specified by AndData, and\r | |
5262 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
5263 | the value written to the MSR is returned. No parameter checking is performed\r | |
5264 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
5265 | must either guarantee that Index and AndData are valid, or the caller must\r | |
5266 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5267 | and x64.\r |
ac644614 | 5268 | \r |
5269 | @param Index The 32-bit MSR index to write.\r | |
5270 | @param AndData The value to AND with the read value from the MSR.\r | |
5271 | \r | |
5272 | @return The lower 32-bit value written to the MSR.\r | |
5273 | \r | |
5274 | **/\r | |
5275 | UINT32\r | |
5276 | EFIAPI\r | |
5277 | AsmMsrAnd32 (\r | |
5278 | IN UINT32 Index,\r | |
5279 | IN UINT32 AndData\r | |
5280 | );\r | |
5281 | \r | |
5282 | \r | |
5283 | /**\r | |
62991af2 | 5284 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
ac644614 | 5285 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
5286 | \r | |
5287 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5288 | lower 32-bits of the read result and the value specified by AndData\r | |
62991af2 | 5289 | preserving the upper 32-bits, performs a bitwise OR between the\r |
ac644614 | 5290 | result of the AND operation and the value specified by OrData, and writes the\r |
5291 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
5292 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
5293 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
5294 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
5295 | caller must establish proper exception handlers. This function is only\r | |
030cd1a2 | 5296 | available on IA-32 and x64.\r |
ac644614 | 5297 | \r |
5298 | @param Index The 32-bit MSR index to write.\r | |
5299 | @param AndData The value to AND with the read value from the MSR.\r | |
5300 | @param OrData The value to OR with the result of the AND operation.\r | |
5301 | \r | |
5302 | @return The lower 32-bit value written to the MSR.\r | |
5303 | \r | |
5304 | **/\r | |
5305 | UINT32\r | |
5306 | EFIAPI\r | |
5307 | AsmMsrAndThenOr32 (\r | |
5308 | IN UINT32 Index,\r | |
5309 | IN UINT32 AndData,\r | |
5310 | IN UINT32 OrData\r | |
5311 | );\r | |
5312 | \r | |
5313 | \r | |
5314 | /**\r | |
5315 | Reads a bit field of an MSR.\r | |
5316 | \r | |
5317 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
5318 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
5319 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
5320 | must set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5321 | available on IA-32 and x64.\r |
ac644614 | 5322 | \r |
5323 | If StartBit is greater than 31, then ASSERT().\r | |
5324 | If EndBit is greater than 31, then ASSERT().\r | |
5325 | If EndBit is less than StartBit, then ASSERT().\r | |
5326 | \r | |
5327 | @param Index The 32-bit MSR index to read.\r | |
5328 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5329 | Range 0..31.\r | |
5330 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5331 | Range 0..31.\r | |
5332 | \r | |
5333 | @return The bit field read from the MSR.\r | |
5334 | \r | |
5335 | **/\r | |
5336 | UINT32\r | |
5337 | EFIAPI\r | |
5338 | AsmMsrBitFieldRead32 (\r | |
5339 | IN UINT32 Index,\r | |
5340 | IN UINTN StartBit,\r | |
5341 | IN UINTN EndBit\r | |
5342 | );\r | |
5343 | \r | |
5344 | \r | |
5345 | /**\r | |
5346 | Writes a bit field to an MSR.\r | |
5347 | \r | |
2fe241a2 | 5348 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
ac644614 | 5349 | field is specified by the StartBit and the EndBit. All other bits in the\r |
5350 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
62991af2 | 5351 | returned. The caller must either guarantee that Index and the data written \r |
5352 | is valid, or the caller must set up exception handlers to catch the exceptions. \r | |
5353 | This function is only available on IA-32 and x64.\r | |
ac644614 | 5354 | \r |
5355 | If StartBit is greater than 31, then ASSERT().\r | |
5356 | If EndBit is greater than 31, then ASSERT().\r | |
5357 | If EndBit is less than StartBit, then ASSERT().\r | |
5358 | \r | |
5359 | @param Index The 32-bit MSR index to write.\r | |
5360 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5361 | Range 0..31.\r | |
5362 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5363 | Range 0..31.\r | |
5364 | @param Value New value of the bit field.\r | |
5365 | \r | |
5366 | @return The lower 32-bit of the value written to the MSR.\r | |
5367 | \r | |
5368 | **/\r | |
5369 | UINT32\r | |
5370 | EFIAPI\r | |
5371 | AsmMsrBitFieldWrite32 (\r | |
5372 | IN UINT32 Index,\r | |
5373 | IN UINTN StartBit,\r | |
5374 | IN UINTN EndBit,\r | |
5375 | IN UINT32 Value\r | |
5376 | );\r | |
5377 | \r | |
5378 | \r | |
5379 | /**\r | |
5380 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
5381 | result back to the bit field in the 64-bit MSR.\r | |
5382 | \r | |
62991af2 | 5383 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5384 | between the read result and the value specified by OrData, and writes the\r |
5385 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
5386 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
5387 | caller must either guarantee that Index and the data written is valid, or\r | |
5388 | the caller must set up exception handlers to catch the exceptions. This\r | |
030cd1a2 | 5389 | function is only available on IA-32 and x64.\r |
ac644614 | 5390 | \r |
5391 | If StartBit is greater than 31, then ASSERT().\r | |
5392 | If EndBit is greater than 31, then ASSERT().\r | |
5393 | If EndBit is less than StartBit, then ASSERT().\r | |
5394 | \r | |
5395 | @param Index The 32-bit MSR index to write.\r | |
5396 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5397 | Range 0..31.\r | |
5398 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5399 | Range 0..31.\r | |
5400 | @param OrData The value to OR with the read value from the MSR.\r | |
5401 | \r | |
5402 | @return The lower 32-bit of the value written to the MSR.\r | |
5403 | \r | |
5404 | **/\r | |
5405 | UINT32\r | |
5406 | EFIAPI\r | |
5407 | AsmMsrBitFieldOr32 (\r | |
5408 | IN UINT32 Index,\r | |
5409 | IN UINTN StartBit,\r | |
5410 | IN UINTN EndBit,\r | |
5411 | IN UINT32 OrData\r | |
5412 | );\r | |
5413 | \r | |
5414 | \r | |
5415 | /**\r | |
5416 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5417 | result back to the bit field in the 64-bit MSR.\r | |
5418 | \r | |
5419 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5420 | read result and the value specified by AndData, and writes the result to the\r | |
5421 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
5422 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
5423 | either guarantee that Index and the data written is valid, or the caller must\r | |
5424 | set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5425 | available on IA-32 and x64.\r |
ac644614 | 5426 | \r |
5427 | If StartBit is greater than 31, then ASSERT().\r | |
5428 | If EndBit is greater than 31, then ASSERT().\r | |
5429 | If EndBit is less than StartBit, then ASSERT().\r | |
5430 | \r | |
5431 | @param Index The 32-bit MSR index to write.\r | |
5432 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5433 | Range 0..31.\r | |
5434 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5435 | Range 0..31.\r | |
5436 | @param AndData The value to AND with the read value from the MSR.\r | |
5437 | \r | |
5438 | @return The lower 32-bit of the value written to the MSR.\r | |
5439 | \r | |
5440 | **/\r | |
5441 | UINT32\r | |
5442 | EFIAPI\r | |
5443 | AsmMsrBitFieldAnd32 (\r | |
5444 | IN UINT32 Index,\r | |
5445 | IN UINTN StartBit,\r | |
5446 | IN UINTN EndBit,\r | |
5447 | IN UINT32 AndData\r | |
5448 | );\r | |
5449 | \r | |
5450 | \r | |
5451 | /**\r | |
5452 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5453 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5454 | 64-bit MSR.\r |
5455 | \r | |
5456 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
62991af2 | 5457 | bitwise OR between the read result and the value specified by\r |
ac644614 | 5458 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5459 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
5460 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
5461 | that Index and the data written is valid, or the caller must set up exception\r | |
5462 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5463 | and x64.\r |
ac644614 | 5464 | \r |
5465 | If StartBit is greater than 31, then ASSERT().\r | |
5466 | If EndBit is greater than 31, then ASSERT().\r | |
5467 | If EndBit is less than StartBit, then ASSERT().\r | |
5468 | \r | |
5469 | @param Index The 32-bit MSR index to write.\r | |
5470 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5471 | Range 0..31.\r | |
5472 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5473 | Range 0..31.\r | |
5474 | @param AndData The value to AND with the read value from the MSR.\r | |
5475 | @param OrData The value to OR with the result of the AND operation.\r | |
5476 | \r | |
5477 | @return The lower 32-bit of the value written to the MSR.\r | |
5478 | \r | |
5479 | **/\r | |
5480 | UINT32\r | |
5481 | EFIAPI\r | |
5482 | AsmMsrBitFieldAndThenOr32 (\r | |
5483 | IN UINT32 Index,\r | |
5484 | IN UINTN StartBit,\r | |
5485 | IN UINTN EndBit,\r | |
5486 | IN UINT32 AndData,\r | |
5487 | IN UINT32 OrData\r | |
5488 | );\r | |
5489 | \r | |
5490 | \r | |
5491 | /**\r | |
5492 | Returns a 64-bit Machine Specific Register(MSR).\r | |
5493 | \r | |
5494 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
5495 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
5496 | caller must either guarantee that Index is valid, or the caller must set up\r | |
5497 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5498 | on IA-32 and x64.\r |
ac644614 | 5499 | \r |
5500 | @param Index The 32-bit MSR index to read.\r | |
5501 | \r | |
5502 | @return The value of the MSR identified by Index.\r | |
5503 | \r | |
5504 | **/\r | |
5505 | UINT64\r | |
5506 | EFIAPI\r | |
5507 | AsmReadMsr64 (\r | |
5508 | IN UINT32 Index\r | |
5509 | );\r | |
5510 | \r | |
5511 | \r | |
5512 | /**\r | |
5513 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
5514 | value.\r | |
5515 | \r | |
5516 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
5517 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
5518 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
5519 | caller must either guarantee that Index and Value are valid, or the caller\r | |
5520 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5521 | IA-32 and x64.\r |
ac644614 | 5522 | \r |
5523 | @param Index The 32-bit MSR index to write.\r | |
5524 | @param Value The 64-bit value to write to the MSR.\r | |
5525 | \r | |
5526 | @return Value\r | |
5527 | \r | |
5528 | **/\r | |
5529 | UINT64\r | |
5530 | EFIAPI\r | |
5531 | AsmWriteMsr64 (\r | |
5532 | IN UINT32 Index,\r | |
5533 | IN UINT64 Value\r | |
5534 | );\r | |
5535 | \r | |
5536 | \r | |
5537 | /**\r | |
62991af2 | 5538 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
ac644614 | 5539 | back to the 64-bit MSR.\r |
5540 | \r | |
62991af2 | 5541 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5542 | between the read result and the value specified by OrData, and writes the\r |
5543 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5544 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
5545 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
5546 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
030cd1a2 | 5547 | This function is only available on IA-32 and x64.\r |
ac644614 | 5548 | \r |
5549 | @param Index The 32-bit MSR index to write.\r | |
5550 | @param OrData The value to OR with the read value from the MSR.\r | |
5551 | \r | |
5552 | @return The value written back to the MSR.\r | |
5553 | \r | |
5554 | **/\r | |
5555 | UINT64\r | |
5556 | EFIAPI\r | |
5557 | AsmMsrOr64 (\r | |
5558 | IN UINT32 Index,\r | |
5559 | IN UINT64 OrData\r | |
5560 | );\r | |
5561 | \r | |
5562 | \r | |
5563 | /**\r | |
5564 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
5565 | 64-bit MSR.\r | |
5566 | \r | |
5567 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5568 | read result and the value specified by OrData, and writes the result to the\r | |
5569 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
5570 | parameter checking is performed on Index or OrData, and some of these may\r | |
5571 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
5572 | are valid, or the caller must establish proper exception handlers. This\r | |
030cd1a2 | 5573 | function is only available on IA-32 and x64.\r |
ac644614 | 5574 | \r |
5575 | @param Index The 32-bit MSR index to write.\r | |
5576 | @param AndData The value to AND with the read value from the MSR.\r | |
5577 | \r | |
5578 | @return The value written back to the MSR.\r | |
5579 | \r | |
5580 | **/\r | |
5581 | UINT64\r | |
5582 | EFIAPI\r | |
5583 | AsmMsrAnd64 (\r | |
5584 | IN UINT32 Index,\r | |
5585 | IN UINT64 AndData\r | |
5586 | );\r | |
5587 | \r | |
5588 | \r | |
5589 | /**\r | |
62991af2 | 5590 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r |
ac644614 | 5591 | OR, and writes the result back to the 64-bit MSR.\r |
5592 | \r | |
5593 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
62991af2 | 5594 | result and the value specified by AndData, performs a bitwise OR\r |
ac644614 | 5595 | between the result of the AND operation and the value specified by OrData,\r |
5596 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
5597 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
5598 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
5599 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
5600 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5601 | and x64.\r |
ac644614 | 5602 | \r |
5603 | @param Index The 32-bit MSR index to write.\r | |
5604 | @param AndData The value to AND with the read value from the MSR.\r | |
5605 | @param OrData The value to OR with the result of the AND operation.\r | |
5606 | \r | |
5607 | @return The value written back to the MSR.\r | |
5608 | \r | |
5609 | **/\r | |
5610 | UINT64\r | |
5611 | EFIAPI\r | |
5612 | AsmMsrAndThenOr64 (\r | |
5613 | IN UINT32 Index,\r | |
5614 | IN UINT64 AndData,\r | |
5615 | IN UINT64 OrData\r | |
5616 | );\r | |
5617 | \r | |
5618 | \r | |
5619 | /**\r | |
5620 | Reads a bit field of an MSR.\r | |
5621 | \r | |
5622 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
5623 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
5624 | must either guarantee that Index is valid, or the caller must set up\r | |
5625 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5626 | on IA-32 and x64.\r |
ac644614 | 5627 | \r |
5628 | If StartBit is greater than 63, then ASSERT().\r | |
5629 | If EndBit is greater than 63, then ASSERT().\r | |
5630 | If EndBit is less than StartBit, then ASSERT().\r | |
5631 | \r | |
5632 | @param Index The 32-bit MSR index to read.\r | |
5633 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5634 | Range 0..63.\r | |
5635 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5636 | Range 0..63.\r | |
5637 | \r | |
5638 | @return The value read from the MSR.\r | |
5639 | \r | |
5640 | **/\r | |
5641 | UINT64\r | |
5642 | EFIAPI\r | |
5643 | AsmMsrBitFieldRead64 (\r | |
5644 | IN UINT32 Index,\r | |
5645 | IN UINTN StartBit,\r | |
5646 | IN UINTN EndBit\r | |
5647 | );\r | |
5648 | \r | |
5649 | \r | |
5650 | /**\r | |
5651 | Writes a bit field to an MSR.\r | |
5652 | \r | |
5653 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
5654 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
62991af2 | 5655 | preserved. The MSR written is returned. The caller must either guarantee \r |
5656 | that Index and the data written is valid, or the caller must set up exception \r | |
5657 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r | |
ac644614 | 5658 | \r |
5659 | If StartBit is greater than 63, then ASSERT().\r | |
5660 | If EndBit is greater than 63, then ASSERT().\r | |
5661 | If EndBit is less than StartBit, then ASSERT().\r | |
5662 | \r | |
5663 | @param Index The 32-bit MSR index to write.\r | |
5664 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5665 | Range 0..63.\r | |
5666 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5667 | Range 0..63.\r | |
5668 | @param Value New value of the bit field.\r | |
5669 | \r | |
5670 | @return The value written back to the MSR.\r | |
5671 | \r | |
5672 | **/\r | |
5673 | UINT64\r | |
5674 | EFIAPI\r | |
5675 | AsmMsrBitFieldWrite64 (\r | |
5676 | IN UINT32 Index,\r | |
5677 | IN UINTN StartBit,\r | |
5678 | IN UINTN EndBit,\r | |
5679 | IN UINT64 Value\r | |
5680 | );\r | |
5681 | \r | |
5682 | \r | |
5683 | /**\r | |
62991af2 | 5684 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
ac644614 | 5685 | writes the result back to the bit field in the 64-bit MSR.\r |
5686 | \r | |
62991af2 | 5687 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5688 | between the read result and the value specified by OrData, and writes the\r |
5689 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5690 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
5691 | guarantee that Index and the data written is valid, or the caller must set up\r | |
5692 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5693 | on IA-32 and x64.\r |
ac644614 | 5694 | \r |
5695 | If StartBit is greater than 63, then ASSERT().\r | |
5696 | If EndBit is greater than 63, then ASSERT().\r | |
5697 | If EndBit is less than StartBit, then ASSERT().\r | |
5698 | \r | |
5699 | @param Index The 32-bit MSR index to write.\r | |
5700 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5701 | Range 0..63.\r | |
5702 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5703 | Range 0..63.\r | |
5704 | @param OrData The value to OR with the read value from the bit field.\r | |
5705 | \r | |
5706 | @return The value written back to the MSR.\r | |
5707 | \r | |
5708 | **/\r | |
5709 | UINT64\r | |
5710 | EFIAPI\r | |
5711 | AsmMsrBitFieldOr64 (\r | |
5712 | IN UINT32 Index,\r | |
5713 | IN UINTN StartBit,\r | |
5714 | IN UINTN EndBit,\r | |
5715 | IN UINT64 OrData\r | |
5716 | );\r | |
5717 | \r | |
5718 | \r | |
5719 | /**\r | |
5720 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5721 | result back to the bit field in the 64-bit MSR.\r | |
5722 | \r | |
5723 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5724 | read result and the value specified by AndData, and writes the result to the\r | |
5725 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
5726 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
5727 | that Index and the data written is valid, or the caller must set up exception\r | |
5728 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5729 | and x64.\r |
ac644614 | 5730 | \r |
5731 | If StartBit is greater than 63, then ASSERT().\r | |
5732 | If EndBit is greater than 63, then ASSERT().\r | |
5733 | If EndBit is less than StartBit, then ASSERT().\r | |
5734 | \r | |
5735 | @param Index The 32-bit MSR index to write.\r | |
5736 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5737 | Range 0..63.\r | |
5738 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5739 | Range 0..63.\r | |
5740 | @param AndData The value to AND with the read value from the bit field.\r | |
5741 | \r | |
5742 | @return The value written back to the MSR.\r | |
5743 | \r | |
5744 | **/\r | |
5745 | UINT64\r | |
5746 | EFIAPI\r | |
5747 | AsmMsrBitFieldAnd64 (\r | |
5748 | IN UINT32 Index,\r | |
5749 | IN UINTN StartBit,\r | |
5750 | IN UINTN EndBit,\r | |
5751 | IN UINT64 AndData\r | |
5752 | );\r | |
5753 | \r | |
5754 | \r | |
5755 | /**\r | |
5756 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5757 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5758 | 64-bit MSR.\r |
5759 | \r | |
5760 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
62991af2 | 5761 | a bitwise OR between the read result and the value specified by\r |
ac644614 | 5762 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5763 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
5764 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
5765 | written is valid, or the caller must set up exception handlers to catch the\r | |
030cd1a2 | 5766 | exceptions. This function is only available on IA-32 and x64.\r |
ac644614 | 5767 | \r |
5768 | If StartBit is greater than 63, then ASSERT().\r | |
5769 | If EndBit is greater than 63, then ASSERT().\r | |
5770 | If EndBit is less than StartBit, then ASSERT().\r | |
5771 | \r | |
5772 | @param Index The 32-bit MSR index to write.\r | |
5773 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5774 | Range 0..63.\r | |
5775 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5776 | Range 0..63.\r | |
5777 | @param AndData The value to AND with the read value from the bit field.\r | |
5778 | @param OrData The value to OR with the result of the AND operation.\r | |
5779 | \r | |
5780 | @return The value written back to the MSR.\r | |
5781 | \r | |
5782 | **/\r | |
5783 | UINT64\r | |
5784 | EFIAPI\r | |
5785 | AsmMsrBitFieldAndThenOr64 (\r | |
5786 | IN UINT32 Index,\r | |
5787 | IN UINTN StartBit,\r | |
5788 | IN UINTN EndBit,\r | |
5789 | IN UINT64 AndData,\r | |
5790 | IN UINT64 OrData\r | |
5791 | );\r | |
5792 | \r | |
5793 | \r | |
5794 | /**\r | |
5795 | Reads the current value of the EFLAGS register.\r | |
5796 | \r | |
5797 | Reads and returns the current value of the EFLAGS register. This function is\r | |
030cd1a2 | 5798 | only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r |
5799 | 64-bit value on x64.\r | |
ac644614 | 5800 | \r |
030cd1a2 | 5801 | @return EFLAGS on IA-32 or RFLAGS on x64.\r |
ac644614 | 5802 | \r |
5803 | **/\r | |
5804 | UINTN\r | |
5805 | EFIAPI\r | |
5806 | AsmReadEflags (\r | |
5807 | VOID\r | |
5808 | );\r | |
5809 | \r | |
5810 | \r | |
5811 | /**\r | |
5812 | Reads the current value of the Control Register 0 (CR0).\r | |
5813 | \r | |
5814 | Reads and returns the current value of CR0. This function is only available\r | |
030cd1a2 | 5815 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5816 | x64.\r | |
ac644614 | 5817 | \r |
5818 | @return The value of the Control Register 0 (CR0).\r | |
5819 | \r | |
5820 | **/\r | |
5821 | UINTN\r | |
5822 | EFIAPI\r | |
5823 | AsmReadCr0 (\r | |
5824 | VOID\r | |
5825 | );\r | |
5826 | \r | |
5827 | \r | |
5828 | /**\r | |
5829 | Reads the current value of the Control Register 2 (CR2).\r | |
5830 | \r | |
5831 | Reads and returns the current value of CR2. This function is only available\r | |
030cd1a2 | 5832 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5833 | x64.\r | |
ac644614 | 5834 | \r |
5835 | @return The value of the Control Register 2 (CR2).\r | |
5836 | \r | |
5837 | **/\r | |
5838 | UINTN\r | |
5839 | EFIAPI\r | |
5840 | AsmReadCr2 (\r | |
5841 | VOID\r | |
5842 | );\r | |
5843 | \r | |
5844 | \r | |
5845 | /**\r | |
5846 | Reads the current value of the Control Register 3 (CR3).\r | |
5847 | \r | |
5848 | Reads and returns the current value of CR3. This function is only available\r | |
030cd1a2 | 5849 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5850 | x64.\r | |
ac644614 | 5851 | \r |
5852 | @return The value of the Control Register 3 (CR3).\r | |
5853 | \r | |
5854 | **/\r | |
5855 | UINTN\r | |
5856 | EFIAPI\r | |
5857 | AsmReadCr3 (\r | |
5858 | VOID\r | |
5859 | );\r | |
5860 | \r | |
5861 | \r | |
5862 | /**\r | |
5863 | Reads the current value of the Control Register 4 (CR4).\r | |
5864 | \r | |
5865 | Reads and returns the current value of CR4. This function is only available\r | |
030cd1a2 | 5866 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5867 | x64.\r | |
ac644614 | 5868 | \r |
5869 | @return The value of the Control Register 4 (CR4).\r | |
5870 | \r | |
5871 | **/\r | |
5872 | UINTN\r | |
5873 | EFIAPI\r | |
5874 | AsmReadCr4 (\r | |
5875 | VOID\r | |
5876 | );\r | |
5877 | \r | |
5878 | \r | |
5879 | /**\r | |
5880 | Writes a value to Control Register 0 (CR0).\r | |
5881 | \r | |
5882 | Writes and returns a new value to CR0. This function is only available on\r | |
030cd1a2 | 5883 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5884 | \r |
5885 | @param Cr0 The value to write to CR0.\r | |
5886 | \r | |
5887 | @return The value written to CR0.\r | |
5888 | \r | |
5889 | **/\r | |
5890 | UINTN\r | |
5891 | EFIAPI\r | |
5892 | AsmWriteCr0 (\r | |
5893 | UINTN Cr0\r | |
5894 | );\r | |
5895 | \r | |
5896 | \r | |
5897 | /**\r | |
5898 | Writes a value to Control Register 2 (CR2).\r | |
5899 | \r | |
5900 | Writes and returns a new value to CR2. This function is only available on\r | |
030cd1a2 | 5901 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5902 | \r |
5903 | @param Cr2 The value to write to CR2.\r | |
5904 | \r | |
5905 | @return The value written to CR2.\r | |
5906 | \r | |
5907 | **/\r | |
5908 | UINTN\r | |
5909 | EFIAPI\r | |
5910 | AsmWriteCr2 (\r | |
5911 | UINTN Cr2\r | |
5912 | );\r | |
5913 | \r | |
5914 | \r | |
5915 | /**\r | |
5916 | Writes a value to Control Register 3 (CR3).\r | |
5917 | \r | |
5918 | Writes and returns a new value to CR3. This function is only available on\r | |
030cd1a2 | 5919 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5920 | \r |
5921 | @param Cr3 The value to write to CR3.\r | |
5922 | \r | |
5923 | @return The value written to CR3.\r | |
5924 | \r | |
5925 | **/\r | |
5926 | UINTN\r | |
5927 | EFIAPI\r | |
5928 | AsmWriteCr3 (\r | |
5929 | UINTN Cr3\r | |
5930 | );\r | |
5931 | \r | |
5932 | \r | |
5933 | /**\r | |
5934 | Writes a value to Control Register 4 (CR4).\r | |
5935 | \r | |
5936 | Writes and returns a new value to CR4. This function is only available on\r | |
030cd1a2 | 5937 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5938 | \r |
5939 | @param Cr4 The value to write to CR4.\r | |
5940 | \r | |
5941 | @return The value written to CR4.\r | |
5942 | \r | |
5943 | **/\r | |
5944 | UINTN\r | |
5945 | EFIAPI\r | |
5946 | AsmWriteCr4 (\r | |
5947 | UINTN Cr4\r | |
5948 | );\r | |
5949 | \r | |
5950 | \r | |
5951 | /**\r | |
5952 | Reads the current value of Debug Register 0 (DR0).\r | |
5953 | \r | |
5954 | Reads and returns the current value of DR0. This function is only available\r | |
030cd1a2 | 5955 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5956 | x64.\r | |
ac644614 | 5957 | \r |
5958 | @return The value of Debug Register 0 (DR0).\r | |
5959 | \r | |
5960 | **/\r | |
5961 | UINTN\r | |
5962 | EFIAPI\r | |
5963 | AsmReadDr0 (\r | |
5964 | VOID\r | |
5965 | );\r | |
5966 | \r | |
5967 | \r | |
5968 | /**\r | |
5969 | Reads the current value of Debug Register 1 (DR1).\r | |
5970 | \r | |
5971 | Reads and returns the current value of DR1. This function is only available\r | |
030cd1a2 | 5972 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5973 | x64.\r | |
ac644614 | 5974 | \r |
5975 | @return The value of Debug Register 1 (DR1).\r | |
5976 | \r | |
5977 | **/\r | |
5978 | UINTN\r | |
5979 | EFIAPI\r | |
5980 | AsmReadDr1 (\r | |
5981 | VOID\r | |
5982 | );\r | |
5983 | \r | |
5984 | \r | |
5985 | /**\r | |
5986 | Reads the current value of Debug Register 2 (DR2).\r | |
5987 | \r | |
5988 | Reads and returns the current value of DR2. This function is only available\r | |
030cd1a2 | 5989 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5990 | x64.\r | |
ac644614 | 5991 | \r |
5992 | @return The value of Debug Register 2 (DR2).\r | |
5993 | \r | |
5994 | **/\r | |
5995 | UINTN\r | |
5996 | EFIAPI\r | |
5997 | AsmReadDr2 (\r | |
5998 | VOID\r | |
5999 | );\r | |
6000 | \r | |
6001 | \r | |
6002 | /**\r | |
6003 | Reads the current value of Debug Register 3 (DR3).\r | |
6004 | \r | |
6005 | Reads and returns the current value of DR3. This function is only available\r | |
030cd1a2 | 6006 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6007 | x64.\r | |
ac644614 | 6008 | \r |
6009 | @return The value of Debug Register 3 (DR3).\r | |
6010 | \r | |
6011 | **/\r | |
6012 | UINTN\r | |
6013 | EFIAPI\r | |
6014 | AsmReadDr3 (\r | |
6015 | VOID\r | |
6016 | );\r | |
6017 | \r | |
6018 | \r | |
6019 | /**\r | |
6020 | Reads the current value of Debug Register 4 (DR4).\r | |
6021 | \r | |
6022 | Reads and returns the current value of DR4. This function is only available\r | |
030cd1a2 | 6023 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6024 | x64.\r | |
ac644614 | 6025 | \r |
6026 | @return The value of Debug Register 4 (DR4).\r | |
6027 | \r | |
6028 | **/\r | |
6029 | UINTN\r | |
6030 | EFIAPI\r | |
6031 | AsmReadDr4 (\r | |
6032 | VOID\r | |
6033 | );\r | |
6034 | \r | |
6035 | \r | |
6036 | /**\r | |
6037 | Reads the current value of Debug Register 5 (DR5).\r | |
6038 | \r | |
6039 | Reads and returns the current value of DR5. This function is only available\r | |
030cd1a2 | 6040 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6041 | x64.\r | |
ac644614 | 6042 | \r |
6043 | @return The value of Debug Register 5 (DR5).\r | |
6044 | \r | |
6045 | **/\r | |
6046 | UINTN\r | |
6047 | EFIAPI\r | |
6048 | AsmReadDr5 (\r | |
6049 | VOID\r | |
6050 | );\r | |
6051 | \r | |
6052 | \r | |
6053 | /**\r | |
6054 | Reads the current value of Debug Register 6 (DR6).\r | |
6055 | \r | |
6056 | Reads and returns the current value of DR6. This function is only available\r | |
030cd1a2 | 6057 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6058 | x64.\r | |
ac644614 | 6059 | \r |
6060 | @return The value of Debug Register 6 (DR6).\r | |
6061 | \r | |
6062 | **/\r | |
6063 | UINTN\r | |
6064 | EFIAPI\r | |
6065 | AsmReadDr6 (\r | |
6066 | VOID\r | |
6067 | );\r | |
6068 | \r | |
6069 | \r | |
6070 | /**\r | |
6071 | Reads the current value of Debug Register 7 (DR7).\r | |
6072 | \r | |
6073 | Reads and returns the current value of DR7. This function is only available\r | |
030cd1a2 | 6074 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6075 | x64.\r | |
ac644614 | 6076 | \r |
6077 | @return The value of Debug Register 7 (DR7).\r | |
6078 | \r | |
6079 | **/\r | |
6080 | UINTN\r | |
6081 | EFIAPI\r | |
6082 | AsmReadDr7 (\r | |
6083 | VOID\r | |
6084 | );\r | |
6085 | \r | |
6086 | \r | |
6087 | /**\r | |
6088 | Writes a value to Debug Register 0 (DR0).\r | |
6089 | \r | |
6090 | Writes and returns a new value to DR0. This function is only available on\r | |
030cd1a2 | 6091 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6092 | \r |
6093 | @param Dr0 The value to write to Dr0.\r | |
6094 | \r | |
6095 | @return The value written to Debug Register 0 (DR0).\r | |
6096 | \r | |
6097 | **/\r | |
6098 | UINTN\r | |
6099 | EFIAPI\r | |
6100 | AsmWriteDr0 (\r | |
6101 | UINTN Dr0\r | |
6102 | );\r | |
6103 | \r | |
6104 | \r | |
6105 | /**\r | |
6106 | Writes a value to Debug Register 1 (DR1).\r | |
6107 | \r | |
6108 | Writes and returns a new value to DR1. This function is only available on\r | |
030cd1a2 | 6109 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6110 | \r |
6111 | @param Dr1 The value to write to Dr1.\r | |
6112 | \r | |
6113 | @return The value written to Debug Register 1 (DR1).\r | |
6114 | \r | |
6115 | **/\r | |
6116 | UINTN\r | |
6117 | EFIAPI\r | |
6118 | AsmWriteDr1 (\r | |
6119 | UINTN Dr1\r | |
6120 | );\r | |
6121 | \r | |
6122 | \r | |
6123 | /**\r | |
6124 | Writes a value to Debug Register 2 (DR2).\r | |
6125 | \r | |
6126 | Writes and returns a new value to DR2. This function is only available on\r | |
030cd1a2 | 6127 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6128 | \r |
6129 | @param Dr2 The value to write to Dr2.\r | |
6130 | \r | |
6131 | @return The value written to Debug Register 2 (DR2).\r | |
6132 | \r | |
6133 | **/\r | |
6134 | UINTN\r | |
6135 | EFIAPI\r | |
6136 | AsmWriteDr2 (\r | |
6137 | UINTN Dr2\r | |
6138 | );\r | |
6139 | \r | |
6140 | \r | |
6141 | /**\r | |
6142 | Writes a value to Debug Register 3 (DR3).\r | |
6143 | \r | |
6144 | Writes and returns a new value to DR3. This function is only available on\r | |
030cd1a2 | 6145 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6146 | \r |
6147 | @param Dr3 The value to write to Dr3.\r | |
6148 | \r | |
6149 | @return The value written to Debug Register 3 (DR3).\r | |
6150 | \r | |
6151 | **/\r | |
6152 | UINTN\r | |
6153 | EFIAPI\r | |
6154 | AsmWriteDr3 (\r | |
6155 | UINTN Dr3\r | |
6156 | );\r | |
6157 | \r | |
6158 | \r | |
6159 | /**\r | |
6160 | Writes a value to Debug Register 4 (DR4).\r | |
6161 | \r | |
6162 | Writes and returns a new value to DR4. This function is only available on\r | |
030cd1a2 | 6163 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6164 | \r |
6165 | @param Dr4 The value to write to Dr4.\r | |
6166 | \r | |
6167 | @return The value written to Debug Register 4 (DR4).\r | |
6168 | \r | |
6169 | **/\r | |
6170 | UINTN\r | |
6171 | EFIAPI\r | |
6172 | AsmWriteDr4 (\r | |
6173 | UINTN Dr4\r | |
6174 | );\r | |
6175 | \r | |
6176 | \r | |
6177 | /**\r | |
6178 | Writes a value to Debug Register 5 (DR5).\r | |
6179 | \r | |
6180 | Writes and returns a new value to DR5. This function is only available on\r | |
030cd1a2 | 6181 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6182 | \r |
6183 | @param Dr5 The value to write to Dr5.\r | |
6184 | \r | |
6185 | @return The value written to Debug Register 5 (DR5).\r | |
6186 | \r | |
6187 | **/\r | |
6188 | UINTN\r | |
6189 | EFIAPI\r | |
6190 | AsmWriteDr5 (\r | |
6191 | UINTN Dr5\r | |
6192 | );\r | |
6193 | \r | |
6194 | \r | |
6195 | /**\r | |
6196 | Writes a value to Debug Register 6 (DR6).\r | |
6197 | \r | |
6198 | Writes and returns a new value to DR6. This function is only available on\r | |
030cd1a2 | 6199 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6200 | \r |
6201 | @param Dr6 The value to write to Dr6.\r | |
6202 | \r | |
6203 | @return The value written to Debug Register 6 (DR6).\r | |
6204 | \r | |
6205 | **/\r | |
6206 | UINTN\r | |
6207 | EFIAPI\r | |
6208 | AsmWriteDr6 (\r | |
6209 | UINTN Dr6\r | |
6210 | );\r | |
6211 | \r | |
6212 | \r | |
6213 | /**\r | |
6214 | Writes a value to Debug Register 7 (DR7).\r | |
6215 | \r | |
6216 | Writes and returns a new value to DR7. This function is only available on\r | |
030cd1a2 | 6217 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6218 | \r |
6219 | @param Dr7 The value to write to Dr7.\r | |
6220 | \r | |
6221 | @return The value written to Debug Register 7 (DR7).\r | |
6222 | \r | |
6223 | **/\r | |
6224 | UINTN\r | |
6225 | EFIAPI\r | |
6226 | AsmWriteDr7 (\r | |
6227 | UINTN Dr7\r | |
6228 | );\r | |
6229 | \r | |
6230 | \r | |
6231 | /**\r | |
6232 | Reads the current value of Code Segment Register (CS).\r | |
6233 | \r | |
6234 | Reads and returns the current value of CS. This function is only available on\r | |
030cd1a2 | 6235 | IA-32 and x64.\r |
ac644614 | 6236 | \r |
6237 | @return The current value of CS.\r | |
6238 | \r | |
6239 | **/\r | |
6240 | UINT16\r | |
6241 | EFIAPI\r | |
6242 | AsmReadCs (\r | |
6243 | VOID\r | |
6244 | );\r | |
6245 | \r | |
6246 | \r | |
6247 | /**\r | |
6248 | Reads the current value of Data Segment Register (DS).\r | |
6249 | \r | |
6250 | Reads and returns the current value of DS. This function is only available on\r | |
030cd1a2 | 6251 | IA-32 and x64.\r |
ac644614 | 6252 | \r |
6253 | @return The current value of DS.\r | |
6254 | \r | |
6255 | **/\r | |
6256 | UINT16\r | |
6257 | EFIAPI\r | |
6258 | AsmReadDs (\r | |
6259 | VOID\r | |
6260 | );\r | |
6261 | \r | |
6262 | \r | |
6263 | /**\r | |
6264 | Reads the current value of Extra Segment Register (ES).\r | |
6265 | \r | |
6266 | Reads and returns the current value of ES. This function is only available on\r | |
030cd1a2 | 6267 | IA-32 and x64.\r |
ac644614 | 6268 | \r |
6269 | @return The current value of ES.\r | |
6270 | \r | |
6271 | **/\r | |
6272 | UINT16\r | |
6273 | EFIAPI\r | |
6274 | AsmReadEs (\r | |
6275 | VOID\r | |
6276 | );\r | |
6277 | \r | |
6278 | \r | |
6279 | /**\r | |
6280 | Reads the current value of FS Data Segment Register (FS).\r | |
6281 | \r | |
6282 | Reads and returns the current value of FS. This function is only available on\r | |
030cd1a2 | 6283 | IA-32 and x64.\r |
ac644614 | 6284 | \r |
6285 | @return The current value of FS.\r | |
6286 | \r | |
6287 | **/\r | |
6288 | UINT16\r | |
6289 | EFIAPI\r | |
6290 | AsmReadFs (\r | |
6291 | VOID\r | |
6292 | );\r | |
6293 | \r | |
6294 | \r | |
6295 | /**\r | |
6296 | Reads the current value of GS Data Segment Register (GS).\r | |
6297 | \r | |
6298 | Reads and returns the current value of GS. This function is only available on\r | |
030cd1a2 | 6299 | IA-32 and x64.\r |
ac644614 | 6300 | \r |
6301 | @return The current value of GS.\r | |
6302 | \r | |
6303 | **/\r | |
6304 | UINT16\r | |
6305 | EFIAPI\r | |
6306 | AsmReadGs (\r | |
6307 | VOID\r | |
6308 | );\r | |
6309 | \r | |
6310 | \r | |
6311 | /**\r | |
6312 | Reads the current value of Stack Segment Register (SS).\r | |
6313 | \r | |
6314 | Reads and returns the current value of SS. This function is only available on\r | |
030cd1a2 | 6315 | IA-32 and x64.\r |
ac644614 | 6316 | \r |
6317 | @return The current value of SS.\r | |
6318 | \r | |
6319 | **/\r | |
6320 | UINT16\r | |
6321 | EFIAPI\r | |
6322 | AsmReadSs (\r | |
6323 | VOID\r | |
6324 | );\r | |
6325 | \r | |
6326 | \r | |
6327 | /**\r | |
6328 | Reads the current value of Task Register (TR).\r | |
6329 | \r | |
6330 | Reads and returns the current value of TR. This function is only available on\r | |
030cd1a2 | 6331 | IA-32 and x64.\r |
ac644614 | 6332 | \r |
6333 | @return The current value of TR.\r | |
6334 | \r | |
6335 | **/\r | |
6336 | UINT16\r | |
6337 | EFIAPI\r | |
6338 | AsmReadTr (\r | |
6339 | VOID\r | |
6340 | );\r | |
6341 | \r | |
6342 | \r | |
6343 | /**\r | |
6344 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
6345 | \r | |
6346 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
030cd1a2 | 6347 | function is only available on IA-32 and x64.\r |
ac644614 | 6348 | \r |
6349 | If Gdtr is NULL, then ASSERT().\r | |
6350 | \r | |
af2dc6a7 | 6351 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6352 | \r |
6353 | **/\r | |
6354 | VOID\r | |
6355 | EFIAPI\r | |
6356 | AsmReadGdtr (\r | |
6357 | OUT IA32_DESCRIPTOR *Gdtr\r | |
6358 | );\r | |
6359 | \r | |
6360 | \r | |
6361 | /**\r | |
6362 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
6363 | \r | |
6364 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
030cd1a2 | 6365 | only available on IA-32 and x64.\r |
ac644614 | 6366 | \r |
6367 | If Gdtr is NULL, then ASSERT().\r | |
6368 | \r | |
af2dc6a7 | 6369 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6370 | \r |
6371 | **/\r | |
6372 | VOID\r | |
6373 | EFIAPI\r | |
6374 | AsmWriteGdtr (\r | |
6375 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
6376 | );\r | |
6377 | \r | |
6378 | \r | |
6379 | /**\r | |
17f695ed | 6380 | Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6381 | \r |
6382 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
030cd1a2 | 6383 | function is only available on IA-32 and x64.\r |
ac644614 | 6384 | \r |
6385 | If Idtr is NULL, then ASSERT().\r | |
6386 | \r | |
af2dc6a7 | 6387 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6388 | \r |
6389 | **/\r | |
6390 | VOID\r | |
6391 | EFIAPI\r | |
6392 | AsmReadIdtr (\r | |
6393 | OUT IA32_DESCRIPTOR *Idtr\r | |
6394 | );\r | |
6395 | \r | |
6396 | \r | |
6397 | /**\r | |
17f695ed | 6398 | Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6399 | \r |
6400 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
030cd1a2 | 6401 | only available on IA-32 and x64.\r |
ac644614 | 6402 | \r |
6403 | If Idtr is NULL, then ASSERT().\r | |
6404 | \r | |
af2dc6a7 | 6405 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6406 | \r |
6407 | **/\r | |
6408 | VOID\r | |
6409 | EFIAPI\r | |
6410 | AsmWriteIdtr (\r | |
6411 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
6412 | );\r | |
6413 | \r | |
6414 | \r | |
6415 | /**\r | |
6416 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
6417 | \r | |
6418 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
030cd1a2 | 6419 | only available on IA-32 and x64.\r |
ac644614 | 6420 | \r |
6421 | @return The current selector of LDT.\r | |
6422 | \r | |
6423 | **/\r | |
6424 | UINT16\r | |
6425 | EFIAPI\r | |
6426 | AsmReadLdtr (\r | |
6427 | VOID\r | |
6428 | );\r | |
6429 | \r | |
6430 | \r | |
6431 | /**\r | |
17f695ed | 6432 | Writes the current Local Descriptor Table Register (LDTR) selector.\r |
ac644614 | 6433 | \r |
6434 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
030cd1a2 | 6435 | only available on IA-32 and x64.\r |
ac644614 | 6436 | \r |
6437 | @param Ldtr 16-bit LDTR selector value.\r | |
6438 | \r | |
6439 | **/\r | |
6440 | VOID\r | |
6441 | EFIAPI\r | |
6442 | AsmWriteLdtr (\r | |
6443 | IN UINT16 Ldtr\r | |
6444 | );\r | |
6445 | \r | |
6446 | \r | |
6447 | /**\r | |
6448 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
6449 | \r | |
6450 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
6451 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
030cd1a2 | 6452 | available on IA-32 and x64.\r |
ac644614 | 6453 | \r |
6454 | If Buffer is NULL, then ASSERT().\r | |
6455 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6456 | \r | |
af2dc6a7 | 6457 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6458 | \r |
6459 | **/\r | |
6460 | VOID\r | |
6461 | EFIAPI\r | |
6462 | AsmFxSave (\r | |
6463 | OUT IA32_FX_BUFFER *Buffer\r | |
6464 | );\r | |
6465 | \r | |
6466 | \r | |
6467 | /**\r | |
6468 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
6469 | \r | |
6470 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
6471 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
030cd1a2 | 6472 | only available on IA-32 and x64.\r |
ac644614 | 6473 | \r |
6474 | If Buffer is NULL, then ASSERT().\r | |
6475 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6476 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
6477 | \r | |
af2dc6a7 | 6478 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6479 | \r |
6480 | **/\r | |
6481 | VOID\r | |
6482 | EFIAPI\r | |
6483 | AsmFxRestore (\r | |
6484 | IN CONST IA32_FX_BUFFER *Buffer\r | |
6485 | );\r | |
6486 | \r | |
6487 | \r | |
6488 | /**\r | |
6489 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
6490 | \r | |
6491 | Reads and returns the current value of MM0. This function is only available\r | |
030cd1a2 | 6492 | on IA-32 and x64.\r |
ac644614 | 6493 | \r |
6494 | @return The current value of MM0.\r | |
6495 | \r | |
6496 | **/\r | |
6497 | UINT64\r | |
6498 | EFIAPI\r | |
6499 | AsmReadMm0 (\r | |
6500 | VOID\r | |
6501 | );\r | |
6502 | \r | |
6503 | \r | |
6504 | /**\r | |
6505 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
6506 | \r | |
6507 | Reads and returns the current value of MM1. This function is only available\r | |
030cd1a2 | 6508 | on IA-32 and x64.\r |
ac644614 | 6509 | \r |
6510 | @return The current value of MM1.\r | |
6511 | \r | |
6512 | **/\r | |
6513 | UINT64\r | |
6514 | EFIAPI\r | |
6515 | AsmReadMm1 (\r | |
6516 | VOID\r | |
6517 | );\r | |
6518 | \r | |
6519 | \r | |
6520 | /**\r | |
6521 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
6522 | \r | |
6523 | Reads and returns the current value of MM2. This function is only available\r | |
030cd1a2 | 6524 | on IA-32 and x64.\r |
ac644614 | 6525 | \r |
6526 | @return The current value of MM2.\r | |
6527 | \r | |
6528 | **/\r | |
6529 | UINT64\r | |
6530 | EFIAPI\r | |
6531 | AsmReadMm2 (\r | |
6532 | VOID\r | |
6533 | );\r | |
6534 | \r | |
6535 | \r | |
6536 | /**\r | |
6537 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
6538 | \r | |
6539 | Reads and returns the current value of MM3. This function is only available\r | |
030cd1a2 | 6540 | on IA-32 and x64.\r |
ac644614 | 6541 | \r |
6542 | @return The current value of MM3.\r | |
6543 | \r | |
6544 | **/\r | |
6545 | UINT64\r | |
6546 | EFIAPI\r | |
6547 | AsmReadMm3 (\r | |
6548 | VOID\r | |
6549 | );\r | |
6550 | \r | |
6551 | \r | |
6552 | /**\r | |
6553 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
6554 | \r | |
6555 | Reads and returns the current value of MM4. This function is only available\r | |
030cd1a2 | 6556 | on IA-32 and x64.\r |
ac644614 | 6557 | \r |
6558 | @return The current value of MM4.\r | |
6559 | \r | |
6560 | **/\r | |
6561 | UINT64\r | |
6562 | EFIAPI\r | |
6563 | AsmReadMm4 (\r | |
6564 | VOID\r | |
6565 | );\r | |
6566 | \r | |
6567 | \r | |
6568 | /**\r | |
6569 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
6570 | \r | |
6571 | Reads and returns the current value of MM5. This function is only available\r | |
030cd1a2 | 6572 | on IA-32 and x64.\r |
ac644614 | 6573 | \r |
6574 | @return The current value of MM5.\r | |
6575 | \r | |
6576 | **/\r | |
6577 | UINT64\r | |
6578 | EFIAPI\r | |
6579 | AsmReadMm5 (\r | |
6580 | VOID\r | |
6581 | );\r | |
6582 | \r | |
6583 | \r | |
6584 | /**\r | |
6585 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
6586 | \r | |
6587 | Reads and returns the current value of MM6. This function is only available\r | |
030cd1a2 | 6588 | on IA-32 and x64.\r |
ac644614 | 6589 | \r |
6590 | @return The current value of MM6.\r | |
6591 | \r | |
6592 | **/\r | |
6593 | UINT64\r | |
6594 | EFIAPI\r | |
6595 | AsmReadMm6 (\r | |
6596 | VOID\r | |
6597 | );\r | |
6598 | \r | |
6599 | \r | |
6600 | /**\r | |
6601 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
6602 | \r | |
6603 | Reads and returns the current value of MM7. This function is only available\r | |
030cd1a2 | 6604 | on IA-32 and x64.\r |
ac644614 | 6605 | \r |
6606 | @return The current value of MM7.\r | |
6607 | \r | |
6608 | **/\r | |
6609 | UINT64\r | |
6610 | EFIAPI\r | |
6611 | AsmReadMm7 (\r | |
6612 | VOID\r | |
6613 | );\r | |
6614 | \r | |
6615 | \r | |
6616 | /**\r | |
6617 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
6618 | \r | |
6619 | Writes the current value of MM0. This function is only available on IA32 and\r | |
030cd1a2 | 6620 | x64.\r |
ac644614 | 6621 | \r |
6622 | @param Value The 64-bit value to write to MM0.\r | |
6623 | \r | |
6624 | **/\r | |
6625 | VOID\r | |
6626 | EFIAPI\r | |
6627 | AsmWriteMm0 (\r | |
6628 | IN UINT64 Value\r | |
6629 | );\r | |
6630 | \r | |
6631 | \r | |
6632 | /**\r | |
6633 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
6634 | \r | |
6635 | Writes the current value of MM1. This function is only available on IA32 and\r | |
030cd1a2 | 6636 | x64.\r |
ac644614 | 6637 | \r |
6638 | @param Value The 64-bit value to write to MM1.\r | |
6639 | \r | |
6640 | **/\r | |
6641 | VOID\r | |
6642 | EFIAPI\r | |
6643 | AsmWriteMm1 (\r | |
6644 | IN UINT64 Value\r | |
6645 | );\r | |
6646 | \r | |
6647 | \r | |
6648 | /**\r | |
6649 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
6650 | \r | |
6651 | Writes the current value of MM2. This function is only available on IA32 and\r | |
030cd1a2 | 6652 | x64.\r |
ac644614 | 6653 | \r |
6654 | @param Value The 64-bit value to write to MM2.\r | |
6655 | \r | |
6656 | **/\r | |
6657 | VOID\r | |
6658 | EFIAPI\r | |
6659 | AsmWriteMm2 (\r | |
6660 | IN UINT64 Value\r | |
6661 | );\r | |
6662 | \r | |
6663 | \r | |
6664 | /**\r | |
6665 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
6666 | \r | |
6667 | Writes the current value of MM3. This function is only available on IA32 and\r | |
030cd1a2 | 6668 | x64.\r |
ac644614 | 6669 | \r |
6670 | @param Value The 64-bit value to write to MM3.\r | |
6671 | \r | |
6672 | **/\r | |
6673 | VOID\r | |
6674 | EFIAPI\r | |
6675 | AsmWriteMm3 (\r | |
6676 | IN UINT64 Value\r | |
6677 | );\r | |
6678 | \r | |
6679 | \r | |
6680 | /**\r | |
6681 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
6682 | \r | |
6683 | Writes the current value of MM4. This function is only available on IA32 and\r | |
030cd1a2 | 6684 | x64.\r |
ac644614 | 6685 | \r |
6686 | @param Value The 64-bit value to write to MM4.\r | |
6687 | \r | |
6688 | **/\r | |
6689 | VOID\r | |
6690 | EFIAPI\r | |
6691 | AsmWriteMm4 (\r | |
6692 | IN UINT64 Value\r | |
6693 | );\r | |
6694 | \r | |
6695 | \r | |
6696 | /**\r | |
6697 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
6698 | \r | |
6699 | Writes the current value of MM5. This function is only available on IA32 and\r | |
030cd1a2 | 6700 | x64.\r |
ac644614 | 6701 | \r |
6702 | @param Value The 64-bit value to write to MM5.\r | |
6703 | \r | |
6704 | **/\r | |
6705 | VOID\r | |
6706 | EFIAPI\r | |
6707 | AsmWriteMm5 (\r | |
6708 | IN UINT64 Value\r | |
6709 | );\r | |
6710 | \r | |
6711 | \r | |
6712 | /**\r | |
6713 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
6714 | \r | |
6715 | Writes the current value of MM6. This function is only available on IA32 and\r | |
030cd1a2 | 6716 | x64.\r |
ac644614 | 6717 | \r |
6718 | @param Value The 64-bit value to write to MM6.\r | |
6719 | \r | |
6720 | **/\r | |
6721 | VOID\r | |
6722 | EFIAPI\r | |
6723 | AsmWriteMm6 (\r | |
6724 | IN UINT64 Value\r | |
6725 | );\r | |
6726 | \r | |
6727 | \r | |
6728 | /**\r | |
6729 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
6730 | \r | |
6731 | Writes the current value of MM7. This function is only available on IA32 and\r | |
030cd1a2 | 6732 | x64.\r |
ac644614 | 6733 | \r |
6734 | @param Value The 64-bit value to write to MM7.\r | |
6735 | \r | |
6736 | **/\r | |
6737 | VOID\r | |
6738 | EFIAPI\r | |
6739 | AsmWriteMm7 (\r | |
6740 | IN UINT64 Value\r | |
6741 | );\r | |
6742 | \r | |
6743 | \r | |
6744 | /**\r | |
6745 | Reads the current value of Time Stamp Counter (TSC).\r | |
6746 | \r | |
6747 | Reads and returns the current value of TSC. This function is only available\r | |
030cd1a2 | 6748 | on IA-32 and x64.\r |
ac644614 | 6749 | \r |
6750 | @return The current value of TSC\r | |
6751 | \r | |
6752 | **/\r | |
6753 | UINT64\r | |
6754 | EFIAPI\r | |
6755 | AsmReadTsc (\r | |
6756 | VOID\r | |
6757 | );\r | |
6758 | \r | |
6759 | \r | |
6760 | /**\r | |
6761 | Reads the current value of a Performance Counter (PMC).\r | |
6762 | \r | |
6763 | Reads and returns the current value of performance counter specified by\r | |
030cd1a2 | 6764 | Index. This function is only available on IA-32 and x64.\r |
ac644614 | 6765 | \r |
6766 | @param Index The 32-bit Performance Counter index to read.\r | |
6767 | \r | |
6768 | @return The value of the PMC specified by Index.\r | |
6769 | \r | |
6770 | **/\r | |
6771 | UINT64\r | |
6772 | EFIAPI\r | |
6773 | AsmReadPmc (\r | |
6774 | IN UINT32 Index\r | |
6775 | );\r | |
6776 | \r | |
6777 | \r | |
6778 | /**\r | |
6779 | Sets up a monitor buffer that is used by AsmMwait().\r | |
6780 | \r | |
6781 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
030cd1a2 | 6782 | and Edx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 6783 | \r |
6784 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6785 | instruction.\r | |
6786 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6787 | instruction.\r | |
6788 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
6789 | instruction.\r | |
6790 | \r | |
6791 | @return Eax\r | |
6792 | \r | |
6793 | **/\r | |
6794 | UINTN\r | |
6795 | EFIAPI\r | |
6796 | AsmMonitor (\r | |
6797 | IN UINTN Eax,\r | |
6798 | IN UINTN Ecx,\r | |
6799 | IN UINTN Edx\r | |
6800 | );\r | |
6801 | \r | |
6802 | \r | |
6803 | /**\r | |
6804 | Executes an MWAIT instruction.\r | |
6805 | \r | |
6806 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
030cd1a2 | 6807 | Ecx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 6808 | \r |
6809 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6810 | instruction.\r | |
6811 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6812 | instruction.\r | |
6813 | \r | |
6814 | @return Eax\r | |
6815 | \r | |
6816 | **/\r | |
6817 | UINTN\r | |
6818 | EFIAPI\r | |
6819 | AsmMwait (\r | |
6820 | IN UINTN Eax,\r | |
6821 | IN UINTN Ecx\r | |
6822 | );\r | |
6823 | \r | |
6824 | \r | |
6825 | /**\r | |
6826 | Executes a WBINVD instruction.\r | |
6827 | \r | |
6828 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 6829 | x64.\r |
ac644614 | 6830 | \r |
6831 | **/\r | |
6832 | VOID\r | |
6833 | EFIAPI\r | |
6834 | AsmWbinvd (\r | |
6835 | VOID\r | |
6836 | );\r | |
6837 | \r | |
6838 | \r | |
6839 | /**\r | |
6840 | Executes a INVD instruction.\r | |
6841 | \r | |
6842 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 6843 | x64.\r |
ac644614 | 6844 | \r |
6845 | **/\r | |
6846 | VOID\r | |
6847 | EFIAPI\r | |
6848 | AsmInvd (\r | |
6849 | VOID\r | |
6850 | );\r | |
6851 | \r | |
6852 | \r | |
6853 | /**\r | |
6854 | Flushes a cache line from all the instruction and data caches within the\r | |
6855 | coherency domain of the CPU.\r | |
6856 | \r | |
6857 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
030cd1a2 | 6858 | This function is only available on IA-32 and x64.\r |
ac644614 | 6859 | \r |
6860 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
6861 | in a physical addressing mode, then LinearAddress is a\r | |
6862 | physical address. If the CPU is in a virtual\r | |
6863 | addressing mode, then LinearAddress is a virtual\r | |
6864 | address.\r | |
6865 | \r | |
af2dc6a7 | 6866 | @return LinearAddress.\r |
ac644614 | 6867 | **/\r |
6868 | VOID *\r | |
6869 | EFIAPI\r | |
6870 | AsmFlushCacheLine (\r | |
6871 | IN VOID *LinearAddress\r | |
6872 | );\r | |
6873 | \r | |
6874 | \r | |
6875 | /**\r | |
6876 | Enables the 32-bit paging mode on the CPU.\r | |
6877 | \r | |
6878 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
6879 | must be properly initialized prior to calling this service. This function\r | |
6880 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
6881 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
6882 | transferred to the function specified by EntryPoint using the new stack\r | |
6883 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
6884 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
6885 | EntryPoint must never return.\r | |
6886 | \r | |
6887 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
6888 | If EntryPoint is NULL, then ASSERT().\r | |
6889 | If NewStack is NULL, then ASSERT().\r | |
6890 | \r | |
6891 | There are a number of constraints that must be followed before calling this\r | |
6892 | function:\r | |
6893 | 1) Interrupts must be disabled.\r | |
6894 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
6895 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
6896 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
6897 | descriptors.\r | |
6898 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
6899 | is complete, and those page tables must guarantee that the pages for this\r | |
6900 | function and the stack are identity mapped.\r | |
6901 | \r | |
6902 | @param EntryPoint A pointer to function to call with the new stack after\r | |
6903 | paging is enabled.\r | |
6904 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
6905 | function as the first parameter after paging is enabled.\r | |
6906 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
6907 | function as the second parameter after paging is enabled.\r | |
6908 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
6909 | function after paging is enabled.\r | |
6910 | \r | |
6911 | **/\r | |
6912 | VOID\r | |
6913 | EFIAPI\r | |
6914 | AsmEnablePaging32 (\r | |
6915 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
6916 | IN VOID *Context1, OPTIONAL\r | |
6917 | IN VOID *Context2, OPTIONAL\r | |
6918 | IN VOID *NewStack\r | |
6919 | );\r | |
6920 | \r | |
6921 | \r | |
6922 | /**\r | |
6923 | Disables the 32-bit paging mode on the CPU.\r | |
6924 | \r | |
6925 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
6926 | mode. This function assumes the current execution mode is 32-paged protected\r | |
6927 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
6928 | is disabled, control is transferred to the function specified by EntryPoint\r | |
6929 | using the new stack specified by NewStack and passing in the parameters\r | |
6930 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
6931 | may be NULL. The function EntryPoint must never return.\r | |
6932 | \r | |
6933 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
6934 | If EntryPoint is NULL, then ASSERT().\r | |
6935 | If NewStack is NULL, then ASSERT().\r | |
6936 | \r | |
6937 | There are a number of constraints that must be followed before calling this\r | |
6938 | function:\r | |
6939 | 1) Interrupts must be disabled.\r | |
6940 | 2) The caller must be in 32-bit paged mode.\r | |
6941 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
6942 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
6943 | this function and the stack are identity mapped.\r | |
6944 | \r | |
6945 | @param EntryPoint A pointer to function to call with the new stack after\r | |
6946 | paging is disabled.\r | |
6947 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
6948 | function as the first parameter after paging is disabled.\r | |
6949 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
6950 | function as the second parameter after paging is\r | |
6951 | disabled.\r | |
6952 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
6953 | function after paging is disabled.\r | |
6954 | \r | |
6955 | **/\r | |
6956 | VOID\r | |
6957 | EFIAPI\r | |
6958 | AsmDisablePaging32 (\r | |
6959 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
6960 | IN VOID *Context1, OPTIONAL\r | |
6961 | IN VOID *Context2, OPTIONAL\r | |
6962 | IN VOID *NewStack\r | |
6963 | );\r | |
6964 | \r | |
6965 | \r | |
6966 | /**\r | |
6967 | Enables the 64-bit paging mode on the CPU.\r | |
6968 | \r | |
6969 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
6970 | must be properly initialized prior to calling this service. This function\r | |
6971 | assumes the current execution mode is 32-bit protected mode with flat\r | |
6972 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
6973 | paging mode is enabled, control is transferred to the function specified by\r | |
6974 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
6975 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
6976 | optional and may be 0. The function EntryPoint must never return.\r | |
6977 | \r | |
6978 | If the current execution mode is not 32-bit protected mode with flat\r | |
6979 | descriptors, then ASSERT().\r | |
6980 | If EntryPoint is 0, then ASSERT().\r | |
6981 | If NewStack is 0, then ASSERT().\r | |
6982 | \r | |
17f695ed | 6983 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 6984 | is called. The descriptor in the GDT that this selector\r |
6985 | references must be setup for long mode.\r | |
6986 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
6987 | the new stack after paging is enabled.\r | |
6988 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
6989 | the EntryPoint function as the first parameter after\r | |
6990 | paging is enabled.\r | |
6991 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
6992 | the EntryPoint function as the second parameter after\r | |
6993 | paging is enabled.\r | |
6994 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
6995 | the EntryPoint function after paging is enabled.\r | |
6996 | \r | |
6997 | **/\r | |
6998 | VOID\r | |
6999 | EFIAPI\r | |
7000 | AsmEnablePaging64 (\r | |
17f695ed | 7001 | IN UINT16 Cs,\r |
ac644614 | 7002 | IN UINT64 EntryPoint,\r |
7003 | IN UINT64 Context1, OPTIONAL\r | |
7004 | IN UINT64 Context2, OPTIONAL\r | |
7005 | IN UINT64 NewStack\r | |
7006 | );\r | |
7007 | \r | |
7008 | \r | |
7009 | /**\r | |
7010 | Disables the 64-bit paging mode on the CPU.\r | |
7011 | \r | |
7012 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
7013 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
030cd1a2 | 7014 | This function is only available on x64. After the 64-bit paging mode is\r |
ac644614 | 7015 | disabled, control is transferred to the function specified by EntryPoint\r |
7016 | using the new stack specified by NewStack and passing in the parameters\r | |
7017 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7018 | may be 0. The function EntryPoint must never return.\r | |
7019 | \r | |
7020 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
7021 | If EntryPoint is 0, then ASSERT().\r | |
7022 | If NewStack is 0, then ASSERT().\r | |
7023 | \r | |
17f695ed | 7024 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7025 | is called. The descriptor in the GDT that this selector\r |
7026 | references must be setup for 32-bit protected mode.\r | |
7027 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7028 | the new stack after paging is disabled.\r | |
7029 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7030 | the EntryPoint function as the first parameter after\r | |
7031 | paging is disabled.\r | |
7032 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7033 | the EntryPoint function as the second parameter after\r | |
7034 | paging is disabled.\r | |
7035 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7036 | the EntryPoint function after paging is disabled.\r | |
7037 | \r | |
7038 | **/\r | |
7039 | VOID\r | |
7040 | EFIAPI\r | |
7041 | AsmDisablePaging64 (\r | |
17f695ed | 7042 | IN UINT16 Cs,\r |
ac644614 | 7043 | IN UINT32 EntryPoint,\r |
7044 | IN UINT32 Context1, OPTIONAL\r | |
7045 | IN UINT32 Context2, OPTIONAL\r | |
7046 | IN UINT32 NewStack\r | |
7047 | );\r | |
7048 | \r | |
7049 | \r | |
7050 | //\r | |
7051 | // 16-bit thunking services\r | |
7052 | //\r | |
7053 | \r | |
7054 | /**\r | |
7055 | Retrieves the properties for 16-bit thunk functions.\r | |
7056 | \r | |
7057 | Computes the size of the buffer and stack below 1MB required to use the\r | |
7058 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
7059 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
7060 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
7061 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
7062 | of bytes that need to be passed to the 16-bit real mode code.\r | |
52fa075c | 7063 | \r |
ac644614 | 7064 | If RealModeBufferSize is NULL, then ASSERT().\r |
7065 | If ExtraStackSize is NULL, then ASSERT().\r | |
7066 | \r | |
7067 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
7068 | required to use the 16-bit thunk functions.\r | |
7069 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
7070 | that the 16-bit thunk functions require for\r | |
7071 | temporary storage in the transition to and from\r | |
7072 | 16-bit real mode.\r | |
7073 | \r | |
7074 | **/\r | |
7075 | VOID\r | |
7076 | EFIAPI\r | |
7077 | AsmGetThunk16Properties (\r | |
7078 | OUT UINT32 *RealModeBufferSize,\r | |
7079 | OUT UINT32 *ExtraStackSize\r | |
7080 | );\r | |
7081 | \r | |
7082 | \r | |
7083 | /**\r | |
7084 | Prepares all structures a code required to use AsmThunk16().\r | |
7085 | \r | |
7086 | Prepares all structures and code required to use AsmThunk16().\r | |
52fa075c | 7087 | \r |
8243b089 | 7088 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7089 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
ac644614 | 7090 | \r |
7091 | If ThunkContext is NULL, then ASSERT().\r | |
7092 | \r | |
7093 | @param ThunkContext A pointer to the context structure that describes the\r | |
7094 | 16-bit real mode code to call.\r | |
7095 | \r | |
7096 | **/\r | |
7097 | VOID\r | |
7098 | EFIAPI\r | |
7099 | AsmPrepareThunk16 (\r | |
7100 | OUT THUNK_CONTEXT *ThunkContext\r | |
7101 | );\r | |
7102 | \r | |
7103 | \r | |
7104 | /**\r | |
7105 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7106 | \r | |
7107 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
17f695ed | 7108 | AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r |
7109 | This function must be called with interrupts disabled.\r | |
7110 | \r | |
7111 | The register state from the RealModeState field of ThunkContext is restored just prior \r | |
7112 | to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r | |
7113 | which is used to set the interrupt state when a 16-bit real mode entry point is called.\r | |
7114 | Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r | |
7115 | The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r | |
7116 | the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r | |
7117 | The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r | |
7118 | so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r | |
7119 | and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r | |
7120 | point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r | |
7121 | after the RETF instruction is executed.\r | |
7122 | \r | |
7123 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7124 | or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r | |
7125 | the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r | |
7126 | \r | |
7127 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7128 | then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r | |
7129 | This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r | |
7130 | \r | |
7131 | If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r | |
7132 | is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r | |
7133 | \r | |
7134 | If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r | |
7135 | ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r | |
7136 | disable the A20 mask.\r | |
7137 | \r | |
7138 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r | |
7139 | ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r | |
7140 | then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7141 | \r | |
7142 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r | |
7143 | ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7144 | \r | |
ac644614 | 7145 | If ThunkContext is NULL, then ASSERT().\r |
7146 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
17f695ed | 7147 | If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r |
7148 | ThunkAttributes, then ASSERT().\r | |
ac644614 | 7149 | \r |
8243b089 | 7150 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
af2dc6a7 | 7151 | virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.\r |
52fa075c | 7152 | \r |
ac644614 | 7153 | @param ThunkContext A pointer to the context structure that describes the\r |
7154 | 16-bit real mode code to call.\r | |
7155 | \r | |
7156 | **/\r | |
7157 | VOID\r | |
7158 | EFIAPI\r | |
7159 | AsmThunk16 (\r | |
7160 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7161 | );\r | |
7162 | \r | |
7163 | \r | |
7164 | /**\r | |
7165 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7166 | control to a 16-bit real mode entry point, and returns the results.\r | |
7167 | \r | |
7168 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7169 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
7170 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
7171 | service should be used. If the caller intends to make more than one 16-bit\r | |
7172 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
7173 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
7174 | \r | |
8243b089 | 7175 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7176 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
52fa075c | 7177 | \r |
17f695ed | 7178 | See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r |
ac644614 | 7179 | \r |
7180 | @param ThunkContext A pointer to the context structure that describes the\r | |
7181 | 16-bit real mode code to call.\r | |
7182 | \r | |
7183 | **/\r | |
7184 | VOID\r | |
7185 | EFIAPI\r | |
7186 | AsmPrepareAndThunk16 (\r | |
7187 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7188 | );\r | |
7189 | \r | |
ac644614 | 7190 | #endif\r |
e3a7917f | 7191 | #endif\r |
ac644614 | 7192 | \r |
7193 | \r |