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1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
b4d7b9d2 4 Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
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5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
06544455 18#include <Register/Amd/Ghcb.h>\r
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19#include <Register/Intel/Msr.h>\r
20#include <Register/Intel/LocalApic.h>\r
21#include <Register/Intel/Microcode.h>\r
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22\r
23#include <Library/MpInitLib.h>\r
24#include <Library/BaseLib.h>\r
25#include <Library/BaseMemoryLib.h>\r
26#include <Library/MemoryAllocationLib.h>\r
27#include <Library/DebugLib.h>\r
28#include <Library/LocalApicLib.h>\r
29#include <Library/CpuLib.h>\r
30#include <Library/UefiCpuLib.h>\r
31#include <Library/TimerLib.h>\r
32#include <Library/SynchronizationLib.h>\r
33#include <Library/MtrrLib.h>\r
34#include <Library/HobLib.h>\r
d5339c04 35#include <Library/PcdLib.h>\r
bce03284 36#include <Library/MicrocodeLib.h>\r
b95908e0 37#include <ConfidentialComputingGuestAttr.h>\r
3e8ad6bd 38\r
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39#include <Register/Amd/Fam17Msr.h>\r
40#include <Register/Amd/Ghcb.h>\r
41\r
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42#include <Guid/MicrocodePatchHob.h>\r
43\r
053e878b 44#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
b8b04307 45\r
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46#define CPU_INIT_MP_LIB_HOB_GUID \\r
47 { \\r
48 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
49 }\r
50\r
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51//\r
52// The MP data for switch BSP\r
53//\r
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54#define CPU_SWITCH_STATE_IDLE 0\r
55#define CPU_SWITCH_STATE_STORED 1\r
56#define CPU_SWITCH_STATE_LOADED 2\r
41be0da5 57\r
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58//\r
59// Default maximum number of entries to store the microcode patches information\r
60//\r
053e878b 61#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
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62\r
63//\r
64// Data structure for microcode patch information\r
65//\r
66typedef struct {\r
67 UINTN Address;\r
68 UINTN Size;\r
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69} MICROCODE_PATCH_INFO;\r
70\r
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71//\r
72// CPU volatile registers around INIT-SIPI-SIPI\r
73//\r
74typedef struct {\r
75 UINTN Cr0;\r
76 UINTN Cr3;\r
77 UINTN Cr4;\r
78 UINTN Dr0;\r
79 UINTN Dr1;\r
80 UINTN Dr2;\r
81 UINTN Dr3;\r
82 UINTN Dr6;\r
83 UINTN Dr7;\r
84 IA32_DESCRIPTOR Gdtr;\r
85 IA32_DESCRIPTOR Idtr;\r
86 UINT16 Tr;\r
87} CPU_VOLATILE_REGISTERS;\r
88\r
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89//\r
90// CPU exchange information for switch BSP\r
91//\r
92typedef struct {\r
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93 UINT8 State; // offset 0\r
94 UINTN StackPointer; // offset 4 / 8\r
95 CPU_VOLATILE_REGISTERS VolatileRegisters; // offset 8 / 16\r
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96} CPU_EXCHANGE_ROLE_INFO;\r
97\r
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98//\r
99// AP loop state when APs are in idle state\r
100// It's value is the same with PcdCpuApLoopMode\r
101//\r
102typedef enum {\r
103 ApInHltLoop = 1,\r
104 ApInMwaitLoop = 2,\r
105 ApInRunLoop = 3\r
106} AP_LOOP_MODE;\r
107\r
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108//\r
109// AP initialization state during APs wakeup\r
110//\r
111typedef enum {\r
112 ApInitConfig = 1,\r
113 ApInitReconfig = 2,\r
114 ApInitDone = 3\r
115} AP_INIT_STATE;\r
116\r
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117//\r
118// AP state\r
119//\r
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120// The state transitions for an AP when it process a procedure are:\r
121// Idle ----> Ready ----> Busy ----> Idle\r
122// [BSP] [AP] [AP]\r
123//\r
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124typedef enum {\r
125 CpuStateIdle,\r
126 CpuStateReady,\r
127 CpuStateBusy,\r
e048ce88 128 CpuStateFinished,\r
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129 CpuStateDisabled\r
130} CPU_STATE;\r
131\r
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132//\r
133// AP related data\r
134//\r
135typedef struct {\r
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136 SPIN_LOCK ApLock;\r
137 volatile UINT32 *StartupApSignal;\r
138 volatile UINTN ApFunction;\r
139 volatile UINTN ApFunctionArgument;\r
140 BOOLEAN CpuHealthy;\r
141 volatile CPU_STATE State;\r
142 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
143 BOOLEAN Waiting;\r
144 BOOLEAN *Finished;\r
145 UINT64 ExpectedTime;\r
146 UINT64 CurrentTime;\r
147 UINT64 TotalTime;\r
148 EFI_EVENT WaitEvent;\r
149 UINT32 ProcessorSignature;\r
150 UINT8 PlatformId;\r
151 UINT64 MicrocodeEntryAddr;\r
152 UINT32 MicrocodeRevision;\r
06544455 153 SEV_ES_SAVE_AREA *SevEsSaveArea;\r
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154} CPU_AP_DATA;\r
155\r
156//\r
157// Basic CPU information saved in Guided HOB.\r
158// Because the contents will be shard between PEI and DXE,\r
159// we need to make sure the each fields offset same in different\r
160// architecture.\r
161//\r
dd3fa0cd 162#pragma pack (1)\r
e59f8f6b 163typedef struct {\r
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164 UINT32 InitialApicId;\r
165 UINT32 ApicId;\r
166 UINT32 Health;\r
167 UINT64 ApTopOfStack;\r
e59f8f6b 168} CPU_INFO_IN_HOB;\r
dd3fa0cd 169#pragma pack ()\r
e59f8f6b 170\r
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171//\r
172// AP reset code information including code address and size,\r
173// this structure will be shared be C code and assembly code.\r
174// It is natural aligned by design.\r
175//\r
176typedef struct {\r
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177 UINT8 *RendezvousFunnelAddress;\r
178 UINTN ModeEntryOffset;\r
179 UINTN RendezvousFunnelSize;\r
180 UINT8 *RelocateApLoopFuncAddress;\r
181 UINTN RelocateApLoopFuncSize;\r
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182 UINT8 *RelocateApLoopFuncAddressAmd;\r
183 UINTN RelocateApLoopFuncSizeAmd;\r
053e878b 184 UINTN ModeTransitionOffset;\r
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185 UINTN SwitchToRealNoNxOffset;\r
186 UINTN SwitchToRealPM16ModeOffset;\r
187 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 188} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 189\r
053e878b 190typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
e59f8f6b 191\r
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192#pragma pack(1)\r
193\r
194//\r
195// MP CPU exchange information for AP reset code\r
196// This structure is required to be packed because fixed field offsets\r
197// into this structure are used in assembly code in this module\r
198//\r
199typedef struct {\r
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200 UINTN StackStart;\r
201 UINTN StackSize;\r
202 UINTN CFunction;\r
203 IA32_DESCRIPTOR GdtrProfile;\r
204 IA32_DESCRIPTOR IdtrProfile;\r
205 UINTN BufferStart;\r
206 UINTN ModeOffset;\r
207 UINTN ApIndex;\r
208 UINTN CodeSegment;\r
209 UINTN DataSegment;\r
210 UINTN EnableExecuteDisable;\r
211 UINTN Cr3;\r
212 UINTN InitFlag;\r
213 CPU_INFO_IN_HOB *CpuInfo;\r
214 UINTN NumApsExecuting;\r
215 CPU_MP_DATA *CpuMpData;\r
216 UINTN InitializeFloatingPointUnitsAddress;\r
217 UINT32 ModeTransitionMemory;\r
218 UINT16 ModeTransitionSegment;\r
219 UINT32 ModeHighMemory;\r
220 UINT16 ModeHighSegment;\r
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221 //\r
222 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
223 //\r
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224 BOOLEAN Enable5LevelPaging;\r
225 BOOLEAN SevEsIsEnabled;\r
9c703bc0 226 BOOLEAN SevSnpIsEnabled;\r
053e878b 227 UINTN GhcbBase;\r
d4d7c9ad 228 BOOLEAN ExtTopoAvail;\r
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229} MP_CPU_EXCHANGE_INFO;\r
230\r
231#pragma pack()\r
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232\r
233//\r
234// CPU MP Data save in memory\r
235//\r
236struct _CPU_MP_DATA {\r
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237 UINT64 CpuInfoInHob;\r
238 UINT32 CpuCount;\r
239 UINT32 BspNumber;\r
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240 //\r
241 // The above fields data will be passed from PEI to DXE\r
242 // Please make sure the fields offset same in the different\r
243 // architecture.\r
244 //\r
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245 SPIN_LOCK MpLock;\r
246 UINTN Buffer;\r
247 UINTN CpuApStackSize;\r
248 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
249 UINTN WakeupBuffer;\r
250 UINTN WakeupBufferHigh;\r
251 UINTN BackupBuffer;\r
252 UINTN BackupBufferSize;\r
253\r
254 volatile UINT32 FinishedCount;\r
255 UINT32 RunningCount;\r
256 BOOLEAN SingleThread;\r
257 EFI_AP_PROCEDURE Procedure;\r
258 VOID *ProcArguments;\r
259 BOOLEAN *Finished;\r
260 UINT64 ExpectedTime;\r
261 UINT64 CurrentTime;\r
262 UINT64 TotalTime;\r
263 EFI_EVENT WaitEvent;\r
264 UINTN **FailedCpuList;\r
265\r
266 AP_INIT_STATE InitFlag;\r
267 BOOLEAN SwitchBspFlag;\r
268 UINTN NewBspNumber;\r
269 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
270 CPU_EXCHANGE_ROLE_INFO APInfo;\r
271 MTRR_SETTINGS MtrrTable;\r
272 UINT8 ApLoopMode;\r
273 UINT8 ApTargetCState;\r
274 UINT16 PmCodeSegment;\r
275 UINT16 Pm16CodeSegment;\r
276 CPU_AP_DATA *CpuData;\r
277 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
278\r
279 UINT32 CurrentTimerCount;\r
280 UINTN DivideValue;\r
281 UINT8 Vector;\r
282 BOOLEAN PeriodicMode;\r
283 BOOLEAN TimerInterruptState;\r
284 UINT64 MicrocodePatchAddress;\r
285 UINT64 MicrocodePatchRegionSize;\r
2a089134 286\r
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287 //\r
288 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
289 // Two cases need to set this value to TRUE. One is in HLT\r
290 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 291 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
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292 // driver.\r
293 //\r
053e878b 294 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98 295\r
053e878b 296 BOOLEAN SevEsIsEnabled;\r
9c703bc0 297 BOOLEAN SevSnpIsEnabled;\r
06544455 298 BOOLEAN UseSevEsAPMethod;\r
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299 UINTN SevEsAPBuffer;\r
300 UINTN SevEsAPResetStackStart;\r
301 CPU_MP_DATA *NewCpuMpData;\r
7b7508ad 302\r
053e878b 303 UINT64 GhcbBase;\r
e59f8f6b 304};\r
93ca4c0f 305\r
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306//\r
307// AP_STACK_DATA is stored at the top of each AP stack.\r
308//\r
309typedef struct {\r
310 UINTN Bist;\r
311 CPU_MP_DATA *MpData;\r
312} AP_STACK_DATA;\r
313\r
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314#define AP_SAFE_STACK_SIZE 128\r
315#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
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316\r
317#pragma pack(1)\r
318\r
319typedef struct {\r
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320 UINT8 InsnBuffer[8];\r
321 UINT16 Rip;\r
322 UINT16 Segment;\r
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323} SEV_ES_AP_JMP_FAR;\r
324\r
325#pragma pack()\r
326\r
327/**\r
328 Assembly code to move an AP from long mode to real mode.\r
329\r
330 Move an AP from long mode to real mode in preparation to invoking\r
331 the reset vector. This is used for SEV-ES guests where a hypervisor\r
332 is not allowed to set the CS and RIP to point to the reset vector.\r
333\r
334 @param[in] BufferStart The reset vector target.\r
335 @param[in] Code16 16-bit protected mode code segment value.\r
336 @param[in] Code32 32-bit protected mode code segment value.\r
337 @param[in] StackStart The start of a stack to be used for transitioning\r
338 from long mode to real mode.\r
339**/\r
340typedef\r
e2289d19 341 VOID\r
053e878b 342(EFIAPI AP_RESET)(\r
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343 IN UINTN BufferStart,\r
344 IN UINT16 Code16,\r
345 IN UINT16 Code32,\r
346 IN UINTN StackStart\r
347 );\r
348\r
053e878b 349extern EFI_GUID mCpuInitMpLibHobGuid;\r
93ca4c0f 350\r
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351/**\r
352 Assembly code to place AP into safe loop mode for Amd.\r
353 Place AP into targeted C-State if MONITOR is supported, otherwise\r
354 place AP into hlt state.\r
355 Place AP in protected mode if the current is long mode. Due to AP maybe\r
356 wakeup by some hardware event. It could avoid accessing page table that\r
357 may not available during booting to OS.\r
358 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
359 FALSE indicates MONITOR is not supported.\r
360 @param[in] ApTargetCState Target C-State value.\r
361 @param[in] PmCodeSegment Protected mode code segment value.\r
362**/\r
363typedef\r
364 VOID\r
365(EFIAPI *ASM_RELOCATE_AP_LOOP_AMD)(\r
366 IN BOOLEAN MwaitSupport,\r
367 IN UINTN ApTargetCState,\r
368 IN UINTN PmCodeSegment,\r
369 IN UINTN TopOfApStack,\r
370 IN UINTN NumberToFinish,\r
371 IN UINTN Pm16CodeSegment,\r
372 IN UINTN SevEsAPJumpTable,\r
373 IN UINTN WakeupBuffer\r
374 );\r
375\r
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376/**\r
377 Assembly code to place AP into safe loop mode.\r
378\r
379 Place AP into targeted C-State if MONITOR is supported, otherwise\r
380 place AP into hlt state.\r
381 Place AP in protected mode if the current is long mode. Due to AP maybe\r
382 wakeup by some hardware event. It could avoid accessing page table that\r
383 may not available during booting to OS.\r
384\r
385 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
386 FALSE indicates MONITOR is not supported.\r
387 @param[in] ApTargetCState Target C-State value.\r
388 @param[in] PmCodeSegment Protected mode code segment value.\r
389**/\r
390typedef\r
e2289d19 391 VOID\r
053e878b 392(EFIAPI *ASM_RELOCATE_AP_LOOP)(\r
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393 IN BOOLEAN MwaitSupport,\r
394 IN UINTN ApTargetCState,\r
9f91cb01 395 IN UINTN TopOfApStack,\r
20da7ca4 396 IN UINTN NumberToFinish,\r
73ccde8f 397 IN UINTN Cr3\r
76157021 398 );\r
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399\r
400/**\r
401 Assembly code to get starting address and size of the rendezvous entry for APs.\r
402 Information for fixing a jump instruction in the code is also returned.\r
403\r
404 @param[out] AddressMap Output buffer for address map information.\r
405**/\r
406VOID\r
407EFIAPI\r
408AsmGetAddressMap (\r
053e878b 409 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
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410 );\r
411\r
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412/**\r
413 This function is called by both the BSP and the AP which is to become the BSP to\r
414 Exchange execution context including stack between them. After return from this\r
415 function, the BSP becomes AP and the AP becomes the BSP.\r
416\r
417 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
418 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
419\r
420**/\r
421VOID\r
422EFIAPI\r
423AsmExchangeRole (\r
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424 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
425 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
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426 );\r
427\r
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428/**\r
429 Get the pointer to CPU MP Data structure.\r
430\r
431 @return The pointer to CPU MP Data structure.\r
432**/\r
433CPU_MP_DATA *\r
434GetCpuMpData (\r
435 VOID\r
436 );\r
437\r
438/**\r
439 Save the pointer to CPU MP Data structure.\r
440\r
441 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
442**/\r
443VOID\r
444SaveCpuMpData (\r
053e878b 445 IN CPU_MP_DATA *CpuMpData\r
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446 );\r
447\r
ed66e0e3 448/**\r
a6b3d753 449 Get available system memory below 1MB by specified size.\r
ed66e0e3 450\r
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451 @param[in] WakeupBufferSize Wakeup buffer size required\r
452\r
453 @retval other Return wakeup buffer address below 1MB.\r
454 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 455**/\r
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456UINTN\r
457GetWakeupBuffer (\r
053e878b 458 IN UINTN WakeupBufferSize\r
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459 );\r
460\r
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461/**\r
462 Get available EfiBootServicesCode memory below 4GB by specified size.\r
463\r
464 This buffer is required to safely transfer AP from real address mode to\r
465 protected mode or long mode, due to the fact that the buffer returned by\r
466 GetWakeupBuffer() may be marked as non-executable.\r
467\r
468 @param[in] BufferSize Wakeup transition buffer size.\r
469\r
470 @retval other Return wakeup transition buffer address below 4GB.\r
471 @retval 0 Cannot find free memory below 4GB.\r
472**/\r
473UINTN\r
54aeed7e 474AllocateCodeBuffer (\r
053e878b 475 IN UINTN BufferSize\r
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476 );\r
477\r
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478/**\r
479 Return the address of the SEV-ES AP jump table.\r
480\r
481 This buffer is required in order for an SEV-ES guest to transition from\r
482 UEFI into an OS.\r
483\r
484 @return Return SEV-ES AP jump table buffer\r
485**/\r
486UINTN\r
487GetSevEsAPMemory (\r
488 VOID\r
489 );\r
490\r
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491/**\r
492 This function will be called by BSP to wakeup AP.\r
493\r
494 @param[in] CpuMpData Pointer to CPU MP Data\r
495 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
496 FALSE: Send IPI to AP by ApicId\r
497 @param[in] ProcessorNumber The handle number of specified processor\r
498 @param[in] Procedure The function to be invoked by AP\r
499 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 500 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
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501**/\r
502VOID\r
503WakeUpAP (\r
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MK
504 IN CPU_MP_DATA *CpuMpData,\r
505 IN BOOLEAN Broadcast,\r
506 IN UINTN ProcessorNumber,\r
507 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
508 IN VOID *ProcedureArgument OPTIONAL,\r
0fdd466c 509 IN BOOLEAN WakeUpDisabledAps\r
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510 );\r
511\r
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512/**\r
513 Create 1:1 mapping page table in reserved memory to map the specified address range.\r
514\r
515 @param[in] LinearAddress The start of the linear address range.\r
516 @param[in] Length The length of the linear address range.\r
517\r
518 @return The page table to be created.\r
519**/\r
520UINTN\r
521CreatePageTable (\r
522 IN UINTN Address,\r
523 IN UINTN Length\r
524 );\r
525\r
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526/**\r
527 Initialize global data for MP support.\r
528\r
529 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
530**/\r
531VOID\r
532InitMpGlobalData (\r
053e878b 533 IN CPU_MP_DATA *CpuMpData\r
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534 );\r
535\r
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536/**\r
537 Worker function to execute a caller provided function on all enabled APs.\r
538\r
539 @param[in] Procedure A pointer to the function to be run on\r
540 enabled APs of the system.\r
541 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
542 the function specified by Procedure one by\r
543 one, in ascending order of processor handle\r
544 number. If FALSE, then all the enabled APs\r
545 execute the function specified by Procedure\r
546 simultaneously.\r
ee0c39fa 547 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
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548 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
549 service.\r
367284e7 550 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
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551 APs to return from Procedure, either for\r
552 blocking or non-blocking mode.\r
553 @param[in] ProcedureArgument The parameter passed into Procedure for\r
554 all APs.\r
555 @param[out] FailedCpuList If all APs finish successfully, then its\r
556 content is set to NULL. If not all APs\r
557 finish before timeout expires, then its\r
558 content is set to address of the buffer\r
559 holding handle numbers of the failed APs.\r
560\r
561 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
562 the timeout expired.\r
563 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
564 to all enabled APs.\r
565 @retval others Failed to Startup all APs.\r
566\r
567**/\r
568EFI_STATUS\r
ee0c39fa 569StartupAllCPUsWorker (\r
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MK
570 IN EFI_AP_PROCEDURE Procedure,\r
571 IN BOOLEAN SingleThread,\r
572 IN BOOLEAN ExcludeBsp,\r
573 IN EFI_EVENT WaitEvent OPTIONAL,\r
574 IN UINTN TimeoutInMicroseconds,\r
575 IN VOID *ProcedureArgument OPTIONAL,\r
576 OUT UINTN **FailedCpuList OPTIONAL\r
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577 );\r
578\r
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579/**\r
580 Worker function to let the caller get one enabled AP to execute a caller-provided\r
581 function.\r
582\r
583 @param[in] Procedure A pointer to the function to be run on\r
584 enabled APs of the system.\r
585 @param[in] ProcessorNumber The handle number of the AP.\r
586 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
587 service.\r
367284e7 588 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
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589 APs to return from Procedure, either for\r
590 blocking or non-blocking mode.\r
591 @param[in] ProcedureArgument The parameter passed into Procedure for\r
592 all APs.\r
593 @param[out] Finished If AP returns from Procedure before the\r
594 timeout expires, its content is set to TRUE.\r
595 Otherwise, the value is set to FALSE.\r
596\r
597 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
598 the timeout expires.\r
599 @retval others Failed to Startup AP.\r
600\r
601**/\r
602EFI_STATUS\r
603StartupThisAPWorker (\r
053e878b
MK
604 IN EFI_AP_PROCEDURE Procedure,\r
605 IN UINTN ProcessorNumber,\r
606 IN EFI_EVENT WaitEvent OPTIONAL,\r
607 IN UINTN TimeoutInMicroseconds,\r
608 IN VOID *ProcedureArgument OPTIONAL,\r
609 OUT BOOLEAN *Finished OPTIONAL\r
20ae5774
JF
610 );\r
611\r
41be0da5
JF
612/**\r
613 Worker function to switch the requested AP to be the BSP from that point onward.\r
614\r
615 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
616 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
617 enabled AP. Otherwise, it will be disabled.\r
618\r
619 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 620 @retval others Failed to switch BSP.\r
41be0da5
JF
621\r
622**/\r
623EFI_STATUS\r
624SwitchBSPWorker (\r
053e878b
MK
625 IN UINTN ProcessorNumber,\r
626 IN BOOLEAN EnableOldBSP\r
41be0da5
JF
627 );\r
628\r
e37109bc
JF
629/**\r
630 Worker function to let the caller enable or disable an AP from this point onward.\r
631 This service may only be called from the BSP.\r
632\r
633 @param[in] ProcessorNumber The handle number of AP.\r
634 @param[in] EnableAP Specifies the new state for the processor for\r
635 enabled, FALSE for disabled.\r
636 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
637 the new health status of the AP.\r
638\r
639 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
640 @retval others Failed to Enable/Disable AP.\r
641\r
642**/\r
643EFI_STATUS\r
644EnableDisableApWorker (\r
053e878b
MK
645 IN UINTN ProcessorNumber,\r
646 IN BOOLEAN EnableAP,\r
647 IN UINT32 *HealthFlag OPTIONAL\r
e37109bc
JF
648 );\r
649\r
93ca4c0f
JF
650/**\r
651 Get pointer to CPU MP Data structure from GUIDed HOB.\r
652\r
653 @return The pointer to CPU MP Data structure.\r
654**/\r
655CPU_MP_DATA *\r
656GetCpuMpDataFromGuidedHob (\r
657 VOID\r
658 );\r
08085f08
JF
659\r
660/** Checks status of specified AP.\r
661\r
662 This function checks whether the specified AP has finished the task assigned\r
663 by StartupThisAP(), and whether timeout expires.\r
664\r
665 @param[in] ProcessorNumber The handle number of processor.\r
666\r
667 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
668 @retval EFI_TIMEOUT The timeout expires.\r
669 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
670**/\r
671EFI_STATUS\r
672CheckThisAP (\r
053e878b 673 IN UINTN ProcessorNumber\r
08085f08
JF
674 );\r
675\r
676/**\r
677 Checks status of all APs.\r
678\r
679 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
680 and whether timeout expires.\r
681\r
682 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
683 @retval EFI_TIMEOUT The timeout expires.\r
684 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
685**/\r
686EFI_STATUS\r
687CheckAllAPs (\r
688 VOID\r
689 );\r
690\r
691/**\r
692 Checks APs status and updates APs status if needed.\r
693\r
694**/\r
695VOID\r
696CheckAndUpdateApsStatus (\r
697 VOID\r
698 );\r
699\r
94f63c76
JF
700/**\r
701 Detect whether specified processor can find matching microcode patch and load it.\r
702\r
e1ed5573
HW
703 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
704 @param[in] ProcessorNumber The handle number of the processor. The range is\r
705 from 0 to the total number of logical processors\r
706 minus 1.\r
94f63c76
JF
707**/\r
708VOID\r
709MicrocodeDetect (\r
053e878b
MK
710 IN CPU_MP_DATA *CpuMpData,\r
711 IN UINTN ProcessorNumber\r
94f63c76
JF
712 );\r
713\r
d786a172 714/**\r
dd017041 715 Shadow the required microcode patches data into memory.\r
d786a172
HW
716\r
717 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
718**/\r
719VOID\r
dd017041 720ShadowMicrocodeUpdatePatch (\r
053e878b 721 IN OUT CPU_MP_DATA *CpuMpData\r
d786a172
HW
722 );\r
723\r
348a34d9
HW
724/**\r
725 Get the cached microcode patch base address and size from the microcode patch\r
726 information cache HOB.\r
727\r
728 @param[out] Address Base address of the microcode patches data.\r
729 It will be updated if the microcode patch\r
730 information cache HOB is found.\r
731 @param[out] RegionSize Size of the microcode patches data.\r
732 It will be updated if the microcode patch\r
733 information cache HOB is found.\r
734\r
735 @retval TRUE The microcode patch information cache HOB is found.\r
736 @retval FALSE The microcode patch information cache HOB is not found.\r
737\r
738**/\r
739BOOLEAN\r
740GetMicrocodePatchInfoFromHob (\r
053e878b
MK
741 UINT64 *Address,\r
742 UINT64 *RegionSize\r
348a34d9
HW
743 );\r
744\r
4d3314f6
JF
745/**\r
746 Detect whether Mwait-monitor feature is supported.\r
747\r
748 @retval TRUE Mwait-monitor feature is supported.\r
749 @retval FALSE Mwait-monitor feature is not supported.\r
750**/\r
751BOOLEAN\r
752IsMwaitSupport (\r
753 VOID\r
754 );\r
755\r
43c9fdcc
JF
756/**\r
757 Enable Debug Agent to support source debugging on AP function.\r
758\r
759**/\r
760VOID\r
761EnableDebugAgent (\r
762 VOID\r
763 );\r
764\r
e1ed5573
HW
765/**\r
766 Find the current Processor number by APIC ID.\r
767\r
768 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
769 @param[out] ProcessorNumber Return the pocessor number found\r
770\r
771 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
772 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
773**/\r
774EFI_STATUS\r
775GetProcessorNumber (\r
053e878b
MK
776 IN CPU_MP_DATA *CpuMpData,\r
777 OUT UINTN *ProcessorNumber\r
e1ed5573
HW
778 );\r
779\r
c788c2b1
SF
780/**\r
781 This funtion will try to invoke platform specific microcode shadow logic to\r
782 relocate microcode update patches into memory.\r
783\r
4ac82ea1 784 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF
785\r
786 @retval EFI_SUCCESS Shadow microcode success.\r
787 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
788 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
789 PPI/Protocol.\r
790**/\r
791EFI_STATUS\r
792PlatformShadowMicrocode (\r
053e878b 793 IN OUT CPU_MP_DATA *CpuMpData\r
c788c2b1
SF
794 );\r
795\r
e2289d19
BS
796/**\r
797 Allocate the SEV-ES AP jump table buffer.\r
798\r
799 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
800**/\r
801VOID\r
802AllocateSevEsAPMemory (\r
803 IN OUT CPU_MP_DATA *CpuMpData\r
804 );\r
805\r
806/**\r
807 Program the SEV-ES AP jump table buffer.\r
808\r
809 @param[in] SipiVector The SIPI vector used for the AP Reset\r
810**/\r
811VOID\r
812SetSevEsJumpTable (\r
813 IN UINTN SipiVector\r
814 );\r
815\r
816/**\r
817 The function puts the AP in halt loop.\r
818\r
819 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
820**/\r
821VOID\r
822SevEsPlaceApHlt (\r
823 CPU_MP_DATA *CpuMpData\r
824 );\r
825\r
b95908e0
BS
826/**\r
827 Check if the specified confidential computing attribute is active.\r
828\r
829 @retval TRUE The specified Attr is active.\r
830 @retval FALSE The specified Attr is not active.\r
831**/\r
832BOOLEAN\r
833EFIAPI\r
834ConfidentialComputingGuestHas (\r
835 CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r
836 );\r
837\r
d4d7c9ad
MR
838/**\r
839 The function fills the exchange data for the AP.\r
840\r
841 @param[in] ExchangeInfo The pointer to CPU Exchange Data structure\r
842**/\r
843VOID\r
844FillExchangeInfoDataSevEs (\r
845 IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo\r
846 );\r
847\r
06544455
TL
848/**\r
849 Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.\r
850\r
851 @param[in] PageAddress\r
852 @param[in] VmsaPage\r
853\r
854 @return RMPADJUST return value\r
855**/\r
856UINT32\r
857SevSnpRmpAdjust (\r
858 IN EFI_PHYSICAL_ADDRESS PageAddress,\r
859 IN BOOLEAN VmsaPage\r
860 );\r
861\r
862/**\r
863 Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.\r
864\r
865 @param[in] CpuMpData Pointer to CPU MP Data\r
866 @param[in] CpuData Pointer to CPU AP Data\r
867 @param[in] ApicId APIC ID of the vCPU\r
868**/\r
869VOID\r
870SevSnpCreateSaveArea (\r
871 IN CPU_MP_DATA *CpuMpData,\r
872 IN CPU_AP_DATA *CpuData,\r
873 UINT32 ApicId\r
874 );\r
875\r
876/**\r
877 Create SEV-SNP APs.\r
878\r
879 @param[in] CpuMpData Pointer to CPU MP Data\r
880 @param[in] ProcessorNumber The handle number of specified processor\r
881 (-1 for all APs)\r
882**/\r
883VOID\r
884SevSnpCreateAP (\r
885 IN CPU_MP_DATA *CpuMpData,\r
886 IN INTN ProcessorNumber\r
887 );\r
888\r
3e8ad6bd 889#endif\r