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Commit | Line | Data |
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3e8ad6bd JF |
1 | /** @file\r |
2 | Common header file for MP Initialize Library.\r | |
3 | \r | |
b4d7b9d2 | 4 | Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r |
4c0f6e34 LD |
5 | Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r |
6 | \r | |
0acd8697 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
3e8ad6bd JF |
8 | \r |
9 | **/\r | |
10 | \r | |
11 | #ifndef _MP_LIB_H_\r | |
12 | #define _MP_LIB_H_\r | |
13 | \r | |
14 | #include <PiPei.h>\r | |
15 | \r | |
01acb06c | 16 | #include <Register/Intel/Cpuid.h>\r |
4c0f6e34 | 17 | #include <Register/Amd/Cpuid.h>\r |
06544455 | 18 | #include <Register/Amd/Ghcb.h>\r |
01acb06c RN |
19 | #include <Register/Intel/Msr.h>\r |
20 | #include <Register/Intel/LocalApic.h>\r | |
21 | #include <Register/Intel/Microcode.h>\r | |
3e8ad6bd JF |
22 | \r |
23 | #include <Library/MpInitLib.h>\r | |
24 | #include <Library/BaseLib.h>\r | |
25 | #include <Library/BaseMemoryLib.h>\r | |
26 | #include <Library/MemoryAllocationLib.h>\r | |
27 | #include <Library/DebugLib.h>\r | |
28 | #include <Library/LocalApicLib.h>\r | |
29 | #include <Library/CpuLib.h>\r | |
30 | #include <Library/UefiCpuLib.h>\r | |
31 | #include <Library/TimerLib.h>\r | |
32 | #include <Library/SynchronizationLib.h>\r | |
33 | #include <Library/MtrrLib.h>\r | |
34 | #include <Library/HobLib.h>\r | |
d5339c04 | 35 | #include <Library/PcdLib.h>\r |
bce03284 | 36 | #include <Library/MicrocodeLib.h>\r |
b95908e0 | 37 | #include <ConfidentialComputingGuestAttr.h>\r |
3e8ad6bd | 38 | \r |
e2289d19 BS |
39 | #include <Register/Amd/Fam17Msr.h>\r |
40 | #include <Register/Amd/Ghcb.h>\r | |
41 | \r | |
348a34d9 HW |
42 | #include <Guid/MicrocodePatchHob.h>\r |
43 | \r | |
053e878b | 44 | #define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r |
b8b04307 | 45 | \r |
93ca4c0f JF |
46 | #define CPU_INIT_MP_LIB_HOB_GUID \\r |
47 | { \\r | |
48 | 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r | |
49 | }\r | |
50 | \r | |
41be0da5 JF |
51 | //\r |
52 | // The MP data for switch BSP\r | |
53 | //\r | |
053e878b MK |
54 | #define CPU_SWITCH_STATE_IDLE 0\r |
55 | #define CPU_SWITCH_STATE_STORED 1\r | |
56 | #define CPU_SWITCH_STATE_LOADED 2\r | |
41be0da5 | 57 | \r |
d786a172 HW |
58 | //\r |
59 | // Default maximum number of entries to store the microcode patches information\r | |
60 | //\r | |
053e878b | 61 | #define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r |
d786a172 HW |
62 | \r |
63 | //\r | |
64 | // Data structure for microcode patch information\r | |
65 | //\r | |
66 | typedef struct {\r | |
67 | UINTN Address;\r | |
68 | UINTN Size;\r | |
d786a172 HW |
69 | } MICROCODE_PATCH_INFO;\r |
70 | \r | |
d1abb876 ZL |
71 | //\r |
72 | // CPU volatile registers around INIT-SIPI-SIPI\r | |
73 | //\r | |
74 | typedef struct {\r | |
75 | UINTN Cr0;\r | |
76 | UINTN Cr3;\r | |
77 | UINTN Cr4;\r | |
78 | UINTN Dr0;\r | |
79 | UINTN Dr1;\r | |
80 | UINTN Dr2;\r | |
81 | UINTN Dr3;\r | |
82 | UINTN Dr6;\r | |
83 | UINTN Dr7;\r | |
84 | IA32_DESCRIPTOR Gdtr;\r | |
85 | IA32_DESCRIPTOR Idtr;\r | |
86 | UINT16 Tr;\r | |
87 | } CPU_VOLATILE_REGISTERS;\r | |
88 | \r | |
41be0da5 JF |
89 | //\r |
90 | // CPU exchange information for switch BSP\r | |
91 | //\r | |
92 | typedef struct {\r | |
d1abb876 ZL |
93 | UINT8 State; // offset 0\r |
94 | UINTN StackPointer; // offset 4 / 8\r | |
95 | CPU_VOLATILE_REGISTERS VolatileRegisters; // offset 8 / 16\r | |
41be0da5 JF |
96 | } CPU_EXCHANGE_ROLE_INFO;\r |
97 | \r | |
9ebcf0f4 JF |
98 | //\r |
99 | // AP loop state when APs are in idle state\r | |
100 | // It's value is the same with PcdCpuApLoopMode\r | |
101 | //\r | |
102 | typedef enum {\r | |
103 | ApInHltLoop = 1,\r | |
104 | ApInMwaitLoop = 2,\r | |
105 | ApInRunLoop = 3\r | |
106 | } AP_LOOP_MODE;\r | |
107 | \r | |
e59f8f6b JF |
108 | //\r |
109 | // AP initialization state during APs wakeup\r | |
110 | //\r | |
111 | typedef enum {\r | |
112 | ApInitConfig = 1,\r | |
113 | ApInitReconfig = 2,\r | |
114 | ApInitDone = 3\r | |
115 | } AP_INIT_STATE;\r | |
116 | \r | |
03a1a925 JF |
117 | //\r |
118 | // AP state\r | |
119 | //\r | |
2a5997f8 ED |
120 | // The state transitions for an AP when it process a procedure are:\r |
121 | // Idle ----> Ready ----> Busy ----> Idle\r | |
122 | // [BSP] [AP] [AP]\r | |
123 | //\r | |
03a1a925 JF |
124 | typedef enum {\r |
125 | CpuStateIdle,\r | |
126 | CpuStateReady,\r | |
127 | CpuStateBusy,\r | |
e048ce88 | 128 | CpuStateFinished,\r |
03a1a925 JF |
129 | CpuStateDisabled\r |
130 | } CPU_STATE;\r | |
131 | \r | |
e59f8f6b JF |
132 | //\r |
133 | // AP related data\r | |
134 | //\r | |
135 | typedef struct {\r | |
053e878b MK |
136 | SPIN_LOCK ApLock;\r |
137 | volatile UINT32 *StartupApSignal;\r | |
138 | volatile UINTN ApFunction;\r | |
139 | volatile UINTN ApFunctionArgument;\r | |
140 | BOOLEAN CpuHealthy;\r | |
141 | volatile CPU_STATE State;\r | |
142 | CPU_VOLATILE_REGISTERS VolatileRegisters;\r | |
143 | BOOLEAN Waiting;\r | |
144 | BOOLEAN *Finished;\r | |
145 | UINT64 ExpectedTime;\r | |
146 | UINT64 CurrentTime;\r | |
147 | UINT64 TotalTime;\r | |
148 | EFI_EVENT WaitEvent;\r | |
149 | UINT32 ProcessorSignature;\r | |
150 | UINT8 PlatformId;\r | |
151 | UINT64 MicrocodeEntryAddr;\r | |
152 | UINT32 MicrocodeRevision;\r | |
06544455 | 153 | SEV_ES_SAVE_AREA *SevEsSaveArea;\r |
e59f8f6b JF |
154 | } CPU_AP_DATA;\r |
155 | \r | |
156 | //\r | |
157 | // Basic CPU information saved in Guided HOB.\r | |
158 | // Because the contents will be shard between PEI and DXE,\r | |
159 | // we need to make sure the each fields offset same in different\r | |
160 | // architecture.\r | |
161 | //\r | |
dd3fa0cd | 162 | #pragma pack (1)\r |
e59f8f6b | 163 | typedef struct {\r |
053e878b MK |
164 | UINT32 InitialApicId;\r |
165 | UINT32 ApicId;\r | |
166 | UINT32 Health;\r | |
167 | UINT64 ApTopOfStack;\r | |
e59f8f6b | 168 | } CPU_INFO_IN_HOB;\r |
dd3fa0cd | 169 | #pragma pack ()\r |
e59f8f6b | 170 | \r |
f7f85d83 JF |
171 | //\r |
172 | // AP reset code information including code address and size,\r | |
173 | // this structure will be shared be C code and assembly code.\r | |
174 | // It is natural aligned by design.\r | |
175 | //\r | |
176 | typedef struct {\r | |
053e878b MK |
177 | UINT8 *RendezvousFunnelAddress;\r |
178 | UINTN ModeEntryOffset;\r | |
179 | UINTN RendezvousFunnelSize;\r | |
180 | UINT8 *RelocateApLoopFuncAddress;\r | |
181 | UINTN RelocateApLoopFuncSize;\r | |
7bda8c64 YX |
182 | UINT8 *RelocateApLoopFuncAddressAmd;\r |
183 | UINTN RelocateApLoopFuncSizeAmd;\r | |
053e878b | 184 | UINTN ModeTransitionOffset;\r |
053e878b MK |
185 | UINTN SwitchToRealNoNxOffset;\r |
186 | UINTN SwitchToRealPM16ModeOffset;\r | |
187 | UINTN SwitchToRealPM16ModeSize;\r | |
f7f85d83 | 188 | } MP_ASSEMBLY_ADDRESS_MAP;\r |
3e8ad6bd | 189 | \r |
053e878b | 190 | typedef struct _CPU_MP_DATA CPU_MP_DATA;\r |
e59f8f6b | 191 | \r |
d94e5f67 JF |
192 | #pragma pack(1)\r |
193 | \r | |
194 | //\r | |
195 | // MP CPU exchange information for AP reset code\r | |
196 | // This structure is required to be packed because fixed field offsets\r | |
197 | // into this structure are used in assembly code in this module\r | |
198 | //\r | |
199 | typedef struct {\r | |
053e878b MK |
200 | UINTN StackStart;\r |
201 | UINTN StackSize;\r | |
202 | UINTN CFunction;\r | |
203 | IA32_DESCRIPTOR GdtrProfile;\r | |
204 | IA32_DESCRIPTOR IdtrProfile;\r | |
205 | UINTN BufferStart;\r | |
206 | UINTN ModeOffset;\r | |
207 | UINTN ApIndex;\r | |
208 | UINTN CodeSegment;\r | |
209 | UINTN DataSegment;\r | |
210 | UINTN EnableExecuteDisable;\r | |
211 | UINTN Cr3;\r | |
212 | UINTN InitFlag;\r | |
213 | CPU_INFO_IN_HOB *CpuInfo;\r | |
214 | UINTN NumApsExecuting;\r | |
215 | CPU_MP_DATA *CpuMpData;\r | |
216 | UINTN InitializeFloatingPointUnitsAddress;\r | |
217 | UINT32 ModeTransitionMemory;\r | |
218 | UINT16 ModeTransitionSegment;\r | |
219 | UINT32 ModeHighMemory;\r | |
220 | UINT16 ModeHighSegment;\r | |
09f69a87 RN |
221 | //\r |
222 | // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r | |
223 | //\r | |
053e878b MK |
224 | BOOLEAN Enable5LevelPaging;\r |
225 | BOOLEAN SevEsIsEnabled;\r | |
9c703bc0 | 226 | BOOLEAN SevSnpIsEnabled;\r |
053e878b | 227 | UINTN GhcbBase;\r |
d4d7c9ad | 228 | BOOLEAN ExtTopoAvail;\r |
d94e5f67 JF |
229 | } MP_CPU_EXCHANGE_INFO;\r |
230 | \r | |
231 | #pragma pack()\r | |
e59f8f6b JF |
232 | \r |
233 | //\r | |
234 | // CPU MP Data save in memory\r | |
235 | //\r | |
236 | struct _CPU_MP_DATA {\r | |
053e878b MK |
237 | UINT64 CpuInfoInHob;\r |
238 | UINT32 CpuCount;\r | |
239 | UINT32 BspNumber;\r | |
e59f8f6b JF |
240 | //\r |
241 | // The above fields data will be passed from PEI to DXE\r | |
242 | // Please make sure the fields offset same in the different\r | |
243 | // architecture.\r | |
244 | //\r | |
053e878b MK |
245 | SPIN_LOCK MpLock;\r |
246 | UINTN Buffer;\r | |
247 | UINTN CpuApStackSize;\r | |
248 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
249 | UINTN WakeupBuffer;\r | |
250 | UINTN WakeupBufferHigh;\r | |
251 | UINTN BackupBuffer;\r | |
252 | UINTN BackupBufferSize;\r | |
253 | \r | |
254 | volatile UINT32 FinishedCount;\r | |
255 | UINT32 RunningCount;\r | |
256 | BOOLEAN SingleThread;\r | |
257 | EFI_AP_PROCEDURE Procedure;\r | |
258 | VOID *ProcArguments;\r | |
259 | BOOLEAN *Finished;\r | |
260 | UINT64 ExpectedTime;\r | |
261 | UINT64 CurrentTime;\r | |
262 | UINT64 TotalTime;\r | |
263 | EFI_EVENT WaitEvent;\r | |
264 | UINTN **FailedCpuList;\r | |
265 | \r | |
266 | AP_INIT_STATE InitFlag;\r | |
267 | BOOLEAN SwitchBspFlag;\r | |
268 | UINTN NewBspNumber;\r | |
269 | CPU_EXCHANGE_ROLE_INFO BSPInfo;\r | |
270 | CPU_EXCHANGE_ROLE_INFO APInfo;\r | |
271 | MTRR_SETTINGS MtrrTable;\r | |
272 | UINT8 ApLoopMode;\r | |
273 | UINT8 ApTargetCState;\r | |
274 | UINT16 PmCodeSegment;\r | |
275 | UINT16 Pm16CodeSegment;\r | |
276 | CPU_AP_DATA *CpuData;\r | |
277 | volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r | |
278 | \r | |
279 | UINT32 CurrentTimerCount;\r | |
280 | UINTN DivideValue;\r | |
281 | UINT8 Vector;\r | |
282 | BOOLEAN PeriodicMode;\r | |
283 | BOOLEAN TimerInterruptState;\r | |
284 | UINT64 MicrocodePatchAddress;\r | |
285 | UINT64 MicrocodePatchRegionSize;\r | |
2a089134 | 286 | \r |
58942277 ED |
287 | //\r |
288 | // Whether need to use Init-Sipi-Sipi to wake up the APs.\r | |
289 | // Two cases need to set this value to TRUE. One is in HLT\r | |
290 | // loop mode, the other is resume from S3 which loop mode\r | |
e23d9c3e | 291 | // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r |
58942277 ED |
292 | // driver.\r |
293 | //\r | |
053e878b | 294 | BOOLEAN WakeUpByInitSipiSipi;\r |
e88a5b98 | 295 | \r |
053e878b | 296 | BOOLEAN SevEsIsEnabled;\r |
9c703bc0 | 297 | BOOLEAN SevSnpIsEnabled;\r |
06544455 | 298 | BOOLEAN UseSevEsAPMethod;\r |
053e878b MK |
299 | UINTN SevEsAPBuffer;\r |
300 | UINTN SevEsAPResetStackStart;\r | |
301 | CPU_MP_DATA *NewCpuMpData;\r | |
7b7508ad | 302 | \r |
053e878b | 303 | UINT64 GhcbBase;\r |
e59f8f6b | 304 | };\r |
93ca4c0f | 305 | \r |
9ab2b34d YX |
306 | //\r |
307 | // AP_STACK_DATA is stored at the top of each AP stack.\r | |
308 | //\r | |
309 | typedef struct {\r | |
310 | UINTN Bist;\r | |
311 | CPU_MP_DATA *MpData;\r | |
312 | } AP_STACK_DATA;\r | |
313 | \r | |
053e878b MK |
314 | #define AP_SAFE_STACK_SIZE 128\r |
315 | #define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r | |
7b7508ad TL |
316 | \r |
317 | #pragma pack(1)\r | |
318 | \r | |
319 | typedef struct {\r | |
053e878b MK |
320 | UINT8 InsnBuffer[8];\r |
321 | UINT16 Rip;\r | |
322 | UINT16 Segment;\r | |
7b7508ad TL |
323 | } SEV_ES_AP_JMP_FAR;\r |
324 | \r | |
325 | #pragma pack()\r | |
326 | \r | |
327 | /**\r | |
328 | Assembly code to move an AP from long mode to real mode.\r | |
329 | \r | |
330 | Move an AP from long mode to real mode in preparation to invoking\r | |
331 | the reset vector. This is used for SEV-ES guests where a hypervisor\r | |
332 | is not allowed to set the CS and RIP to point to the reset vector.\r | |
333 | \r | |
334 | @param[in] BufferStart The reset vector target.\r | |
335 | @param[in] Code16 16-bit protected mode code segment value.\r | |
336 | @param[in] Code32 32-bit protected mode code segment value.\r | |
337 | @param[in] StackStart The start of a stack to be used for transitioning\r | |
338 | from long mode to real mode.\r | |
339 | **/\r | |
340 | typedef\r | |
e2289d19 | 341 | VOID\r |
053e878b | 342 | (EFIAPI AP_RESET)(\r |
7b7508ad TL |
343 | IN UINTN BufferStart,\r |
344 | IN UINT16 Code16,\r | |
345 | IN UINT16 Code32,\r | |
346 | IN UINTN StackStart\r | |
347 | );\r | |
348 | \r | |
053e878b | 349 | extern EFI_GUID mCpuInitMpLibHobGuid;\r |
93ca4c0f | 350 | \r |
7bda8c64 YX |
351 | /**\r |
352 | Assembly code to place AP into safe loop mode for Amd.\r | |
353 | Place AP into targeted C-State if MONITOR is supported, otherwise\r | |
354 | place AP into hlt state.\r | |
355 | Place AP in protected mode if the current is long mode. Due to AP maybe\r | |
356 | wakeup by some hardware event. It could avoid accessing page table that\r | |
357 | may not available during booting to OS.\r | |
358 | @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r | |
359 | FALSE indicates MONITOR is not supported.\r | |
360 | @param[in] ApTargetCState Target C-State value.\r | |
361 | @param[in] PmCodeSegment Protected mode code segment value.\r | |
362 | **/\r | |
363 | typedef\r | |
364 | VOID\r | |
365 | (EFIAPI *ASM_RELOCATE_AP_LOOP_AMD)(\r | |
366 | IN BOOLEAN MwaitSupport,\r | |
367 | IN UINTN ApTargetCState,\r | |
368 | IN UINTN PmCodeSegment,\r | |
369 | IN UINTN TopOfApStack,\r | |
370 | IN UINTN NumberToFinish,\r | |
371 | IN UINTN Pm16CodeSegment,\r | |
372 | IN UINTN SevEsAPJumpTable,\r | |
373 | IN UINTN WakeupBuffer\r | |
374 | );\r | |
375 | \r | |
76157021 JF |
376 | /**\r |
377 | Assembly code to place AP into safe loop mode.\r | |
378 | \r | |
379 | Place AP into targeted C-State if MONITOR is supported, otherwise\r | |
380 | place AP into hlt state.\r | |
381 | Place AP in protected mode if the current is long mode. Due to AP maybe\r | |
382 | wakeup by some hardware event. It could avoid accessing page table that\r | |
383 | may not available during booting to OS.\r | |
384 | \r | |
385 | @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r | |
386 | FALSE indicates MONITOR is not supported.\r | |
387 | @param[in] ApTargetCState Target C-State value.\r | |
388 | @param[in] PmCodeSegment Protected mode code segment value.\r | |
389 | **/\r | |
390 | typedef\r | |
e2289d19 | 391 | VOID\r |
053e878b | 392 | (EFIAPI *ASM_RELOCATE_AP_LOOP)(\r |
76157021 JF |
393 | IN BOOLEAN MwaitSupport,\r |
394 | IN UINTN ApTargetCState,\r | |
cbcf0cd6 | 395 | IN UINTN PmCodeSegment,\r |
9f91cb01 | 396 | IN UINTN TopOfApStack,\r |
20da7ca4 | 397 | IN UINTN NumberToFinish,\r |
cbcf0cd6 YX |
398 | IN UINTN Pm16CodeSegment,\r |
399 | IN UINTN SevEsAPJumpTable,\r | |
400 | IN UINTN WakeupBuffer\r | |
76157021 | 401 | );\r |
f7f85d83 JF |
402 | \r |
403 | /**\r | |
404 | Assembly code to get starting address and size of the rendezvous entry for APs.\r | |
405 | Information for fixing a jump instruction in the code is also returned.\r | |
406 | \r | |
407 | @param[out] AddressMap Output buffer for address map information.\r | |
408 | **/\r | |
409 | VOID\r | |
410 | EFIAPI\r | |
411 | AsmGetAddressMap (\r | |
053e878b | 412 | OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r |
f7f85d83 JF |
413 | );\r |
414 | \r | |
41be0da5 JF |
415 | /**\r |
416 | This function is called by both the BSP and the AP which is to become the BSP to\r | |
417 | Exchange execution context including stack between them. After return from this\r | |
418 | function, the BSP becomes AP and the AP becomes the BSP.\r | |
419 | \r | |
420 | @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r | |
421 | @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r | |
422 | \r | |
423 | **/\r | |
424 | VOID\r | |
425 | EFIAPI\r | |
426 | AsmExchangeRole (\r | |
053e878b MK |
427 | IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r |
428 | IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r | |
41be0da5 JF |
429 | );\r |
430 | \r | |
93ca4c0f JF |
431 | /**\r |
432 | Get the pointer to CPU MP Data structure.\r | |
433 | \r | |
434 | @return The pointer to CPU MP Data structure.\r | |
435 | **/\r | |
436 | CPU_MP_DATA *\r | |
437 | GetCpuMpData (\r | |
438 | VOID\r | |
439 | );\r | |
440 | \r | |
441 | /**\r | |
442 | Save the pointer to CPU MP Data structure.\r | |
443 | \r | |
444 | @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r | |
445 | **/\r | |
446 | VOID\r | |
447 | SaveCpuMpData (\r | |
053e878b | 448 | IN CPU_MP_DATA *CpuMpData\r |
93ca4c0f JF |
449 | );\r |
450 | \r | |
ed66e0e3 | 451 | /**\r |
a6b3d753 | 452 | Get available system memory below 1MB by specified size.\r |
ed66e0e3 | 453 | \r |
a6b3d753 SZ |
454 | @param[in] WakeupBufferSize Wakeup buffer size required\r |
455 | \r | |
456 | @retval other Return wakeup buffer address below 1MB.\r | |
457 | @retval -1 Cannot find free memory below 1MB.\r | |
ed66e0e3 | 458 | **/\r |
a6b3d753 SZ |
459 | UINTN\r |
460 | GetWakeupBuffer (\r | |
053e878b | 461 | IN UINTN WakeupBufferSize\r |
ed66e0e3 JF |
462 | );\r |
463 | \r | |
f32bfe6d JW |
464 | /**\r |
465 | Get available EfiBootServicesCode memory below 4GB by specified size.\r | |
466 | \r | |
467 | This buffer is required to safely transfer AP from real address mode to\r | |
468 | protected mode or long mode, due to the fact that the buffer returned by\r | |
469 | GetWakeupBuffer() may be marked as non-executable.\r | |
470 | \r | |
471 | @param[in] BufferSize Wakeup transition buffer size.\r | |
472 | \r | |
473 | @retval other Return wakeup transition buffer address below 4GB.\r | |
474 | @retval 0 Cannot find free memory below 4GB.\r | |
475 | **/\r | |
476 | UINTN\r | |
54aeed7e | 477 | AllocateCodeBuffer (\r |
053e878b | 478 | IN UINTN BufferSize\r |
f32bfe6d JW |
479 | );\r |
480 | \r | |
7b7508ad TL |
481 | /**\r |
482 | Return the address of the SEV-ES AP jump table.\r | |
483 | \r | |
484 | This buffer is required in order for an SEV-ES guest to transition from\r | |
485 | UEFI into an OS.\r | |
486 | \r | |
487 | @return Return SEV-ES AP jump table buffer\r | |
488 | **/\r | |
489 | UINTN\r | |
490 | GetSevEsAPMemory (\r | |
491 | VOID\r | |
492 | );\r | |
493 | \r | |
96f5920d JF |
494 | /**\r |
495 | This function will be called by BSP to wakeup AP.\r | |
496 | \r | |
497 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
498 | @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r | |
499 | FALSE: Send IPI to AP by ApicId\r | |
500 | @param[in] ProcessorNumber The handle number of specified processor\r | |
501 | @param[in] Procedure The function to be invoked by AP\r | |
502 | @param[in] ProcedureArgument The argument to be passed into AP function\r | |
cf4e79e4 | 503 | @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r |
96f5920d JF |
504 | **/\r |
505 | VOID\r | |
506 | WakeUpAP (\r | |
053e878b MK |
507 | IN CPU_MP_DATA *CpuMpData,\r |
508 | IN BOOLEAN Broadcast,\r | |
509 | IN UINTN ProcessorNumber,\r | |
510 | IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r | |
511 | IN VOID *ProcedureArgument OPTIONAL,\r | |
0fdd466c | 512 | IN BOOLEAN WakeUpDisabledAps\r |
96f5920d JF |
513 | );\r |
514 | \r | |
93ca4c0f JF |
515 | /**\r |
516 | Initialize global data for MP support.\r | |
517 | \r | |
518 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r | |
519 | **/\r | |
520 | VOID\r | |
521 | InitMpGlobalData (\r | |
053e878b | 522 | IN CPU_MP_DATA *CpuMpData\r |
93ca4c0f JF |
523 | );\r |
524 | \r | |
86efe976 JF |
525 | /**\r |
526 | Worker function to execute a caller provided function on all enabled APs.\r | |
527 | \r | |
528 | @param[in] Procedure A pointer to the function to be run on\r | |
529 | enabled APs of the system.\r | |
530 | @param[in] SingleThread If TRUE, then all the enabled APs execute\r | |
531 | the function specified by Procedure one by\r | |
532 | one, in ascending order of processor handle\r | |
533 | number. If FALSE, then all the enabled APs\r | |
534 | execute the function specified by Procedure\r | |
535 | simultaneously.\r | |
ee0c39fa | 536 | @param[in] ExcludeBsp Whether let BSP also trig this task.\r |
86efe976 JF |
537 | @param[in] WaitEvent The event created by the caller with CreateEvent()\r |
538 | service.\r | |
367284e7 | 539 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r |
86efe976 JF |
540 | APs to return from Procedure, either for\r |
541 | blocking or non-blocking mode.\r | |
542 | @param[in] ProcedureArgument The parameter passed into Procedure for\r | |
543 | all APs.\r | |
544 | @param[out] FailedCpuList If all APs finish successfully, then its\r | |
545 | content is set to NULL. If not all APs\r | |
546 | finish before timeout expires, then its\r | |
547 | content is set to address of the buffer\r | |
548 | holding handle numbers of the failed APs.\r | |
549 | \r | |
550 | @retval EFI_SUCCESS In blocking mode, all APs have finished before\r | |
551 | the timeout expired.\r | |
552 | @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r | |
553 | to all enabled APs.\r | |
554 | @retval others Failed to Startup all APs.\r | |
555 | \r | |
556 | **/\r | |
557 | EFI_STATUS\r | |
ee0c39fa | 558 | StartupAllCPUsWorker (\r |
053e878b MK |
559 | IN EFI_AP_PROCEDURE Procedure,\r |
560 | IN BOOLEAN SingleThread,\r | |
561 | IN BOOLEAN ExcludeBsp,\r | |
562 | IN EFI_EVENT WaitEvent OPTIONAL,\r | |
563 | IN UINTN TimeoutInMicroseconds,\r | |
564 | IN VOID *ProcedureArgument OPTIONAL,\r | |
565 | OUT UINTN **FailedCpuList OPTIONAL\r | |
86efe976 JF |
566 | );\r |
567 | \r | |
20ae5774 JF |
568 | /**\r |
569 | Worker function to let the caller get one enabled AP to execute a caller-provided\r | |
570 | function.\r | |
571 | \r | |
572 | @param[in] Procedure A pointer to the function to be run on\r | |
573 | enabled APs of the system.\r | |
574 | @param[in] ProcessorNumber The handle number of the AP.\r | |
575 | @param[in] WaitEvent The event created by the caller with CreateEvent()\r | |
576 | service.\r | |
367284e7 | 577 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r |
20ae5774 JF |
578 | APs to return from Procedure, either for\r |
579 | blocking or non-blocking mode.\r | |
580 | @param[in] ProcedureArgument The parameter passed into Procedure for\r | |
581 | all APs.\r | |
582 | @param[out] Finished If AP returns from Procedure before the\r | |
583 | timeout expires, its content is set to TRUE.\r | |
584 | Otherwise, the value is set to FALSE.\r | |
585 | \r | |
586 | @retval EFI_SUCCESS In blocking mode, specified AP finished before\r | |
587 | the timeout expires.\r | |
588 | @retval others Failed to Startup AP.\r | |
589 | \r | |
590 | **/\r | |
591 | EFI_STATUS\r | |
592 | StartupThisAPWorker (\r | |
053e878b MK |
593 | IN EFI_AP_PROCEDURE Procedure,\r |
594 | IN UINTN ProcessorNumber,\r | |
595 | IN EFI_EVENT WaitEvent OPTIONAL,\r | |
596 | IN UINTN TimeoutInMicroseconds,\r | |
597 | IN VOID *ProcedureArgument OPTIONAL,\r | |
598 | OUT BOOLEAN *Finished OPTIONAL\r | |
20ae5774 JF |
599 | );\r |
600 | \r | |
41be0da5 JF |
601 | /**\r |
602 | Worker function to switch the requested AP to be the BSP from that point onward.\r | |
603 | \r | |
604 | @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r | |
605 | @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r | |
606 | enabled AP. Otherwise, it will be disabled.\r | |
607 | \r | |
608 | @retval EFI_SUCCESS BSP successfully switched.\r | |
7367cc6c | 609 | @retval others Failed to switch BSP.\r |
41be0da5 JF |
610 | \r |
611 | **/\r | |
612 | EFI_STATUS\r | |
613 | SwitchBSPWorker (\r | |
053e878b MK |
614 | IN UINTN ProcessorNumber,\r |
615 | IN BOOLEAN EnableOldBSP\r | |
41be0da5 JF |
616 | );\r |
617 | \r | |
e37109bc JF |
618 | /**\r |
619 | Worker function to let the caller enable or disable an AP from this point onward.\r | |
620 | This service may only be called from the BSP.\r | |
621 | \r | |
622 | @param[in] ProcessorNumber The handle number of AP.\r | |
623 | @param[in] EnableAP Specifies the new state for the processor for\r | |
624 | enabled, FALSE for disabled.\r | |
625 | @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r | |
626 | the new health status of the AP.\r | |
627 | \r | |
628 | @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r | |
629 | @retval others Failed to Enable/Disable AP.\r | |
630 | \r | |
631 | **/\r | |
632 | EFI_STATUS\r | |
633 | EnableDisableApWorker (\r | |
053e878b MK |
634 | IN UINTN ProcessorNumber,\r |
635 | IN BOOLEAN EnableAP,\r | |
636 | IN UINT32 *HealthFlag OPTIONAL\r | |
e37109bc JF |
637 | );\r |
638 | \r | |
93ca4c0f JF |
639 | /**\r |
640 | Get pointer to CPU MP Data structure from GUIDed HOB.\r | |
641 | \r | |
642 | @return The pointer to CPU MP Data structure.\r | |
643 | **/\r | |
644 | CPU_MP_DATA *\r | |
645 | GetCpuMpDataFromGuidedHob (\r | |
646 | VOID\r | |
647 | );\r | |
08085f08 JF |
648 | \r |
649 | /** Checks status of specified AP.\r | |
650 | \r | |
651 | This function checks whether the specified AP has finished the task assigned\r | |
652 | by StartupThisAP(), and whether timeout expires.\r | |
653 | \r | |
654 | @param[in] ProcessorNumber The handle number of processor.\r | |
655 | \r | |
656 | @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r | |
657 | @retval EFI_TIMEOUT The timeout expires.\r | |
658 | @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r | |
659 | **/\r | |
660 | EFI_STATUS\r | |
661 | CheckThisAP (\r | |
053e878b | 662 | IN UINTN ProcessorNumber\r |
08085f08 JF |
663 | );\r |
664 | \r | |
665 | /**\r | |
666 | Checks status of all APs.\r | |
667 | \r | |
668 | This function checks whether all APs have finished task assigned by StartupAllAPs(),\r | |
669 | and whether timeout expires.\r | |
670 | \r | |
671 | @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r | |
672 | @retval EFI_TIMEOUT The timeout expires.\r | |
673 | @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r | |
674 | **/\r | |
675 | EFI_STATUS\r | |
676 | CheckAllAPs (\r | |
677 | VOID\r | |
678 | );\r | |
679 | \r | |
680 | /**\r | |
681 | Checks APs status and updates APs status if needed.\r | |
682 | \r | |
683 | **/\r | |
684 | VOID\r | |
685 | CheckAndUpdateApsStatus (\r | |
686 | VOID\r | |
687 | );\r | |
688 | \r | |
94f63c76 JF |
689 | /**\r |
690 | Detect whether specified processor can find matching microcode patch and load it.\r | |
691 | \r | |
e1ed5573 HW |
692 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r |
693 | @param[in] ProcessorNumber The handle number of the processor. The range is\r | |
694 | from 0 to the total number of logical processors\r | |
695 | minus 1.\r | |
94f63c76 JF |
696 | **/\r |
697 | VOID\r | |
698 | MicrocodeDetect (\r | |
053e878b MK |
699 | IN CPU_MP_DATA *CpuMpData,\r |
700 | IN UINTN ProcessorNumber\r | |
94f63c76 JF |
701 | );\r |
702 | \r | |
d786a172 | 703 | /**\r |
dd017041 | 704 | Shadow the required microcode patches data into memory.\r |
d786a172 HW |
705 | \r |
706 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r | |
707 | **/\r | |
708 | VOID\r | |
dd017041 | 709 | ShadowMicrocodeUpdatePatch (\r |
053e878b | 710 | IN OUT CPU_MP_DATA *CpuMpData\r |
d786a172 HW |
711 | );\r |
712 | \r | |
348a34d9 HW |
713 | /**\r |
714 | Get the cached microcode patch base address and size from the microcode patch\r | |
715 | information cache HOB.\r | |
716 | \r | |
717 | @param[out] Address Base address of the microcode patches data.\r | |
718 | It will be updated if the microcode patch\r | |
719 | information cache HOB is found.\r | |
720 | @param[out] RegionSize Size of the microcode patches data.\r | |
721 | It will be updated if the microcode patch\r | |
722 | information cache HOB is found.\r | |
723 | \r | |
724 | @retval TRUE The microcode patch information cache HOB is found.\r | |
725 | @retval FALSE The microcode patch information cache HOB is not found.\r | |
726 | \r | |
727 | **/\r | |
728 | BOOLEAN\r | |
729 | GetMicrocodePatchInfoFromHob (\r | |
053e878b MK |
730 | UINT64 *Address,\r |
731 | UINT64 *RegionSize\r | |
348a34d9 HW |
732 | );\r |
733 | \r | |
4d3314f6 JF |
734 | /**\r |
735 | Detect whether Mwait-monitor feature is supported.\r | |
736 | \r | |
737 | @retval TRUE Mwait-monitor feature is supported.\r | |
738 | @retval FALSE Mwait-monitor feature is not supported.\r | |
739 | **/\r | |
740 | BOOLEAN\r | |
741 | IsMwaitSupport (\r | |
742 | VOID\r | |
743 | );\r | |
744 | \r | |
43c9fdcc JF |
745 | /**\r |
746 | Enable Debug Agent to support source debugging on AP function.\r | |
747 | \r | |
748 | **/\r | |
749 | VOID\r | |
750 | EnableDebugAgent (\r | |
751 | VOID\r | |
752 | );\r | |
753 | \r | |
e1ed5573 HW |
754 | /**\r |
755 | Find the current Processor number by APIC ID.\r | |
756 | \r | |
757 | @param[in] CpuMpData Pointer to PEI CPU MP Data\r | |
758 | @param[out] ProcessorNumber Return the pocessor number found\r | |
759 | \r | |
760 | @retval EFI_SUCCESS ProcessorNumber is found and returned.\r | |
761 | @retval EFI_NOT_FOUND ProcessorNumber is not found.\r | |
762 | **/\r | |
763 | EFI_STATUS\r | |
764 | GetProcessorNumber (\r | |
053e878b MK |
765 | IN CPU_MP_DATA *CpuMpData,\r |
766 | OUT UINTN *ProcessorNumber\r | |
e1ed5573 HW |
767 | );\r |
768 | \r | |
c788c2b1 SF |
769 | /**\r |
770 | This funtion will try to invoke platform specific microcode shadow logic to\r | |
771 | relocate microcode update patches into memory.\r | |
772 | \r | |
4ac82ea1 | 773 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r |
c788c2b1 SF |
774 | \r |
775 | @retval EFI_SUCCESS Shadow microcode success.\r | |
776 | @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r | |
777 | @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r | |
778 | PPI/Protocol.\r | |
779 | **/\r | |
780 | EFI_STATUS\r | |
781 | PlatformShadowMicrocode (\r | |
053e878b | 782 | IN OUT CPU_MP_DATA *CpuMpData\r |
c788c2b1 SF |
783 | );\r |
784 | \r | |
e2289d19 BS |
785 | /**\r |
786 | Allocate the SEV-ES AP jump table buffer.\r | |
787 | \r | |
788 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r | |
789 | **/\r | |
790 | VOID\r | |
791 | AllocateSevEsAPMemory (\r | |
792 | IN OUT CPU_MP_DATA *CpuMpData\r | |
793 | );\r | |
794 | \r | |
795 | /**\r | |
796 | Program the SEV-ES AP jump table buffer.\r | |
797 | \r | |
798 | @param[in] SipiVector The SIPI vector used for the AP Reset\r | |
799 | **/\r | |
800 | VOID\r | |
801 | SetSevEsJumpTable (\r | |
802 | IN UINTN SipiVector\r | |
803 | );\r | |
804 | \r | |
805 | /**\r | |
806 | The function puts the AP in halt loop.\r | |
807 | \r | |
808 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r | |
809 | **/\r | |
810 | VOID\r | |
811 | SevEsPlaceApHlt (\r | |
812 | CPU_MP_DATA *CpuMpData\r | |
813 | );\r | |
814 | \r | |
b95908e0 BS |
815 | /**\r |
816 | Check if the specified confidential computing attribute is active.\r | |
817 | \r | |
818 | @retval TRUE The specified Attr is active.\r | |
819 | @retval FALSE The specified Attr is not active.\r | |
820 | **/\r | |
821 | BOOLEAN\r | |
822 | EFIAPI\r | |
823 | ConfidentialComputingGuestHas (\r | |
824 | CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r | |
825 | );\r | |
826 | \r | |
d4d7c9ad MR |
827 | /**\r |
828 | The function fills the exchange data for the AP.\r | |
829 | \r | |
830 | @param[in] ExchangeInfo The pointer to CPU Exchange Data structure\r | |
831 | **/\r | |
832 | VOID\r | |
833 | FillExchangeInfoDataSevEs (\r | |
834 | IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo\r | |
835 | );\r | |
836 | \r | |
06544455 TL |
837 | /**\r |
838 | Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.\r | |
839 | \r | |
840 | @param[in] PageAddress\r | |
841 | @param[in] VmsaPage\r | |
842 | \r | |
843 | @return RMPADJUST return value\r | |
844 | **/\r | |
845 | UINT32\r | |
846 | SevSnpRmpAdjust (\r | |
847 | IN EFI_PHYSICAL_ADDRESS PageAddress,\r | |
848 | IN BOOLEAN VmsaPage\r | |
849 | );\r | |
850 | \r | |
851 | /**\r | |
852 | Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.\r | |
853 | \r | |
854 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
855 | @param[in] CpuData Pointer to CPU AP Data\r | |
856 | @param[in] ApicId APIC ID of the vCPU\r | |
857 | **/\r | |
858 | VOID\r | |
859 | SevSnpCreateSaveArea (\r | |
860 | IN CPU_MP_DATA *CpuMpData,\r | |
861 | IN CPU_AP_DATA *CpuData,\r | |
862 | UINT32 ApicId\r | |
863 | );\r | |
864 | \r | |
865 | /**\r | |
866 | Create SEV-SNP APs.\r | |
867 | \r | |
868 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
869 | @param[in] ProcessorNumber The handle number of specified processor\r | |
870 | (-1 for all APs)\r | |
871 | **/\r | |
872 | VOID\r | |
873 | SevSnpCreateAP (\r | |
874 | IN CPU_MP_DATA *CpuMpData,\r | |
875 | IN INTN ProcessorNumber\r | |
876 | );\r | |
877 | \r | |
3e8ad6bd | 878 | #endif\r |