projects / mirror_edk2.git / blame
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| 529a5a86 MK |
1 | /** @file\r |
| 2 | Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.\r | |
| 3 | \r | |
| 6e601a41 | 4 | Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 241f9149 LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
| 6 | \r | |
| 529a5a86 MK |
7 | This program and the accompanying materials\r |
| 8 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 9 | which accompanies this distribution. The full text of the license may be found at\r | |
| 10 | http://opensource.org/licenses/bsd-license.php\r | |
| 11 | \r | |
| 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 14 | \r | |
| 15 | **/\r | |
| 16 | \r | |
| 17 | #ifndef _CPU_PISMMCPUDXESMM_H_\r | |
| 18 | #define _CPU_PISMMCPUDXESMM_H_\r | |
| 19 | \r | |
| 20 | #include <PiSmm.h>\r | |
| 21 | \r | |
| 22 | #include <Protocol/MpService.h>\r | |
| 23 | #include <Protocol/SmmConfiguration.h>\r | |
| 24 | #include <Protocol/SmmCpu.h>\r | |
| 25 | #include <Protocol/SmmAccess2.h>\r | |
| 529a5a86 MK |
26 | #include <Protocol/SmmReadyToLock.h>\r |
| 27 | #include <Protocol/SmmCpuService.h>\r | |
| 827330cc | 28 | #include <Protocol/SmmMemoryAttribute.h>\r |
| 529a5a86 MK |
29 | \r |
| 30 | #include <Guid/AcpiS3Context.h>\r | |
| 8a2e1a9d | 31 | #include <Guid/MemoryAttributesTable.h>\r |
| 717fb604 | 32 | #include <Guid/PiSmmMemoryAttributesTable.h>\r |
| 529a5a86 MK |
33 | \r |
| 34 | #include <Library/BaseLib.h>\r | |
| 35 | #include <Library/IoLib.h>\r | |
| 36 | #include <Library/TimerLib.h>\r | |
| 529a5a86 MK |
37 | #include <Library/SynchronizationLib.h>\r |
| 38 | #include <Library/DebugLib.h>\r | |
| 39 | #include <Library/BaseMemoryLib.h>\r | |
| 40 | #include <Library/PcdLib.h>\r | |
| 41 | #include <Library/CacheMaintenanceLib.h>\r | |
| 42 | #include <Library/MtrrLib.h>\r | |
| 43 | #include <Library/SmmCpuPlatformHookLib.h>\r | |
| 44 | #include <Library/SmmServicesTableLib.h>\r | |
| 45 | #include <Library/MemoryAllocationLib.h>\r | |
| 46 | #include <Library/UefiBootServicesTableLib.h>\r | |
| 47 | #include <Library/UefiRuntimeServicesTableLib.h>\r | |
| 48 | #include <Library/DebugAgentLib.h>\r | |
| 8a2e1a9d | 49 | #include <Library/UefiLib.h>\r |
| 529a5a86 MK |
50 | #include <Library/HobLib.h>\r |
| 51 | #include <Library/LocalApicLib.h>\r | |
| 52 | #include <Library/UefiCpuLib.h>\r | |
| 53 | #include <Library/CpuExceptionHandlerLib.h>\r | |
| 54 | #include <Library/ReportStatusCodeLib.h>\r | |
| 55 | #include <Library/SmmCpuFeaturesLib.h>\r | |
| 56 | #include <Library/PeCoffGetEntryPointLib.h>\r | |
| 57 | \r | |
| 58 | #include <AcpiCpuData.h>\r | |
| 59 | #include <CpuHotPlugData.h>\r | |
| 60 | \r | |
| 61 | #include <Register/Cpuid.h>\r | |
| f85d3ce2 | 62 | #include <Register/Msr.h>\r |
| 529a5a86 MK |
63 | \r |
| 64 | #include "CpuService.h"\r | |
| 65 | #include "SmmProfile.h"\r | |
| 66 | \r | |
| 67 | //\r | |
| 68 | // MSRs required for configuration of SMM Code Access Check\r | |
| 69 | //\r | |
| 70 | #define EFI_MSR_SMM_MCA_CAP 0x17D\r | |
| 71 | #define SMM_CODE_ACCESS_CHK_BIT BIT58\r | |
| 72 | \r | |
| 73 | #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0\r | |
| 74 | #define SMM_CODE_CHK_EN_BIT BIT2\r | |
| 75 | \r | |
| 76 | ///\r | |
| 77 | /// Page Table Entry\r | |
| 78 | ///\r | |
| 79 | #define IA32_PG_P BIT0\r | |
| 80 | #define IA32_PG_RW BIT1\r | |
| 881520ea | 81 | #define IA32_PG_U BIT2\r |
| 529a5a86 MK |
82 | #define IA32_PG_WT BIT3\r |
| 83 | #define IA32_PG_CD BIT4\r | |
| 84 | #define IA32_PG_A BIT5\r | |
| 881520ea | 85 | #define IA32_PG_D BIT6\r |
| 529a5a86 MK |
86 | #define IA32_PG_PS BIT7\r |
| 87 | #define IA32_PG_PAT_2M BIT12\r | |
| 88 | #define IA32_PG_PAT_4K IA32_PG_PS\r | |
| 89 | #define IA32_PG_PMNT BIT62\r | |
| 90 | #define IA32_PG_NX BIT63\r | |
| 91 | \r | |
| 717fb604 | 92 | #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)\r |
| 881520ea JY |
93 | //\r |
| 94 | // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE\r | |
| 95 | // X64 PAE PDPTE does not have such restriction\r | |
| 96 | //\r | |
| 97 | #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)\r | |
| 98 | \r | |
| 717fb604 JY |
99 | #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)\r |
| 100 | \r | |
| 101 | #define PAGING_4K_MASK 0xFFF\r | |
| 102 | #define PAGING_2M_MASK 0x1FFFFF\r | |
| 103 | #define PAGING_1G_MASK 0x3FFFFFFF\r | |
| 104 | \r | |
| 105 | #define PAGING_PAE_INDEX_MASK 0x1FF\r | |
| 106 | \r | |
| 107 | #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull\r | |
| 108 | #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull\r | |
| 109 | #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r | |
| 110 | \r | |
| 7ed6f781 JF |
111 | #define SMRR_MAX_ADDRESS BASE_4GB\r |
| 112 | \r | |
| 717fb604 JY |
113 | typedef enum {\r |
| 114 | PageNone,\r | |
| 115 | Page4K,\r | |
| 116 | Page2M,\r | |
| 117 | Page1G,\r | |
| 118 | } PAGE_ATTRIBUTE;\r | |
| 119 | \r | |
| 120 | typedef struct {\r | |
| 121 | PAGE_ATTRIBUTE Attribute;\r | |
| 122 | UINT64 Length;\r | |
| 123 | UINT64 AddressMask;\r | |
| 124 | } PAGE_ATTRIBUTE_TABLE;\r | |
| 125 | \r | |
| 529a5a86 MK |
126 | //\r |
| 127 | // Size of Task-State Segment defined in IA32 Manual\r | |
| 128 | //\r | |
| 129 | #define TSS_SIZE 104\r | |
| 130 | #define TSS_X64_IST1_OFFSET 36\r | |
| 131 | #define TSS_IA32_CR3_OFFSET 28\r | |
| 132 | #define TSS_IA32_ESP_OFFSET 56\r | |
| 133 | \r | |
| 717fb604 JY |
134 | #define CR0_WP BIT16\r |
| 135 | \r | |
| 529a5a86 MK |
136 | //\r |
| 137 | // Code select value\r | |
| 138 | //\r | |
| 139 | #define PROTECT_MODE_CODE_SEGMENT 0x08\r | |
| 140 | #define LONG_MODE_CODE_SEGMENT 0x38\r | |
| 141 | \r | |
| 142 | //\r | |
| 143 | // The size 0x20 must be bigger than\r | |
| 144 | // the size of template code of SmmInit. Currently,\r | |
| 145 | // the size of SmmInit requires the 0x16 Bytes buffer\r | |
| 146 | // at least.\r | |
| 147 | //\r | |
| 148 | #define BACK_BUF_SIZE 0x20\r | |
| 149 | \r | |
| 150 | #define EXCEPTION_VECTOR_NUMBER 0x20\r | |
| 151 | \r | |
| 152 | #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL\r | |
| 153 | \r | |
| 154 | typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;\r | |
| 155 | #define ARRIVAL_EXCEPTION_BLOCKED 0x1\r | |
| 156 | #define ARRIVAL_EXCEPTION_DELAYED 0x2\r | |
| 157 | #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4\r | |
| 158 | \r | |
| 159 | //\r | |
| 160 | // Private structure for the SMM CPU module that is stored in DXE Runtime memory\r | |
| 161 | // Contains the SMM Configuration Protocols that is produced.\r | |
| 162 | // Contains a mix of DXE and SMM contents. All the fields must be used properly.\r | |
| 163 | //\r | |
| 164 | #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')\r | |
| 165 | \r | |
| 166 | typedef struct {\r | |
| 167 | UINTN Signature;\r | |
| 168 | \r | |
| 169 | EFI_HANDLE SmmCpuHandle;\r | |
| 170 | \r | |
| 171 | EFI_PROCESSOR_INFORMATION *ProcessorInfo;\r | |
| 172 | SMM_CPU_OPERATION *Operation;\r | |
| 173 | UINTN *CpuSaveStateSize;\r | |
| 174 | VOID **CpuSaveState;\r | |
| 175 | \r | |
| 176 | EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];\r | |
| 177 | EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;\r | |
| 178 | EFI_SMM_ENTRY_POINT SmmCoreEntry;\r | |
| 179 | \r | |
| 180 | EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;\r | |
| 181 | } SMM_CPU_PRIVATE_DATA;\r | |
| 182 | \r | |
| 183 | extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;\r | |
| 184 | extern CPU_HOT_PLUG_DATA mCpuHotPlugData;\r | |
| 185 | extern UINTN mMaxNumberOfCpus;\r | |
| 186 | extern UINTN mNumberOfCpus;\r | |
| 529a5a86 MK |
187 | extern EFI_SMM_CPU_PROTOCOL mSmmCpu;\r |
| 188 | \r | |
| 189 | ///\r | |
| 190 | /// The mode of the CPU at the time an SMI occurs\r | |
| 191 | ///\r | |
| 192 | extern UINT8 mSmmSaveStateRegisterLma;\r | |
| 193 | \r | |
| 529a5a86 MK |
194 | //\r |
| 195 | // SMM CPU Protocol function prototypes.\r | |
| 196 | //\r | |
| 197 | \r | |
| 198 | /**\r | |
| 199 | Read information from the CPU save state.\r | |
| 200 | \r | |
| 201 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
| 202 | @param Width The number of bytes to read from the CPU save state.\r | |
| 203 | @param Register Specifies the CPU register to read form the save state.\r | |
| 204 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
| 205 | @param Buffer Upon return, this holds the CPU register value read from the save state.\r | |
| 206 | \r | |
| 207 | @retval EFI_SUCCESS The register was read from Save State\r | |
| 208 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
| 209 | @retval EFI_INVALID_PARAMTER This or Buffer is NULL.\r | |
| 210 | \r | |
| 211 | **/\r | |
| 212 | EFI_STATUS\r | |
| 213 | EFIAPI\r | |
| 214 | SmmReadSaveState (\r | |
| 215 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r | |
| 216 | IN UINTN Width,\r | |
| 217 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 218 | IN UINTN CpuIndex,\r | |
| 219 | OUT VOID *Buffer\r | |
| 220 | );\r | |
| 221 | \r | |
| 222 | /**\r | |
| 223 | Write data to the CPU save state.\r | |
| 224 | \r | |
| 225 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
| 226 | @param Width The number of bytes to read from the CPU save state.\r | |
| 227 | @param Register Specifies the CPU register to write to the save state.\r | |
| 228 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
| 229 | @param Buffer Upon entry, this holds the new CPU register value.\r | |
| 230 | \r | |
| 231 | @retval EFI_SUCCESS The register was written from Save State\r | |
| 232 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
| 233 | @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct\r | |
| 234 | \r | |
| 235 | **/\r | |
| 236 | EFI_STATUS\r | |
| 237 | EFIAPI\r | |
| 238 | SmmWriteSaveState (\r | |
| 239 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r | |
| 240 | IN UINTN Width,\r | |
| 241 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 242 | IN UINTN CpuIndex,\r | |
| 243 | IN CONST VOID *Buffer\r | |
| 244 | );\r | |
| 245 | \r | |
| 246 | /**\r | |
| 247 | Read a CPU Save State register on the target processor.\r | |
| 248 | \r | |
| 249 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
| 250 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
| 251 | \r | |
| 252 | This function supports reading a CPU Save State register in SMBase relocation handler.\r | |
| 253 | \r | |
| 254 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
| 255 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
| 256 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
| 257 | @param[out] Buffer Upon return, this holds the CPU register value read from the save state.\r | |
| 258 | \r | |
| 259 | @retval EFI_SUCCESS The register was read from Save State.\r | |
| 260 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
| 261 | @retval EFI_INVALID_PARAMTER This or Buffer is NULL.\r | |
| 262 | \r | |
| 263 | **/\r | |
| 264 | EFI_STATUS\r | |
| 265 | EFIAPI\r | |
| 266 | ReadSaveStateRegister (\r | |
| 267 | IN UINTN CpuIndex,\r | |
| 268 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 269 | IN UINTN Width,\r | |
| 270 | OUT VOID *Buffer\r | |
| 271 | );\r | |
| 272 | \r | |
| 273 | /**\r | |
| 274 | Write value to a CPU Save State register on the target processor.\r | |
| 275 | \r | |
| 276 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
| 277 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
| 278 | \r | |
| 279 | This function supports writing a CPU Save State register in SMBase relocation handler.\r | |
| 280 | \r | |
| 281 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
| 282 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
| 283 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
| 284 | @param[in] Buffer Upon entry, this holds the new CPU register value.\r | |
| 285 | \r | |
| 286 | @retval EFI_SUCCESS The register was written to Save State.\r | |
| 287 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
| 288 | @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct.\r | |
| 289 | \r | |
| 290 | **/\r | |
| 291 | EFI_STATUS\r | |
| 292 | EFIAPI\r | |
| 293 | WriteSaveStateRegister (\r | |
| 294 | IN UINTN CpuIndex,\r | |
| 295 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
| 296 | IN UINTN Width,\r | |
| 297 | IN CONST VOID *Buffer\r | |
| 298 | );\r | |
| 299 | \r | |
| 529a5a86 MK |
300 | extern CONST UINT8 gcSmmInitTemplate[];\r |
| 301 | extern CONST UINT16 gcSmmInitSize;\r | |
| f0053e83 LE |
302 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;\r |
| 303 | extern UINT32 mSmmCr0;\r | |
| 6b0841c1 | 304 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;\r |
| 351b49c1 LE |
305 | extern UINT32 mSmmCr4;\r |
| 306 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;\r | |
| 5830d2c3 | 307 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;\r |
| 529a5a86 MK |
308 | \r |
| 309 | /**\r | |
| 310 | Semaphore operation for all processor relocate SMMBase.\r | |
| 311 | **/\r | |
| 312 | VOID\r | |
| 313 | EFIAPI\r | |
| 314 | SmmRelocationSemaphoreComplete (\r | |
| 315 | VOID\r | |
| 316 | );\r | |
| 317 | \r | |
| 318 | ///\r | |
| 319 | /// The type of SMM CPU Information\r | |
| 320 | ///\r | |
| 321 | typedef struct {\r | |
| ed3d5ecb | 322 | SPIN_LOCK *Busy;\r |
| 529a5a86 MK |
323 | volatile EFI_AP_PROCEDURE Procedure;\r |
| 324 | volatile VOID *Parameter;\r | |
| ed3d5ecb JF |
325 | volatile UINT32 *Run;\r |
| 326 | volatile BOOLEAN *Present;\r | |
| 529a5a86 MK |
327 | } SMM_CPU_DATA_BLOCK;\r |
| 328 | \r | |
| 329 | typedef enum {\r | |
| 330 | SmmCpuSyncModeTradition,\r | |
| 331 | SmmCpuSyncModeRelaxedAp,\r | |
| 332 | SmmCpuSyncModeMax\r | |
| 333 | } SMM_CPU_SYNC_MODE;\r | |
| 334 | \r | |
| 335 | typedef struct {\r | |
| 336 | //\r | |
| 337 | // Pointer to an array. The array should be located immediately after this structure\r | |
| 338 | // so that UC cache-ability can be set together.\r | |
| 339 | //\r | |
| 340 | SMM_CPU_DATA_BLOCK *CpuData;\r | |
| fe3a75bc | 341 | volatile UINT32 *Counter;\r |
| 529a5a86 | 342 | volatile UINT32 BspIndex;\r |
| fe3a75bc JF |
343 | volatile BOOLEAN *InsideSmm;\r |
| 344 | volatile BOOLEAN *AllCpusInSync;\r | |
| 529a5a86 MK |
345 | volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;\r |
| 346 | volatile BOOLEAN SwitchBsp;\r | |
| 347 | volatile BOOLEAN *CandidateBsp;\r | |
| 348 | } SMM_DISPATCHER_MP_SYNC_DATA;\r | |
| 349 | \r | |
| 695e62d1 JF |
350 | #define MSR_SPIN_LOCK_INIT_NUM 15\r |
| 351 | \r | |
| 529a5a86 | 352 | typedef struct {\r |
| dc99315b | 353 | SPIN_LOCK *SpinLock;\r |
| 529a5a86 MK |
354 | UINT32 MsrIndex;\r |
| 355 | } MP_MSR_LOCK;\r | |
| 356 | \r | |
| 357 | #define SMM_PSD_OFFSET 0xfb00\r | |
| 358 | \r | |
| 1d648531 JF |
359 | ///\r |
| 360 | /// All global semaphores' pointer\r | |
| 361 | ///\r | |
| 362 | typedef struct {\r | |
| 363 | volatile UINT32 *Counter;\r | |
| 364 | volatile BOOLEAN *InsideSmm;\r | |
| 365 | volatile BOOLEAN *AllCpusInSync;\r | |
| 366 | SPIN_LOCK *PFLock;\r | |
| 367 | SPIN_LOCK *CodeAccessCheckLock;\r | |
| 6c4c15fa | 368 | SPIN_LOCK *MemoryMappedLock;\r |
| 1d648531 JF |
369 | } SMM_CPU_SEMAPHORE_GLOBAL;\r |
| 370 | \r | |
| 4e920581 JF |
371 | ///\r |
| 372 | /// All semaphores for each processor\r | |
| 373 | ///\r | |
| 374 | typedef struct {\r | |
| 375 | SPIN_LOCK *Busy;\r | |
| 376 | volatile UINT32 *Run;\r | |
| 377 | volatile BOOLEAN *Present;\r | |
| 378 | } SMM_CPU_SEMAPHORE_CPU;\r | |
| 379 | \r | |
| 695e62d1 JF |
380 | ///\r |
| 381 | /// All MSRs semaphores' pointer and counter\r | |
| 382 | ///\r | |
| 383 | typedef struct {\r | |
| 384 | SPIN_LOCK *Msr;\r | |
| 385 | UINTN AvailableCounter;\r | |
| 386 | } SMM_CPU_SEMAPHORE_MSR;\r | |
| 4e920581 | 387 | \r |
| 1d648531 JF |
388 | ///\r |
| 389 | /// All semaphores' information\r | |
| 390 | ///\r | |
| 391 | typedef struct {\r | |
| 392 | SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;\r | |
| 4e920581 | 393 | SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;\r |
| 695e62d1 | 394 | SMM_CPU_SEMAPHORE_MSR SemaphoreMsr;\r |
| 1d648531 JF |
395 | } SMM_CPU_SEMAPHORES;\r |
| 396 | \r | |
| 529a5a86 | 397 | extern IA32_DESCRIPTOR gcSmiGdtr;\r |
| 717fb604 JY |
398 | extern EFI_PHYSICAL_ADDRESS mGdtBuffer;\r |
| 399 | extern UINTN mGdtBufferSize;\r | |
| 529a5a86 MK |
400 | extern IA32_DESCRIPTOR gcSmiIdtr;\r |
| 401 | extern VOID *gcSmiIdtrPtr;\r | |
| 529a5a86 | 402 | extern UINT64 gPhyMask;\r |
| 529a5a86 | 403 | extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;\r |
| 529a5a86 MK |
404 | extern UINTN mSmmStackArrayBase;\r |
| 405 | extern UINTN mSmmStackArrayEnd;\r | |
| 406 | extern UINTN mSmmStackSize;\r | |
| 407 | extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;\r | |
| 408 | extern IA32_DESCRIPTOR gcSmiInitGdtr;\r | |
| dc99315b JF |
409 | extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;\r |
| 410 | extern UINTN mSemaphoreSize;\r | |
| fe3a75bc JF |
411 | extern SPIN_LOCK *mPFLock;\r |
| 412 | extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;\r | |
| 6c4c15fa | 413 | extern SPIN_LOCK *mMemoryMappedLock;\r |
| 7ed6f781 JF |
414 | extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;\r |
| 415 | extern UINTN mSmmCpuSmramRangeCount;\r | |
| 714c2603 | 416 | extern UINT8 mPhysicalAddressBits;\r |
| 529a5a86 | 417 | \r |
| 241f9149 LD |
418 | //\r |
| 419 | // Copy of the PcdPteMemoryEncryptionAddressOrMask\r | |
| 420 | //\r | |
| 421 | extern UINT64 mAddressEncMask;\r | |
| 422 | \r | |
| 529a5a86 MK |
423 | /**\r |
| 424 | Create 4G PageTable in SMRAM.\r | |
| 425 | \r | |
| 717fb604 | 426 | @param[in] Is32BitPageTable Whether the page table is 32-bit PAE\r |
| 529a5a86 MK |
427 | @return PageTable Address\r |
| 428 | \r | |
| 429 | **/\r | |
| 430 | UINT32\r | |
| 431 | Gen4GPageTable (\r | |
| 881520ea | 432 | IN BOOLEAN Is32BitPageTable\r |
| 529a5a86 MK |
433 | );\r |
| 434 | \r | |
| 435 | \r | |
| 436 | /**\r | |
| 437 | Initialize global data for MP synchronization.\r | |
| 438 | \r | |
| 439 | @param Stacks Base address of SMI stack buffer for all processors.\r | |
| 440 | @param StackSize Stack size for each processor in SMM.\r | |
| 441 | \r | |
| 442 | **/\r | |
| 443 | UINT32\r | |
| 444 | InitializeMpServiceData (\r | |
| 445 | IN VOID *Stacks,\r | |
| 446 | IN UINTN StackSize\r | |
| 447 | );\r | |
| 448 | \r | |
| 449 | /**\r | |
| 450 | Initialize Timer for SMM AP Sync.\r | |
| 451 | \r | |
| 452 | **/\r | |
| 453 | VOID\r | |
| 454 | InitializeSmmTimer (\r | |
| 455 | VOID\r | |
| 456 | );\r | |
| 457 | \r | |
| 458 | /**\r | |
| 459 | Start Timer for SMM AP Sync.\r | |
| 460 | \r | |
| 461 | **/\r | |
| 462 | UINT64\r | |
| 463 | EFIAPI\r | |
| 464 | StartSyncTimer (\r | |
| 465 | VOID\r | |
| 466 | );\r | |
| 467 | \r | |
| 468 | /**\r | |
| 469 | Check if the SMM AP Sync timer is timeout.\r | |
| 470 | \r | |
| 471 | @param Timer The start timer from the begin.\r | |
| 472 | \r | |
| 473 | **/\r | |
| 474 | BOOLEAN\r | |
| 475 | EFIAPI\r | |
| 476 | IsSyncTimerTimeout (\r | |
| 477 | IN UINT64 Timer\r | |
| 478 | );\r | |
| 479 | \r | |
| 480 | /**\r | |
| 481 | Initialize IDT for SMM Stack Guard.\r | |
| 482 | \r | |
| 483 | **/\r | |
| 484 | VOID\r | |
| 485 | EFIAPI\r | |
| 486 | InitializeIDTSmmStackGuard (\r | |
| 487 | VOID\r | |
| 488 | );\r | |
| 489 | \r | |
| fe5f1949 JY |
490 | /**\r |
| 491 | Initialize Gdt for all processors.\r | |
| 717fb604 | 492 | \r |
| fe5f1949 JY |
493 | @param[in] Cr3 CR3 value.\r |
| 494 | @param[out] GdtStepSize The step size for GDT table.\r | |
| 495 | \r | |
| 496 | @return GdtBase for processor 0.\r | |
| 497 | GdtBase for processor X is: GdtBase + (GdtStepSize * X)\r | |
| 498 | **/\r | |
| 499 | VOID *\r | |
| 500 | InitGdt (\r | |
| 501 | IN UINTN Cr3,\r | |
| 502 | OUT UINTN *GdtStepSize\r | |
| 503 | );\r | |
| 504 | \r | |
| 529a5a86 MK |
505 | /**\r |
| 506 | \r | |
| 507 | Register the SMM Foundation entry point.\r | |
| 508 | \r | |
| 509 | @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance\r | |
| 510 | @param SmmEntryPoint SMM Foundation EntryPoint\r | |
| 511 | \r | |
| 512 | @retval EFI_SUCCESS Successfully to register SMM foundation entry point\r | |
| 513 | \r | |
| 514 | **/\r | |
| 515 | EFI_STATUS\r | |
| 516 | EFIAPI\r | |
| 517 | RegisterSmmEntry (\r | |
| 518 | IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,\r | |
| 519 | IN EFI_SMM_ENTRY_POINT SmmEntryPoint\r | |
| 520 | );\r | |
| 521 | \r | |
| 522 | /**\r | |
| 523 | Create PageTable for SMM use.\r | |
| 524 | \r | |
| 525 | @return PageTable Address\r | |
| 526 | \r | |
| 527 | **/\r | |
| 528 | UINT32\r | |
| 529 | SmmInitPageTable (\r | |
| 530 | VOID\r | |
| 531 | );\r | |
| 532 | \r | |
| 533 | /**\r | |
| 534 | Schedule a procedure to run on the specified CPU.\r | |
| 535 | \r | |
| 536 | @param Procedure The address of the procedure to run\r | |
| 537 | @param CpuIndex Target CPU number\r | |
| 538 | @param ProcArguments The parameter to pass to the procedure\r | |
| 539 | \r | |
| 540 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
| 541 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
| 542 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
| 543 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
| 544 | @retval EFI_SUCCESS - The procedure has been successfully scheduled\r | |
| 545 | \r | |
| 546 | **/\r | |
| 547 | EFI_STATUS\r | |
| 548 | EFIAPI\r | |
| 549 | SmmStartupThisAp (\r | |
| 550 | IN EFI_AP_PROCEDURE Procedure,\r | |
| 551 | IN UINTN CpuIndex,\r | |
| 552 | IN OUT VOID *ProcArguments OPTIONAL\r | |
| 553 | );\r | |
| 554 | \r | |
| 555 | /**\r | |
| 556 | Schedule a procedure to run on the specified CPU in a blocking fashion.\r | |
| 557 | \r | |
| 558 | @param Procedure The address of the procedure to run\r | |
| 559 | @param CpuIndex Target CPU Index\r | |
| 560 | @param ProcArguments The parameter to pass to the procedure\r | |
| 561 | \r | |
| 562 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
| 563 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
| 564 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
| 565 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
| 566 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
| 567 | \r | |
| 568 | **/\r | |
| 569 | EFI_STATUS\r | |
| 570 | EFIAPI\r | |
| 571 | SmmBlockingStartupThisAp (\r | |
| 572 | IN EFI_AP_PROCEDURE Procedure,\r | |
| 573 | IN UINTN CpuIndex,\r | |
| 574 | IN OUT VOID *ProcArguments OPTIONAL\r | |
| 575 | );\r | |
| 576 | \r | |
| e4435f71 JY |
577 | /**\r |
| 578 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
| 579 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 580 | \r | |
| 581 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 582 | @param[in] Length The size in bytes of the memory region.\r | |
| 583 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
| 584 | \r | |
| 585 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
| 586 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 587 | BaseAddress and Length cannot be modified.\r | |
| 588 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 589 | Attributes specified an illegal combination of attributes that\r | |
| 590 | cannot be set together.\r | |
| 591 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 592 | the memory resource range.\r | |
| 593 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 594 | resource range specified by BaseAddress and Length.\r | |
| 595 | The bit mask of attributes is not support for the memory resource\r | |
| 596 | range specified by BaseAddress and Length.\r | |
| 597 | \r | |
| 598 | **/\r | |
| 599 | EFI_STATUS\r | |
| 600 | EFIAPI\r | |
| 601 | SmmSetMemoryAttributes (\r | |
| 602 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 603 | IN UINT64 Length,\r | |
| 604 | IN UINT64 Attributes\r | |
| 605 | );\r | |
| 606 | \r | |
| 607 | /**\r | |
| 608 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
| 609 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 610 | \r | |
| 611 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 612 | @param[in] Length The size in bytes of the memory region.\r | |
| 613 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
| 614 | \r | |
| 615 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
| 616 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 617 | BaseAddress and Length cannot be modified.\r | |
| 618 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 619 | Attributes specified an illegal combination of attributes that\r | |
| 620 | cannot be set together.\r | |
| 621 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 622 | the memory resource range.\r | |
| 623 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 624 | resource range specified by BaseAddress and Length.\r | |
| 625 | The bit mask of attributes is not support for the memory resource\r | |
| 626 | range specified by BaseAddress and Length.\r | |
| 627 | \r | |
| 628 | **/\r | |
| 629 | EFI_STATUS\r | |
| 630 | EFIAPI\r | |
| 631 | SmmClearMemoryAttributes (\r | |
| 632 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 633 | IN UINT64 Length,\r | |
| 634 | IN UINT64 Attributes\r | |
| 635 | );\r | |
| 636 | \r | |
| 529a5a86 MK |
637 | /**\r |
| 638 | Initialize MP synchronization data.\r | |
| 639 | \r | |
| 640 | **/\r | |
| 641 | VOID\r | |
| 642 | EFIAPI\r | |
| 643 | InitializeMpSyncData (\r | |
| 644 | VOID\r | |
| 645 | );\r | |
| 646 | \r | |
| 647 | /**\r | |
| 648 | \r | |
| 649 | Find out SMRAM information including SMRR base and SMRR size.\r | |
| 650 | \r | |
| 651 | @param SmrrBase SMRR base\r | |
| 652 | @param SmrrSize SMRR size\r | |
| 653 | \r | |
| 654 | **/\r | |
| 655 | VOID\r | |
| 656 | FindSmramInfo (\r | |
| 657 | OUT UINT32 *SmrrBase,\r | |
| 658 | OUT UINT32 *SmrrSize\r | |
| 659 | );\r | |
| 660 | \r | |
| 661 | /**\r | |
| 0bdc9e75 | 662 | Relocate SmmBases for each processor.\r |
| 529a5a86 | 663 | \r |
| 0bdc9e75 | 664 | Execute on first boot and all S3 resumes\r |
| 529a5a86 MK |
665 | \r |
| 666 | **/\r | |
| 667 | VOID\r | |
| 0bdc9e75 SZ |
668 | EFIAPI\r |
| 669 | SmmRelocateBases (\r | |
| 529a5a86 MK |
670 | VOID\r |
| 671 | );\r | |
| 672 | \r | |
| 673 | /**\r | |
| 674 | Page Fault handler for SMM use.\r | |
| 675 | \r | |
| 676 | @param InterruptType Defines the type of interrupt or exception that\r | |
| 677 | occurred on the processor.This parameter is processor architecture specific.\r | |
| 678 | @param SystemContext A pointer to the processor context when\r | |
| 679 | the interrupt occurred on the processor.\r | |
| 680 | **/\r | |
| 681 | VOID\r | |
| 682 | EFIAPI\r | |
| 683 | SmiPFHandler (\r | |
| b8caae19 JF |
684 | IN EFI_EXCEPTION_TYPE InterruptType,\r |
| 685 | IN EFI_SYSTEM_CONTEXT SystemContext\r | |
| 529a5a86 MK |
686 | );\r |
| 687 | \r | |
| 688 | /**\r | |
| 689 | Perform the remaining tasks.\r | |
| 690 | \r | |
| 691 | **/\r | |
| 692 | VOID\r | |
| 693 | PerformRemainingTasks (\r | |
| 694 | VOID\r | |
| 695 | );\r | |
| 696 | \r | |
| 9f419739 JY |
697 | /**\r |
| 698 | Perform the pre tasks.\r | |
| 699 | \r | |
| 700 | **/\r | |
| 701 | VOID\r | |
| 702 | PerformPreTasks (\r | |
| 703 | VOID\r | |
| 704 | );\r | |
| 705 | \r | |
| 529a5a86 MK |
706 | /**\r |
| 707 | Initialize MSR spin lock by MSR index.\r | |
| 708 | \r | |
| 709 | @param MsrIndex MSR index value.\r | |
| 710 | \r | |
| 711 | **/\r | |
| 712 | VOID\r | |
| 713 | InitMsrSpinLockByIndex (\r | |
| 714 | IN UINT32 MsrIndex\r | |
| 715 | );\r | |
| 716 | \r | |
| 717 | /**\r | |
| 718 | Hook return address of SMM Save State so that semaphore code\r | |
| 719 | can be executed immediately after AP exits SMM to indicate to\r | |
| 720 | the BSP that an AP has exited SMM after SMBASE relocation.\r | |
| 721 | \r | |
| 722 | @param[in] CpuIndex The processor index.\r | |
| 723 | @param[in] RebasedFlag A pointer to a flag that is set to TRUE\r | |
| 724 | immediately after AP exits SMM.\r | |
| 725 | \r | |
| 726 | **/\r | |
| 727 | VOID\r | |
| 728 | SemaphoreHook (\r | |
| 729 | IN UINTN CpuIndex,\r | |
| 730 | IN volatile BOOLEAN *RebasedFlag\r | |
| 731 | );\r | |
| 732 | \r | |
| 733 | /**\r | |
| 734 | Configure SMM Code Access Check feature for all processors.\r | |
| 735 | SMM Feature Control MSR will be locked after configuration.\r | |
| 736 | **/\r | |
| 737 | VOID\r | |
| 738 | ConfigSmmCodeAccessCheck (\r | |
| 739 | VOID\r | |
| 740 | );\r | |
| 741 | \r | |
| 742 | /**\r | |
| 743 | Hook the code executed immediately after an RSM instruction on the currently\r | |
| 744 | executing CPU. The mode of code executed immediately after RSM must be\r | |
| 745 | detected, and the appropriate hook must be selected. Always clear the auto\r | |
| 746 | HALT restart flag if it is set.\r | |
| 747 | \r | |
| 748 | @param[in] CpuIndex The processor index for the currently\r | |
| 749 | executing CPU.\r | |
| 750 | @param[in] CpuState Pointer to SMRAM Save State Map for the\r | |
| 751 | currently executing CPU.\r | |
| 752 | @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to\r | |
| 753 | 32-bit mode from 64-bit SMM.\r | |
| 754 | @param[in] NewInstructionPointer Instruction pointer to use if resuming to\r | |
| 755 | same mode as SMM.\r | |
| 756 | \r | |
| 757 | @retval The value of the original instruction pointer before it was hooked.\r | |
| 758 | \r | |
| 759 | **/\r | |
| 760 | UINT64\r | |
| 761 | EFIAPI\r | |
| 762 | HookReturnFromSmm (\r | |
| 763 | IN UINTN CpuIndex,\r | |
| 764 | SMRAM_SAVE_STATE_MAP *CpuState,\r | |
| 765 | UINT64 NewInstructionPointer32,\r | |
| 766 | UINT64 NewInstructionPointer\r | |
| 767 | );\r | |
| 768 | \r | |
| 769 | /**\r | |
| 770 | Get the size of the SMI Handler in bytes.\r | |
| 771 | \r | |
| 772 | @retval The size, in bytes, of the SMI Handler.\r | |
| 773 | \r | |
| 774 | **/\r | |
| 775 | UINTN\r | |
| 776 | EFIAPI\r | |
| 777 | GetSmiHandlerSize (\r | |
| 778 | VOID\r | |
| 779 | );\r | |
| 780 | \r | |
| 781 | /**\r | |
| 782 | Install the SMI handler for the CPU specified by CpuIndex. This function\r | |
| 783 | is called by the CPU that was elected as monarch during System Management\r | |
| 784 | Mode initialization.\r | |
| 785 | \r | |
| 786 | @param[in] CpuIndex The index of the CPU to install the custom SMI handler.\r | |
| 787 | The value must be between 0 and the NumberOfCpus field\r | |
| 788 | in the System Management System Table (SMST).\r | |
| 789 | @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.\r | |
| 790 | @param[in] SmiStack The stack to use when an SMI is processed by the\r | |
| 791 | the CPU specified by CpuIndex.\r | |
| 792 | @param[in] StackSize The size, in bytes, if the stack used when an SMI is\r | |
| 793 | processed by the CPU specified by CpuIndex.\r | |
| 794 | @param[in] GdtBase The base address of the GDT to use when an SMI is\r | |
| 795 | processed by the CPU specified by CpuIndex.\r | |
| 796 | @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is\r | |
| 797 | processed by the CPU specified by CpuIndex.\r | |
| 798 | @param[in] IdtBase The base address of the IDT to use when an SMI is\r | |
| 799 | processed by the CPU specified by CpuIndex.\r | |
| 800 | @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is\r | |
| 801 | processed by the CPU specified by CpuIndex.\r | |
| 802 | @param[in] Cr3 The base address of the page tables to use when an SMI\r | |
| 803 | is processed by the CPU specified by CpuIndex.\r | |
| 804 | **/\r | |
| 805 | VOID\r | |
| 806 | EFIAPI\r | |
| 807 | InstallSmiHandler (\r | |
| 808 | IN UINTN CpuIndex,\r | |
| 809 | IN UINT32 SmBase,\r | |
| 810 | IN VOID *SmiStack,\r | |
| 811 | IN UINTN StackSize,\r | |
| 812 | IN UINTN GdtBase,\r | |
| 813 | IN UINTN GdtSize,\r | |
| 814 | IN UINTN IdtBase,\r | |
| 815 | IN UINTN IdtSize,\r | |
| 816 | IN UINT32 Cr3\r | |
| 817 | );\r | |
| 818 | \r | |
| 819 | /**\r | |
| 820 | Search module name by input IP address and output it.\r | |
| 821 | \r | |
| 822 | @param CallerIpAddress Caller instruction pointer.\r | |
| 823 | \r | |
| 824 | **/\r | |
| 825 | VOID\r | |
| 826 | DumpModuleInfoByIp (\r | |
| 827 | IN UINTN CallerIpAddress\r | |
| 828 | );\r | |
| 21c17193 | 829 | \r |
| 717fb604 JY |
830 | /**\r |
| 831 | This function sets memory attribute according to MemoryAttributesTable.\r | |
| 832 | **/\r | |
| 833 | VOID\r | |
| 834 | SetMemMapAttributes (\r | |
| 835 | VOID\r | |
| 836 | );\r | |
| 837 | \r | |
| d2fc7711 JY |
838 | /**\r |
| 839 | This function sets UEFI memory attribute according to UEFI memory map.\r | |
| 840 | **/\r | |
| 841 | VOID\r | |
| 842 | SetUefiMemMapAttributes (\r | |
| 843 | VOID\r | |
| 844 | );\r | |
| 845 | \r | |
| 846 | /**\r | |
| 847 | Return if the Address is forbidden as SMM communication buffer.\r | |
| 848 | \r | |
| 849 | @param[in] Address the address to be checked\r | |
| 850 | \r | |
| 851 | @return TRUE The address is forbidden as SMM communication buffer.\r | |
| 852 | @return FALSE The address is allowed as SMM communication buffer.\r | |
| 853 | **/\r | |
| 854 | BOOLEAN\r | |
| 855 | IsSmmCommBufferForbiddenAddress (\r | |
| 856 | IN UINT64 Address\r | |
| 857 | );\r | |
| 858 | \r | |
| 859 | /**\r | |
| 860 | This function caches the UEFI memory map information.\r | |
| 861 | **/\r | |
| 862 | VOID\r | |
| 863 | GetUefiMemoryMap (\r | |
| 864 | VOID\r | |
| 865 | );\r | |
| 866 | \r | |
| 717fb604 JY |
867 | /**\r |
| 868 | This function sets memory attribute for page table.\r | |
| 869 | **/\r | |
| 870 | VOID\r | |
| 871 | SetPageTableAttributes (\r | |
| 872 | VOID\r | |
| 873 | );\r | |
| 874 | \r | |
| 875 | /**\r | |
| 876 | Return page table base.\r | |
| 877 | \r | |
| 878 | @return page table base.\r | |
| 879 | **/\r | |
| 880 | UINTN\r | |
| 881 | GetPageTableBase (\r | |
| 882 | VOID\r | |
| 883 | );\r | |
| 884 | \r | |
| 885 | /**\r | |
| 886 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
| 887 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 888 | \r | |
| 889 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 890 | @param[in] Length The size in bytes of the memory region.\r | |
| 891 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
| 892 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
| 893 | \r | |
| 894 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
| 895 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 896 | BaseAddress and Length cannot be modified.\r | |
| 897 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 898 | Attributes specified an illegal combination of attributes that\r | |
| 899 | cannot be set together.\r | |
| 900 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 901 | the memory resource range.\r | |
| 902 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 903 | resource range specified by BaseAddress and Length.\r | |
| 904 | The bit mask of attributes is not support for the memory resource\r | |
| 905 | range specified by BaseAddress and Length.\r | |
| 906 | \r | |
| 907 | **/\r | |
| 908 | EFI_STATUS\r | |
| 909 | EFIAPI\r | |
| 910 | SmmSetMemoryAttributesEx (\r | |
| 911 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 912 | IN UINT64 Length,\r | |
| 913 | IN UINT64 Attributes,\r | |
| 914 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
| 915 | );\r | |
| 916 | \r | |
| 917 | /**\r | |
| 918 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
| 919 | Length from their current attributes to the attributes specified by Attributes.\r | |
| 920 | \r | |
| 921 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
| 922 | @param[in] Length The size in bytes of the memory region.\r | |
| 923 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
| 924 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
| 925 | \r | |
| 926 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
| 927 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
| 928 | BaseAddress and Length cannot be modified.\r | |
| 929 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 930 | Attributes specified an illegal combination of attributes that\r | |
| 931 | cannot be set together.\r | |
| 932 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
| 933 | the memory resource range.\r | |
| 934 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
| 935 | resource range specified by BaseAddress and Length.\r | |
| 936 | The bit mask of attributes is not support for the memory resource\r | |
| 937 | range specified by BaseAddress and Length.\r | |
| 938 | \r | |
| 939 | **/\r | |
| 940 | EFI_STATUS\r | |
| 941 | EFIAPI\r | |
| 942 | SmmClearMemoryAttributesEx (\r | |
| 943 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 944 | IN UINT64 Length,\r | |
| 945 | IN UINT64 Attributes,\r | |
| 946 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
| 947 | );\r | |
| 948 | \r | |
| 21c17193 JY |
949 | /**\r |
| 950 | This API provides a way to allocate memory for page table.\r | |
| 951 | \r | |
| 952 | This API can be called more once to allocate memory for page tables.\r | |
| 953 | \r | |
| 954 | Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r | |
| 955 | allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r | |
| 956 | is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r | |
| 957 | returned.\r | |
| 958 | \r | |
| 959 | @param Pages The number of 4 KB pages to allocate.\r | |
| 960 | \r | |
| 961 | @return A pointer to the allocated buffer or NULL if allocation fails.\r | |
| 962 | \r | |
| 963 | **/\r | |
| 964 | VOID *\r | |
| 965 | AllocatePageTableMemory (\r | |
| 966 | IN UINTN Pages\r | |
| 967 | );\r | |
| 968 | \r | |
| 717fb604 JY |
969 | /**\r |
| 970 | Allocate pages for code.\r | |
| 971 | \r | |
| 972 | @param[in] Pages Number of pages to be allocated.\r | |
| 973 | \r | |
| 974 | @return Allocated memory.\r | |
| 975 | **/\r | |
| 976 | VOID *\r | |
| 977 | AllocateCodePages (\r | |
| 978 | IN UINTN Pages\r | |
| 979 | );\r | |
| 980 | \r | |
| 981 | /**\r | |
| 982 | Allocate aligned pages for code.\r | |
| 983 | \r | |
| 984 | @param[in] Pages Number of pages to be allocated.\r | |
| 985 | @param[in] Alignment The requested alignment of the allocation.\r | |
| 986 | Must be a power of two.\r | |
| 987 | If Alignment is zero, then byte alignment is used.\r | |
| 988 | \r | |
| 989 | @return Allocated memory.\r | |
| 990 | **/\r | |
| 991 | VOID *\r | |
| 992 | AllocateAlignedCodePages (\r | |
| 993 | IN UINTN Pages,\r | |
| 994 | IN UINTN Alignment\r | |
| 995 | );\r | |
| 996 | \r | |
| 0bdc9e75 SZ |
997 | \r |
| 998 | //\r | |
| 999 | // S3 related global variable and function prototype.\r | |
| 1000 | //\r | |
| 1001 | \r | |
| 1002 | extern BOOLEAN mSmmS3Flag;\r | |
| 1003 | \r | |
| 1004 | /**\r | |
| 1005 | Initialize SMM S3 resume state structure used during S3 Resume.\r | |
| 1006 | \r | |
| 1007 | @param[in] Cr3 The base address of the page tables to use in SMM.\r | |
| 1008 | \r | |
| 1009 | **/\r | |
| 1010 | VOID\r | |
| 1011 | InitSmmS3ResumeState (\r | |
| 1012 | IN UINT32 Cr3\r | |
| 1013 | );\r | |
| 1014 | \r | |
| 1015 | /**\r | |
| 1016 | Get ACPI CPU data.\r | |
| 1017 | \r | |
| 1018 | **/\r | |
| 1019 | VOID\r | |
| 1020 | GetAcpiCpuData (\r | |
| 1021 | VOID\r | |
| 1022 | );\r | |
| 1023 | \r | |
| 1024 | /**\r | |
| 1025 | Restore SMM Configuration in S3 boot path.\r | |
| 1026 | \r | |
| 1027 | **/\r | |
| 1028 | VOID\r | |
| 1029 | RestoreSmmConfigurationInS3 (\r | |
| 1030 | VOID\r | |
| 1031 | );\r | |
| 1032 | \r | |
| b10d5ddc SZ |
1033 | /**\r |
| 1034 | Get ACPI S3 enable flag.\r | |
| 1035 | \r | |
| 1036 | **/\r | |
| 1037 | VOID\r | |
| 1038 | GetAcpiS3EnableFlag (\r | |
| 1039 | VOID\r | |
| 1040 | );\r | |
| 1041 | \r | |
| 4a0f88dd JF |
1042 | /**\r |
| 1043 | Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.\r | |
| 1044 | \r | |
| 672b80c8 MK |
1045 | @param[in] ApHltLoopCode The address of the safe hlt-loop function.\r |
| 1046 | @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.\r | |
| 1047 | @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.\r | |
| 4a0f88dd JF |
1048 | \r |
| 1049 | **/\r | |
| 1050 | VOID\r | |
| 1051 | TransferApToSafeState (\r | |
| 672b80c8 MK |
1052 | IN UINTN ApHltLoopCode,\r |
| 1053 | IN UINTN TopOfStack,\r | |
| 1054 | IN UINTN NumberToFinishAddress\r | |
| 4a0f88dd JF |
1055 | );\r |
| 1056 | \r | |
| 827330cc JW |
1057 | /**\r |
| 1058 | This function set given attributes of the memory region specified by\r | |
| 1059 | BaseAddress and Length.\r | |
| 1060 | \r | |
| 1061 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
| 1062 | @param BaseAddress The physical address that is the start address of\r | |
| 1063 | a memory region.\r | |
| 1064 | @param Length The size in bytes of the memory region.\r | |
| 1065 | @param Attributes The bit mask of attributes to set for the memory\r | |
| 1066 | region.\r | |
| 1067 | \r | |
| 1068 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
| 1069 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 1070 | Attributes specified an illegal combination of\r | |
| 1071 | attributes that cannot be set together.\r | |
| 1072 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
| 1073 | bytes of the memory resource range specified\r | |
| 1074 | by BaseAddress and Length.\r | |
| aae02dcc | 1075 | The bit mask of attributes is not supported for\r |
| 827330cc JW |
1076 | the memory resource range specified by\r |
| 1077 | BaseAddress and Length.\r | |
| 1078 | \r | |
| 1079 | **/\r | |
| 1080 | EFI_STATUS\r | |
| 1081 | EFIAPI\r | |
| 1082 | EdkiiSmmSetMemoryAttributes (\r | |
| 1083 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r | |
| 1084 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1085 | IN UINT64 Length,\r | |
| 1086 | IN UINT64 Attributes\r | |
| 1087 | );\r | |
| 1088 | \r | |
| 1089 | /**\r | |
| 1090 | This function clears given attributes of the memory region specified by\r | |
| 1091 | BaseAddress and Length.\r | |
| 1092 | \r | |
| 1093 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
| 1094 | @param BaseAddress The physical address that is the start address of\r | |
| 1095 | a memory region.\r | |
| 1096 | @param Length The size in bytes of the memory region.\r | |
| aae02dcc | 1097 | @param Attributes The bit mask of attributes to clear for the memory\r |
| 827330cc JW |
1098 | region.\r |
| 1099 | \r | |
| aae02dcc | 1100 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r |
| 827330cc JW |
1101 | @retval EFI_INVALID_PARAMETER Length is zero.\r |
| 1102 | Attributes specified an illegal combination of\r | |
| aae02dcc | 1103 | attributes that cannot be cleared together.\r |
| 827330cc JW |
1104 | @retval EFI_UNSUPPORTED The processor does not support one or more\r |
| 1105 | bytes of the memory resource range specified\r | |
| 1106 | by BaseAddress and Length.\r | |
| aae02dcc | 1107 | The bit mask of attributes is not supported for\r |
| 827330cc JW |
1108 | the memory resource range specified by\r |
| 1109 | BaseAddress and Length.\r | |
| 1110 | \r | |
| 1111 | **/\r | |
| 1112 | EFI_STATUS\r | |
| 1113 | EFIAPI\r | |
| 1114 | EdkiiSmmClearMemoryAttributes (\r | |
| 1115 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r | |
| 1116 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1117 | IN UINT64 Length,\r | |
| 1118 | IN UINT64 Attributes\r | |
| 1119 | );\r | |
| 1120 | \r | |
| 1121 | /**\r | |
| aae02dcc | 1122 | This function retrieves the attributes of the memory region specified by\r |
| 827330cc JW |
1123 | BaseAddress and Length. If different attributes are got from different part\r |
| 1124 | of the memory region, EFI_NO_MAPPING will be returned.\r | |
| 1125 | \r | |
| 1126 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
| 1127 | @param BaseAddress The physical address that is the start address of\r | |
| 1128 | a memory region.\r | |
| 1129 | @param Length The size in bytes of the memory region.\r | |
| 1130 | @param Attributes Pointer to attributes returned.\r | |
| 1131 | \r | |
| 1132 | @retval EFI_SUCCESS The attributes got for the memory region.\r | |
| 1133 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
| 1134 | Attributes is NULL.\r | |
| 1135 | @retval EFI_NO_MAPPING Attributes are not consistent cross the memory\r | |
| 1136 | region.\r | |
| 1137 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
| 1138 | bytes of the memory resource range specified\r | |
| 1139 | by BaseAddress and Length.\r | |
| 827330cc JW |
1140 | \r |
| 1141 | **/\r | |
| 1142 | EFI_STATUS\r | |
| 1143 | EFIAPI\r | |
| 1144 | EdkiiSmmGetMemoryAttributes (\r | |
| 1145 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r | |
| 1146 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
| 1147 | IN UINT64 Length,\r | |
| 1148 | IN UINT64 *Attributes\r | |
| 1149 | );\r | |
| 1150 | \r | |
| e21e355e LG |
1151 | /**\r |
| 1152 | This function fixes up the address of the global variable or function\r | |
| 1153 | referred in SmmInit assembly files to be the absoute address.\r | |
| 1154 | **/\r | |
| 1155 | VOID\r | |
| 1156 | EFIAPI\r | |
| 1157 | PiSmmCpuSmmInitFixupAddress (\r | |
| 1158 | );\r | |
| 1159 | \r | |
| 1160 | /**\r | |
| 1161 | This function fixes up the address of the global variable or function\r | |
| 1162 | referred in SmiEntry assembly files to be the absoute address.\r | |
| 1163 | **/\r | |
| 1164 | VOID\r | |
| 1165 | EFIAPI\r | |
| 1166 | PiSmmCpuSmiEntryFixupAddress (\r | |
| 1167 | );\r | |
| 1168 | \r | |
| 529a5a86 | 1169 | #endif\r |