.long (_Data) ; \\r
1:\r
\r
-// Convert the (ClusterId,CoreId) into a Core Position\r
-// We assume there are 4 cores per cluster\r
-// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK\r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \\r
- ldr Tmp, =0xFFFF \\r
- and MpId, Tmp \\r
- lsr Pos, MpId, #6 ; \\r
- and Tmp, MpId, #3 ; \\r
- add Pos, Pos, Tmp\r
-\r
// Reserve a region at the top of the Primary Core stack\r
// for Global variables for the XIP phase\r
#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r
#define LoadConstantToReg(Data, Reg) \\r
ldr Reg, =Data\r
\r
-// Convert the (ClusterId,CoreId) into a Core Position\r
-// We assume there are 4 cores per cluster\r
-// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK\r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \\r
- ldr Tmp, =0xFFFF ; \\r
- and MpId, Tmp ; \\r
- lsr Pos, MpId, #6 ; \\r
- and Tmp, MpId, #3 ; \\r
- add Pos, Pos, Tmp\r
-\r
#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r
and Tmp, GlobalSize, #7 ; \\r
rsbne Tmp, Tmp, #8 ; \\r
// conditional load testing eq flag\r
#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg\r
\r
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) GetCorePositionFromMpId Pos, MpId, Tmp\r
-\r
#define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp\r
\r
// Initialize the Global Variable with '0'\r
ldr $Reg, =($Data) \r
MEND \r
\r
- MACRO\r
- GetCorePositionFromMpId $Pos, $MpId, $Tmp\r
- ;Note: The ARM macro does not support the pre-processing. 0xFF and (0xFF << 8) are the values of\r
- ; ARM_CORE_MASK and ARM_CLUSTER_MASK \r
- mov $Tmp, #(0xFF :OR: (0xFF << 8))\r
- and $MpId, $Tmp\r
- lsr $Pos, $MpId, #6\r
- and $Tmp, $MpId, #3\r
- add $Pos, $Pos, $Tmp\r
- MEND\r
- \r
; The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack\r
; Note: Global Size will be modified\r
MACRO\r
#\r
\r
#include <AsmMacroIoLib.h>\r
+#include <Library/ArmLib.h>\r
\r
.text\r
.align 2\r
\r
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r
+GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r
\r
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)\r
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r
movne r0, #0\r
bx lr\r
\r
+//UINTN\r
+//ArmPlatformGetCorePosition (\r
+// IN UINTN MpId\r
+// );\r
+ASM_PFX(ArmPlatformGetCorePosition):\r
+ and r0, r0, #ARM_CORE_MASK\r
+ bx lr\r
+\r
ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r
//\r
\r
#include <AsmMacroIoLib.h>\r
+#include <Library/ArmLib.h>\r
\r
#include <AutoGen.h>\r
\r
\r
EXPORT ArmPlatformIsPrimaryCore\r
EXPORT ArmPlatformGetPrimaryCoreMpId\r
+ EXPORT ArmPlatformGetCorePosition\r
\r
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask\r
bx lr\r
ENDFUNC\r
\r
+//UINTN\r
+//ArmPlatformGetCorePosition (\r
+// IN UINTN MpId\r
+// );\r
+ArmPlatformGetCorePosition FUNCTION\r
+ and r0, r0, #ARM_CORE_MASK\r
+ bx lr\r
+ ENDFUNC\r
+\r
END\r
\r
#include <AsmMacroIoLib.h>\r
#include <Base.h>\r
+#include <Library/ArmLib.h>\r
#include <Library/PcdLib.h>\r
#include <AutoGen.h>\r
\r
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)\r
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r
+GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r
\r
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)\r
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r
movne r0, #0\r
bx lr\r
\r
+//UINTN\r
+//ArmPlatformGetCorePosition (\r
+// IN UINTN MpId\r
+// );\r
+ASM_PFX(ArmPlatformGetCorePosition):\r
+ and r1, r0, #ARM_CORE_MASK\r
+ and r0, r0, #ARM_CLUSTER_MASK\r
+ add r0, r1, r0, LSR #7\r
+ bx lr\r
+\r
ASM_FUNCTION_REMOVE_IF_UNREFERENCED \r
//\r
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
// \r
// This program and the accompanying materials \r
// are licensed and made available under the terms and conditions of the BSD License \r
\r
#include <AsmMacroIoLib.h>\r
#include <Base.h>\r
+#include <Library/ArmLib.h>\r
#include <Library/PcdLib.h>\r
\r
#include <Chipset/ArmCortexA9.h>\r
EXPORT ArmGetCpuCountPerCluster\r
EXPORT ArmPlatformIsPrimaryCore\r
EXPORT ArmPlatformGetPrimaryCoreMpId\r
+ EXPORT ArmPlatformGetCorePosition\r
\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask\r
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask\r
\r
AREA RTSMHelper, CODE, READONLY\r
\r
bx lr\r
ENDFUNC\r
\r
+//UINTN\r
+//ArmPlatformGetCorePosition (\r
+// IN UINTN MpId\r
+// );\r
+ArmPlatformGetCorePosition FUNCTION\r
+ and r1, r0, #ARM_CORE_MASK\r
+ and r0, r0, #ARM_CLUSTER_MASK\r
+ add r0, r1, r0, LSR #7\r
+ bx lr\r
+ ENDFUNC\r
+\r
END\r
.align 3\r
\r
GCC_ASM_IMPORT(CEntryPoint)\r
+GCC_ASM_IMPORT(ArmPlatformGetCorePosition)\r
GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
GCC_ASM_IMPORT(ArmReadMpidr)\r
GCC_ASM_EXPORT(_ModuleEntryPoint)\r
_SetupSecondaryCoreStack:\r
// r1 contains the base of the secondary stacks\r
\r
- // Get the Core Position (ClusterId * 4) + CoreId\r
- GetCorePositionFromMpId(r0, r5, r2)\r
+ // Get the Core Position\r
+ mov r6, r1 // Save base of the secondary stacks\r
+ mov r0, r5\r
+ bl ASM_PFX(ArmPlatformGetCorePosition)\r
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
add r0, r0, #1\r
\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
mul r0, r0, r2\r
// SP = StackBase + StackOffset\r
- add sp, r1, r0\r
+ add sp, r6, r0\r
\r
_PrepareArguments:\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
INCLUDE AsmMacroIoLib.inc\r
\r
IMPORT CEntryPoint\r
+ IMPORT ArmPlatformGetCorePosition\r
IMPORT ArmPlatformIsPrimaryCore\r
IMPORT ArmReadMpidr\r
EXPORT _ModuleEntryPoint\r
_SetupSecondaryCoreStack\r
// r1 contains the base of the secondary stacks\r
\r
- // Get the Core Position (ClusterId * 4) + CoreId\r
- GetCorePositionFromMpId(r0, r5, r2)\r
+ // Get the Core Position\r
+ mov r6, r1 // Save base of the secondary stacks\r
+ mov r0, r5\r
+ bl ArmPlatformGetCorePosition\r
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
add r0, r0, #1\r
\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
mul r0, r0, r2\r
// SP = StackBase + StackOffset\r
- add sp, r1, r0\r
+ add sp, r6, r0\r
\r
_PrepareArguments\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
\r
GCC_ASM_IMPORT(CEntryPoint)\r
GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
+GCC_ASM_IMPORT(ArmPlatformGetCorePosition)\r
GCC_ASM_IMPORT(ArmPlatformSecBootAction)\r
GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)\r
GCC_ASM_IMPORT(ArmDisableInterrupts)\r
// Get the top of the primary stacks (and the base of the secondary stacks)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)\r
- add r1, r1, r2\r
+ add r6, r1, r2\r
\r
- // Get the Core Position (ClusterId * 4) + CoreId\r
- GetCorePositionFromMpId(r0, r9, r2)\r
+ // Get the Core Position\r
+ mov r0, r9\r
+ bl ASM_PFX(ArmPlatformGetCorePosition)\r
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
add r0, r0, #1\r
\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)\r
mul r0, r0, r2\r
// SP = StackBase + StackOffset\r
- add sp, r1, r0\r
+ add sp, r6, r0\r
\r
_PrepareArguments:\r
// Move sec startup address into a data register\r
\r
IMPORT CEntryPoint\r
IMPORT ArmPlatformIsPrimaryCore\r
+ IMPORT ArmPlatformGetCorePosition\r
IMPORT ArmPlatformSecBootAction\r
IMPORT ArmPlatformSecBootMemoryInit\r
IMPORT ArmDisableInterrupts\r
// Get the top of the primary stacks (and the base of the secondary stacks)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)\r
- add r1, r1, r2\r
+ add r6, r1, r2\r
\r
- // Get the Core Position (ClusterId * 4) + CoreId\r
- GetCorePositionFromMpId(r0, r9, r2)\r
+ // Get the Core Position\r
+ mov r0, r9\r
+ bl ArmPlatformGetCorePosition\r
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
add r0, r0, #1\r
\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)\r
mul r0, r0, r2\r
// SP = StackBase + StackOffset\r
- add sp, r1, r0\r
+ add sp, r6, r0\r
\r
_PrepareArguments\r
// Move sec startup address into a data register\r