]> git.proxmox.com Git - mirror_edk2.git/commitdiff
ArmPkg BeagleBoardPkg Omap35xxPkg: fix typo 'ArmDataSyncronizationBarrier'
authorArd Biesheuvel <ard.biesheuvel@linaro.org>
Mon, 9 Nov 2015 13:25:50 +0000 (13:25 +0000)
committerabiesheuvel <abiesheuvel@Edk2>
Mon, 9 Nov 2015 13:25:50 +0000 (13:25 +0000)
Replace all instances of ArmDataSyncronizationBarrier with
ArmDataSynchronizationBarrier.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18751 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Include/Library/ArmLib.h
ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c
Omap35xxPkg/InterruptDxe/HardwareInterrupt.c
Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c

index b4768841bd9daf107f8365631efdf47cfd030cec..58116663b28d8d9202af7c8a483cfae1b2d4a31b 100644 (file)
@@ -483,7 +483,7 @@ ArmDataMemoryBarrier (
 \r
 VOID\r
 EFIAPI\r
-ArmDataSyncronizationBarrier (\r
+ArmDataSynchronizationBarrier (\r
   VOID\r
   );\r
 \r
index 28cf27fbd1b67cb22fa31779695414cafb346378..8b5e0fb6e7fe7d86ebcb9834e2bae4da24adc194 100644 (file)
@@ -42,7 +42,7 @@ GCC_ASM_EXPORT (ArmDisableBranchPrediction)
 GCC_ASM_EXPORT (AArch64AllDataCachesOperation)\r
 GCC_ASM_EXPORT (AArch64PerformPoUDataCacheOperation)\r
 GCC_ASM_EXPORT (ArmDataMemoryBarrier)\r
-GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)\r
+GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)\r
 GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)\r
 GCC_ASM_EXPORT (ArmWriteVBar)\r
 GCC_ASM_EXPORT (ArmReadVBar)\r
@@ -389,7 +389,7 @@ ASM_PFX(ArmDataMemoryBarrier):
   ret\r
 \r
 \r
-ASM_PFX(ArmDataSyncronizationBarrier):\r
+ASM_PFX(ArmDataSynchronizationBarrier):\r
 ASM_PFX(ArmDrainWriteBuffer):\r
   dsb   sy\r
   ret\r
index af5ec23a1a4f5d67f123932a394567bf24342c04..f59cd5f32e6b2ef2d51f4be5e0f1da981f56035a 100644 (file)
@@ -40,7 +40,7 @@ GCC_ASM_EXPORT (ArmSetHighVectors)
 GCC_ASM_EXPORT (ArmV7AllDataCachesOperation)\r
 GCC_ASM_EXPORT (ArmV7PerformPoUDataCacheOperation)\r
 GCC_ASM_EXPORT (ArmDataMemoryBarrier)\r
-GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)\r
+GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)\r
 GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)\r
 GCC_ASM_EXPORT (ArmReadVBar)\r
 GCC_ASM_EXPORT (ArmWriteVBar)\r
@@ -321,7 +321,7 @@ ASM_PFX(ArmDataMemoryBarrier):
   dmb\r
   bx      LR\r
 \r
-ASM_PFX(ArmDataSyncronizationBarrier):\r
+ASM_PFX(ArmDataSynchronizationBarrier):\r
 ASM_PFX(ArmDrainWriteBuffer):\r
   dsb\r
   bx      LR\r
index 2b13811dc6cfc31479de320ac9ed2d6c656a6d8a..07ff1ae15a6a3a4121ef9f210b05d8e09f9b04f2 100644 (file)
@@ -37,7 +37,7 @@
     EXPORT  ArmV7AllDataCachesOperation\r
     EXPORT  ArmV7PerformPoUDataCacheOperation\r
     EXPORT  ArmDataMemoryBarrier\r
-    EXPORT  ArmDataSyncronizationBarrier\r
+    EXPORT  ArmDataSynchronizationBarrier\r
     EXPORT  ArmInstructionSynchronizationBarrier\r
     EXPORT  ArmReadVBar\r
     EXPORT  ArmWriteVBar\r
@@ -315,7 +315,7 @@ ArmDataMemoryBarrier
   dmb\r
   bx      LR\r
 \r
-ArmDataSyncronizationBarrier\r
+ArmDataSynchronizationBarrier\r
 ArmDrainWriteBuffer\r
   dsb\r
   bx      LR\r
index dbbe68a7a08e83afae93749bbeb23a88fd11b980..3b0244004853b42c347f90368fb2457dea1938aa 100755 (executable)
@@ -92,11 +92,11 @@ ArmPlatformInitialize (
 \r
   // Turn off the functional clock for Timer 3\r
   MmioAnd32 (CM_FCLKEN_PER, 0xFFFFFFFF ^ CM_ICLKEN_PER_EN_GPT3_ENABLE );\r
-  ArmDataSyncronizationBarrier ();\r
+  ArmDataSynchronizationBarrier ();\r
 \r
   // Clear IRQs\r
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);\r
-  ArmDataSyncronizationBarrier ();\r
+  ArmDataSynchronizationBarrier ();\r
 \r
   return RETURN_SUCCESS;\r
 }\r
index e9d84aeabb698960d4936c4e95a42101e8b4399b..09e22b5921b0fd10c40dea6e91173c605890ee75 100644 (file)
@@ -237,7 +237,7 @@ EndOfInterrupt (
   )\r
 {\r
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);\r
-  ArmDataSyncronizationBarrier ();\r
+  ArmDataSynchronizationBarrier ();\r
   return EFI_SUCCESS;\r
 }\r
 \r
@@ -267,7 +267,7 @@ IrqInterruptHandler (
 \r
   // Needed to prevent infinite nesting when Time Driver lowers TPL\r
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);\r
-  ArmDataSyncronizationBarrier ();\r
+  ArmDataSynchronizationBarrier ();\r
 \r
   InterruptHandler = gRegisteredInterruptHandlers[Vector];\r
   if (InterruptHandler != NULL) {\r
@@ -277,7 +277,7 @@ IrqInterruptHandler (
 \r
   // Needed to clear after running the handler\r
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);\r
-  ArmDataSyncronizationBarrier ();\r
+  ArmDataSynchronizationBarrier ();\r
 }\r
 \r
 //\r
index de849d4fd69136b44099e0ae55271473289df9d5..11f0bdd117af823e5d260743a99713938d322dda 100755 (executable)
@@ -159,7 +159,7 @@ DebugAgentTimerEndOfInterrupt (
   while ((MmioRead32 (gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);\r
 \r
   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWFIQAGR);\r
-  ArmDataSyncronizationBarrier ();\r
+  ArmDataSynchronizationBarrier ();\r
 \r
 }\r
 \r