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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
1965aae3
PA
2#ifndef _ASM_X86_PGTABLE_H
3#define _ASM_X86_PGTABLE_H
6c386655 4
21729f81 5#include <linux/mem_encrypt.h>
c47c1b1f 6#include <asm/page.h>
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
21729f81
TL
18/*
19 * Macros to add or remove encryption attribute
20 */
21#define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot)))
22#define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot)))
23
4614139c 24#ifndef __ASSEMBLY__
55a6ca25
PA
25#include <asm/x86_init.h>
26
b9d05200
TL
27extern pgd_t early_top_pgt[PTRS_PER_PGD];
28int __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
29
ef6bea6d 30void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
a4b51ef6 31void ptdump_walk_pgd_level_debugfs(struct seq_file *m, pgd_t *pgd, bool user);
e1a58320
SS
32void ptdump_walk_pgd_level_checkwx(void);
33
34#ifdef CONFIG_DEBUG_WX
35#define debug_checkwx() ptdump_walk_pgd_level_checkwx()
36#else
37#define debug_checkwx() do { } while (0)
38#endif
ef6bea6d 39
8405b122
JF
40/*
41 * ZERO_PAGE is a global shared page that is always zero: used
42 * for zero-mapped memory areas etc..
43 */
277d5b40
AK
44extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
45 __visible;
8405b122
JF
46#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
47
e3ed910d
JF
48extern spinlock_t pgd_lock;
49extern struct list_head pgd_list;
8405b122 50
617d34d9
JF
51extern struct mm_struct *pgd_page_get_mm(struct page *page);
52
21729f81
TL
53extern pmdval_t early_pmd_flags;
54
54321d94
JF
55#ifdef CONFIG_PARAVIRT
56#include <asm/paravirt.h>
57#else /* !CONFIG_PARAVIRT */
58#define set_pte(ptep, pte) native_set_pte(ptep, pte)
59#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
60
54321d94
JF
61#define set_pte_atomic(ptep, pte) \
62 native_set_pte_atomic(ptep, pte)
63
64#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
65
f2a6a705 66#ifndef __PAGETABLE_P4D_FOLDED
54321d94
JF
67#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
68#define pgd_clear(pgd) native_pgd_clear(pgd)
69#endif
70
f2a6a705
KS
71#ifndef set_p4d
72# define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d)
73#endif
74
75#ifndef __PAGETABLE_PUD_FOLDED
76#define p4d_clear(p4d) native_p4d_clear(p4d)
77#endif
78
54321d94
JF
79#ifndef set_pud
80# define set_pud(pudp, pud) native_set_pud(pudp, pud)
81#endif
82
d0f33ac9 83#ifndef __PAGETABLE_PUD_FOLDED
54321d94
JF
84#define pud_clear(pud) native_pud_clear(pud)
85#endif
86
87#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
88#define pmd_clear(pmd) native_pmd_clear(pmd)
89
54321d94
JF
90#define pgd_val(x) native_pgd_val(x)
91#define __pgd(x) native_make_pgd(x)
92
f2a6a705
KS
93#ifndef __PAGETABLE_P4D_FOLDED
94#define p4d_val(x) native_p4d_val(x)
95#define __p4d(x) native_make_p4d(x)
96#endif
97
54321d94
JF
98#ifndef __PAGETABLE_PUD_FOLDED
99#define pud_val(x) native_pud_val(x)
100#define __pud(x) native_make_pud(x)
101#endif
102
103#ifndef __PAGETABLE_PMD_FOLDED
104#define pmd_val(x) native_pmd_val(x)
105#define __pmd(x) native_make_pmd(x)
106#endif
107
108#define pte_val(x) native_pte_val(x)
109#define __pte(x) native_make_pte(x)
110
224101ed
JF
111#define arch_end_context_switch(prev) do {} while(0)
112
54321d94
JF
113#endif /* CONFIG_PARAVIRT */
114
4614139c
JF
115/*
116 * The following only work if pte_present() is true.
117 * Undefined behaviour if not..
118 */
3cbaeafe
JP
119static inline int pte_dirty(pte_t pte)
120{
a15af1c9 121 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
122}
123
a927cb83
DH
124
125static inline u32 read_pkru(void)
126{
127 if (boot_cpu_has(X86_FEATURE_OSPKE))
128 return __read_pkru();
129 return 0;
130}
131
9e90199c
XG
132static inline void write_pkru(u32 pkru)
133{
134 if (boot_cpu_has(X86_FEATURE_OSPKE))
135 __write_pkru(pkru);
136}
137
3cbaeafe
JP
138static inline int pte_young(pte_t pte)
139{
a15af1c9 140 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
141}
142
c164e038
KS
143static inline int pmd_dirty(pmd_t pmd)
144{
145 return pmd_flags(pmd) & _PAGE_DIRTY;
146}
3cbaeafe 147
f2d6bfe9
JW
148static inline int pmd_young(pmd_t pmd)
149{
150 return pmd_flags(pmd) & _PAGE_ACCESSED;
151}
152
a00cc7d9
MW
153static inline int pud_dirty(pud_t pud)
154{
155 return pud_flags(pud) & _PAGE_DIRTY;
156}
157
158static inline int pud_young(pud_t pud)
159{
160 return pud_flags(pud) & _PAGE_ACCESSED;
161}
162
3cbaeafe
JP
163static inline int pte_write(pte_t pte)
164{
a15af1c9 165 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
166}
167
3cbaeafe
JP
168static inline int pte_huge(pte_t pte)
169{
a15af1c9 170 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
171}
172
3cbaeafe
JP
173static inline int pte_global(pte_t pte)
174{
a15af1c9 175 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
176}
177
178static inline int pte_exec(pte_t pte)
179{
a15af1c9 180 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
181}
182
7e675137
NP
183static inline int pte_special(pte_t pte)
184{
c819f37e 185 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
186}
187
91030ca1
HD
188static inline unsigned long pte_pfn(pte_t pte)
189{
190 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
191}
192
087975b0
AM
193static inline unsigned long pmd_pfn(pmd_t pmd)
194{
f70abb0f 195 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
087975b0
AM
196}
197
0ee364eb
MG
198static inline unsigned long pud_pfn(pud_t pud)
199{
f70abb0f 200 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
0ee364eb
MG
201}
202
fe1e8c3e
KS
203static inline unsigned long p4d_pfn(p4d_t p4d)
204{
205 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
206}
207
fd7e3159
TL
208static inline unsigned long pgd_pfn(pgd_t pgd)
209{
210 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
211}
212
fe1e8c3e
KS
213static inline int p4d_large(p4d_t p4d)
214{
215 /* No 512 GiB pages yet */
216 return 0;
217}
218
91030ca1
HD
219#define pte_page(pte) pfn_to_page(pte_pfn(pte))
220
3cbaeafe
JP
221static inline int pmd_large(pmd_t pte)
222{
027ef6c8 223 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
224}
225
f2d6bfe9 226#ifdef CONFIG_TRANSPARENT_HUGEPAGE
f2d6bfe9
JW
227static inline int pmd_trans_huge(pmd_t pmd)
228{
5c7fb56e 229 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
f2d6bfe9 230}
4b7167b9 231
a00cc7d9
MW
232#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
233static inline int pud_trans_huge(pud_t pud)
234{
235 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
236}
237#endif
238
fd8cfd30 239#define has_transparent_hugepage has_transparent_hugepage
4b7167b9
AA
240static inline int has_transparent_hugepage(void)
241{
16bf9226 242 return boot_cpu_has(X86_FEATURE_PSE);
4b7167b9 243}
5c7fb56e
DW
244
245#ifdef __HAVE_ARCH_PTE_DEVMAP
246static inline int pmd_devmap(pmd_t pmd)
247{
248 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
249}
a00cc7d9
MW
250
251#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
252static inline int pud_devmap(pud_t pud)
253{
254 return !!(pud_val(pud) & _PAGE_DEVMAP);
255}
256#else
257static inline int pud_devmap(pud_t pud)
258{
259 return 0;
260}
261#endif
e585513b
KS
262
263static inline int pgd_devmap(pgd_t pgd)
264{
265 return 0;
266}
5c7fb56e 267#endif
f2d6bfe9
JW
268#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
269
6522869c
JF
270static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
271{
272 pteval_t v = native_pte_val(pte);
273
274 return native_make_pte(v | set);
275}
276
277static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
278{
279 pteval_t v = native_pte_val(pte);
280
281 return native_make_pte(v & ~clear);
282}
283
3cbaeafe
JP
284static inline pte_t pte_mkclean(pte_t pte)
285{
6522869c 286 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
287}
288
289static inline pte_t pte_mkold(pte_t pte)
290{
6522869c 291 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
292}
293
294static inline pte_t pte_wrprotect(pte_t pte)
295{
6522869c 296 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
297}
298
299static inline pte_t pte_mkexec(pte_t pte)
300{
6522869c 301 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
302}
303
304static inline pte_t pte_mkdirty(pte_t pte)
305{
0f8975ec 306 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
307}
308
309static inline pte_t pte_mkyoung(pte_t pte)
310{
6522869c 311 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
312}
313
314static inline pte_t pte_mkwrite(pte_t pte)
315{
6522869c 316 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
317}
318
319static inline pte_t pte_mkhuge(pte_t pte)
320{
6522869c 321 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
322}
323
324static inline pte_t pte_clrhuge(pte_t pte)
325{
6522869c 326 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
327}
328
329static inline pte_t pte_mkglobal(pte_t pte)
330{
6522869c 331 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
332}
333
334static inline pte_t pte_clrglobal(pte_t pte)
335{
6522869c 336 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 337}
4614139c 338
7e675137
NP
339static inline pte_t pte_mkspecial(pte_t pte)
340{
6522869c 341 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
342}
343
01c8f1c4
DW
344static inline pte_t pte_mkdevmap(pte_t pte)
345{
346 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
347}
348
f2d6bfe9
JW
349static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
350{
351 pmdval_t v = native_pmd_val(pmd);
352
bc511804 353 return native_make_pmd(v | set);
f2d6bfe9
JW
354}
355
356static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
357{
358 pmdval_t v = native_pmd_val(pmd);
359
bc511804 360 return native_make_pmd(v & ~clear);
f2d6bfe9
JW
361}
362
363static inline pmd_t pmd_mkold(pmd_t pmd)
364{
365 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
366}
367
590a471c
MK
368static inline pmd_t pmd_mkclean(pmd_t pmd)
369{
370 return pmd_clear_flags(pmd, _PAGE_DIRTY);
371}
372
f2d6bfe9
JW
373static inline pmd_t pmd_wrprotect(pmd_t pmd)
374{
375 return pmd_clear_flags(pmd, _PAGE_RW);
376}
377
378static inline pmd_t pmd_mkdirty(pmd_t pmd)
379{
0f8975ec 380 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
381}
382
f25748e3
DW
383static inline pmd_t pmd_mkdevmap(pmd_t pmd)
384{
385 return pmd_set_flags(pmd, _PAGE_DEVMAP);
386}
387
f2d6bfe9
JW
388static inline pmd_t pmd_mkhuge(pmd_t pmd)
389{
390 return pmd_set_flags(pmd, _PAGE_PSE);
391}
392
393static inline pmd_t pmd_mkyoung(pmd_t pmd)
394{
395 return pmd_set_flags(pmd, _PAGE_ACCESSED);
396}
397
398static inline pmd_t pmd_mkwrite(pmd_t pmd)
399{
400 return pmd_set_flags(pmd, _PAGE_RW);
401}
402
403static inline pmd_t pmd_mknotpresent(pmd_t pmd)
404{
21d9ee3e 405 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
f2d6bfe9
JW
406}
407
a00cc7d9
MW
408static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
409{
410 pudval_t v = native_pud_val(pud);
411
bc511804 412 return native_make_pud(v | set);
a00cc7d9
MW
413}
414
415static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
416{
417 pudval_t v = native_pud_val(pud);
418
bc511804 419 return native_make_pud(v & ~clear);
a00cc7d9
MW
420}
421
422static inline pud_t pud_mkold(pud_t pud)
423{
424 return pud_clear_flags(pud, _PAGE_ACCESSED);
425}
426
427static inline pud_t pud_mkclean(pud_t pud)
428{
429 return pud_clear_flags(pud, _PAGE_DIRTY);
430}
431
432static inline pud_t pud_wrprotect(pud_t pud)
433{
434 return pud_clear_flags(pud, _PAGE_RW);
435}
436
437static inline pud_t pud_mkdirty(pud_t pud)
438{
439 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
440}
441
442static inline pud_t pud_mkdevmap(pud_t pud)
443{
444 return pud_set_flags(pud, _PAGE_DEVMAP);
445}
446
447static inline pud_t pud_mkhuge(pud_t pud)
448{
449 return pud_set_flags(pud, _PAGE_PSE);
450}
451
452static inline pud_t pud_mkyoung(pud_t pud)
453{
454 return pud_set_flags(pud, _PAGE_ACCESSED);
455}
456
457static inline pud_t pud_mkwrite(pud_t pud)
458{
459 return pud_set_flags(pud, _PAGE_RW);
460}
461
462static inline pud_t pud_mknotpresent(pud_t pud)
463{
464 return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE);
465}
466
2bf01f9f 467#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
468static inline int pte_soft_dirty(pte_t pte)
469{
470 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
471}
472
473static inline int pmd_soft_dirty(pmd_t pmd)
474{
475 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
476}
477
a00cc7d9
MW
478static inline int pud_soft_dirty(pud_t pud)
479{
480 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
481}
482
0f8975ec
PE
483static inline pte_t pte_mksoft_dirty(pte_t pte)
484{
485 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
486}
487
488static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
489{
490 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
491}
492
a00cc7d9
MW
493static inline pud_t pud_mksoft_dirty(pud_t pud)
494{
495 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
496}
497
a7b76174
MS
498static inline pte_t pte_clear_soft_dirty(pte_t pte)
499{
500 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
501}
502
503static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
504{
505 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
506}
507
a00cc7d9
MW
508static inline pud_t pud_clear_soft_dirty(pud_t pud)
509{
510 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
511}
512
2bf01f9f
CG
513#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
514
b534816b
JF
515/*
516 * Mask out unsupported bits in a present pgprot. Non-present pgprots
517 * can use those bits for other purposes, so leave them be.
518 */
519static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
520{
521 pgprotval_t protval = pgprot_val(pgprot);
522
523 if (protval & _PAGE_PRESENT)
524 protval &= __supported_pte_mask;
525
526 return protval;
527}
528
78fb5523
DH
529static inline pgprotval_t check_pgprot(pgprot_t pgprot)
530{
531 pgprotval_t massaged_val = massage_pgprot(pgprot);
532
533 /* mmdebug.h can not be included here because of dependencies */
534#ifdef CONFIG_DEBUG_VM
535 WARN_ONCE(pgprot_val(pgprot) != massaged_val,
536 "attempted to set unsupported pgprot: %016llx "
537 "bits: %016llx supported: %016llx\n",
538 (u64)pgprot_val(pgprot),
539 (u64)pgprot_val(pgprot) ^ massaged_val,
540 (u64)__supported_pte_mask);
541#endif
542
543 return massaged_val;
544}
545
6fdc05d4
JF
546static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
547{
b534816b 548 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
78fb5523 549 check_pgprot(pgprot));
6fdc05d4
JF
550}
551
552static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
553{
b534816b 554 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
78fb5523 555 check_pgprot(pgprot));
6fdc05d4
JF
556}
557
a00cc7d9
MW
558static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
559{
560 return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) |
78fb5523 561 check_pgprot(pgprot));
a00cc7d9
MW
562}
563
38472311
IM
564static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
565{
566 pteval_t val = pte_val(pte);
567
568 /*
569 * Chop off the NX bit (if present), and add the NX portion of
570 * the newprot (if present):
571 */
1c12c4cf 572 val &= _PAGE_CHG_MASK;
78fb5523 573 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
574
575 return __pte(val);
576}
577
c489f125
JW
578static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
579{
580 pmdval_t val = pmd_val(pmd);
581
582 val &= _HPAGE_CHG_MASK;
78fb5523 583 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK;
c489f125
JW
584
585 return __pmd(val);
586}
587
1c12c4cf
VP
588/* mprotect needs to preserve PAT bits when updating vm_page_prot */
589#define pgprot_modify pgprot_modify
590static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
591{
592 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
593 pgprotval_t addbits = pgprot_val(newprot);
594 return __pgprot(preservebits | addbits);
595}
596
bbac8c6d
TK
597#define pte_pgprot(x) __pgprot(pte_flags(x))
598#define pmd_pgprot(x) __pgprot(pmd_flags(x))
599#define pud_pgprot(x) __pgprot(pud_flags(x))
f2a6a705 600#define p4d_pgprot(x) __pgprot(p4d_flags(x))
c6ca18eb 601
b534816b 602#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 603
1adcaafe 604static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
605 enum page_cache_mode pcm,
606 enum page_cache_mode new_pcm)
afc7d20c 607{
1adcaafe 608 /*
55a6ca25 609 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 610 */
8a271389 611 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
612 return 1;
613
afc7d20c 614 /*
615 * Certain new memtypes are not allowed with certain
616 * requested memtype:
617 * - request is uncached, return cannot be write-back
618 * - request is write-combine, return cannot be write-back
ecb2feba
TK
619 * - request is write-through, return cannot be write-back
620 * - request is write-through, return cannot be write-combine
afc7d20c 621 */
d85f3334
JG
622 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
623 new_pcm == _PAGE_CACHE_MODE_WB) ||
624 (pcm == _PAGE_CACHE_MODE_WC &&
ecb2feba
TK
625 new_pcm == _PAGE_CACHE_MODE_WB) ||
626 (pcm == _PAGE_CACHE_MODE_WT &&
627 new_pcm == _PAGE_CACHE_MODE_WB) ||
628 (pcm == _PAGE_CACHE_MODE_WT &&
629 new_pcm == _PAGE_CACHE_MODE_WC)) {
afc7d20c 630 return 0;
631 }
632
633 return 1;
634}
635
458a3e64
TH
636pmd_t *populate_extra_pmd(unsigned long vaddr);
637pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
638#endif /* __ASSEMBLY__ */
639
96a388de 640#ifdef CONFIG_X86_32
a1ce3928 641# include <asm/pgtable_32.h>
96a388de 642#else
a1ce3928 643# include <asm/pgtable_64.h>
96a388de 644#endif
6c386655 645
aca159db 646#ifndef __ASSEMBLY__
f476961c 647#include <linux/mm_types.h>
fa0f281c 648#include <linux/mmdebug.h>
4cbeb51b 649#include <linux/log2.h>
ef37bc36 650#include <asm/fixmap.h>
aca159db 651
a034a010
JF
652static inline int pte_none(pte_t pte)
653{
97e3c602 654 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
a034a010
JF
655}
656
8de01da3
JF
657#define __HAVE_ARCH_PTE_SAME
658static inline int pte_same(pte_t a, pte_t b)
659{
660 return a.pte == b.pte;
661}
662
7c683851 663static inline int pte_present(pte_t a)
c46a7c81
MG
664{
665 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
666}
667
3565fce3
DW
668#ifdef __HAVE_ARCH_PTE_DEVMAP
669static inline int pte_devmap(pte_t a)
670{
671 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
672}
673#endif
674
2c3cf556 675#define pte_accessible pte_accessible
20841405 676static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 677{
20841405
RR
678 if (pte_flags(a) & _PAGE_PRESENT)
679 return true;
680
21d9ee3e 681 if ((pte_flags(a) & _PAGE_PROTNONE) &&
20841405
RR
682 mm_tlb_flush_pending(mm))
683 return true;
684
685 return false;
2c3cf556
RR
686}
687
649e8ef6
JF
688static inline int pmd_present(pmd_t pmd)
689{
027ef6c8
AA
690 /*
691 * Checking for _PAGE_PSE is needed too because
692 * split_huge_page will temporarily clear the present bit (but
693 * the _PAGE_PSE flag will remain set at all times while the
694 * _PAGE_PRESENT bit is clear).
695 */
21d9ee3e 696 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
649e8ef6
JF
697}
698
e7bb4b6d
MG
699#ifdef CONFIG_NUMA_BALANCING
700/*
701 * These work without NUMA balancing but the kernel does not care. See the
702 * comment in include/asm-generic/pgtable.h
703 */
704static inline int pte_protnone(pte_t pte)
705{
e3a1f6ca
DV
706 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
707 == _PAGE_PROTNONE;
e7bb4b6d
MG
708}
709
710static inline int pmd_protnone(pmd_t pmd)
711{
e3a1f6ca
DV
712 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
713 == _PAGE_PROTNONE;
e7bb4b6d
MG
714}
715#endif /* CONFIG_NUMA_BALANCING */
716
4fea801a
JF
717static inline int pmd_none(pmd_t pmd)
718{
719 /* Only check low word on 32-bit platforms, since it might be
720 out of sync with upper half. */
97e3c602
DH
721 unsigned long val = native_pmd_val(pmd);
722 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
4fea801a
JF
723}
724
3ffb3564
JF
725static inline unsigned long pmd_page_vaddr(pmd_t pmd)
726{
f70abb0f 727 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
3ffb3564
JF
728}
729
e5f7f202
IM
730/*
731 * Currently stuck as a macro due to indirect forward reference to
732 * linux/mmzone.h's __section_mem_map_addr() definition:
733 */
fd7e3159 734#define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
20063ca4 735
e24d7eee
JF
736/*
737 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
738 *
739 * this macro returns the index of the entry in the pmd page which would
740 * control the given virtual address
741 */
ce0c0f9e 742static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
743{
744 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
745}
746
97e2817d
JF
747/*
748 * Conversion functions: convert a page and protection to a page entry,
749 * and a page entry and page directory to the page they refer to.
750 *
751 * (Currently stuck as a macro because of indirect forward reference
752 * to linux/mm.h:page_to_nid())
753 */
754#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
755
346309cf
JF
756/*
757 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
758 *
759 * this function returns the index of the entry in the pte page which would
760 * control the given virtual address
761 */
ce0c0f9e 762static inline unsigned long pte_index(unsigned long address)
346309cf
JF
763{
764 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
765}
766
3fbc2444
JF
767static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
768{
769 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
770}
771
99510238
JF
772static inline int pmd_bad(pmd_t pmd)
773{
18a7a199 774 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
775}
776
cc290ca3
JF
777static inline unsigned long pages_to_mb(unsigned long npg)
778{
779 return npg >> (20 - PAGE_SHIFT);
780}
781
98233368 782#if CONFIG_PGTABLE_LEVELS > 2
deb79cfb
JF
783static inline int pud_none(pud_t pud)
784{
97e3c602 785 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
deb79cfb
JF
786}
787
5ba7c913
JF
788static inline int pud_present(pud_t pud)
789{
18a7a199 790 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 791}
6fff47e3
JF
792
793static inline unsigned long pud_page_vaddr(pud_t pud)
794{
f70abb0f 795 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
6fff47e3 796}
f476961c 797
e5f7f202
IM
798/*
799 * Currently stuck as a macro due to indirect forward reference to
800 * linux/mmzone.h's __section_mem_map_addr() definition:
801 */
fd7e3159 802#define pud_page(pud) pfn_to_page(pud_pfn(pud))
01ade20d
JF
803
804/* Find an entry in the second-level page table.. */
805static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
806{
807 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
808}
3180fba0 809
3f6cbef1
JF
810static inline int pud_large(pud_t pud)
811{
e2f5bda9 812 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
813 (_PAGE_PSE | _PAGE_PRESENT);
814}
a61bb29a
JF
815
816static inline int pud_bad(pud_t pud)
817{
18a7a199 818 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 819}
e2f5bda9
JF
820#else
821static inline int pud_large(pud_t pud)
822{
823 return 0;
824}
98233368 825#endif /* CONFIG_PGTABLE_LEVELS > 2 */
5ba7c913 826
fe1e8c3e
KS
827static inline unsigned long pud_index(unsigned long address)
828{
829 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
830}
831
f2a6a705
KS
832#if CONFIG_PGTABLE_LEVELS > 3
833static inline int p4d_none(p4d_t p4d)
834{
835 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
836}
837
838static inline int p4d_present(p4d_t p4d)
839{
840 return p4d_flags(p4d) & _PAGE_PRESENT;
841}
842
843static inline unsigned long p4d_page_vaddr(p4d_t p4d)
844{
845 return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
846}
847
848/*
849 * Currently stuck as a macro due to indirect forward reference to
850 * linux/mmzone.h's __section_mem_map_addr() definition:
851 */
fd7e3159 852#define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d))
f2a6a705
KS
853
854/* Find an entry in the third-level page table.. */
855static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
856{
857 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address);
858}
859
860static inline int p4d_bad(p4d_t p4d)
861{
1c4de1ff
DH
862 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
863
864 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
865 ignore_flags |= _PAGE_NX;
866
867 return (p4d_flags(p4d) & ~ignore_flags) != 0;
f2a6a705
KS
868}
869#endif /* CONFIG_PGTABLE_LEVELS > 3 */
870
fe1e8c3e
KS
871static inline unsigned long p4d_index(unsigned long address)
872{
873 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
874}
875
f2a6a705 876#if CONFIG_PGTABLE_LEVELS > 4
9f38d7e8
JF
877static inline int pgd_present(pgd_t pgd)
878{
18a7a199 879 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 880}
c5f040b1
JF
881
882static inline unsigned long pgd_page_vaddr(pgd_t pgd)
883{
884 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
885}
777cba16 886
e5f7f202
IM
887/*
888 * Currently stuck as a macro due to indirect forward reference to
889 * linux/mmzone.h's __section_mem_map_addr() definition:
890 */
fd7e3159 891#define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
7cfb8102
JF
892
893/* to find an entry in a page-table-directory. */
f2a6a705 894static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
3d081b18 895{
f2a6a705 896 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address);
3d081b18 897}
30f10316
JF
898
899static inline int pgd_bad(pgd_t pgd)
900{
1c4de1ff
DH
901 unsigned long ignore_flags = _PAGE_USER;
902
903 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
904 ignore_flags |= _PAGE_NX;
905
906 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
30f10316 907}
7325cc2e
JF
908
909static inline int pgd_none(pgd_t pgd)
910{
97e3c602
DH
911 /*
912 * There is no need to do a workaround for the KNL stray
913 * A/D bit erratum here. PGDs only point to page tables
914 * except on 32-bit non-PAE which is not supported on
915 * KNL.
916 */
26c8e317 917 return !native_pgd_val(pgd);
7325cc2e 918}
f2a6a705 919#endif /* CONFIG_PGTABLE_LEVELS > 4 */
9f38d7e8 920
4614139c
JF
921#endif /* __ASSEMBLY__ */
922
fb15a9b3
JF
923/*
924 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
925 *
926 * this macro returns the index of the entry in the pgd page which would
927 * control the given virtual address
928 */
929#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
930
931/*
932 * pgd_offset() returns a (pgd_t *)
933 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
934 */
61e9b367
DH
935#define pgd_offset_pgd(pgd, address) (pgd + pgd_index((address)))
936/*
937 * a shortcut to get a pgd_t in a given mm
938 */
939#define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
fb15a9b3
JF
940/*
941 * a shortcut which implies the use of the kernel's pgd, instead
942 * of a process's
943 */
944#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
945
946
68db065c
JF
947#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
948#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
949
195466dc
JF
950#ifndef __ASSEMBLY__
951
2c1b284e 952extern int direct_gbpages;
22ddfcaa 953void init_mem_mapping(void);
8d57470d 954void early_alloc_pgt_buf(void);
4270fd8b 955extern void memblock_find_dma_reserve(void);
2c1b284e 956
b234e8a0
TG
957#ifdef CONFIG_X86_64
958/* Realmode trampoline initialization. */
959extern pgd_t trampoline_pgd_entry;
0483e1fa 960static inline void __meminit init_trampoline_default(void)
b234e8a0
TG
961{
962 /* Default trampoline pgd value */
65ade2f8 963 trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
b234e8a0 964}
0483e1fa
TG
965# ifdef CONFIG_RANDOMIZE_MEMORY
966void __meminit init_trampoline(void);
967# else
968# define init_trampoline init_trampoline_default
969# endif
b234e8a0
TG
970#else
971static inline void init_trampoline(void) { }
972#endif
973
4891645e
JF
974/* local pte updates need not use xchg for locking */
975static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
976{
977 pte_t res = *ptep;
978
979 /* Pure native function needs no input for mm, addr */
980 native_pte_clear(NULL, 0, ptep);
981 return res;
982}
983
f2d6bfe9
JW
984static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
985{
986 pmd_t res = *pmdp;
987
988 native_pmd_clear(pmdp);
989 return res;
990}
991
a00cc7d9
MW
992static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
993{
994 pud_t res = *pudp;
995
996 native_pud_clear(pudp);
997 return res;
998}
999
4891645e
JF
1000static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
1001 pte_t *ptep , pte_t pte)
1002{
1003 native_set_pte(ptep, pte);
1004}
1005
87930019
JG
1006static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1007 pmd_t *pmdp, pmd_t pmd)
0a47de52
AA
1008{
1009 native_set_pmd(pmdp, pmd);
1010}
1011
87930019
JG
1012static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1013 pud_t *pudp, pud_t pud)
a00cc7d9
MW
1014{
1015 native_set_pud(pudp, pud);
1016}
1017
195466dc
JF
1018/*
1019 * We only update the dirty/accessed state if we set
1020 * the dirty bit by hand in the kernel, since the hardware
1021 * will do the accessed bit for us, and we don't want to
1022 * race with other CPU's that might be updating the dirty
1023 * bit at the same time.
1024 */
bea41808
JF
1025struct vm_area_struct;
1026
195466dc 1027#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
1028extern int ptep_set_access_flags(struct vm_area_struct *vma,
1029 unsigned long address, pte_t *ptep,
1030 pte_t entry, int dirty);
195466dc
JF
1031
1032#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
1033extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1034 unsigned long addr, pte_t *ptep);
195466dc
JF
1035
1036#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
1037extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1038 unsigned long address, pte_t *ptep);
195466dc
JF
1039
1040#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
1041static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1042 pte_t *ptep)
195466dc
JF
1043{
1044 pte_t pte = native_ptep_get_and_clear(ptep);
195466dc
JF
1045 return pte;
1046}
1047
1048#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
1049static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1050 unsigned long addr, pte_t *ptep,
1051 int full)
195466dc
JF
1052{
1053 pte_t pte;
1054 if (full) {
1055 /*
1056 * Full address destruction in progress; paravirt does not
1057 * care about updates and native needs no locking
1058 */
1059 pte = native_local_ptep_get_and_clear(ptep);
1060 } else {
1061 pte = ptep_get_and_clear(mm, addr, ptep);
1062 }
1063 return pte;
1064}
1065
1066#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
1067static inline void ptep_set_wrprotect(struct mm_struct *mm,
1068 unsigned long addr, pte_t *ptep)
195466dc 1069{
d8d89827 1070 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
1071}
1072
2ac13462 1073#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 1074
f2d6bfe9
JW
1075#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1076
1077#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1078extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1079 unsigned long address, pmd_t *pmdp,
1080 pmd_t entry, int dirty);
a00cc7d9
MW
1081extern int pudp_set_access_flags(struct vm_area_struct *vma,
1082 unsigned long address, pud_t *pudp,
1083 pud_t entry, int dirty);
f2d6bfe9
JW
1084
1085#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1086extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1087 unsigned long addr, pmd_t *pmdp);
a00cc7d9
MW
1088extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1089 unsigned long addr, pud_t *pudp);
f2d6bfe9
JW
1090
1091#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1092extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1093 unsigned long address, pmd_t *pmdp);
1094
1095
e4e40e02 1096#define pmd_write pmd_write
f2d6bfe9
JW
1097static inline int pmd_write(pmd_t pmd)
1098{
1099 return pmd_flags(pmd) & _PAGE_RW;
1100}
1101
8809aa2d
AK
1102#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1103static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
f2d6bfe9
JW
1104 pmd_t *pmdp)
1105{
d6ccc3ec 1106 return native_pmdp_get_and_clear(pmdp);
f2d6bfe9
JW
1107}
1108
a00cc7d9
MW
1109#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1110static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1111 unsigned long addr, pud_t *pudp)
1112{
1113 return native_pudp_get_and_clear(pudp);
1114}
1115
f2d6bfe9
JW
1116#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1117static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1118 unsigned long addr, pmd_t *pmdp)
1119{
1120 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
f2d6bfe9
JW
1121}
1122
1501899a
DW
1123#define pud_write pud_write
1124static inline int pud_write(pud_t pud)
1125{
1126 return pud_flags(pud) & _PAGE_RW;
1127}
1128
85958b46
JF
1129/*
1130 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1131 *
1132 * dst - pointer to pgd range anwhere on a pgd page
1133 * src - ""
1134 * count - the number of pgds to copy.
1135 *
1136 * dst and src can be on the same page, but the range must not overlap,
1137 * and must not cross a page boundary.
1138 */
1139static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1140{
fc2fbc85
DH
1141 memcpy(dst, src, count * sizeof(pgd_t));
1142#ifdef CONFIG_PAGE_TABLE_ISOLATION
1143 if (!static_cpu_has(X86_FEATURE_PTI))
1144 return;
1145 /* Clone the user space pgd as well */
1146 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1147 count * sizeof(pgd_t));
1148#endif
85958b46
JF
1149}
1150
4cbeb51b
DH
1151#define PTE_SHIFT ilog2(PTRS_PER_PTE)
1152static inline int page_level_shift(enum pg_level level)
1153{
1154 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1155}
1156static inline unsigned long page_level_size(enum pg_level level)
1157{
1158 return 1UL << page_level_shift(level);
1159}
1160static inline unsigned long page_level_mask(enum pg_level level)
1161{
1162 return ~(page_level_size(level) - 1);
1163}
85958b46 1164
602e0186
KS
1165/*
1166 * The x86 doesn't have any external MMU info: the kernel page
1167 * tables contain all the necessary information.
1168 */
1169static inline void update_mmu_cache(struct vm_area_struct *vma,
1170 unsigned long addr, pte_t *ptep)
1171{
1172}
1173static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1174 unsigned long addr, pmd_t *pmd)
1175{
1176}
a00cc7d9
MW
1177static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1178 unsigned long addr, pud_t *pud)
1179{
1180}
85958b46 1181
2bf01f9f 1182#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
fa0f281c
CG
1183static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1184{
fa0f281c
CG
1185 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1186}
1187
1188static inline int pte_swp_soft_dirty(pte_t pte)
1189{
fa0f281c
CG
1190 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1191}
1192
1193static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1194{
fa0f281c
CG
1195 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1196}
ab6e3d09
NH
1197
1198#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1199static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1200{
1201 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1202}
1203
1204static inline int pmd_swp_soft_dirty(pmd_t pmd)
1205{
1206 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1207}
1208
1209static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1210{
1211 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1212}
1213#endif
2bf01f9f 1214#endif
fa0f281c 1215
33a709b2
DH
1216#define PKRU_AD_BIT 0x1
1217#define PKRU_WD_BIT 0x2
84594296 1218#define PKRU_BITS_PER_PKEY 2
33a709b2
DH
1219
1220static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1221{
84594296 1222 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1223 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1224}
1225
1226static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1227{
84594296 1228 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1229 /*
1230 * Access-disable disables writes too so we need to check
1231 * both bits here.
1232 */
1233 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1234}
1235
1236static inline u16 pte_flags_pkey(unsigned long pte_flags)
1237{
1238#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1239 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1240 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1241#else
1242 return 0;
1243#endif
1244}
1245
e585513b
KS
1246static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1247{
1248 u32 pkru = read_pkru();
1249
1250 if (!__pkru_allows_read(pkru, pkey))
1251 return false;
1252 if (write && !__pkru_allows_write(pkru, pkey))
1253 return false;
1254
1255 return true;
1256}
1257
1258/*
1259 * 'pteval' can come from a PTE, PMD or PUD. We only check
1260 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1261 * same value on all 3 types.
1262 */
1263static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1264{
1265 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1266
1267 if (write)
1268 need_pte_bits |= _PAGE_RW;
1269
1270 if ((pteval & need_pte_bits) != need_pte_bits)
1271 return 0;
1272
1273 return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1274}
1275
1276#define pte_access_permitted pte_access_permitted
1277static inline bool pte_access_permitted(pte_t pte, bool write)
1278{
1279 return __pte_access_permitted(pte_val(pte), write);
1280}
1281
1282#define pmd_access_permitted pmd_access_permitted
1283static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1284{
1285 return __pte_access_permitted(pmd_val(pmd), write);
1286}
1287
1288#define pud_access_permitted pud_access_permitted
1289static inline bool pud_access_permitted(pud_t pud, bool write)
1290{
1291 return __pte_access_permitted(pud_val(pud), write);
1292}
1293
195466dc
JF
1294#include <asm-generic/pgtable.h>
1295#endif /* __ASSEMBLY__ */
1296
1965aae3 1297#endif /* _ASM_X86_PGTABLE_H */