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aspeed: Introduce a spi_boot region under the SoC
[mirror_qemu.git] / hw / arm / aspeed.c
CommitLineData
327d8e4e
AJ		 1/*
2 * OpenPOWER Palmetto BMC
3 *
4 * Andrew Jeffery <andrew@aj.id.au>
5 *
6 * Copyright 2016 IBM Corp.
7 *
8 * This code is licensed under the GPL version 2 or later. See
9 * the COPYING file in the top-level directory.
10 */
11
12#include "qemu/osdep.h"
da34e65c 13#include "qapi/error.h"
12ec8bd5 14#include "hw/arm/boot.h"
fca9ca1b 15#include "hw/arm/aspeed.h"
00442402 16#include "hw/arm/aspeed_soc.h"
c0216b94 17#include "hw/arm/aspeed_eeprom.h"
3ec75e39 18#include "hw/i2c/i2c_mux_pca954x.h"
93198b6c 19#include "hw/i2c/smbus_eeprom.h"
044475f3 20#include "hw/misc/pca9552.h"
9618ebae 21#include "hw/nvram/eeprom_at24c.h"
5e9ae4b1 22#include "hw/sensor/tmp105.h"
7cfbde5e 23#include "hw/misc/led.h"
a27bd6c7 24#include "hw/qdev-properties.h"
e1ad9bc4 25#include "sysemu/block-backend.h"
fa699e80 26#include "sysemu/reset.h"
d769a1da
CLG		 27#include "hw/loader.h"
28#include "qemu/error-report.h"
a9df9622 29#include "qemu/units.h"
66c895b8 30#include "hw/qdev-clock.h"
d2b3eaef 31#include "sysemu/sysemu.h"
327d8e4e 32
74fb1f38 33static struct arm_boot_info aspeed_board_binfo = {
b033271f 34 .board_id = -1, /* device-tree-only board */
327d8e4e
AJ		 35};
36
612b219a 37struct AspeedMachineState {
888b2b03
PMD		 38 /* Private */
39 MachineState parent_obj;
40 /* Public */
41
ff90606f 42 AspeedSoCState soc;
888b2b03 43 bool mmio_exec;
9820e52f
CLG		 44 char *fmc_model;
45 char *spi_model;
ea066d39 46};
327d8e4e 47
ef17f836 48/* Palmetto hardware value: 0x120CE416 */
8da33ef7
CLG		 49#define PALMETTO_BMC_HW_STRAP1 ( \
50 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
51 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
52 SCU_AST2400_HW_STRAP_ACPI_DIS | \
53 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
54 SCU_HW_STRAP_VGA_CLASS_CODE | \
55 SCU_HW_STRAP_LPC_RESET_PIN | \
56 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
57 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
58 SCU_HW_STRAP_SPI_WIDTH | \
59 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
60 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
61
40a38df5
ES		 62/* TODO: Find the actual hardware value */
63#define SUPERMICROX11_BMC_HW_STRAP1 ( \
64 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
65 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \
66 SCU_AST2400_HW_STRAP_ACPI_DIS | \
67 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
68 SCU_HW_STRAP_VGA_CLASS_CODE | \
69 SCU_HW_STRAP_LPC_RESET_PIN | \
70 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
71 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
72 SCU_HW_STRAP_SPI_WIDTH | \
73 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
74 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
75
47936597
GR		 76/* TODO: Find the actual hardware value */
77#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \
78 AST2500_HW_STRAP1_DEFAULTS | \
79 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
80 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
81 SCU_AST2500_HW_STRAP_UART_DEBUG | \
82 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
83 SCU_HW_STRAP_SPI_WIDTH | \
84 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN))
85
ef17f836 86/* AST2500 evb hardware value: 0xF100C2E6 */
9a7c1750
CLG		 87#define AST2500_EVB_HW_STRAP1 (( \
88 AST2500_HW_STRAP1_DEFAULTS | \
89 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
90 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
91 SCU_AST2500_HW_STRAP_UART_DEBUG | \
92 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
93 SCU_HW_STRAP_MAC1_RGMII | \
94 SCU_HW_STRAP_MAC0_RGMII) & \
95 ~SCU_HW_STRAP_2ND_BOOT_WDT)
96
ef17f836
CLG		 97/* Romulus hardware value: 0xF10AD206 */
98#define ROMULUS_BMC_HW_STRAP1 ( \
99 AST2500_HW_STRAP1_DEFAULTS | \
100 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
101 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
102 SCU_AST2500_HW_STRAP_UART_DEBUG | \
103 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
104 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
105 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
106
143b040f
PW		 107/* Sonorapass hardware value: 0xF100D216 */
108#define SONORAPASS_BMC_HW_STRAP1 ( \
109 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
110 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
111 SCU_AST2500_HW_STRAP_UART_DEBUG | \
112 SCU_AST2500_HW_STRAP_RESERVED28 | \
113 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
114 SCU_HW_STRAP_VGA_CLASS_CODE | \
115 SCU_HW_STRAP_LPC_RESET_PIN | \
116 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
117 SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
118 SCU_HW_STRAP_VGA_BIOS_ROM | \
119 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
120 SCU_AST2500_HW_STRAP_RESERVED1)
121
95f068c8
JW		 122#define G220A_BMC_HW_STRAP1 ( \
123 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
124 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
125 SCU_AST2500_HW_STRAP_UART_DEBUG | \
126 SCU_AST2500_HW_STRAP_RESERVED28 | \
127 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
128 SCU_HW_STRAP_2ND_BOOT_WDT | \
129 SCU_HW_STRAP_VGA_CLASS_CODE | \
130 SCU_HW_STRAP_LPC_RESET_PIN | \
131 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
132 SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
133 SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \
134 SCU_AST2500_HW_STRAP_RESERVED1)
135
82b6a3f6
JW		 136/* FP5280G2 hardware value: 0XF100D286 */
137#define FP5280G2_BMC_HW_STRAP1 ( \
138 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
139 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
140 SCU_AST2500_HW_STRAP_UART_DEBUG | \
141 SCU_AST2500_HW_STRAP_RESERVED28 | \
142 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
143 SCU_HW_STRAP_VGA_CLASS_CODE | \
144 SCU_HW_STRAP_LPC_RESET_PIN | \
145 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
146 SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
147 SCU_HW_STRAP_MAC1_RGMII | \
148 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
149 SCU_AST2500_HW_STRAP_RESERVED1)
150
62c2c2eb
CLG		 151/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
152#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
153
9cccb912
PV		 154/* Quanta-Q71l hardware value */
155#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
156 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
157 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \
158 SCU_AST2400_HW_STRAP_ACPI_DIS | \
159 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \
160 SCU_HW_STRAP_VGA_CLASS_CODE | \
161 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \
162 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
163 SCU_HW_STRAP_SPI_WIDTH | \
164 SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \
165 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
166
ccc2c418
CLG		 167/* AST2600 evb hardware value */
168#define AST2600_EVB_HW_STRAP1 0x000000C0
169#define AST2600_EVB_HW_STRAP2 0x00000003
170
63ceb818
CLG		 171/* Tacoma hardware value */
172#define TACOMA_BMC_HW_STRAP1 0x00000000
7582591a 173#define TACOMA_BMC_HW_STRAP2 0x00000040
63ceb818 174
58e52bdb 175/* Rainier hardware value: (QEMU prototype) */
b6d1df64
JS		 176#define RAINIER_BMC_HW_STRAP1 0x00422016
177#define RAINIER_BMC_HW_STRAP2 0x80000848
58e52bdb 178
febbe308
PD		 179/* Fuji hardware value */
180#define FUJI_BMC_HW_STRAP1 0x00000000
181#define FUJI_BMC_HW_STRAP2 0x00000000
182
a20c54b1
PW		 183/* Bletchley hardware value */
184/* TODO: Leave same as EVB for now. */
185#define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
186#define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
187
fb6b3c8d
JHY		 188/* Qualcomm DC-SCM hardware value */
189#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
190#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041
191
9bb6d140
JS		 192#define AST_SMP_MAILBOX_BASE 0x1e6e2180
193#define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0)
194#define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4)
195#define AST_SMP_MBOX_FIELD_READY (AST_SMP_MAILBOX_BASE + 0x8)
196#define AST_SMP_MBOX_FIELD_POLLINSN (AST_SMP_MAILBOX_BASE + 0xc)
197#define AST_SMP_MBOX_CODE (AST_SMP_MAILBOX_BASE + 0x10)
198#define AST_SMP_MBOX_GOSIGN 0xabbaab00
199
200static void aspeed_write_smpboot(ARMCPU *cpu,
201 const struct arm_boot_info *info)
202{
203 static const uint32_t poll_mailbox_ready[] = {
204 /*
205 * r2 = per-cpu go sign value
206 * r1 = AST_SMP_MBOX_FIELD_ENTRY
207 * r0 = AST_SMP_MBOX_FIELD_GOSIGN
208 */
209 0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5 */
210 0xe21000ff, /* ands r0, r0, #255 */
211 0xe59f201c, /* ldr r2, [pc, #28] */
212 0xe1822000, /* orr r2, r2, r0 */
213
214 0xe59f1018, /* ldr r1, [pc, #24] */
215 0xe59f0018, /* ldr r0, [pc, #24] */
216
217 0xe320f002, /* wfe */
218 0xe5904000, /* ldr r4, [r0] */
219 0xe1520004, /* cmp r2, r4 */
220 0x1afffffb, /* bne <wfe> */
221 0xe591f000, /* ldr pc, [r1] */
222 AST_SMP_MBOX_GOSIGN,
223 AST_SMP_MBOX_FIELD_ENTRY,
224 AST_SMP_MBOX_FIELD_GOSIGN,
225 };
226
227 rom_add_blob_fixed("aspeed.smpboot", poll_mailbox_ready,
228 sizeof(poll_mailbox_ready),
229 info->smp_loader_start);
230}
231
232static void aspeed_reset_secondary(ARMCPU *cpu,
233 const struct arm_boot_info *info)
234{
235 AddressSpace *as = arm_boot_address_space(cpu, info);
236 CPUState *cs = CPU(cpu);
237
238 /* info->smp_bootreg_addr */
239 address_space_stl_notdirty(as, AST_SMP_MBOX_FIELD_GOSIGN, 0,
240 MEMTXATTRS_UNSPECIFIED, NULL);
241 cpu_set_pc(cs, info->smp_loader_start);
242}
243
d769a1da
CLG		 244#define FIRMWARE_ADDR 0x0
245
246static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
247 Error **errp)
248{
249 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
05e6e40a 250 g_autofree void *storage = NULL;
0c7209be
CLG		 251 int64_t size;
252
253 /* The block backend size should have already been 'validated' by
254 * the creation of the m25p80 object.
255 */
256 size = blk_getlength(blk);
257 if (size <= 0) {
258 error_setg(errp, "failed to get flash size");
259 return;
260 }
d769a1da 261
0c7209be
CLG		 262 if (rom_size > size) {
263 rom_size = size;
d769a1da
CLG		 264 }
265
05e6e40a 266 storage = g_malloc0(rom_size);
a9262f55 267 if (blk_pread(blk, 0, rom_size, storage, 0) < 0) {
d769a1da
CLG		 268 error_setg(errp, "failed to read the initial flash content");
269 return;
270 }
271
272 rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
d769a1da
CLG		 273}
274
1099ad10 275void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
9bd4ac61 276 unsigned int count, int unit0)
e1ad9bc4 277{
179b2058
PW		 278 int i;
279
280 if (!flashtype) {
281 return;
282 }
e1ad9bc4 283
9bd4ac61 284 for (i = 0; i < count; ++i) {
8ec239f2 285 DriveInfo *dinfo = drive_get(IF_MTD, 0, unit0 + i);
e1ad9bc4 286 qemu_irq cs_line;
a7d78bef 287 DeviceState *dev;
e1ad9bc4 288
a7d78bef 289 dev = qdev_new(flashtype);
e1ad9bc4 290 if (dinfo) {
a7d78bef 291 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo));
e1ad9bc4 292 }
a7d78bef 293 qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal);
e1ad9bc4 294
a7d78bef 295 cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);
e1ad9bc4
CLG		 296 sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
297 }
298}
299
a29e3e12
AJ		 300static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
301{
302 DeviceState *card;
303
756f739b
PMD		 304 if (!dinfo) {
305 return;
a29e3e12 306 }
756f739b
PMD		 307 card = qdev_new(TYPE_SD_CARD);
308 qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
309 &error_fatal);
3e80f690
MA		 310 qdev_realize_and_unref(card,
311 qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
312 &error_fatal);
a29e3e12
AJ		 313}
314
d2b3eaef
PD		 315static void connect_serial_hds_to_uarts(AspeedMachineState *bmc)
316{
317 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc);
318 AspeedSoCState *s = &bmc->soc;
319 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
320
321 aspeed_soc_uart_set_chr(s, amc->uart_default, serial_hd(0));
322 for (int i = 1, uart = ASPEED_DEV_UART1; i < sc->uarts_num; i++, uart++) {
323 if (uart == amc->uart_default) {
324 continue;
325 }
326 aspeed_soc_uart_set_chr(s, uart, serial_hd(i));
327 }
328}
329
baa4732b 330static void aspeed_machine_init(MachineState *machine)
327d8e4e 331{
888b2b03 332 AspeedMachineState *bmc = ASPEED_MACHINE(machine);
baa4732b 333 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
b033271f 334 AspeedSoCClass *sc;
d769a1da 335 DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
2bea128c 336 int i;
d3bad7e7 337 NICInfo *nd = &nd_table[0];
327d8e4e 338
9fc7fc4d 339 object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
327d8e4e 340
b033271f
CLG		 341 sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
342
533eb415 343 /*
346160cb
CLG		 344 * This will error out if the RAM size is not supported by the
345 * memory controller of the SoC.
533eb415 346 */
6e504a98 347 object_property_set_uint(OBJECT(&bmc->soc), "ram-size", machine->ram_size,
533eb415
IM		 348 &error_fatal);
349
d3bad7e7
CLG		 350 for (i = 0; i < sc->macs_num; i++) {
351 if ((amc->macs_mask & (1 << i)) && nd->used) {
352 qemu_check_nic_model(nd, TYPE_FTGMAC100);
353 qdev_set_nic_properties(DEVICE(&bmc->soc.ftgmac100[i]), nd);
354 nd++;
355 }
356 }
357
5325cc34 358 object_property_set_int(OBJECT(&bmc->soc), "hw-strap1", amc->hw_strap1,
87e79af0 359 &error_abort);
5325cc34 360 object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,
ccc2c418 361 &error_abort);
4dd9d554
PD		 362 object_property_set_link(OBJECT(&bmc->soc), "memory",
363 OBJECT(get_system_memory()), &error_abort);
5325cc34 364 object_property_set_link(OBJECT(&bmc->soc), "dram",
0df2d9a6 365 OBJECT(machine->ram), &error_abort);
b6e70d1d
JS		 366 if (machine->kernel_filename) {
367 /*
368 * When booting with a -kernel command line there is no u-boot
369 * that runs to unlock the SCU. In this case set the default to
370 * be unlocked as the kernel expects
371 */
5325cc34
MA		 372 object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key",
373 ASPEED_SCU_PROT_KEY, &error_abort);
b6e70d1d 374 }
d2b3eaef 375 connect_serial_hds_to_uarts(bmc);
ce189ab2 376 qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
327d8e4e 377
8ec239f2
MA		 378 aspeed_board_init_flashes(&bmc->soc.fmc,
379 bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
9bd4ac61 380 amc->num_cs, 0);
8ec239f2
MA		 381 aspeed_board_init_flashes(&bmc->soc.spi[0],
382 bmc->spi_model ? bmc->spi_model : amc->spi_model,
9bd4ac61 383 1, amc->num_cs);
74fb1f38 384
d769a1da
CLG		 385 /* Install first FMC flash content as a boot rom. */
386 if (drive0) {
387 AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
388 MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
6bb55e79 389 uint64_t size = memory_region_size(&fl->mmio);
d769a1da 390
5aa281d7 391 if (!ASPEED_MACHINE(machine)->mmio_exec) {
f489960d 392 memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom",
6bb55e79 393 size, &error_abort);
1a15311a
CLG		 394 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
395 boot_rom);
6bb55e79 396 write_boot_rom(drive0, FIRMWARE_ADDR, size, &error_abort);
1a15311a 397 }
d769a1da
CLG		 398 }
399
b7f1a0cb 400 if (machine->kernel_filename && sc->num_cpus > 1) {
9bb6d140
JS		 401 /* With no u-boot we must set up a boot stub for the secondary CPU */
402 MemoryRegion *smpboot = g_new(MemoryRegion, 1);
f489960d 403 memory_region_init_ram(smpboot, NULL, "aspeed.smpboot",
9bb6d140
JS		 404 0x80, &error_abort);
405 memory_region_add_subregion(get_system_memory(),
406 AST_SMP_MAILBOX_BASE, smpboot);
407
408 aspeed_board_binfo.write_secondary_boot = aspeed_write_smpboot;
409 aspeed_board_binfo.secondary_cpu_reset_hook = aspeed_reset_secondary;
410 aspeed_board_binfo.smp_loader_start = AST_SMP_MBOX_CODE;
411 }
412
6e504a98 413 aspeed_board_binfo.ram_size = machine->ram_size;
347df6f8 414 aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM];
e1ad9bc4 415
baa4732b
CLG		 416 if (amc->i2c_init) {
417 amc->i2c_init(bmc);
2cf6cb50
CLG		 418 }
419
0e2c24c6 420 for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
8ec239f2
MA		 421 sdhci_attach_drive(&bmc->soc.sdhci.slots[i],
422 drive_get(IF_SD, 0, i));
a29e3e12 423 }
2bea128c 424
a29e3e12 425 if (bmc->soc.emmc.num_slots) {
8ec239f2
MA		 426 sdhci_attach_drive(&bmc->soc.emmc.slots[0],
427 drive_get(IF_SD, 0, bmc->soc.sdhci.num_slots));
2bea128c
EJ		 428 }
429
2744ece8 430 arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
74fb1f38 431}
b033271f 432
612b219a 433static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
2cf6cb50
CLG		 434{
435 AspeedSoCState *soc = &bmc->soc;
a87e81b9 436 DeviceState *dev;
3d165f12 437 uint8_t *eeprom_buf = g_malloc0(32 * 1024);
2cf6cb50
CLG		 438
439 /* The palmetto platform expects a ds3231 RTC but a ds1338 is
440 * enough to provide basic RTC features. Alarms will be missing */
1373b15b 441 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
a87e81b9 442
7a204cbd 443 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
3d165f12
CLG		 444 eeprom_buf);
445
a87e81b9 446 /* add a TMP423 temperature sensor */
1373b15b
PMD		 447 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
448 "tmp423", 0x4c));
5325cc34
MA		 449 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
450 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
451 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
452 object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
2cf6cb50
CLG		 453}
454
9cccb912
PV		 455static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
456{
457 AspeedSoCState *soc = &bmc->soc;
458
459 /*
460 * The quanta-q71l platform expects tmp75s which are compatible with
461 * tmp105s.
462 */
463 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c);
464 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e);
465 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f);
466
467 /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */
468 /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */
469 /* TODO: Add Memory Riser i2c mux and eeproms. */
470
3ec75e39
PV		 471 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74);
472 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77);
473
9cccb912 474 /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */
3ec75e39
PV		 475
476 /* i2c-7 */
477 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70);
9cccb912
PV		 478 /* - i2c@0: pmbus@59 */
479 /* - i2c@1: pmbus@58 */
480 /* - i2c@2: pmbus@58 */
481 /* - i2c@3: pmbus@59 */
3ec75e39 482
9cccb912
PV		 483 /* TODO: i2c-7: Add PDB FRU eeprom@52 */
484 /* TODO: i2c-8: Add BMC FRU eeprom@50 */
485}
486
612b219a 487static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
2cf6cb50
CLG		 488{
489 AspeedSoCState *soc = &bmc->soc;
3d165f12
CLG		 490 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
491
7a204cbd 492 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50,
3d165f12 493 eeprom_buf);
2cf6cb50
CLG		 494
495 /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
1373b15b 496 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
044475f3 497 TYPE_TMP105, 0x4d);
2cf6cb50
CLG		 498}
499
612b219a 500static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
ccc2c418 501{
52bcd997
HC		 502 AspeedSoCState *soc = &bmc->soc;
503 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
504
505 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50,
506 eeprom_buf);
507
508 /* LM75 is compatible with TMP105 driver */
509 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
510 TYPE_TMP105, 0x4d);
ccc2c418
CLG		 511}
512
34f73a81
KP		 513static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc)
514{
515 AspeedSoCState *soc = &bmc->soc;
516
517 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB);
518 at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB,
519 yosemitev2_bmc_fruid, yosemitev2_bmc_fruid_len);
520}
521
612b219a 522static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
6c4567c7
CLG		 523{
524 AspeedSoCState *soc = &bmc->soc;
525
526 /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
527 * good enough */
1373b15b 528 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
6c4567c7
CLG		 529}
530
6c323aba
KP		 531static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc)
532{
533 AspeedSoCState *soc = &bmc->soc;
534
535 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB);
536 at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB,
537 tiogapass_bmc_fruid, tiogapass_bmc_fruid_len);
538}
539
f4aec252
CLG		 540static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
541{
542 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
543 TYPE_PCA9552, addr);
544}
545
612b219a 546static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
143b040f
PW		 547{
548 AspeedSoCState *soc = &bmc->soc;
549
550 /* bus 2 : */
1373b15b
PMD		 551 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48);
552 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49);
143b040f
PW		 553 /* bus 2 : pca9546 @ 0x73 */
554
555 /* bus 3 : pca9548 @ 0x70 */
556
557 /* bus 4 : */
558 uint8_t *eeprom4_54 = g_malloc0(8 * 1024);
7a204cbd 559 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54,
143b040f
PW		 560 eeprom4_54);
561 /* PCA9539 @ 0x76, but PCA9552 is compatible */
f4aec252 562 create_pca9552(soc, 4, 0x76);
143b040f 563 /* PCA9539 @ 0x77, but PCA9552 is compatible */
f4aec252 564 create_pca9552(soc, 4, 0x77);
143b040f
PW		 565
566 /* bus 6 : */
1373b15b
PMD		 567 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48);
568 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49);
143b040f
PW		 569 /* bus 6 : pca9546 @ 0x73 */
570
571 /* bus 8 : */
572 uint8_t *eeprom8_56 = g_malloc0(8 * 1024);
7a204cbd 573 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56,
143b040f 574 eeprom8_56);
f4aec252
CLG		 575 create_pca9552(soc, 8, 0x60);
576 create_pca9552(soc, 8, 0x61);
143b040f
PW		 577 /* bus 8 : adc128d818 @ 0x1d */
578 /* bus 8 : adc128d818 @ 0x1f */
579
580 /*
581 * bus 13 : pca9548 @ 0x71
582 * - channel 3:
583 * - tmm421 @ 0x4c
584 * - tmp421 @ 0x4e
585 * - tmp421 @ 0x4f
586 */
587
588}
589
612b219a 590static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
62c2c2eb 591{
7cfbde5e
PMD		 592 static const struct {
593 unsigned gpio_id;
594 LEDColor color;
595 const char *description;
596 bool gpio_polarity;
597 } pca1_leds[] = {
598 {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW},
599 {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW},
600 {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW},
601 };
62c2c2eb 602 AspeedSoCState *soc = &bmc->soc;
3d165f12 603 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
15ce12cf 604 DeviceState *dev;
7cfbde5e 605 LEDState *led;
62c2c2eb 606
63ceb818 607 /* Bus 3: TODO bmp280@77 */
db437ca6 608 dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
15ce12cf 609 qdev_prop_set_string(dev, "description", "pca1");
2616f572
PMD		 610 i2c_slave_realize_and_unref(I2C_SLAVE(dev),
611 aspeed_i2c_get_bus(&soc->i2c, 3),
612 &error_fatal);
8c9a61d7 613
7cfbde5e
PMD		 614 for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) {
615 led = led_create_simple(OBJECT(bmc),
616 pca1_leds[i].gpio_polarity,
617 pca1_leds[i].color,
618 pca1_leds[i].description);
619 qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id,
620 qdev_get_gpio_in(DEVICE(led), 0));
621 }
b61ea6e7 622 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76);
2a75e8c3 623 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52);
1373b15b
PMD		 624 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c);
625 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c);
62c2c2eb
CLG		 626
627 /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
1373b15b 628 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105,
044475f3 629 0x4a);
6c4567c7
CLG		 630
631 /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
632 * good enough */
1373b15b 633 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
3d165f12 634
7a204cbd 635 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51,
3d165f12 636 eeprom_buf);
db437ca6 637 dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
15ce12cf 638 qdev_prop_set_string(dev, "description", "pca0");
2616f572
PMD		 639 i2c_slave_realize_and_unref(I2C_SLAVE(dev),
640 aspeed_i2c_get_bus(&soc->i2c, 11),
641 &error_fatal);
63ceb818 642 /* Bus 11: TODO ucd90160@64 */
62c2c2eb
CLG		 643}
644
95f068c8
JW		 645static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
646{
647 AspeedSoCState *soc = &bmc->soc;
648 DeviceState *dev;
649
650 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3),
651 "emc1413", 0x4c));
652 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
653 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
654 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
655
656 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12),
657 "emc1413", 0x4c));
658 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
659 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
660 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
661
662 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13),
663 "emc1413", 0x4c));
664 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
665 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
666 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
6f5f6507
JW		 667
668 static uint8_t eeprom_buf[2 * 1024] = {
669 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe,
670 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65,
671 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32,
672 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42,
673 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45,
674 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1,
675 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7,
676 };
677 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57,
678 eeprom_buf);
95f068c8
JW		 679}
680
82b6a3f6
JW		 681static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
682{
683 AspeedSoCState *soc = &bmc->soc;
684 I2CSlave *i2c_mux;
685
686 /* The at24c256 */
687 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768);
688
689 /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */
690 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
691 0x48);
692 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
693 0x49);
694
695 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
696 "pca9546", 0x70);
697 /* It expects a TMP112 but a TMP105 is compatible */
698 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105,
699 0x4a);
700
701 /* It expects a ds3232 but a ds1338 is good enough */
702 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68);
703
704 /* It expects a pca9555 but a pca9552 is compatible */
f4aec252 705 create_pca9552(soc, 8, 0x30);
82b6a3f6
JW		 706}
707
58e52bdb
CLG		 708static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
709{
710 AspeedSoCState *soc = &bmc->soc;
fa6d98c0
JS		 711 I2CSlave *i2c_mux;
712
9077e09a 713 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);
58e52bdb 714
f4aec252 715 create_pca9552(soc, 3, 0x61);
bcb122f8 716
58e52bdb
CLG		 717 /* The rainier expects a TMP275 but a TMP105 is compatible */
718 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
719 0x48);
720 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
721 0x49);
722 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
723 0x4a);
fa6d98c0
JS		 724 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4),
725 "pca9546", 0x70);
9077e09a
PD		 726 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
727 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
728 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB);
f4aec252 729 create_pca9552(soc, 4, 0x60);
58e52bdb
CLG		 730
731 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
732 0x48);
733 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
734 0x49);
f4aec252
CLG		 735 create_pca9552(soc, 5, 0x60);
736 create_pca9552(soc, 5, 0x61);
fa6d98c0
JS		 737 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5),
738 "pca9546", 0x70);
9077e09a
PD		 739 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
740 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
58e52bdb
CLG		 741
742 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
743 0x48);
744 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
745 0x4a);
746 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
747 0x4b);
fa6d98c0
JS		 748 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6),
749 "pca9546", 0x70);
9077e09a
PD		 750 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
751 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
752 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB);
753 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB);
58e52bdb 754
f4aec252
CLG		 755 create_pca9552(soc, 7, 0x30);
756 create_pca9552(soc, 7, 0x31);
757 create_pca9552(soc, 7, 0x32);
758 create_pca9552(soc, 7, 0x33);
f4aec252
CLG		 759 create_pca9552(soc, 7, 0x60);
760 create_pca9552(soc, 7, 0x61);
b61ea6e7 761 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76);
58e52bdb
CLG		 762 /* Bus 7: TODO si7021-a20@20 */
763 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105,
764 0x48);
2a75e8c3 765 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52);
9077e09a
PD		 766 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB);
767 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB);
58e52bdb
CLG		 768
769 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
770 0x48);
771 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
772 0x4a);
9077e09a
PD		 773 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50, 64 * KiB);
774 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 64 * KiB);
f4aec252
CLG		 775 create_pca9552(soc, 8, 0x60);
776 create_pca9552(soc, 8, 0x61);
58e52bdb
CLG		 777 /* Bus 8: ucd90320@11 */
778 /* Bus 8: ucd90320@b */
779 /* Bus 8: ucd90320@c */
780
781 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c);
782 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d);
9077e09a 783 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB);
58e52bdb
CLG		 784
785 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c);
786 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d);
9077e09a 787 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB);
58e52bdb
CLG		 788
789 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
790 0x48);
791 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
792 0x49);
fa6d98c0
JS		 793 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11),
794 "pca9546", 0x70);
9077e09a
PD		 795 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
796 at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
f4aec252 797 create_pca9552(soc, 11, 0x60);
fa6d98c0
JS		 798
799
9077e09a 800 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB);
f4aec252 801 create_pca9552(soc, 13, 0x60);
fa6d98c0 802
9077e09a 803 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB);
f4aec252 804 create_pca9552(soc, 14, 0x60);
fa6d98c0 805
9077e09a 806 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB);
f4aec252 807 create_pca9552(soc, 15, 0x60);
58e52bdb
CLG		 808}
809
febbe308
PD		 810static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,
811 I2CBus **channels)
812{
813 I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr);
814 for (int i = 0; i < 8; i++) {
815 channels[i] = pca954x_i2c_get_bus(mux, i);
816 }
817}
818
819#define TYPE_LM75 TYPE_TMP105
820#define TYPE_TMP75 TYPE_TMP105
821#define TYPE_TMP422 "tmp422"
822
823static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
824{
825 AspeedSoCState *soc = &bmc->soc;
826 I2CBus *i2c[144] = {};
827
828 for (int i = 0; i < 16; i++) {
829 i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
830 }
831 I2CBus *i2c180 = i2c[2];
832 I2CBus *i2c480 = i2c[8];
833 I2CBus *i2c600 = i2c[11];
834
835 get_pca9548_channels(i2c180, 0x70, &i2c[16]);
836 get_pca9548_channels(i2c480, 0x70, &i2c[24]);
837 /* NOTE: The device tree skips [32, 40) in the alias numbering */
838 get_pca9548_channels(i2c600, 0x77, &i2c[40]);
839 get_pca9548_channels(i2c[24], 0x71, &i2c[48]);
840 get_pca9548_channels(i2c[25], 0x72, &i2c[56]);
841 get_pca9548_channels(i2c[26], 0x76, &i2c[64]);
842 get_pca9548_channels(i2c[27], 0x76, &i2c[72]);
843 for (int i = 0; i < 8; i++) {
844 get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]);
845 }
846
847 i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c);
848 i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d);
849
ef0eb67e
SS		 850 /*
851 * EEPROM 24c64 size is 64Kbits or 8 Kbytes
852 * 24c02 size is 2Kbits or 256 bytes
853 */
854 at24c_eeprom_init(i2c[19], 0x52, 8 * KiB);
855 at24c_eeprom_init(i2c[20], 0x50, 256);
856 at24c_eeprom_init(i2c[22], 0x52, 256);
febbe308
PD		 857
858 i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48);
859 i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49);
860 i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a);
861 i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c);
862
ef0eb67e 863 at24c_eeprom_init(i2c[8], 0x51, 8 * KiB);
febbe308
PD		 864 i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a);
865
866 i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c);
ef0eb67e 867 at24c_eeprom_init(i2c[50], 0x52, 8 * KiB);
febbe308
PD		 868 i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48);
869 i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49);
870
871 i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48);
872 i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49);
873
ef0eb67e 874 at24c_eeprom_init(i2c[65], 0x53, 8 * KiB);
febbe308
PD		 875 i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49);
876 i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48);
ef0eb67e
SS		 877 at24c_eeprom_init(i2c[68], 0x52, 8 * KiB);
878 at24c_eeprom_init(i2c[69], 0x52, 8 * KiB);
879 at24c_eeprom_init(i2c[70], 0x52, 8 * KiB);
880 at24c_eeprom_init(i2c[71], 0x52, 8 * KiB);
febbe308 881
ef0eb67e 882 at24c_eeprom_init(i2c[73], 0x53, 8 * KiB);
febbe308
PD		 883 i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49);
884 i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48);
ef0eb67e
SS		 885 at24c_eeprom_init(i2c[76], 0x52, 8 * KiB);
886 at24c_eeprom_init(i2c[77], 0x52, 8 * KiB);
887 at24c_eeprom_init(i2c[78], 0x52, 8 * KiB);
888 at24c_eeprom_init(i2c[79], 0x52, 8 * KiB);
889 at24c_eeprom_init(i2c[28], 0x50, 256);
febbe308
PD		 890
891 for (int i = 0; i < 8; i++) {
9077e09a 892 at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB);
febbe308
PD		 893 i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48);
894 i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b);
895 i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a);
896 }
897}
898
a20c54b1
PW		 899#define TYPE_TMP421 "tmp421"
900
901static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
902{
903 AspeedSoCState *soc = &bmc->soc;
904 I2CBus *i2c[13] = {};
905 for (int i = 0; i < 13; i++) {
906 if ((i == 8) || (i == 11)) {
907 continue;
908 }
909 i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
910 }
911
912 /* Bus 0 - 5 all have the same config. */
913 for (int i = 0; i < 6; i++) {
914 /* Missing model: ti,ina230 @ 0x45 */
915 /* Missing model: mps,mp5023 @ 0x40 */
916 i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f);
917 /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */
918 i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76);
919 i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67);
920 /* Missing model: fsc,fusb302 @ 0x22 */
921 }
922
923 /* Bus 6 */
924 at24c_eeprom_init(i2c[6], 0x56, 65536);
925 /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */
926 i2c_slave_create_simple(i2c[6], "ds1338", 0x51);
927
928
929 /* Bus 7 */
930 at24c_eeprom_init(i2c[7], 0x54, 65536);
931
932 /* Bus 9 */
933 i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f);
934
935 /* Bus 10 */
936 i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f);
937 /* Missing model: ti,hdc1080 @ 0x40 */
938 i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67);
939
940 /* Bus 12 */
941 /* Missing model: adi,adm1278 @ 0x11 */
942 i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c);
943 i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d);
944 i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67);
945}
946
fa699e80
PD		 947static void fby35_i2c_init(AspeedMachineState *bmc)
948{
949 AspeedSoCState *soc = &bmc->soc;
950 I2CBus *i2c[16];
951
952 for (int i = 0; i < 16; i++) {
953 i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
954 }
955
956 i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f);
957 i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f);
958 /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */
959 i2c_slave_create_simple(i2c[11], "adm1272", 0x44);
960 i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e);
961 i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f);
962
9077e09a
PD		 963 at24c_eeprom_init(i2c[4], 0x51, 128 * KiB);
964 at24c_eeprom_init(i2c[6], 0x51, 128 * KiB);
c0216b94
PD		 965 at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid,
966 fby35_nic_fruid_len);
967 at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid,
968 fby35_bb_fruid_len);
969 at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid,
970 fby35_bmc_fruid_len);
fa699e80
PD		 971
972 /*
973 * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on
974 * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on
975 * each.
976 */
977}
978
fb6b3c8d
JHY		 979static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
980{
981 AspeedSoCState *soc = &bmc->soc;
982
983 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
984}
985
ece4cccd
GG		 986static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
987{
988 AspeedSoCState *soc = &bmc->soc;
2a7a5d5c 989 I2CSlave *therm_mux, *cpuvr_mux;
ece4cccd
GG		 990
991 /* Create the generic DC-SCM hardware */
992 qcom_dc_scm_bmc_i2c_init(bmc);
993
994 /* Now create the Firework specific hardware */
2a75e8c3 995
2a7a5d5c
JHY		 996 /* I2C7 CPUVR MUX */
997 cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
998 "pca9546", 0x70);
999 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72);
1000 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72);
1001 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72);
1002 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72);
1003
cfc68f16
MK		 1004 /* I2C8 Thermal Diodes*/
1005 therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
1006 "pca9548", 0x70);
1007 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C);
1008 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C);
1009 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48);
1010 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48);
1011 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48);
1012
2a75e8c3
MK		 1013 /* I2C9 Fan Controller (MAX31785) */
1014 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52);
1015 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54);
ece4cccd
GG		 1016}
1017
1a15311a
CLG		 1018static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
1019{
1020 return ASPEED_MACHINE(obj)->mmio_exec;
1021}
1022
1023static void aspeed_set_mmio_exec(Object *obj, bool value, Error **errp)
1024{
1025 ASPEED_MACHINE(obj)->mmio_exec = value;
1026}
1027
1028static void aspeed_machine_instance_init(Object *obj)
1029{
1030 ASPEED_MACHINE(obj)->mmio_exec = false;
1031}
1032
9820e52f
CLG		 1033static char *aspeed_get_fmc_model(Object *obj, Error **errp)
1034{
1035 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1036 return g_strdup(bmc->fmc_model);
1037}
1038
1039static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp)
1040{
1041 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1042
1043 g_free(bmc->fmc_model);
1044 bmc->fmc_model = g_strdup(value);
1045}
1046
1047static char *aspeed_get_spi_model(Object *obj, Error **errp)
1048{
1049 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1050 return g_strdup(bmc->spi_model);
1051}
1052
1053static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp)
1054{
1055 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1056
1057 g_free(bmc->spi_model);
1058 bmc->spi_model = g_strdup(value);
1059}
1060
1a15311a
CLG		 1061static void aspeed_machine_class_props_init(ObjectClass *oc)
1062{
1063 object_class_property_add_bool(oc, "execute-in-place",
1064 aspeed_get_mmio_exec,
d2623129 1065 aspeed_set_mmio_exec);
1a15311a 1066 object_class_property_set_description(oc, "execute-in-place",
7eecec7d 1067 "boot directly from CE0 flash device");
9820e52f
CLG		 1068
1069 object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model,
1070 aspeed_set_fmc_model);
1071 object_class_property_set_description(oc, "fmc-model",
1072 "Change the FMC Flash model");
1073 object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model,
1074 aspeed_set_spi_model);
1075 object_class_property_set_description(oc, "spi-model",
1076 "Change the SPI Flash model");
1a15311a
CLG		 1077}
1078
b7f1a0cb
CLG		 1079static int aspeed_soc_num_cpus(const char *soc_name)
1080{
1081 AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(soc_name));
1082 return sc->num_cpus;
1083}
1084
fca9ca1b 1085static void aspeed_machine_class_init(ObjectClass *oc, void *data)
62c2c2eb
CLG		 1086{
1087 MachineClass *mc = MACHINE_CLASS(oc);
d3bad7e7 1088 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
62c2c2eb 1089
fca9ca1b 1090 mc->init = aspeed_machine_init;
62c2c2eb
CLG		 1091 mc->no_floppy = 1;
1092 mc->no_cdrom = 1;
1093 mc->no_parallel = 1;
afcbaed6 1094 mc->default_ram_id = "ram";
d3bad7e7 1095 amc->macs_mask = ASPEED_MAC0_ON;
5d63d0c7 1096 amc->uart_default = ASPEED_DEV_UART5;
1a15311a
CLG		 1097
1098 aspeed_machine_class_props_init(oc);
62c2c2eb
CLG		 1099}
1100
baa4732b
CLG		 1101static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
1102{
1103 MachineClass *mc = MACHINE_CLASS(oc);
1104 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1105
1106 mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
1107 amc->soc_name = "ast2400-a1";
1108 amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
1109 amc->fmc_model = "n25q256a";
70322913 1110 amc->spi_model = "mx25l25635f";
baa4732b
CLG		 1111 amc->num_cs = 1;
1112 amc->i2c_init = palmetto_bmc_i2c_init;
1113 mc->default_ram_size = 256 * MiB;
b7f1a0cb
CLG		 1114 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1115 aspeed_soc_num_cpus(amc->soc_name);
baa4732b
CLG		 1116};
1117
9cccb912
PV		 1118static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void *data)
1119{
1120 MachineClass *mc = MACHINE_CLASS(oc);
1121 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1122
1123 mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)";
1124 amc->soc_name = "ast2400-a1";
1125 amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1;
1126 amc->fmc_model = "n25q256a";
1127 amc->spi_model = "mx25l25635e";
1128 amc->num_cs = 1;
1129 amc->i2c_init = quanta_q71l_bmc_i2c_init;
1130 mc->default_ram_size = 128 * MiB;
1131 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1132 aspeed_soc_num_cpus(amc->soc_name);
1133}
1134
40a38df5
ES		 1135static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
1136 void *data)
1137{
1138 MachineClass *mc = MACHINE_CLASS(oc);
1139 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1140
1141 mc->desc = "Supermicro X11 BMC (ARM926EJ-S)";
1142 amc->soc_name = "ast2400-a1";
1143 amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1;
1144 amc->fmc_model = "mx25l25635e";
1145 amc->spi_model = "mx25l25635e";
1146 amc->num_cs = 1;
1147 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1148 amc->i2c_init = palmetto_bmc_i2c_init;
1149 mc->default_ram_size = 256 * MiB;
1150}
1151
47936597
GR		 1152static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
1153 void *data)
1154{
1155 MachineClass *mc = MACHINE_CLASS(oc);
1156 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1157
1158 mc->desc = "Supermicro X11 SPI BMC (ARM1176)";
1159 amc->soc_name = "ast2500-a1";
1160 amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1;
1161 amc->fmc_model = "mx25l25635e";
1162 amc->spi_model = "mx25l25635e";
1163 amc->num_cs = 1;
1164 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1165 amc->i2c_init = palmetto_bmc_i2c_init;
1166 mc->default_ram_size = 512 * MiB;
1167 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1168 aspeed_soc_num_cpus(amc->soc_name);
1169}
1170
baa4732b
CLG		 1171static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
1172{
1173 MachineClass *mc = MACHINE_CLASS(oc);
1174 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1175
1176 mc->desc = "Aspeed AST2500 EVB (ARM1176)";
1177 amc->soc_name = "ast2500-a1";
1178 amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
753abfc4 1179 amc->fmc_model = "mx25l25635e";
70322913 1180 amc->spi_model = "mx25l25635f";
baa4732b
CLG		 1181 amc->num_cs = 1;
1182 amc->i2c_init = ast2500_evb_i2c_init;
1183 mc->default_ram_size = 512 * MiB;
b7f1a0cb
CLG		 1184 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1185 aspeed_soc_num_cpus(amc->soc_name);
baa4732b
CLG		 1186};
1187
34f73a81
KP		 1188static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, void *data)
1189{
1190 MachineClass *mc = MACHINE_CLASS(oc);
1191 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1192
1193 mc->desc = "Facebook YosemiteV2 BMC (ARM1176)";
1194 amc->soc_name = "ast2500-a1";
1195 amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
1196 amc->hw_strap2 = 0;
1197 amc->fmc_model = "n25q256a";
1198 amc->spi_model = "mx25l25635e";
1199 amc->num_cs = 2;
1200 amc->i2c_init = yosemitev2_bmc_i2c_init;
1201 mc->default_ram_size = 512 * MiB;
1202 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1203 aspeed_soc_num_cpus(amc->soc_name);
1204};
1205
baa4732b
CLG		 1206static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
1207{
1208 MachineClass *mc = MACHINE_CLASS(oc);
1209 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1210
1211 mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
1212 amc->soc_name = "ast2500-a1";
1213 amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
1214 amc->fmc_model = "n25q256a";
1215 amc->spi_model = "mx66l1g45g";
1216 amc->num_cs = 2;
1217 amc->i2c_init = romulus_bmc_i2c_init;
1218 mc->default_ram_size = 512 * MiB;
b7f1a0cb
CLG		 1219 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1220 aspeed_soc_num_cpus(amc->soc_name);
fca9ca1b
CLG		 1221};
1222
6c323aba
KP		 1223static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, void *data)
1224{
1225 MachineClass *mc = MACHINE_CLASS(oc);
1226 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1227
1228 mc->desc = "Facebook Tiogapass BMC (ARM1176)";
1229 amc->soc_name = "ast2500-a1";
1230 amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
1231 amc->hw_strap2 = 0;
1232 amc->fmc_model = "n25q256a";
1233 amc->spi_model = "mx25l25635e";
1234 amc->num_cs = 2;
1235 amc->i2c_init = tiogapass_bmc_i2c_init;
1236 mc->default_ram_size = 1 * GiB;
1237 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1238 aspeed_soc_num_cpus(amc->soc_name);
1239 aspeed_soc_num_cpus(amc->soc_name);
1240};
1241
143b040f
PW		 1242static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data)
1243{
1244 MachineClass *mc = MACHINE_CLASS(oc);
1245 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1246
1247 mc->desc = "OCP SonoraPass BMC (ARM1176)";
1248 amc->soc_name = "ast2500-a1";
1249 amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1;
1250 amc->fmc_model = "mx66l1g45g";
1251 amc->spi_model = "mx66l1g45g";
1252 amc->num_cs = 2;
1253 amc->i2c_init = sonorapass_bmc_i2c_init;
1254 mc->default_ram_size = 512 * MiB;
b7f1a0cb
CLG		 1255 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1256 aspeed_soc_num_cpus(amc->soc_name);
143b040f
PW		 1257};
1258
baa4732b
CLG		 1259static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
1260{
1261 MachineClass *mc = MACHINE_CLASS(oc);
1262 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1263
1264 mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
1265 amc->soc_name = "ast2500-a1";
1266 amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
70322913 1267 amc->fmc_model = "mx25l25635f";
baa4732b
CLG		 1268 amc->spi_model = "mx66l1g45g";
1269 amc->num_cs = 2;
1270 amc->i2c_init = witherspoon_bmc_i2c_init;
1271 mc->default_ram_size = 512 * MiB;
b7f1a0cb
CLG		 1272 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1273 aspeed_soc_num_cpus(amc->soc_name);
baa4732b
CLG		 1274};
1275
1276static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
1277{
1278 MachineClass *mc = MACHINE_CLASS(oc);
1279 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1280
f548f201 1281 mc->desc = "Aspeed AST2600 EVB (Cortex-A7)";
c5811bb3 1282 amc->soc_name = "ast2600-a3";
baa4732b
CLG		 1283 amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
1284 amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
753abfc4 1285 amc->fmc_model = "mx66u51235f";
baa4732b
CLG		 1286 amc->spi_model = "mx66u51235f";
1287 amc->num_cs = 1;
29193286
GR		 1288 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
1289 ASPEED_MAC3_ON;
baa4732b
CLG		 1290 amc->i2c_init = ast2600_evb_i2c_init;
1291 mc->default_ram_size = 1 * GiB;
b7f1a0cb
CLG		 1292 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1293 aspeed_soc_num_cpus(amc->soc_name);
baa4732b
CLG		 1294};
1295
63ceb818
CLG		 1296static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
1297{
1298 MachineClass *mc = MACHINE_CLASS(oc);
1299 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1300
f548f201 1301 mc->desc = "OpenPOWER Tacoma BMC (Cortex-A7)";
c5811bb3 1302 amc->soc_name = "ast2600-a3";
63ceb818
CLG		 1303 amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
1304 amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
1305 amc->fmc_model = "mx66l1g45g";
1306 amc->spi_model = "mx66l1g45g";
1307 amc->num_cs = 2;
d3bad7e7 1308 amc->macs_mask = ASPEED_MAC2_ON;
63ceb818
CLG		 1309 amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */
1310 mc->default_ram_size = 1 * GiB;
b7f1a0cb
CLG		 1311 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1312 aspeed_soc_num_cpus(amc->soc_name);
63ceb818
CLG		 1313};
1314
95f068c8
JW		 1315static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data)
1316{
1317 MachineClass *mc = MACHINE_CLASS(oc);
1318 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1319
1320 mc->desc = "Bytedance G220A BMC (ARM1176)";
1321 amc->soc_name = "ast2500-a1";
1322 amc->hw_strap1 = G220A_BMC_HW_STRAP1;
1323 amc->fmc_model = "n25q512a";
1324 amc->spi_model = "mx25l25635e";
1325 amc->num_cs = 2;
5bb825c8 1326 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
95f068c8
JW		 1327 amc->i2c_init = g220a_bmc_i2c_init;
1328 mc->default_ram_size = 1024 * MiB;
1329 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1330 aspeed_soc_num_cpus(amc->soc_name);
1331};
1332
82b6a3f6
JW		 1333static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data)
1334{
1335 MachineClass *mc = MACHINE_CLASS(oc);
1336 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1337
1338 mc->desc = "Inspur FP5280G2 BMC (ARM1176)";
1339 amc->soc_name = "ast2500-a1";
1340 amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1;
1341 amc->fmc_model = "n25q512a";
1342 amc->spi_model = "mx25l25635e";
1343 amc->num_cs = 2;
1344 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1345 amc->i2c_init = fp5280g2_bmc_i2c_init;
1346 mc->default_ram_size = 512 * MiB;
1347 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1348 aspeed_soc_num_cpus(amc->soc_name);
1349};
1350
58e52bdb
CLG		 1351static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data)
1352{
1353 MachineClass *mc = MACHINE_CLASS(oc);
1354 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1355
f548f201 1356 mc->desc = "IBM Rainier BMC (Cortex-A7)";
c5811bb3 1357 amc->soc_name = "ast2600-a3";
58e52bdb
CLG		 1358 amc->hw_strap1 = RAINIER_BMC_HW_STRAP1;
1359 amc->hw_strap2 = RAINIER_BMC_HW_STRAP2;
1360 amc->fmc_model = "mx66l1g45g";
1361 amc->spi_model = "mx66l1g45g";
1362 amc->num_cs = 2;
1363 amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
1364 amc->i2c_init = rainier_bmc_i2c_init;
1365 mc->default_ram_size = 1 * GiB;
1366 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1367 aspeed_soc_num_cpus(amc->soc_name);
1368};
1369
febbe308
PD		 1370/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
1371#if HOST_LONG_BITS == 32
1372#define FUJI_BMC_RAM_SIZE (1 * GiB)
1373#else
1374#define FUJI_BMC_RAM_SIZE (2 * GiB)
1375#endif
1376
1377static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
1378{
1379 MachineClass *mc = MACHINE_CLASS(oc);
1380 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1381
1382 mc->desc = "Facebook Fuji BMC (Cortex-A7)";
1383 amc->soc_name = "ast2600-a3";
1384 amc->hw_strap1 = FUJI_BMC_HW_STRAP1;
1385 amc->hw_strap2 = FUJI_BMC_HW_STRAP2;
1386 amc->fmc_model = "mx66l1g45g";
1387 amc->spi_model = "mx66l1g45g";
1388 amc->num_cs = 2;
1389 amc->macs_mask = ASPEED_MAC3_ON;
1390 amc->i2c_init = fuji_bmc_i2c_init;
1391 amc->uart_default = ASPEED_DEV_UART1;
1392 mc->default_ram_size = FUJI_BMC_RAM_SIZE;
1393 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1394 aspeed_soc_num_cpus(amc->soc_name);
1395};
1396
104bdaff
PW		 1397/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
1398#if HOST_LONG_BITS == 32
1399#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
1400#else
1401#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
1402#endif
1403
a20c54b1
PW		 1404static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
1405{
1406 MachineClass *mc = MACHINE_CLASS(oc);
1407 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1408
1409 mc->desc = "Facebook Bletchley BMC (Cortex-A7)";
1410 amc->soc_name = "ast2600-a3";
1411 amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1;
1412 amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2;
1413 amc->fmc_model = "w25q01jvq";
1414 amc->spi_model = NULL;
1415 amc->num_cs = 2;
1416 amc->macs_mask = ASPEED_MAC2_ON;
1417 amc->i2c_init = bletchley_bmc_i2c_init;
104bdaff 1418 mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE;
a20c54b1
PW		 1419 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1420 aspeed_soc_num_cpus(amc->soc_name);
1421}
1422
7966d70f 1423static void fby35_reset(MachineState *state, ShutdownCause reason)
fa699e80
PD		 1424{
1425 AspeedMachineState *bmc = ASPEED_MACHINE(state);
1426 AspeedGPIOState *gpio = &bmc->soc.gpio;
1427
7966d70f 1428 qemu_devices_reset(reason);
fa699e80 1429
f0418558 1430 /* Board ID: 7 (Class-1, 4 slots) */
fa699e80
PD		 1431 object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal);
1432 object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal);
1433 object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal);
1434 object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal);
f0418558
PD		 1435
1436 /* Slot presence pins, inverse polarity. (False means present) */
1437 object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal);
1438 object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal);
1439 object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal);
1440 object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal);
1441
1442 /* Slot 12v power pins, normal polarity. (True means powered-on) */
1443 object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal);
1444 object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal);
1445 object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal);
1446 object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal);
fa699e80
PD		 1447}
1448
1449static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data)
1450{
1451 MachineClass *mc = MACHINE_CLASS(oc);
1452 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1453
1454 mc->desc = "Facebook fby35 BMC (Cortex-A7)";
1455 mc->reset = fby35_reset;
1456 amc->fmc_model = "mx66l1g45g";
1457 amc->num_cs = 2;
1458 amc->macs_mask = ASPEED_MAC3_ON;
1459 amc->i2c_init = fby35_i2c_init;
1460 /* FIXME: Replace this macro with something more general */
1461 mc->default_ram_size = FUJI_BMC_RAM_SIZE;
1462}
1463
66c895b8
JL		 1464#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
1465/* Main SYSCLK frequency in Hz (200MHz) */
1466#define SYSCLK_FRQ 200000000ULL
1467
1468static void aspeed_minibmc_machine_init(MachineState *machine)
1469{
1470 AspeedMachineState *bmc = ASPEED_MACHINE(machine);
1471 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
1472 Clock *sysclk;
1473
1474 sysclk = clock_new(OBJECT(machine), "SYSCLK");
1475 clock_set_hz(sysclk, SYSCLK_FRQ);
1476
1477 object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
1478 qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk);
1479
4dd9d554
PD		 1480 object_property_set_link(OBJECT(&bmc->soc), "memory",
1481 OBJECT(get_system_memory()), &error_abort);
d2b3eaef 1482 connect_serial_hds_to_uarts(bmc);
66c895b8
JL		 1483 qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
1484
1485 aspeed_board_init_flashes(&bmc->soc.fmc,
1486 bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
1487 amc->num_cs,
1488 0);
1489
1490 aspeed_board_init_flashes(&bmc->soc.spi[0],
1491 bmc->spi_model ? bmc->spi_model : amc->spi_model,
1492 amc->num_cs, amc->num_cs);
1493
1494 aspeed_board_init_flashes(&bmc->soc.spi[1],
1495 bmc->spi_model ? bmc->spi_model : amc->spi_model,
1496 amc->num_cs, (amc->num_cs * 2));
1497
1498 if (amc->i2c_init) {
1499 amc->i2c_init(bmc);
1500 }
1501
1502 armv7m_load_kernel(ARM_CPU(first_cpu),
1503 machine->kernel_filename,
761c532a 1504 0,
66c895b8
JL		 1505 AST1030_INTERNAL_FLASH_SIZE);
1506}
1507
4c70ab16
TL		 1508static void ast1030_evb_i2c_init(AspeedMachineState *bmc)
1509{
1510 AspeedSoCState *soc = &bmc->soc;
1511
1512 /* U10 24C08 connects to SDA/SCL Groupt 1 by default */
1513 uint8_t *eeprom_buf = g_malloc0(32 * 1024);
1514 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf);
1515
1516 /* U11 LM75 connects to SDA/SCL Group 2 by default */
1517 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d);
1518}
1519
66c895b8
JL		 1520static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
1521 void *data)
1522{
1523 MachineClass *mc = MACHINE_CLASS(oc);
1524 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1525
1526 mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)";
1527 amc->soc_name = "ast1030-a1";
1528 amc->hw_strap1 = 0;
1529 amc->hw_strap2 = 0;
1530 mc->init = aspeed_minibmc_machine_init;
4c70ab16 1531 amc->i2c_init = ast1030_evb_i2c_init;
66c895b8
JL		 1532 mc->default_ram_size = 0;
1533 mc->default_cpus = mc->min_cpus = mc->max_cpus = 1;
1534 amc->fmc_model = "sst25vf032b";
1535 amc->spi_model = "sst25vf032b";
1536 amc->num_cs = 2;
1537 amc->macs_mask = 0;
1538}
1539
fb6b3c8d
JHY		 1540static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
1541 void *data)
1542{
1543 MachineClass *mc = MACHINE_CLASS(oc);
1544 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1545
1546 mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)";
1547 amc->soc_name = "ast2600-a3";
1548 amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
1549 amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
1550 amc->fmc_model = "n25q512a";
1551 amc->spi_model = "n25q512a";
1552 amc->num_cs = 2;
1553 amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
1554 amc->i2c_init = qcom_dc_scm_bmc_i2c_init;
1555 mc->default_ram_size = 1 * GiB;
1556 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1557 aspeed_soc_num_cpus(amc->soc_name);
1558};
1559
ece4cccd
GG		 1560static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
1561 void *data)
1562{
1563 MachineClass *mc = MACHINE_CLASS(oc);
1564 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1565
1566 mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
1567 amc->soc_name = "ast2600-a3";
1568 amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
1569 amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
1570 amc->fmc_model = "n25q512a";
1571 amc->spi_model = "n25q512a";
1572 amc->num_cs = 2;
1573 amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
1574 amc->i2c_init = qcom_dc_scm_firework_i2c_init;
1575 mc->default_ram_size = 1 * GiB;
1576 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1577 aspeed_soc_num_cpus(amc->soc_name);
1578};
1579
baa4732b 1580static const TypeInfo aspeed_machine_types[] = {
fca9ca1b 1581 {
baa4732b
CLG		 1582 .name = MACHINE_TYPE_NAME("palmetto-bmc"),
1583 .parent = TYPE_ASPEED_MACHINE,
1584 .class_init = aspeed_machine_palmetto_class_init,
40a38df5
ES		 1585 }, {
1586 .name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
1587 .parent = TYPE_ASPEED_MACHINE,
1588 .class_init = aspeed_machine_supermicrox11_bmc_class_init,
47936597
GR		 1589 }, {
1590 .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
1591 .parent = TYPE_ASPEED_MACHINE,
1592 .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
fca9ca1b 1593 }, {
baa4732b
CLG		 1594 .name = MACHINE_TYPE_NAME("ast2500-evb"),
1595 .parent = TYPE_ASPEED_MACHINE,
1596 .class_init = aspeed_machine_ast2500_evb_class_init,
fca9ca1b 1597 }, {
baa4732b
CLG		 1598 .name = MACHINE_TYPE_NAME("romulus-bmc"),
1599 .parent = TYPE_ASPEED_MACHINE,
1600 .class_init = aspeed_machine_romulus_class_init,
143b040f
PW		 1601 }, {
1602 .name = MACHINE_TYPE_NAME("sonorapass-bmc"),
1603 .parent = TYPE_ASPEED_MACHINE,
1604 .class_init = aspeed_machine_sonorapass_class_init,
fca9ca1b 1605 }, {
baa4732b
CLG		 1606 .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
1607 .parent = TYPE_ASPEED_MACHINE,
1608 .class_init = aspeed_machine_witherspoon_class_init,
ccc2c418 1609 }, {
baa4732b
CLG		 1610 .name = MACHINE_TYPE_NAME("ast2600-evb"),
1611 .parent = TYPE_ASPEED_MACHINE,
1612 .class_init = aspeed_machine_ast2600_evb_class_init,
34f73a81
KP		 1613 }, {
1614 .name = MACHINE_TYPE_NAME("yosemitev2-bmc"),
1615 .parent = TYPE_ASPEED_MACHINE,
1616 .class_init = aspeed_machine_yosemitev2_class_init,
63ceb818
CLG		 1617 }, {
1618 .name = MACHINE_TYPE_NAME("tacoma-bmc"),
1619 .parent = TYPE_ASPEED_MACHINE,
1620 .class_init = aspeed_machine_tacoma_class_init,
6c323aba
KP		 1621 }, {
1622 .name = MACHINE_TYPE_NAME("tiogapass-bmc"),
1623 .parent = TYPE_ASPEED_MACHINE,
1624 .class_init = aspeed_machine_tiogapass_class_init,
95f068c8
JW		 1625 }, {
1626 .name = MACHINE_TYPE_NAME("g220a-bmc"),
1627 .parent = TYPE_ASPEED_MACHINE,
1628 .class_init = aspeed_machine_g220a_class_init,
fb6b3c8d
JHY		 1629 }, {
1630 .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
1631 .parent = TYPE_ASPEED_MACHINE,
1632 .class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
ece4cccd
GG		 1633 }, {
1634 .name = MACHINE_TYPE_NAME("qcom-firework-bmc"),
1635 .parent = TYPE_ASPEED_MACHINE,
1636 .class_init = aspeed_machine_qcom_firework_class_init,
82b6a3f6
JW		 1637 }, {
1638 .name = MACHINE_TYPE_NAME("fp5280g2-bmc"),
1639 .parent = TYPE_ASPEED_MACHINE,
1640 .class_init = aspeed_machine_fp5280g2_class_init,
9cccb912
PV		 1641 }, {
1642 .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
1643 .parent = TYPE_ASPEED_MACHINE,
1644 .class_init = aspeed_machine_quanta_q71l_class_init,
58e52bdb
CLG		 1645 }, {
1646 .name = MACHINE_TYPE_NAME("rainier-bmc"),
1647 .parent = TYPE_ASPEED_MACHINE,
1648 .class_init = aspeed_machine_rainier_class_init,
febbe308
PD		 1649 }, {
1650 .name = MACHINE_TYPE_NAME("fuji-bmc"),
1651 .parent = TYPE_ASPEED_MACHINE,
1652 .class_init = aspeed_machine_fuji_class_init,
a20c54b1
PW		 1653 }, {
1654 .name = MACHINE_TYPE_NAME("bletchley-bmc"),
1655 .parent = TYPE_ASPEED_MACHINE,
1656 .class_init = aspeed_machine_bletchley_class_init,
fa699e80
PD		 1657 }, {
1658 .name = MACHINE_TYPE_NAME("fby35-bmc"),
1659 .parent = MACHINE_TYPE_NAME("ast2600-evb"),
1660 .class_init = aspeed_machine_fby35_class_init,
66c895b8
JL		 1661 }, {
1662 .name = MACHINE_TYPE_NAME("ast1030-evb"),
1663 .parent = TYPE_ASPEED_MACHINE,
1664 .class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
baa4732b
CLG		 1665 }, {
1666 .name = TYPE_ASPEED_MACHINE,
1667 .parent = TYPE_MACHINE,
888b2b03 1668 .instance_size = sizeof(AspeedMachineState),
1a15311a 1669 .instance_init = aspeed_machine_instance_init,
baa4732b
CLG		 1670 .class_size = sizeof(AspeedMachineClass),
1671 .class_init = aspeed_machine_class_init,
1672 .abstract = true,
fca9ca1b 1673 }
baa4732b 1674};
74fb1f38 1675
baa4732b 1676DEFINE_TYPES(aspeed_machine_types)
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