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Commit | Line | Data |
---|---|---|
327d8e4e AJ |
1 | /* |
2 | * OpenPOWER Palmetto BMC | |
3 | * | |
4 | * Andrew Jeffery <andrew@aj.id.au> | |
5 | * | |
6 | * Copyright 2016 IBM Corp. | |
7 | * | |
8 | * This code is licensed under the GPL version 2 or later. See | |
9 | * the COPYING file in the top-level directory. | |
10 | */ | |
11 | ||
12 | #include "qemu/osdep.h" | |
da34e65c | 13 | #include "qapi/error.h" |
12ec8bd5 | 14 | #include "hw/arm/boot.h" |
fca9ca1b | 15 | #include "hw/arm/aspeed.h" |
00442402 | 16 | #include "hw/arm/aspeed_soc.h" |
c0216b94 | 17 | #include "hw/arm/aspeed_eeprom.h" |
8285490b | 18 | #include "hw/block/flash.h" |
3ec75e39 | 19 | #include "hw/i2c/i2c_mux_pca954x.h" |
93198b6c | 20 | #include "hw/i2c/smbus_eeprom.h" |
044475f3 | 21 | #include "hw/misc/pca9552.h" |
9618ebae | 22 | #include "hw/nvram/eeprom_at24c.h" |
5e9ae4b1 | 23 | #include "hw/sensor/tmp105.h" |
7cfbde5e | 24 | #include "hw/misc/led.h" |
a27bd6c7 | 25 | #include "hw/qdev-properties.h" |
e1ad9bc4 | 26 | #include "sysemu/block-backend.h" |
fa699e80 | 27 | #include "sysemu/reset.h" |
d769a1da CLG |
28 | #include "hw/loader.h" |
29 | #include "qemu/error-report.h" | |
a9df9622 | 30 | #include "qemu/units.h" |
66c895b8 | 31 | #include "hw/qdev-clock.h" |
d2b3eaef | 32 | #include "sysemu/sysemu.h" |
327d8e4e | 33 | |
74fb1f38 | 34 | static struct arm_boot_info aspeed_board_binfo = { |
b033271f | 35 | .board_id = -1, /* device-tree-only board */ |
327d8e4e AJ |
36 | }; |
37 | ||
612b219a | 38 | struct AspeedMachineState { |
888b2b03 PMD |
39 | /* Private */ |
40 | MachineState parent_obj; | |
41 | /* Public */ | |
42 | ||
ff90606f | 43 | AspeedSoCState soc; |
262259ea | 44 | MemoryRegion boot_rom; |
888b2b03 | 45 | bool mmio_exec; |
f65f6ad5 | 46 | uint32_t uart_chosen; |
9820e52f CLG |
47 | char *fmc_model; |
48 | char *spi_model; | |
ea066d39 | 49 | }; |
327d8e4e | 50 | |
1e2c22c9 CLG |
51 | /* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ |
52 | #if HOST_LONG_BITS == 32 | |
53 | #define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) | |
54 | #else | |
55 | #define ASPEED_RAM_SIZE(sz) (sz) | |
56 | #endif | |
57 | ||
ef17f836 | 58 | /* Palmetto hardware value: 0x120CE416 */ |
8da33ef7 CLG |
59 | #define PALMETTO_BMC_HW_STRAP1 ( \ |
60 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ | |
61 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ | |
62 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
63 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ | |
64 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
65 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
66 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ | |
67 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
68 | SCU_HW_STRAP_SPI_WIDTH | \ | |
69 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
70 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
71 | ||
40a38df5 ES |
72 | /* TODO: Find the actual hardware value */ |
73 | #define SUPERMICROX11_BMC_HW_STRAP1 ( \ | |
74 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ | |
75 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \ | |
76 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
77 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ | |
78 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
79 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
80 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ | |
81 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
82 | SCU_HW_STRAP_SPI_WIDTH | \ | |
83 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
84 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
85 | ||
47936597 GR |
86 | /* TODO: Find the actual hardware value */ |
87 | #define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \ | |
88 | AST2500_HW_STRAP1_DEFAULTS | \ | |
89 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
90 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
91 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
92 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
93 | SCU_HW_STRAP_SPI_WIDTH | \ | |
94 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN)) | |
95 | ||
ef17f836 | 96 | /* AST2500 evb hardware value: 0xF100C2E6 */ |
9a7c1750 CLG |
97 | #define AST2500_EVB_HW_STRAP1 (( \ |
98 | AST2500_HW_STRAP1_DEFAULTS | \ | |
99 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
100 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
101 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
102 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
103 | SCU_HW_STRAP_MAC1_RGMII | \ | |
104 | SCU_HW_STRAP_MAC0_RGMII) & \ | |
105 | ~SCU_HW_STRAP_2ND_BOOT_WDT) | |
106 | ||
ef17f836 CLG |
107 | /* Romulus hardware value: 0xF10AD206 */ |
108 | #define ROMULUS_BMC_HW_STRAP1 ( \ | |
109 | AST2500_HW_STRAP1_DEFAULTS | \ | |
110 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
111 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
112 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
113 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
114 | SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ | |
115 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) | |
116 | ||
143b040f PW |
117 | /* Sonorapass hardware value: 0xF100D216 */ |
118 | #define SONORAPASS_BMC_HW_STRAP1 ( \ | |
119 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
120 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
121 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
122 | SCU_AST2500_HW_STRAP_RESERVED28 | \ | |
123 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
124 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
125 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
126 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ | |
127 | SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ | |
128 | SCU_HW_STRAP_VGA_BIOS_ROM | \ | |
129 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
130 | SCU_AST2500_HW_STRAP_RESERVED1) | |
131 | ||
95f068c8 JW |
132 | #define G220A_BMC_HW_STRAP1 ( \ |
133 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
134 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
135 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
136 | SCU_AST2500_HW_STRAP_RESERVED28 | \ | |
137 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
138 | SCU_HW_STRAP_2ND_BOOT_WDT | \ | |
139 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
140 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
141 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ | |
142 | SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ | |
143 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \ | |
144 | SCU_AST2500_HW_STRAP_RESERVED1) | |
145 | ||
82b6a3f6 JW |
146 | /* FP5280G2 hardware value: 0XF100D286 */ |
147 | #define FP5280G2_BMC_HW_STRAP1 ( \ | |
148 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
149 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
150 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
151 | SCU_AST2500_HW_STRAP_RESERVED28 | \ | |
152 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
153 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
154 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
155 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ | |
156 | SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ | |
157 | SCU_HW_STRAP_MAC1_RGMII | \ | |
158 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
159 | SCU_AST2500_HW_STRAP_RESERVED1) | |
160 | ||
62c2c2eb CLG |
161 | /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ |
162 | #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 | |
163 | ||
9cccb912 PV |
164 | /* Quanta-Q71l hardware value */ |
165 | #define QUANTA_Q71L_BMC_HW_STRAP1 ( \ | |
166 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ | |
167 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \ | |
168 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
169 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \ | |
170 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
171 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \ | |
172 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
173 | SCU_HW_STRAP_SPI_WIDTH | \ | |
174 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \ | |
175 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
176 | ||
ccc2c418 CLG |
177 | /* AST2600 evb hardware value */ |
178 | #define AST2600_EVB_HW_STRAP1 0x000000C0 | |
179 | #define AST2600_EVB_HW_STRAP2 0x00000003 | |
180 | ||
63ceb818 CLG |
181 | /* Tacoma hardware value */ |
182 | #define TACOMA_BMC_HW_STRAP1 0x00000000 | |
7582591a | 183 | #define TACOMA_BMC_HW_STRAP2 0x00000040 |
63ceb818 | 184 | |
58e52bdb | 185 | /* Rainier hardware value: (QEMU prototype) */ |
b6d1df64 JS |
186 | #define RAINIER_BMC_HW_STRAP1 0x00422016 |
187 | #define RAINIER_BMC_HW_STRAP2 0x80000848 | |
58e52bdb | 188 | |
febbe308 PD |
189 | /* Fuji hardware value */ |
190 | #define FUJI_BMC_HW_STRAP1 0x00000000 | |
191 | #define FUJI_BMC_HW_STRAP2 0x00000000 | |
192 | ||
a20c54b1 PW |
193 | /* Bletchley hardware value */ |
194 | /* TODO: Leave same as EVB for now. */ | |
195 | #define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 | |
196 | #define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2 | |
197 | ||
fb6b3c8d JHY |
198 | /* Qualcomm DC-SCM hardware value */ |
199 | #define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000 | |
200 | #define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041 | |
201 | ||
9bb6d140 JS |
202 | #define AST_SMP_MAILBOX_BASE 0x1e6e2180 |
203 | #define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0) | |
204 | #define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4) | |
205 | #define AST_SMP_MBOX_FIELD_READY (AST_SMP_MAILBOX_BASE + 0x8) | |
206 | #define AST_SMP_MBOX_FIELD_POLLINSN (AST_SMP_MAILBOX_BASE + 0xc) | |
207 | #define AST_SMP_MBOX_CODE (AST_SMP_MAILBOX_BASE + 0x10) | |
208 | #define AST_SMP_MBOX_GOSIGN 0xabbaab00 | |
209 | ||
210 | static void aspeed_write_smpboot(ARMCPU *cpu, | |
211 | const struct arm_boot_info *info) | |
212 | { | |
902bba54 CLG |
213 | AddressSpace *as = arm_boot_address_space(cpu, info); |
214 | static const ARMInsnFixup poll_mailbox_ready[] = { | |
9bb6d140 JS |
215 | /* |
216 | * r2 = per-cpu go sign value | |
217 | * r1 = AST_SMP_MBOX_FIELD_ENTRY | |
218 | * r0 = AST_SMP_MBOX_FIELD_GOSIGN | |
219 | */ | |
902bba54 CLG |
220 | { 0xee100fb0 }, /* mrc p15, 0, r0, c0, c0, 5 */ |
221 | { 0xe21000ff }, /* ands r0, r0, #255 */ | |
222 | { 0xe59f201c }, /* ldr r2, [pc, #28] */ | |
223 | { 0xe1822000 }, /* orr r2, r2, r0 */ | |
224 | ||
225 | { 0xe59f1018 }, /* ldr r1, [pc, #24] */ | |
226 | { 0xe59f0018 }, /* ldr r0, [pc, #24] */ | |
227 | ||
228 | { 0xe320f002 }, /* wfe */ | |
229 | { 0xe5904000 }, /* ldr r4, [r0] */ | |
230 | { 0xe1520004 }, /* cmp r2, r4 */ | |
231 | { 0x1afffffb }, /* bne <wfe> */ | |
232 | { 0xe591f000 }, /* ldr pc, [r1] */ | |
233 | { AST_SMP_MBOX_GOSIGN }, | |
234 | { AST_SMP_MBOX_FIELD_ENTRY }, | |
235 | { AST_SMP_MBOX_FIELD_GOSIGN }, | |
236 | { 0, FIXUP_TERMINATOR } | |
9bb6d140 | 237 | }; |
902bba54 | 238 | static const uint32_t fixupcontext[FIXUP_MAX] = { 0 }; |
9bb6d140 | 239 | |
902bba54 CLG |
240 | arm_write_bootloader("aspeed.smpboot", as, info->smp_loader_start, |
241 | poll_mailbox_ready, fixupcontext); | |
9bb6d140 JS |
242 | } |
243 | ||
244 | static void aspeed_reset_secondary(ARMCPU *cpu, | |
245 | const struct arm_boot_info *info) | |
246 | { | |
247 | AddressSpace *as = arm_boot_address_space(cpu, info); | |
248 | CPUState *cs = CPU(cpu); | |
249 | ||
250 | /* info->smp_bootreg_addr */ | |
251 | address_space_stl_notdirty(as, AST_SMP_MBOX_FIELD_GOSIGN, 0, | |
252 | MEMTXATTRS_UNSPECIFIED, NULL); | |
253 | cpu_set_pc(cs, info->smp_loader_start); | |
254 | } | |
255 | ||
8b744a6a | 256 | static void write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size, |
d769a1da CLG |
257 | Error **errp) |
258 | { | |
05e6e40a | 259 | g_autofree void *storage = NULL; |
0c7209be CLG |
260 | int64_t size; |
261 | ||
262 | /* The block backend size should have already been 'validated' by | |
263 | * the creation of the m25p80 object. | |
264 | */ | |
265 | size = blk_getlength(blk); | |
266 | if (size <= 0) { | |
267 | error_setg(errp, "failed to get flash size"); | |
268 | return; | |
269 | } | |
d769a1da | 270 | |
0c7209be CLG |
271 | if (rom_size > size) { |
272 | rom_size = size; | |
d769a1da CLG |
273 | } |
274 | ||
05e6e40a | 275 | storage = g_malloc0(rom_size); |
a9262f55 | 276 | if (blk_pread(blk, 0, rom_size, storage, 0) < 0) { |
d769a1da CLG |
277 | error_setg(errp, "failed to read the initial flash content"); |
278 | return; | |
279 | } | |
280 | ||
281 | rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); | |
d769a1da CLG |
282 | } |
283 | ||
8b744a6a CLG |
284 | /* |
285 | * Create a ROM and copy the flash contents at the expected address | |
286 | * (0x0). Boots faster than execute-in-place. | |
287 | */ | |
262259ea | 288 | static void aspeed_install_boot_rom(AspeedMachineState *bmc, BlockBackend *blk, |
8b744a6a CLG |
289 | uint64_t rom_size) |
290 | { | |
262259ea | 291 | AspeedSoCState *soc = &bmc->soc; |
8b744a6a | 292 | |
262259ea | 293 | memory_region_init_rom(&bmc->boot_rom, NULL, "aspeed.boot_rom", rom_size, |
8b744a6a CLG |
294 | &error_abort); |
295 | memory_region_add_subregion_overlap(&soc->spi_boot_container, 0, | |
262259ea | 296 | &bmc->boot_rom, 1); |
8b744a6a CLG |
297 | write_boot_rom(blk, ASPEED_SOC_SPI_BOOT_ADDR, rom_size, &error_abort); |
298 | } | |
299 | ||
1099ad10 | 300 | void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, |
9bd4ac61 | 301 | unsigned int count, int unit0) |
e1ad9bc4 | 302 | { |
179b2058 PW |
303 | int i; |
304 | ||
305 | if (!flashtype) { | |
306 | return; | |
307 | } | |
e1ad9bc4 | 308 | |
9bd4ac61 | 309 | for (i = 0; i < count; ++i) { |
8ec239f2 | 310 | DriveInfo *dinfo = drive_get(IF_MTD, 0, unit0 + i); |
a7d78bef | 311 | DeviceState *dev; |
e1ad9bc4 | 312 | |
a7d78bef | 313 | dev = qdev_new(flashtype); |
e1ad9bc4 | 314 | if (dinfo) { |
a7d78bef | 315 | qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo)); |
e1ad9bc4 | 316 | } |
27a2c66c | 317 | qdev_prop_set_uint8(dev, "cs", i); |
a7d78bef | 318 | qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal); |
e1ad9bc4 CLG |
319 | } |
320 | } | |
321 | ||
a29e3e12 AJ |
322 | static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo) |
323 | { | |
324 | DeviceState *card; | |
325 | ||
756f739b PMD |
326 | if (!dinfo) { |
327 | return; | |
a29e3e12 | 328 | } |
756f739b PMD |
329 | card = qdev_new(TYPE_SD_CARD); |
330 | qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), | |
331 | &error_fatal); | |
3e80f690 MA |
332 | qdev_realize_and_unref(card, |
333 | qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), | |
334 | &error_fatal); | |
a29e3e12 AJ |
335 | } |
336 | ||
d2b3eaef PD |
337 | static void connect_serial_hds_to_uarts(AspeedMachineState *bmc) |
338 | { | |
339 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); | |
340 | AspeedSoCState *s = &bmc->soc; | |
341 | AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); | |
f65f6ad5 | 342 | int uart_chosen = bmc->uart_chosen ? bmc->uart_chosen : amc->uart_default; |
d2b3eaef | 343 | |
f65f6ad5 | 344 | aspeed_soc_uart_set_chr(s, uart_chosen, serial_hd(0)); |
d2b3eaef | 345 | for (int i = 1, uart = ASPEED_DEV_UART1; i < sc->uarts_num; i++, uart++) { |
f65f6ad5 | 346 | if (uart == uart_chosen) { |
d2b3eaef PD |
347 | continue; |
348 | } | |
349 | aspeed_soc_uart_set_chr(s, uart, serial_hd(i)); | |
350 | } | |
351 | } | |
352 | ||
baa4732b | 353 | static void aspeed_machine_init(MachineState *machine) |
327d8e4e | 354 | { |
888b2b03 | 355 | AspeedMachineState *bmc = ASPEED_MACHINE(machine); |
baa4732b | 356 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); |
b033271f | 357 | AspeedSoCClass *sc; |
2bea128c | 358 | int i; |
d3bad7e7 | 359 | NICInfo *nd = &nd_table[0]; |
327d8e4e | 360 | |
9fc7fc4d | 361 | object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name); |
327d8e4e | 362 | |
b033271f CLG |
363 | sc = ASPEED_SOC_GET_CLASS(&bmc->soc); |
364 | ||
533eb415 | 365 | /* |
346160cb CLG |
366 | * This will error out if the RAM size is not supported by the |
367 | * memory controller of the SoC. | |
533eb415 | 368 | */ |
6e504a98 | 369 | object_property_set_uint(OBJECT(&bmc->soc), "ram-size", machine->ram_size, |
533eb415 IM |
370 | &error_fatal); |
371 | ||
d3bad7e7 CLG |
372 | for (i = 0; i < sc->macs_num; i++) { |
373 | if ((amc->macs_mask & (1 << i)) && nd->used) { | |
374 | qemu_check_nic_model(nd, TYPE_FTGMAC100); | |
375 | qdev_set_nic_properties(DEVICE(&bmc->soc.ftgmac100[i]), nd); | |
376 | nd++; | |
377 | } | |
378 | } | |
379 | ||
5325cc34 | 380 | object_property_set_int(OBJECT(&bmc->soc), "hw-strap1", amc->hw_strap1, |
87e79af0 | 381 | &error_abort); |
5325cc34 | 382 | object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2, |
ccc2c418 | 383 | &error_abort); |
4dd9d554 PD |
384 | object_property_set_link(OBJECT(&bmc->soc), "memory", |
385 | OBJECT(get_system_memory()), &error_abort); | |
5325cc34 | 386 | object_property_set_link(OBJECT(&bmc->soc), "dram", |
0df2d9a6 | 387 | OBJECT(machine->ram), &error_abort); |
b6e70d1d JS |
388 | if (machine->kernel_filename) { |
389 | /* | |
390 | * When booting with a -kernel command line there is no u-boot | |
391 | * that runs to unlock the SCU. In this case set the default to | |
392 | * be unlocked as the kernel expects | |
393 | */ | |
5325cc34 MA |
394 | object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key", |
395 | ASPEED_SCU_PROT_KEY, &error_abort); | |
b6e70d1d | 396 | } |
d2b3eaef | 397 | connect_serial_hds_to_uarts(bmc); |
ce189ab2 | 398 | qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); |
327d8e4e | 399 | |
c7e313ae CLG |
400 | if (defaults_enabled()) { |
401 | aspeed_board_init_flashes(&bmc->soc.fmc, | |
8ec239f2 | 402 | bmc->fmc_model ? bmc->fmc_model : amc->fmc_model, |
9bd4ac61 | 403 | amc->num_cs, 0); |
c7e313ae | 404 | aspeed_board_init_flashes(&bmc->soc.spi[0], |
8ec239f2 | 405 | bmc->spi_model ? bmc->spi_model : amc->spi_model, |
9bd4ac61 | 406 | 1, amc->num_cs); |
c7e313ae | 407 | } |
74fb1f38 | 408 | |
b7f1a0cb | 409 | if (machine->kernel_filename && sc->num_cpus > 1) { |
9bb6d140 JS |
410 | /* With no u-boot we must set up a boot stub for the secondary CPU */ |
411 | MemoryRegion *smpboot = g_new(MemoryRegion, 1); | |
f489960d | 412 | memory_region_init_ram(smpboot, NULL, "aspeed.smpboot", |
9bb6d140 JS |
413 | 0x80, &error_abort); |
414 | memory_region_add_subregion(get_system_memory(), | |
415 | AST_SMP_MAILBOX_BASE, smpboot); | |
416 | ||
417 | aspeed_board_binfo.write_secondary_boot = aspeed_write_smpboot; | |
418 | aspeed_board_binfo.secondary_cpu_reset_hook = aspeed_reset_secondary; | |
419 | aspeed_board_binfo.smp_loader_start = AST_SMP_MBOX_CODE; | |
420 | } | |
421 | ||
6e504a98 | 422 | aspeed_board_binfo.ram_size = machine->ram_size; |
347df6f8 | 423 | aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM]; |
e1ad9bc4 | 424 | |
baa4732b CLG |
425 | if (amc->i2c_init) { |
426 | amc->i2c_init(bmc); | |
2cf6cb50 CLG |
427 | } |
428 | ||
0e2c24c6 | 429 | for (i = 0; i < bmc->soc.sdhci.num_slots; i++) { |
8ec239f2 MA |
430 | sdhci_attach_drive(&bmc->soc.sdhci.slots[i], |
431 | drive_get(IF_SD, 0, i)); | |
a29e3e12 | 432 | } |
2bea128c | 433 | |
a29e3e12 | 434 | if (bmc->soc.emmc.num_slots) { |
8ec239f2 MA |
435 | sdhci_attach_drive(&bmc->soc.emmc.slots[0], |
436 | drive_get(IF_SD, 0, bmc->soc.sdhci.num_slots)); | |
2bea128c EJ |
437 | } |
438 | ||
8b744a6a | 439 | if (!bmc->mmio_exec) { |
8285490b CLG |
440 | DeviceState *dev = ssi_get_cs(bmc->soc.fmc.spi, 0); |
441 | BlockBackend *fmc0 = dev ? m25p80_get_blk(dev) : NULL; | |
8b744a6a | 442 | |
8285490b | 443 | if (fmc0) { |
8b744a6a | 444 | uint64_t rom_size = memory_region_size(&bmc->soc.spi_boot); |
8285490b | 445 | aspeed_install_boot_rom(bmc, fmc0, rom_size); |
8b744a6a CLG |
446 | } |
447 | } | |
448 | ||
2744ece8 | 449 | arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); |
74fb1f38 | 450 | } |
b033271f | 451 | |
612b219a | 452 | static void palmetto_bmc_i2c_init(AspeedMachineState *bmc) |
2cf6cb50 CLG |
453 | { |
454 | AspeedSoCState *soc = &bmc->soc; | |
a87e81b9 | 455 | DeviceState *dev; |
3d165f12 | 456 | uint8_t *eeprom_buf = g_malloc0(32 * 1024); |
2cf6cb50 CLG |
457 | |
458 | /* The palmetto platform expects a ds3231 RTC but a ds1338 is | |
459 | * enough to provide basic RTC features. Alarms will be missing */ | |
1373b15b | 460 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); |
a87e81b9 | 461 | |
7a204cbd | 462 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, |
3d165f12 CLG |
463 | eeprom_buf); |
464 | ||
a87e81b9 | 465 | /* add a TMP423 temperature sensor */ |
1373b15b PMD |
466 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), |
467 | "tmp423", 0x4c)); | |
5325cc34 MA |
468 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); |
469 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
470 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
471 | object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort); | |
2cf6cb50 CLG |
472 | } |
473 | ||
9cccb912 PV |
474 | static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc) |
475 | { | |
476 | AspeedSoCState *soc = &bmc->soc; | |
477 | ||
478 | /* | |
479 | * The quanta-q71l platform expects tmp75s which are compatible with | |
480 | * tmp105s. | |
481 | */ | |
482 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c); | |
483 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e); | |
484 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f); | |
485 | ||
486 | /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */ | |
487 | /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */ | |
488 | /* TODO: Add Memory Riser i2c mux and eeproms. */ | |
489 | ||
3ec75e39 PV |
490 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74); |
491 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77); | |
492 | ||
9cccb912 | 493 | /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */ |
3ec75e39 PV |
494 | |
495 | /* i2c-7 */ | |
496 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70); | |
9cccb912 PV |
497 | /* - i2c@0: pmbus@59 */ |
498 | /* - i2c@1: pmbus@58 */ | |
499 | /* - i2c@2: pmbus@58 */ | |
500 | /* - i2c@3: pmbus@59 */ | |
3ec75e39 | 501 | |
9cccb912 PV |
502 | /* TODO: i2c-7: Add PDB FRU eeprom@52 */ |
503 | /* TODO: i2c-8: Add BMC FRU eeprom@50 */ | |
504 | } | |
505 | ||
612b219a | 506 | static void ast2500_evb_i2c_init(AspeedMachineState *bmc) |
2cf6cb50 CLG |
507 | { |
508 | AspeedSoCState *soc = &bmc->soc; | |
3d165f12 CLG |
509 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
510 | ||
7a204cbd | 511 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50, |
3d165f12 | 512 | eeprom_buf); |
2cf6cb50 CLG |
513 | |
514 | /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ | |
1373b15b | 515 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), |
044475f3 | 516 | TYPE_TMP105, 0x4d); |
2cf6cb50 CLG |
517 | } |
518 | ||
612b219a | 519 | static void ast2600_evb_i2c_init(AspeedMachineState *bmc) |
ccc2c418 | 520 | { |
52bcd997 HC |
521 | AspeedSoCState *soc = &bmc->soc; |
522 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); | |
523 | ||
524 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, | |
525 | eeprom_buf); | |
526 | ||
527 | /* LM75 is compatible with TMP105 driver */ | |
528 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), | |
529 | TYPE_TMP105, 0x4d); | |
ccc2c418 CLG |
530 | } |
531 | ||
34f73a81 KP |
532 | static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc) |
533 | { | |
534 | AspeedSoCState *soc = &bmc->soc; | |
535 | ||
536 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB); | |
537 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB, | |
538 | yosemitev2_bmc_fruid, yosemitev2_bmc_fruid_len); | |
0a1f86ba KP |
539 | /* TMP421 */ |
540 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "tmp421", 0x1f); | |
541 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4e); | |
542 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4f); | |
543 | ||
34f73a81 KP |
544 | } |
545 | ||
612b219a | 546 | static void romulus_bmc_i2c_init(AspeedMachineState *bmc) |
6c4567c7 CLG |
547 | { |
548 | AspeedSoCState *soc = &bmc->soc; | |
549 | ||
550 | /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is | |
551 | * good enough */ | |
1373b15b | 552 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); |
6c4567c7 CLG |
553 | } |
554 | ||
6c323aba KP |
555 | static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc) |
556 | { | |
557 | AspeedSoCState *soc = &bmc->soc; | |
558 | ||
559 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB); | |
560 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB, | |
561 | tiogapass_bmc_fruid, tiogapass_bmc_fruid_len); | |
a09d357d KP |
562 | /* TMP421 */ |
563 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), "tmp421", 0x1f); | |
564 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4f); | |
565 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4e); | |
6c323aba KP |
566 | } |
567 | ||
f4aec252 CLG |
568 | static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr) |
569 | { | |
570 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id), | |
571 | TYPE_PCA9552, addr); | |
572 | } | |
573 | ||
612b219a | 574 | static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc) |
143b040f PW |
575 | { |
576 | AspeedSoCState *soc = &bmc->soc; | |
577 | ||
578 | /* bus 2 : */ | |
1373b15b PMD |
579 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48); |
580 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49); | |
143b040f PW |
581 | /* bus 2 : pca9546 @ 0x73 */ |
582 | ||
583 | /* bus 3 : pca9548 @ 0x70 */ | |
584 | ||
585 | /* bus 4 : */ | |
586 | uint8_t *eeprom4_54 = g_malloc0(8 * 1024); | |
7a204cbd | 587 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, |
143b040f PW |
588 | eeprom4_54); |
589 | /* PCA9539 @ 0x76, but PCA9552 is compatible */ | |
f4aec252 | 590 | create_pca9552(soc, 4, 0x76); |
143b040f | 591 | /* PCA9539 @ 0x77, but PCA9552 is compatible */ |
f4aec252 | 592 | create_pca9552(soc, 4, 0x77); |
143b040f PW |
593 | |
594 | /* bus 6 : */ | |
1373b15b PMD |
595 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48); |
596 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49); | |
143b040f PW |
597 | /* bus 6 : pca9546 @ 0x73 */ |
598 | ||
599 | /* bus 8 : */ | |
600 | uint8_t *eeprom8_56 = g_malloc0(8 * 1024); | |
7a204cbd | 601 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56, |
143b040f | 602 | eeprom8_56); |
f4aec252 CLG |
603 | create_pca9552(soc, 8, 0x60); |
604 | create_pca9552(soc, 8, 0x61); | |
143b040f PW |
605 | /* bus 8 : adc128d818 @ 0x1d */ |
606 | /* bus 8 : adc128d818 @ 0x1f */ | |
607 | ||
608 | /* | |
609 | * bus 13 : pca9548 @ 0x71 | |
610 | * - channel 3: | |
611 | * - tmm421 @ 0x4c | |
612 | * - tmp421 @ 0x4e | |
613 | * - tmp421 @ 0x4f | |
614 | */ | |
615 | ||
616 | } | |
617 | ||
612b219a | 618 | static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc) |
62c2c2eb | 619 | { |
7cfbde5e PMD |
620 | static const struct { |
621 | unsigned gpio_id; | |
622 | LEDColor color; | |
623 | const char *description; | |
624 | bool gpio_polarity; | |
625 | } pca1_leds[] = { | |
626 | {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW}, | |
627 | {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW}, | |
628 | {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW}, | |
629 | }; | |
62c2c2eb | 630 | AspeedSoCState *soc = &bmc->soc; |
3d165f12 | 631 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
15ce12cf | 632 | DeviceState *dev; |
7cfbde5e | 633 | LEDState *led; |
62c2c2eb | 634 | |
63ceb818 | 635 | /* Bus 3: TODO bmp280@77 */ |
db437ca6 | 636 | dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); |
15ce12cf | 637 | qdev_prop_set_string(dev, "description", "pca1"); |
2616f572 PMD |
638 | i2c_slave_realize_and_unref(I2C_SLAVE(dev), |
639 | aspeed_i2c_get_bus(&soc->i2c, 3), | |
640 | &error_fatal); | |
8c9a61d7 | 641 | |
7cfbde5e PMD |
642 | for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) { |
643 | led = led_create_simple(OBJECT(bmc), | |
644 | pca1_leds[i].gpio_polarity, | |
645 | pca1_leds[i].color, | |
646 | pca1_leds[i].description); | |
647 | qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id, | |
648 | qdev_get_gpio_in(DEVICE(led), 0)); | |
649 | } | |
b61ea6e7 | 650 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76); |
2a75e8c3 | 651 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52); |
1373b15b PMD |
652 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c); |
653 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c); | |
62c2c2eb CLG |
654 | |
655 | /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ | |
1373b15b | 656 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105, |
044475f3 | 657 | 0x4a); |
6c4567c7 CLG |
658 | |
659 | /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is | |
660 | * good enough */ | |
1373b15b | 661 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); |
3d165f12 | 662 | |
7a204cbd | 663 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51, |
3d165f12 | 664 | eeprom_buf); |
db437ca6 | 665 | dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); |
15ce12cf | 666 | qdev_prop_set_string(dev, "description", "pca0"); |
2616f572 PMD |
667 | i2c_slave_realize_and_unref(I2C_SLAVE(dev), |
668 | aspeed_i2c_get_bus(&soc->i2c, 11), | |
669 | &error_fatal); | |
63ceb818 | 670 | /* Bus 11: TODO ucd90160@64 */ |
62c2c2eb CLG |
671 | } |
672 | ||
95f068c8 JW |
673 | static void g220a_bmc_i2c_init(AspeedMachineState *bmc) |
674 | { | |
675 | AspeedSoCState *soc = &bmc->soc; | |
676 | DeviceState *dev; | |
677 | ||
678 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), | |
679 | "emc1413", 0x4c)); | |
680 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); | |
681 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
682 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
683 | ||
684 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12), | |
685 | "emc1413", 0x4c)); | |
686 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); | |
687 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
688 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
689 | ||
690 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13), | |
691 | "emc1413", 0x4c)); | |
692 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); | |
693 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
694 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
6f5f6507 JW |
695 | |
696 | static uint8_t eeprom_buf[2 * 1024] = { | |
697 | 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe, | |
698 | 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65, | |
699 | 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32, | |
700 | 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42, | |
701 | 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45, | |
702 | 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1, | |
703 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, | |
704 | }; | |
705 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57, | |
706 | eeprom_buf); | |
95f068c8 JW |
707 | } |
708 | ||
82b6a3f6 JW |
709 | static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc) |
710 | { | |
711 | AspeedSoCState *soc = &bmc->soc; | |
712 | I2CSlave *i2c_mux; | |
713 | ||
714 | /* The at24c256 */ | |
715 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768); | |
716 | ||
717 | /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */ | |
718 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, | |
719 | 0x48); | |
720 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, | |
721 | 0x49); | |
722 | ||
723 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), | |
724 | "pca9546", 0x70); | |
725 | /* It expects a TMP112 but a TMP105 is compatible */ | |
726 | i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105, | |
727 | 0x4a); | |
728 | ||
729 | /* It expects a ds3232 but a ds1338 is good enough */ | |
730 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68); | |
731 | ||
732 | /* It expects a pca9555 but a pca9552 is compatible */ | |
f4aec252 | 733 | create_pca9552(soc, 8, 0x30); |
82b6a3f6 JW |
734 | } |
735 | ||
58e52bdb CLG |
736 | static void rainier_bmc_i2c_init(AspeedMachineState *bmc) |
737 | { | |
738 | AspeedSoCState *soc = &bmc->soc; | |
fa6d98c0 JS |
739 | I2CSlave *i2c_mux; |
740 | ||
9077e09a | 741 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB); |
58e52bdb | 742 | |
f4aec252 | 743 | create_pca9552(soc, 3, 0x61); |
bcb122f8 | 744 | |
58e52bdb CLG |
745 | /* The rainier expects a TMP275 but a TMP105 is compatible */ |
746 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, | |
747 | 0x48); | |
748 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, | |
749 | 0x49); | |
750 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, | |
751 | 0x4a); | |
fa6d98c0 JS |
752 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), |
753 | "pca9546", 0x70); | |
9077e09a PD |
754 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
755 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
756 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB); | |
f4aec252 | 757 | create_pca9552(soc, 4, 0x60); |
58e52bdb CLG |
758 | |
759 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, | |
760 | 0x48); | |
761 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, | |
762 | 0x49); | |
f4aec252 CLG |
763 | create_pca9552(soc, 5, 0x60); |
764 | create_pca9552(soc, 5, 0x61); | |
fa6d98c0 JS |
765 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), |
766 | "pca9546", 0x70); | |
9077e09a PD |
767 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
768 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
58e52bdb CLG |
769 | |
770 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, | |
771 | 0x48); | |
772 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, | |
773 | 0x4a); | |
774 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, | |
775 | 0x4b); | |
fa6d98c0 JS |
776 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), |
777 | "pca9546", 0x70); | |
9077e09a PD |
778 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
779 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
780 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB); | |
781 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB); | |
58e52bdb | 782 | |
f4aec252 CLG |
783 | create_pca9552(soc, 7, 0x30); |
784 | create_pca9552(soc, 7, 0x31); | |
785 | create_pca9552(soc, 7, 0x32); | |
786 | create_pca9552(soc, 7, 0x33); | |
f4aec252 CLG |
787 | create_pca9552(soc, 7, 0x60); |
788 | create_pca9552(soc, 7, 0x61); | |
b61ea6e7 | 789 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76); |
58e52bdb CLG |
790 | /* Bus 7: TODO si7021-a20@20 */ |
791 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105, | |
792 | 0x48); | |
2a75e8c3 | 793 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52); |
9077e09a PD |
794 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB); |
795 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB); | |
58e52bdb CLG |
796 | |
797 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, | |
798 | 0x48); | |
799 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, | |
800 | 0x4a); | |
be85508f NP |
801 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50, |
802 | 64 * KiB, rainier_bb_fruid, rainier_bb_fruid_len); | |
803 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, | |
804 | 64 * KiB, rainier_bmc_fruid, rainier_bmc_fruid_len); | |
f4aec252 CLG |
805 | create_pca9552(soc, 8, 0x60); |
806 | create_pca9552(soc, 8, 0x61); | |
58e52bdb CLG |
807 | /* Bus 8: ucd90320@11 */ |
808 | /* Bus 8: ucd90320@b */ | |
809 | /* Bus 8: ucd90320@c */ | |
810 | ||
811 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c); | |
812 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d); | |
9077e09a | 813 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB); |
58e52bdb CLG |
814 | |
815 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c); | |
816 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d); | |
9077e09a | 817 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB); |
58e52bdb CLG |
818 | |
819 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, | |
820 | 0x48); | |
821 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, | |
822 | 0x49); | |
fa6d98c0 JS |
823 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), |
824 | "pca9546", 0x70); | |
9077e09a PD |
825 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
826 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
f4aec252 | 827 | create_pca9552(soc, 11, 0x60); |
fa6d98c0 JS |
828 | |
829 | ||
9077e09a | 830 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB); |
f4aec252 | 831 | create_pca9552(soc, 13, 0x60); |
fa6d98c0 | 832 | |
9077e09a | 833 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB); |
f4aec252 | 834 | create_pca9552(soc, 14, 0x60); |
fa6d98c0 | 835 | |
9077e09a | 836 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB); |
f4aec252 | 837 | create_pca9552(soc, 15, 0x60); |
58e52bdb CLG |
838 | } |
839 | ||
febbe308 PD |
840 | static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, |
841 | I2CBus **channels) | |
842 | { | |
843 | I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr); | |
844 | for (int i = 0; i < 8; i++) { | |
845 | channels[i] = pca954x_i2c_get_bus(mux, i); | |
846 | } | |
847 | } | |
848 | ||
849 | #define TYPE_LM75 TYPE_TMP105 | |
850 | #define TYPE_TMP75 TYPE_TMP105 | |
851 | #define TYPE_TMP422 "tmp422" | |
852 | ||
853 | static void fuji_bmc_i2c_init(AspeedMachineState *bmc) | |
854 | { | |
855 | AspeedSoCState *soc = &bmc->soc; | |
856 | I2CBus *i2c[144] = {}; | |
857 | ||
858 | for (int i = 0; i < 16; i++) { | |
859 | i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); | |
860 | } | |
861 | I2CBus *i2c180 = i2c[2]; | |
862 | I2CBus *i2c480 = i2c[8]; | |
863 | I2CBus *i2c600 = i2c[11]; | |
864 | ||
865 | get_pca9548_channels(i2c180, 0x70, &i2c[16]); | |
866 | get_pca9548_channels(i2c480, 0x70, &i2c[24]); | |
867 | /* NOTE: The device tree skips [32, 40) in the alias numbering */ | |
868 | get_pca9548_channels(i2c600, 0x77, &i2c[40]); | |
869 | get_pca9548_channels(i2c[24], 0x71, &i2c[48]); | |
870 | get_pca9548_channels(i2c[25], 0x72, &i2c[56]); | |
871 | get_pca9548_channels(i2c[26], 0x76, &i2c[64]); | |
872 | get_pca9548_channels(i2c[27], 0x76, &i2c[72]); | |
873 | for (int i = 0; i < 8; i++) { | |
874 | get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]); | |
875 | } | |
876 | ||
877 | i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c); | |
878 | i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d); | |
879 | ||
ef0eb67e SS |
880 | /* |
881 | * EEPROM 24c64 size is 64Kbits or 8 Kbytes | |
882 | * 24c02 size is 2Kbits or 256 bytes | |
883 | */ | |
884 | at24c_eeprom_init(i2c[19], 0x52, 8 * KiB); | |
885 | at24c_eeprom_init(i2c[20], 0x50, 256); | |
886 | at24c_eeprom_init(i2c[22], 0x52, 256); | |
febbe308 PD |
887 | |
888 | i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48); | |
889 | i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49); | |
890 | i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a); | |
891 | i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c); | |
892 | ||
ef0eb67e | 893 | at24c_eeprom_init(i2c[8], 0x51, 8 * KiB); |
febbe308 PD |
894 | i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a); |
895 | ||
896 | i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c); | |
ef0eb67e | 897 | at24c_eeprom_init(i2c[50], 0x52, 8 * KiB); |
febbe308 PD |
898 | i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48); |
899 | i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49); | |
900 | ||
901 | i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48); | |
902 | i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49); | |
903 | ||
ef0eb67e | 904 | at24c_eeprom_init(i2c[65], 0x53, 8 * KiB); |
febbe308 PD |
905 | i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49); |
906 | i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48); | |
ef0eb67e SS |
907 | at24c_eeprom_init(i2c[68], 0x52, 8 * KiB); |
908 | at24c_eeprom_init(i2c[69], 0x52, 8 * KiB); | |
909 | at24c_eeprom_init(i2c[70], 0x52, 8 * KiB); | |
910 | at24c_eeprom_init(i2c[71], 0x52, 8 * KiB); | |
febbe308 | 911 | |
ef0eb67e | 912 | at24c_eeprom_init(i2c[73], 0x53, 8 * KiB); |
febbe308 PD |
913 | i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49); |
914 | i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48); | |
ef0eb67e SS |
915 | at24c_eeprom_init(i2c[76], 0x52, 8 * KiB); |
916 | at24c_eeprom_init(i2c[77], 0x52, 8 * KiB); | |
917 | at24c_eeprom_init(i2c[78], 0x52, 8 * KiB); | |
918 | at24c_eeprom_init(i2c[79], 0x52, 8 * KiB); | |
919 | at24c_eeprom_init(i2c[28], 0x50, 256); | |
febbe308 PD |
920 | |
921 | for (int i = 0; i < 8; i++) { | |
9077e09a | 922 | at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB); |
febbe308 PD |
923 | i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48); |
924 | i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b); | |
925 | i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a); | |
926 | } | |
927 | } | |
928 | ||
a20c54b1 PW |
929 | #define TYPE_TMP421 "tmp421" |
930 | ||
931 | static void bletchley_bmc_i2c_init(AspeedMachineState *bmc) | |
932 | { | |
933 | AspeedSoCState *soc = &bmc->soc; | |
934 | I2CBus *i2c[13] = {}; | |
935 | for (int i = 0; i < 13; i++) { | |
936 | if ((i == 8) || (i == 11)) { | |
937 | continue; | |
938 | } | |
939 | i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); | |
940 | } | |
941 | ||
942 | /* Bus 0 - 5 all have the same config. */ | |
943 | for (int i = 0; i < 6; i++) { | |
944 | /* Missing model: ti,ina230 @ 0x45 */ | |
945 | /* Missing model: mps,mp5023 @ 0x40 */ | |
946 | i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f); | |
947 | /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */ | |
948 | i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76); | |
949 | i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67); | |
950 | /* Missing model: fsc,fusb302 @ 0x22 */ | |
951 | } | |
952 | ||
953 | /* Bus 6 */ | |
954 | at24c_eeprom_init(i2c[6], 0x56, 65536); | |
955 | /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */ | |
956 | i2c_slave_create_simple(i2c[6], "ds1338", 0x51); | |
957 | ||
958 | ||
959 | /* Bus 7 */ | |
960 | at24c_eeprom_init(i2c[7], 0x54, 65536); | |
961 | ||
962 | /* Bus 9 */ | |
963 | i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f); | |
964 | ||
965 | /* Bus 10 */ | |
966 | i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f); | |
967 | /* Missing model: ti,hdc1080 @ 0x40 */ | |
968 | i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67); | |
969 | ||
970 | /* Bus 12 */ | |
971 | /* Missing model: adi,adm1278 @ 0x11 */ | |
972 | i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c); | |
973 | i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d); | |
974 | i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67); | |
975 | } | |
976 | ||
fa699e80 PD |
977 | static void fby35_i2c_init(AspeedMachineState *bmc) |
978 | { | |
979 | AspeedSoCState *soc = &bmc->soc; | |
980 | I2CBus *i2c[16]; | |
981 | ||
982 | for (int i = 0; i < 16; i++) { | |
983 | i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); | |
984 | } | |
985 | ||
986 | i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f); | |
987 | i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f); | |
988 | /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */ | |
989 | i2c_slave_create_simple(i2c[11], "adm1272", 0x44); | |
990 | i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e); | |
991 | i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f); | |
992 | ||
9077e09a PD |
993 | at24c_eeprom_init(i2c[4], 0x51, 128 * KiB); |
994 | at24c_eeprom_init(i2c[6], 0x51, 128 * KiB); | |
c0216b94 PD |
995 | at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid, |
996 | fby35_nic_fruid_len); | |
997 | at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid, | |
998 | fby35_bb_fruid_len); | |
999 | at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid, | |
1000 | fby35_bmc_fruid_len); | |
fa699e80 PD |
1001 | |
1002 | /* | |
1003 | * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on | |
1004 | * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on | |
1005 | * each. | |
1006 | */ | |
1007 | } | |
1008 | ||
fb6b3c8d JHY |
1009 | static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) |
1010 | { | |
1011 | AspeedSoCState *soc = &bmc->soc; | |
1012 | ||
1013 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d); | |
1014 | } | |
1015 | ||
ece4cccd GG |
1016 | static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc) |
1017 | { | |
1018 | AspeedSoCState *soc = &bmc->soc; | |
2a7a5d5c | 1019 | I2CSlave *therm_mux, *cpuvr_mux; |
ece4cccd GG |
1020 | |
1021 | /* Create the generic DC-SCM hardware */ | |
1022 | qcom_dc_scm_bmc_i2c_init(bmc); | |
1023 | ||
1024 | /* Now create the Firework specific hardware */ | |
2a75e8c3 | 1025 | |
2a7a5d5c JHY |
1026 | /* I2C7 CPUVR MUX */ |
1027 | cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), | |
1028 | "pca9546", 0x70); | |
1029 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72); | |
1030 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72); | |
1031 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72); | |
1032 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72); | |
1033 | ||
cfc68f16 MK |
1034 | /* I2C8 Thermal Diodes*/ |
1035 | therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), | |
1036 | "pca9548", 0x70); | |
1037 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C); | |
1038 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C); | |
1039 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48); | |
1040 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48); | |
1041 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48); | |
1042 | ||
2a75e8c3 MK |
1043 | /* I2C9 Fan Controller (MAX31785) */ |
1044 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52); | |
1045 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54); | |
ece4cccd GG |
1046 | } |
1047 | ||
1a15311a CLG |
1048 | static bool aspeed_get_mmio_exec(Object *obj, Error **errp) |
1049 | { | |
1050 | return ASPEED_MACHINE(obj)->mmio_exec; | |
1051 | } | |
1052 | ||
1053 | static void aspeed_set_mmio_exec(Object *obj, bool value, Error **errp) | |
1054 | { | |
1055 | ASPEED_MACHINE(obj)->mmio_exec = value; | |
1056 | } | |
1057 | ||
1058 | static void aspeed_machine_instance_init(Object *obj) | |
1059 | { | |
1060 | ASPEED_MACHINE(obj)->mmio_exec = false; | |
1061 | } | |
1062 | ||
9820e52f CLG |
1063 | static char *aspeed_get_fmc_model(Object *obj, Error **errp) |
1064 | { | |
1065 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1066 | return g_strdup(bmc->fmc_model); | |
1067 | } | |
1068 | ||
1069 | static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp) | |
1070 | { | |
1071 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1072 | ||
1073 | g_free(bmc->fmc_model); | |
1074 | bmc->fmc_model = g_strdup(value); | |
1075 | } | |
1076 | ||
1077 | static char *aspeed_get_spi_model(Object *obj, Error **errp) | |
1078 | { | |
1079 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1080 | return g_strdup(bmc->spi_model); | |
1081 | } | |
1082 | ||
1083 | static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp) | |
1084 | { | |
1085 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1086 | ||
1087 | g_free(bmc->spi_model); | |
1088 | bmc->spi_model = g_strdup(value); | |
1089 | } | |
1090 | ||
f65f6ad5 CLG |
1091 | static char *aspeed_get_bmc_console(Object *obj, Error **errp) |
1092 | { | |
1093 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1094 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); | |
1095 | int uart_chosen = bmc->uart_chosen ? bmc->uart_chosen : amc->uart_default; | |
1096 | ||
1097 | return g_strdup_printf("uart%d", uart_chosen - ASPEED_DEV_UART1 + 1); | |
1098 | } | |
1099 | ||
1100 | static void aspeed_set_bmc_console(Object *obj, const char *value, Error **errp) | |
1101 | { | |
1102 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1103 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); | |
1104 | AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(amc->soc_name)); | |
1105 | int val; | |
1106 | ||
1107 | if (sscanf(value, "uart%u", &val) != 1) { | |
1108 | error_setg(errp, "Bad value for \"uart\" property"); | |
1109 | return; | |
1110 | } | |
1111 | ||
1112 | /* The number of UART depends on the SoC */ | |
1113 | if (val < 1 || val > sc->uarts_num) { | |
1114 | error_setg(errp, "\"uart\" should be in range [1 - %d]", sc->uarts_num); | |
1115 | return; | |
1116 | } | |
1117 | bmc->uart_chosen = ASPEED_DEV_UART1 + val - 1; | |
1118 | } | |
1119 | ||
1a15311a CLG |
1120 | static void aspeed_machine_class_props_init(ObjectClass *oc) |
1121 | { | |
1122 | object_class_property_add_bool(oc, "execute-in-place", | |
1123 | aspeed_get_mmio_exec, | |
d2623129 | 1124 | aspeed_set_mmio_exec); |
1a15311a | 1125 | object_class_property_set_description(oc, "execute-in-place", |
7eecec7d | 1126 | "boot directly from CE0 flash device"); |
9820e52f | 1127 | |
f65f6ad5 CLG |
1128 | object_class_property_add_str(oc, "bmc-console", aspeed_get_bmc_console, |
1129 | aspeed_set_bmc_console); | |
1130 | object_class_property_set_description(oc, "bmc-console", | |
1131 | "Change the default UART to \"uartX\""); | |
1132 | ||
9820e52f CLG |
1133 | object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model, |
1134 | aspeed_set_fmc_model); | |
1135 | object_class_property_set_description(oc, "fmc-model", | |
1136 | "Change the FMC Flash model"); | |
1137 | object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model, | |
1138 | aspeed_set_spi_model); | |
1139 | object_class_property_set_description(oc, "spi-model", | |
1140 | "Change the SPI Flash model"); | |
1a15311a CLG |
1141 | } |
1142 | ||
b7f1a0cb CLG |
1143 | static int aspeed_soc_num_cpus(const char *soc_name) |
1144 | { | |
1145 | AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(soc_name)); | |
1146 | return sc->num_cpus; | |
1147 | } | |
1148 | ||
fca9ca1b | 1149 | static void aspeed_machine_class_init(ObjectClass *oc, void *data) |
62c2c2eb CLG |
1150 | { |
1151 | MachineClass *mc = MACHINE_CLASS(oc); | |
d3bad7e7 | 1152 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); |
62c2c2eb | 1153 | |
fca9ca1b | 1154 | mc->init = aspeed_machine_init; |
62c2c2eb CLG |
1155 | mc->no_floppy = 1; |
1156 | mc->no_cdrom = 1; | |
1157 | mc->no_parallel = 1; | |
afcbaed6 | 1158 | mc->default_ram_id = "ram"; |
d3bad7e7 | 1159 | amc->macs_mask = ASPEED_MAC0_ON; |
5d63d0c7 | 1160 | amc->uart_default = ASPEED_DEV_UART5; |
1a15311a CLG |
1161 | |
1162 | aspeed_machine_class_props_init(oc); | |
62c2c2eb CLG |
1163 | } |
1164 | ||
baa4732b CLG |
1165 | static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data) |
1166 | { | |
1167 | MachineClass *mc = MACHINE_CLASS(oc); | |
1168 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1169 | ||
1170 | mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; | |
1171 | amc->soc_name = "ast2400-a1"; | |
1172 | amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1; | |
1173 | amc->fmc_model = "n25q256a"; | |
70322913 | 1174 | amc->spi_model = "mx25l25635f"; |
baa4732b CLG |
1175 | amc->num_cs = 1; |
1176 | amc->i2c_init = palmetto_bmc_i2c_init; | |
1177 | mc->default_ram_size = 256 * MiB; | |
b7f1a0cb CLG |
1178 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1179 | aspeed_soc_num_cpus(amc->soc_name); | |
baa4732b CLG |
1180 | }; |
1181 | ||
9cccb912 PV |
1182 | static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void *data) |
1183 | { | |
1184 | MachineClass *mc = MACHINE_CLASS(oc); | |
1185 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1186 | ||
1187 | mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)"; | |
1188 | amc->soc_name = "ast2400-a1"; | |
1189 | amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1; | |
1190 | amc->fmc_model = "n25q256a"; | |
1191 | amc->spi_model = "mx25l25635e"; | |
1192 | amc->num_cs = 1; | |
1193 | amc->i2c_init = quanta_q71l_bmc_i2c_init; | |
1194 | mc->default_ram_size = 128 * MiB; | |
1195 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1196 | aspeed_soc_num_cpus(amc->soc_name); | |
1197 | } | |
1198 | ||
40a38df5 ES |
1199 | static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, |
1200 | void *data) | |
1201 | { | |
1202 | MachineClass *mc = MACHINE_CLASS(oc); | |
1203 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1204 | ||
1205 | mc->desc = "Supermicro X11 BMC (ARM926EJ-S)"; | |
1206 | amc->soc_name = "ast2400-a1"; | |
1207 | amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1; | |
1208 | amc->fmc_model = "mx25l25635e"; | |
1209 | amc->spi_model = "mx25l25635e"; | |
1210 | amc->num_cs = 1; | |
1211 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; | |
1212 | amc->i2c_init = palmetto_bmc_i2c_init; | |
1213 | mc->default_ram_size = 256 * MiB; | |
1214 | } | |
1215 | ||
47936597 GR |
1216 | static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, |
1217 | void *data) | |
1218 | { | |
1219 | MachineClass *mc = MACHINE_CLASS(oc); | |
1220 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1221 | ||
1222 | mc->desc = "Supermicro X11 SPI BMC (ARM1176)"; | |
1223 | amc->soc_name = "ast2500-a1"; | |
1224 | amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1; | |
1225 | amc->fmc_model = "mx25l25635e"; | |
1226 | amc->spi_model = "mx25l25635e"; | |
1227 | amc->num_cs = 1; | |
1228 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; | |
1229 | amc->i2c_init = palmetto_bmc_i2c_init; | |
1230 | mc->default_ram_size = 512 * MiB; | |
1231 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1232 | aspeed_soc_num_cpus(amc->soc_name); | |
1233 | } | |
1234 | ||
baa4732b CLG |
1235 | static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data) |
1236 | { | |
1237 | MachineClass *mc = MACHINE_CLASS(oc); | |
1238 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1239 | ||
1240 | mc->desc = "Aspeed AST2500 EVB (ARM1176)"; | |
1241 | amc->soc_name = "ast2500-a1"; | |
1242 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
753abfc4 | 1243 | amc->fmc_model = "mx25l25635e"; |
70322913 | 1244 | amc->spi_model = "mx25l25635f"; |
baa4732b CLG |
1245 | amc->num_cs = 1; |
1246 | amc->i2c_init = ast2500_evb_i2c_init; | |
1247 | mc->default_ram_size = 512 * MiB; | |
b7f1a0cb CLG |
1248 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1249 | aspeed_soc_num_cpus(amc->soc_name); | |
baa4732b CLG |
1250 | }; |
1251 | ||
34f73a81 KP |
1252 | static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, void *data) |
1253 | { | |
1254 | MachineClass *mc = MACHINE_CLASS(oc); | |
1255 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1256 | ||
1257 | mc->desc = "Facebook YosemiteV2 BMC (ARM1176)"; | |
1258 | amc->soc_name = "ast2500-a1"; | |
1259 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
1260 | amc->hw_strap2 = 0; | |
1261 | amc->fmc_model = "n25q256a"; | |
1262 | amc->spi_model = "mx25l25635e"; | |
1263 | amc->num_cs = 2; | |
1264 | amc->i2c_init = yosemitev2_bmc_i2c_init; | |
1265 | mc->default_ram_size = 512 * MiB; | |
1266 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1267 | aspeed_soc_num_cpus(amc->soc_name); | |
1268 | }; | |
1269 | ||
baa4732b CLG |
1270 | static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) |
1271 | { | |
1272 | MachineClass *mc = MACHINE_CLASS(oc); | |
1273 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1274 | ||
1275 | mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; | |
1276 | amc->soc_name = "ast2500-a1"; | |
1277 | amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1; | |
1278 | amc->fmc_model = "n25q256a"; | |
1279 | amc->spi_model = "mx66l1g45g"; | |
1280 | amc->num_cs = 2; | |
1281 | amc->i2c_init = romulus_bmc_i2c_init; | |
1282 | mc->default_ram_size = 512 * MiB; | |
b7f1a0cb CLG |
1283 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1284 | aspeed_soc_num_cpus(amc->soc_name); | |
fca9ca1b CLG |
1285 | }; |
1286 | ||
6c323aba KP |
1287 | static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, void *data) |
1288 | { | |
1289 | MachineClass *mc = MACHINE_CLASS(oc); | |
1290 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1291 | ||
1292 | mc->desc = "Facebook Tiogapass BMC (ARM1176)"; | |
1293 | amc->soc_name = "ast2500-a1"; | |
1294 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
1295 | amc->hw_strap2 = 0; | |
1296 | amc->fmc_model = "n25q256a"; | |
1297 | amc->spi_model = "mx25l25635e"; | |
1298 | amc->num_cs = 2; | |
1299 | amc->i2c_init = tiogapass_bmc_i2c_init; | |
1300 | mc->default_ram_size = 1 * GiB; | |
1301 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1302 | aspeed_soc_num_cpus(amc->soc_name); | |
1303 | aspeed_soc_num_cpus(amc->soc_name); | |
1304 | }; | |
1305 | ||
143b040f PW |
1306 | static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data) |
1307 | { | |
1308 | MachineClass *mc = MACHINE_CLASS(oc); | |
1309 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1310 | ||
1311 | mc->desc = "OCP SonoraPass BMC (ARM1176)"; | |
1312 | amc->soc_name = "ast2500-a1"; | |
1313 | amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1; | |
1314 | amc->fmc_model = "mx66l1g45g"; | |
1315 | amc->spi_model = "mx66l1g45g"; | |
1316 | amc->num_cs = 2; | |
1317 | amc->i2c_init = sonorapass_bmc_i2c_init; | |
1318 | mc->default_ram_size = 512 * MiB; | |
b7f1a0cb CLG |
1319 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1320 | aspeed_soc_num_cpus(amc->soc_name); | |
143b040f PW |
1321 | }; |
1322 | ||
baa4732b CLG |
1323 | static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data) |
1324 | { | |
1325 | MachineClass *mc = MACHINE_CLASS(oc); | |
1326 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1327 | ||
1328 | mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)"; | |
1329 | amc->soc_name = "ast2500-a1"; | |
1330 | amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1; | |
70322913 | 1331 | amc->fmc_model = "mx25l25635f"; |
baa4732b CLG |
1332 | amc->spi_model = "mx66l1g45g"; |
1333 | amc->num_cs = 2; | |
1334 | amc->i2c_init = witherspoon_bmc_i2c_init; | |
1335 | mc->default_ram_size = 512 * MiB; | |
b7f1a0cb CLG |
1336 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1337 | aspeed_soc_num_cpus(amc->soc_name); | |
baa4732b CLG |
1338 | }; |
1339 | ||
1340 | static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data) | |
1341 | { | |
1342 | MachineClass *mc = MACHINE_CLASS(oc); | |
1343 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1344 | ||
f548f201 | 1345 | mc->desc = "Aspeed AST2600 EVB (Cortex-A7)"; |
c5811bb3 | 1346 | amc->soc_name = "ast2600-a3"; |
baa4732b CLG |
1347 | amc->hw_strap1 = AST2600_EVB_HW_STRAP1; |
1348 | amc->hw_strap2 = AST2600_EVB_HW_STRAP2; | |
753abfc4 | 1349 | amc->fmc_model = "mx66u51235f"; |
baa4732b CLG |
1350 | amc->spi_model = "mx66u51235f"; |
1351 | amc->num_cs = 1; | |
29193286 GR |
1352 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON | |
1353 | ASPEED_MAC3_ON; | |
baa4732b CLG |
1354 | amc->i2c_init = ast2600_evb_i2c_init; |
1355 | mc->default_ram_size = 1 * GiB; | |
b7f1a0cb CLG |
1356 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1357 | aspeed_soc_num_cpus(amc->soc_name); | |
baa4732b CLG |
1358 | }; |
1359 | ||
63ceb818 CLG |
1360 | static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data) |
1361 | { | |
1362 | MachineClass *mc = MACHINE_CLASS(oc); | |
1363 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1364 | ||
f548f201 | 1365 | mc->desc = "OpenPOWER Tacoma BMC (Cortex-A7)"; |
c5811bb3 | 1366 | amc->soc_name = "ast2600-a3"; |
63ceb818 CLG |
1367 | amc->hw_strap1 = TACOMA_BMC_HW_STRAP1; |
1368 | amc->hw_strap2 = TACOMA_BMC_HW_STRAP2; | |
1369 | amc->fmc_model = "mx66l1g45g"; | |
1370 | amc->spi_model = "mx66l1g45g"; | |
1371 | amc->num_cs = 2; | |
d3bad7e7 | 1372 | amc->macs_mask = ASPEED_MAC2_ON; |
63ceb818 CLG |
1373 | amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */ |
1374 | mc->default_ram_size = 1 * GiB; | |
b7f1a0cb CLG |
1375 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1376 | aspeed_soc_num_cpus(amc->soc_name); | |
63ceb818 CLG |
1377 | }; |
1378 | ||
95f068c8 JW |
1379 | static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data) |
1380 | { | |
1381 | MachineClass *mc = MACHINE_CLASS(oc); | |
1382 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1383 | ||
1384 | mc->desc = "Bytedance G220A BMC (ARM1176)"; | |
1385 | amc->soc_name = "ast2500-a1"; | |
1386 | amc->hw_strap1 = G220A_BMC_HW_STRAP1; | |
1387 | amc->fmc_model = "n25q512a"; | |
1388 | amc->spi_model = "mx25l25635e"; | |
1389 | amc->num_cs = 2; | |
5bb825c8 | 1390 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; |
95f068c8 JW |
1391 | amc->i2c_init = g220a_bmc_i2c_init; |
1392 | mc->default_ram_size = 1024 * MiB; | |
1393 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1394 | aspeed_soc_num_cpus(amc->soc_name); | |
1395 | }; | |
1396 | ||
82b6a3f6 JW |
1397 | static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data) |
1398 | { | |
1399 | MachineClass *mc = MACHINE_CLASS(oc); | |
1400 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1401 | ||
1402 | mc->desc = "Inspur FP5280G2 BMC (ARM1176)"; | |
1403 | amc->soc_name = "ast2500-a1"; | |
1404 | amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1; | |
1405 | amc->fmc_model = "n25q512a"; | |
1406 | amc->spi_model = "mx25l25635e"; | |
1407 | amc->num_cs = 2; | |
1408 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; | |
1409 | amc->i2c_init = fp5280g2_bmc_i2c_init; | |
1410 | mc->default_ram_size = 512 * MiB; | |
1411 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1412 | aspeed_soc_num_cpus(amc->soc_name); | |
1413 | }; | |
1414 | ||
58e52bdb CLG |
1415 | static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data) |
1416 | { | |
1417 | MachineClass *mc = MACHINE_CLASS(oc); | |
1418 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1419 | ||
f548f201 | 1420 | mc->desc = "IBM Rainier BMC (Cortex-A7)"; |
c5811bb3 | 1421 | amc->soc_name = "ast2600-a3"; |
58e52bdb CLG |
1422 | amc->hw_strap1 = RAINIER_BMC_HW_STRAP1; |
1423 | amc->hw_strap2 = RAINIER_BMC_HW_STRAP2; | |
1424 | amc->fmc_model = "mx66l1g45g"; | |
1425 | amc->spi_model = "mx66l1g45g"; | |
1426 | amc->num_cs = 2; | |
1427 | amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; | |
1428 | amc->i2c_init = rainier_bmc_i2c_init; | |
1429 | mc->default_ram_size = 1 * GiB; | |
1430 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1431 | aspeed_soc_num_cpus(amc->soc_name); | |
1432 | }; | |
1433 | ||
1e2c22c9 | 1434 | #define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) |
febbe308 PD |
1435 | |
1436 | static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data) | |
1437 | { | |
1438 | MachineClass *mc = MACHINE_CLASS(oc); | |
1439 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1440 | ||
1441 | mc->desc = "Facebook Fuji BMC (Cortex-A7)"; | |
1442 | amc->soc_name = "ast2600-a3"; | |
1443 | amc->hw_strap1 = FUJI_BMC_HW_STRAP1; | |
1444 | amc->hw_strap2 = FUJI_BMC_HW_STRAP2; | |
1445 | amc->fmc_model = "mx66l1g45g"; | |
1446 | amc->spi_model = "mx66l1g45g"; | |
1447 | amc->num_cs = 2; | |
1448 | amc->macs_mask = ASPEED_MAC3_ON; | |
1449 | amc->i2c_init = fuji_bmc_i2c_init; | |
1450 | amc->uart_default = ASPEED_DEV_UART1; | |
1451 | mc->default_ram_size = FUJI_BMC_RAM_SIZE; | |
1452 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1453 | aspeed_soc_num_cpus(amc->soc_name); | |
1454 | }; | |
1455 | ||
1e2c22c9 | 1456 | #define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) |
104bdaff | 1457 | |
a20c54b1 PW |
1458 | static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data) |
1459 | { | |
1460 | MachineClass *mc = MACHINE_CLASS(oc); | |
1461 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1462 | ||
1463 | mc->desc = "Facebook Bletchley BMC (Cortex-A7)"; | |
1464 | amc->soc_name = "ast2600-a3"; | |
1465 | amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1; | |
1466 | amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2; | |
1467 | amc->fmc_model = "w25q01jvq"; | |
1468 | amc->spi_model = NULL; | |
1469 | amc->num_cs = 2; | |
1470 | amc->macs_mask = ASPEED_MAC2_ON; | |
1471 | amc->i2c_init = bletchley_bmc_i2c_init; | |
104bdaff | 1472 | mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE; |
a20c54b1 PW |
1473 | mc->default_cpus = mc->min_cpus = mc->max_cpus = |
1474 | aspeed_soc_num_cpus(amc->soc_name); | |
1475 | } | |
1476 | ||
7966d70f | 1477 | static void fby35_reset(MachineState *state, ShutdownCause reason) |
fa699e80 PD |
1478 | { |
1479 | AspeedMachineState *bmc = ASPEED_MACHINE(state); | |
1480 | AspeedGPIOState *gpio = &bmc->soc.gpio; | |
1481 | ||
7966d70f | 1482 | qemu_devices_reset(reason); |
fa699e80 | 1483 | |
f0418558 | 1484 | /* Board ID: 7 (Class-1, 4 slots) */ |
fa699e80 PD |
1485 | object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal); |
1486 | object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal); | |
1487 | object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal); | |
1488 | object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal); | |
f0418558 PD |
1489 | |
1490 | /* Slot presence pins, inverse polarity. (False means present) */ | |
1491 | object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal); | |
1492 | object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal); | |
1493 | object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal); | |
1494 | object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal); | |
1495 | ||
1496 | /* Slot 12v power pins, normal polarity. (True means powered-on) */ | |
1497 | object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal); | |
1498 | object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal); | |
1499 | object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal); | |
1500 | object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal); | |
fa699e80 PD |
1501 | } |
1502 | ||
1503 | static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data) | |
1504 | { | |
1505 | MachineClass *mc = MACHINE_CLASS(oc); | |
1506 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1507 | ||
1508 | mc->desc = "Facebook fby35 BMC (Cortex-A7)"; | |
1509 | mc->reset = fby35_reset; | |
1510 | amc->fmc_model = "mx66l1g45g"; | |
1511 | amc->num_cs = 2; | |
1512 | amc->macs_mask = ASPEED_MAC3_ON; | |
1513 | amc->i2c_init = fby35_i2c_init; | |
1514 | /* FIXME: Replace this macro with something more general */ | |
1515 | mc->default_ram_size = FUJI_BMC_RAM_SIZE; | |
1516 | } | |
1517 | ||
66c895b8 JL |
1518 | #define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024) |
1519 | /* Main SYSCLK frequency in Hz (200MHz) */ | |
1520 | #define SYSCLK_FRQ 200000000ULL | |
1521 | ||
1522 | static void aspeed_minibmc_machine_init(MachineState *machine) | |
1523 | { | |
1524 | AspeedMachineState *bmc = ASPEED_MACHINE(machine); | |
1525 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); | |
1526 | Clock *sysclk; | |
1527 | ||
1528 | sysclk = clock_new(OBJECT(machine), "SYSCLK"); | |
1529 | clock_set_hz(sysclk, SYSCLK_FRQ); | |
1530 | ||
1531 | object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name); | |
1532 | qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk); | |
1533 | ||
4dd9d554 PD |
1534 | object_property_set_link(OBJECT(&bmc->soc), "memory", |
1535 | OBJECT(get_system_memory()), &error_abort); | |
d2b3eaef | 1536 | connect_serial_hds_to_uarts(bmc); |
66c895b8 JL |
1537 | qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); |
1538 | ||
1539 | aspeed_board_init_flashes(&bmc->soc.fmc, | |
1540 | bmc->fmc_model ? bmc->fmc_model : amc->fmc_model, | |
1541 | amc->num_cs, | |
1542 | 0); | |
1543 | ||
1544 | aspeed_board_init_flashes(&bmc->soc.spi[0], | |
1545 | bmc->spi_model ? bmc->spi_model : amc->spi_model, | |
1546 | amc->num_cs, amc->num_cs); | |
1547 | ||
1548 | aspeed_board_init_flashes(&bmc->soc.spi[1], | |
1549 | bmc->spi_model ? bmc->spi_model : amc->spi_model, | |
1550 | amc->num_cs, (amc->num_cs * 2)); | |
1551 | ||
1552 | if (amc->i2c_init) { | |
1553 | amc->i2c_init(bmc); | |
1554 | } | |
1555 | ||
1556 | armv7m_load_kernel(ARM_CPU(first_cpu), | |
1557 | machine->kernel_filename, | |
761c532a | 1558 | 0, |
66c895b8 JL |
1559 | AST1030_INTERNAL_FLASH_SIZE); |
1560 | } | |
1561 | ||
4c70ab16 TL |
1562 | static void ast1030_evb_i2c_init(AspeedMachineState *bmc) |
1563 | { | |
1564 | AspeedSoCState *soc = &bmc->soc; | |
1565 | ||
673d8215 | 1566 | /* U10 24C08 connects to SDA/SCL Group 1 by default */ |
4c70ab16 TL |
1567 | uint8_t *eeprom_buf = g_malloc0(32 * 1024); |
1568 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf); | |
1569 | ||
1570 | /* U11 LM75 connects to SDA/SCL Group 2 by default */ | |
1571 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d); | |
1572 | } | |
1573 | ||
66c895b8 JL |
1574 | static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc, |
1575 | void *data) | |
1576 | { | |
1577 | MachineClass *mc = MACHINE_CLASS(oc); | |
1578 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1579 | ||
1580 | mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)"; | |
1581 | amc->soc_name = "ast1030-a1"; | |
1582 | amc->hw_strap1 = 0; | |
1583 | amc->hw_strap2 = 0; | |
1584 | mc->init = aspeed_minibmc_machine_init; | |
4c70ab16 | 1585 | amc->i2c_init = ast1030_evb_i2c_init; |
66c895b8 JL |
1586 | mc->default_ram_size = 0; |
1587 | mc->default_cpus = mc->min_cpus = mc->max_cpus = 1; | |
1588 | amc->fmc_model = "sst25vf032b"; | |
1589 | amc->spi_model = "sst25vf032b"; | |
1590 | amc->num_cs = 2; | |
1591 | amc->macs_mask = 0; | |
1592 | } | |
1593 | ||
fb6b3c8d JHY |
1594 | static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, |
1595 | void *data) | |
1596 | { | |
1597 | MachineClass *mc = MACHINE_CLASS(oc); | |
1598 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1599 | ||
1600 | mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)"; | |
1601 | amc->soc_name = "ast2600-a3"; | |
1602 | amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; | |
1603 | amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; | |
1604 | amc->fmc_model = "n25q512a"; | |
1605 | amc->spi_model = "n25q512a"; | |
1606 | amc->num_cs = 2; | |
1607 | amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; | |
1608 | amc->i2c_init = qcom_dc_scm_bmc_i2c_init; | |
1609 | mc->default_ram_size = 1 * GiB; | |
1610 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1611 | aspeed_soc_num_cpus(amc->soc_name); | |
1612 | }; | |
1613 | ||
ece4cccd GG |
1614 | static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc, |
1615 | void *data) | |
1616 | { | |
1617 | MachineClass *mc = MACHINE_CLASS(oc); | |
1618 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1619 | ||
1620 | mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)"; | |
1621 | amc->soc_name = "ast2600-a3"; | |
1622 | amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; | |
1623 | amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; | |
1624 | amc->fmc_model = "n25q512a"; | |
1625 | amc->spi_model = "n25q512a"; | |
1626 | amc->num_cs = 2; | |
1627 | amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; | |
1628 | amc->i2c_init = qcom_dc_scm_firework_i2c_init; | |
1629 | mc->default_ram_size = 1 * GiB; | |
1630 | mc->default_cpus = mc->min_cpus = mc->max_cpus = | |
1631 | aspeed_soc_num_cpus(amc->soc_name); | |
1632 | }; | |
1633 | ||
baa4732b | 1634 | static const TypeInfo aspeed_machine_types[] = { |
fca9ca1b | 1635 | { |
baa4732b CLG |
1636 | .name = MACHINE_TYPE_NAME("palmetto-bmc"), |
1637 | .parent = TYPE_ASPEED_MACHINE, | |
1638 | .class_init = aspeed_machine_palmetto_class_init, | |
40a38df5 ES |
1639 | }, { |
1640 | .name = MACHINE_TYPE_NAME("supermicrox11-bmc"), | |
1641 | .parent = TYPE_ASPEED_MACHINE, | |
1642 | .class_init = aspeed_machine_supermicrox11_bmc_class_init, | |
47936597 GR |
1643 | }, { |
1644 | .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"), | |
1645 | .parent = TYPE_ASPEED_MACHINE, | |
1646 | .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init, | |
fca9ca1b | 1647 | }, { |
baa4732b CLG |
1648 | .name = MACHINE_TYPE_NAME("ast2500-evb"), |
1649 | .parent = TYPE_ASPEED_MACHINE, | |
1650 | .class_init = aspeed_machine_ast2500_evb_class_init, | |
fca9ca1b | 1651 | }, { |
baa4732b CLG |
1652 | .name = MACHINE_TYPE_NAME("romulus-bmc"), |
1653 | .parent = TYPE_ASPEED_MACHINE, | |
1654 | .class_init = aspeed_machine_romulus_class_init, | |
143b040f PW |
1655 | }, { |
1656 | .name = MACHINE_TYPE_NAME("sonorapass-bmc"), | |
1657 | .parent = TYPE_ASPEED_MACHINE, | |
1658 | .class_init = aspeed_machine_sonorapass_class_init, | |
fca9ca1b | 1659 | }, { |
baa4732b CLG |
1660 | .name = MACHINE_TYPE_NAME("witherspoon-bmc"), |
1661 | .parent = TYPE_ASPEED_MACHINE, | |
1662 | .class_init = aspeed_machine_witherspoon_class_init, | |
ccc2c418 | 1663 | }, { |
baa4732b CLG |
1664 | .name = MACHINE_TYPE_NAME("ast2600-evb"), |
1665 | .parent = TYPE_ASPEED_MACHINE, | |
1666 | .class_init = aspeed_machine_ast2600_evb_class_init, | |
34f73a81 KP |
1667 | }, { |
1668 | .name = MACHINE_TYPE_NAME("yosemitev2-bmc"), | |
1669 | .parent = TYPE_ASPEED_MACHINE, | |
1670 | .class_init = aspeed_machine_yosemitev2_class_init, | |
63ceb818 CLG |
1671 | }, { |
1672 | .name = MACHINE_TYPE_NAME("tacoma-bmc"), | |
1673 | .parent = TYPE_ASPEED_MACHINE, | |
1674 | .class_init = aspeed_machine_tacoma_class_init, | |
6c323aba KP |
1675 | }, { |
1676 | .name = MACHINE_TYPE_NAME("tiogapass-bmc"), | |
1677 | .parent = TYPE_ASPEED_MACHINE, | |
1678 | .class_init = aspeed_machine_tiogapass_class_init, | |
95f068c8 JW |
1679 | }, { |
1680 | .name = MACHINE_TYPE_NAME("g220a-bmc"), | |
1681 | .parent = TYPE_ASPEED_MACHINE, | |
1682 | .class_init = aspeed_machine_g220a_class_init, | |
fb6b3c8d JHY |
1683 | }, { |
1684 | .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"), | |
1685 | .parent = TYPE_ASPEED_MACHINE, | |
1686 | .class_init = aspeed_machine_qcom_dc_scm_v1_class_init, | |
ece4cccd GG |
1687 | }, { |
1688 | .name = MACHINE_TYPE_NAME("qcom-firework-bmc"), | |
1689 | .parent = TYPE_ASPEED_MACHINE, | |
1690 | .class_init = aspeed_machine_qcom_firework_class_init, | |
82b6a3f6 JW |
1691 | }, { |
1692 | .name = MACHINE_TYPE_NAME("fp5280g2-bmc"), | |
1693 | .parent = TYPE_ASPEED_MACHINE, | |
1694 | .class_init = aspeed_machine_fp5280g2_class_init, | |
9cccb912 PV |
1695 | }, { |
1696 | .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"), | |
1697 | .parent = TYPE_ASPEED_MACHINE, | |
1698 | .class_init = aspeed_machine_quanta_q71l_class_init, | |
58e52bdb CLG |
1699 | }, { |
1700 | .name = MACHINE_TYPE_NAME("rainier-bmc"), | |
1701 | .parent = TYPE_ASPEED_MACHINE, | |
1702 | .class_init = aspeed_machine_rainier_class_init, | |
febbe308 PD |
1703 | }, { |
1704 | .name = MACHINE_TYPE_NAME("fuji-bmc"), | |
1705 | .parent = TYPE_ASPEED_MACHINE, | |
1706 | .class_init = aspeed_machine_fuji_class_init, | |
a20c54b1 PW |
1707 | }, { |
1708 | .name = MACHINE_TYPE_NAME("bletchley-bmc"), | |
1709 | .parent = TYPE_ASPEED_MACHINE, | |
1710 | .class_init = aspeed_machine_bletchley_class_init, | |
fa699e80 PD |
1711 | }, { |
1712 | .name = MACHINE_TYPE_NAME("fby35-bmc"), | |
1713 | .parent = MACHINE_TYPE_NAME("ast2600-evb"), | |
1714 | .class_init = aspeed_machine_fby35_class_init, | |
66c895b8 JL |
1715 | }, { |
1716 | .name = MACHINE_TYPE_NAME("ast1030-evb"), | |
1717 | .parent = TYPE_ASPEED_MACHINE, | |
1718 | .class_init = aspeed_minibmc_machine_ast1030_evb_class_init, | |
baa4732b CLG |
1719 | }, { |
1720 | .name = TYPE_ASPEED_MACHINE, | |
1721 | .parent = TYPE_MACHINE, | |
888b2b03 | 1722 | .instance_size = sizeof(AspeedMachineState), |
1a15311a | 1723 | .instance_init = aspeed_machine_instance_init, |
baa4732b CLG |
1724 | .class_size = sizeof(AspeedMachineClass), |
1725 | .class_init = aspeed_machine_class_init, | |
1726 | .abstract = true, | |
fca9ca1b | 1727 | } |
baa4732b | 1728 | }; |
74fb1f38 | 1729 | |
baa4732b | 1730 | DEFINE_TYPES(aspeed_machine_types) |