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Commit | Line | Data |
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327d8e4e AJ |
1 | /* |
2 | * OpenPOWER Palmetto BMC | |
3 | * | |
4 | * Andrew Jeffery <andrew@aj.id.au> | |
5 | * | |
6 | * Copyright 2016 IBM Corp. | |
7 | * | |
8 | * This code is licensed under the GPL version 2 or later. See | |
9 | * the COPYING file in the top-level directory. | |
10 | */ | |
11 | ||
12 | #include "qemu/osdep.h" | |
da34e65c | 13 | #include "qapi/error.h" |
12ec8bd5 | 14 | #include "hw/arm/boot.h" |
fca9ca1b | 15 | #include "hw/arm/aspeed.h" |
00442402 | 16 | #include "hw/arm/aspeed_soc.h" |
c0216b94 | 17 | #include "hw/arm/aspeed_eeprom.h" |
8285490b | 18 | #include "hw/block/flash.h" |
3ec75e39 | 19 | #include "hw/i2c/i2c_mux_pca954x.h" |
93198b6c | 20 | #include "hw/i2c/smbus_eeprom.h" |
044475f3 | 21 | #include "hw/misc/pca9552.h" |
9618ebae | 22 | #include "hw/nvram/eeprom_at24c.h" |
5e9ae4b1 | 23 | #include "hw/sensor/tmp105.h" |
7cfbde5e | 24 | #include "hw/misc/led.h" |
a27bd6c7 | 25 | #include "hw/qdev-properties.h" |
e1ad9bc4 | 26 | #include "sysemu/block-backend.h" |
fa699e80 | 27 | #include "sysemu/reset.h" |
d769a1da CLG |
28 | #include "hw/loader.h" |
29 | #include "qemu/error-report.h" | |
a9df9622 | 30 | #include "qemu/units.h" |
66c895b8 | 31 | #include "hw/qdev-clock.h" |
d2b3eaef | 32 | #include "sysemu/sysemu.h" |
327d8e4e | 33 | |
74fb1f38 | 34 | static struct arm_boot_info aspeed_board_binfo = { |
b033271f | 35 | .board_id = -1, /* device-tree-only board */ |
327d8e4e AJ |
36 | }; |
37 | ||
612b219a | 38 | struct AspeedMachineState { |
888b2b03 PMD |
39 | /* Private */ |
40 | MachineState parent_obj; | |
41 | /* Public */ | |
42 | ||
3c392e87 | 43 | AspeedSoCState *soc; |
262259ea | 44 | MemoryRegion boot_rom; |
888b2b03 | 45 | bool mmio_exec; |
f65f6ad5 | 46 | uint32_t uart_chosen; |
9820e52f CLG |
47 | char *fmc_model; |
48 | char *spi_model; | |
ea066d39 | 49 | }; |
327d8e4e | 50 | |
1e2c22c9 CLG |
51 | /* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ |
52 | #if HOST_LONG_BITS == 32 | |
53 | #define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) | |
54 | #else | |
55 | #define ASPEED_RAM_SIZE(sz) (sz) | |
56 | #endif | |
57 | ||
ef17f836 | 58 | /* Palmetto hardware value: 0x120CE416 */ |
8da33ef7 CLG |
59 | #define PALMETTO_BMC_HW_STRAP1 ( \ |
60 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ | |
61 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ | |
62 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
63 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ | |
64 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
65 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
66 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ | |
67 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
68 | SCU_HW_STRAP_SPI_WIDTH | \ | |
69 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
70 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
71 | ||
40a38df5 ES |
72 | /* TODO: Find the actual hardware value */ |
73 | #define SUPERMICROX11_BMC_HW_STRAP1 ( \ | |
74 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ | |
75 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \ | |
76 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
77 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ | |
78 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
79 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
80 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ | |
81 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
82 | SCU_HW_STRAP_SPI_WIDTH | \ | |
83 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
84 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
85 | ||
47936597 GR |
86 | /* TODO: Find the actual hardware value */ |
87 | #define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \ | |
88 | AST2500_HW_STRAP1_DEFAULTS | \ | |
89 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
90 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
91 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
92 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
93 | SCU_HW_STRAP_SPI_WIDTH | \ | |
94 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN)) | |
95 | ||
ef17f836 | 96 | /* AST2500 evb hardware value: 0xF100C2E6 */ |
9a7c1750 CLG |
97 | #define AST2500_EVB_HW_STRAP1 (( \ |
98 | AST2500_HW_STRAP1_DEFAULTS | \ | |
99 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
100 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
101 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
102 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
103 | SCU_HW_STRAP_MAC1_RGMII | \ | |
104 | SCU_HW_STRAP_MAC0_RGMII) & \ | |
105 | ~SCU_HW_STRAP_2ND_BOOT_WDT) | |
106 | ||
ef17f836 CLG |
107 | /* Romulus hardware value: 0xF10AD206 */ |
108 | #define ROMULUS_BMC_HW_STRAP1 ( \ | |
109 | AST2500_HW_STRAP1_DEFAULTS | \ | |
110 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
111 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
112 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
113 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
114 | SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ | |
115 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) | |
116 | ||
143b040f PW |
117 | /* Sonorapass hardware value: 0xF100D216 */ |
118 | #define SONORAPASS_BMC_HW_STRAP1 ( \ | |
119 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
120 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
121 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
122 | SCU_AST2500_HW_STRAP_RESERVED28 | \ | |
123 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
124 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
125 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
126 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ | |
127 | SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ | |
128 | SCU_HW_STRAP_VGA_BIOS_ROM | \ | |
129 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
130 | SCU_AST2500_HW_STRAP_RESERVED1) | |
131 | ||
95f068c8 JW |
132 | #define G220A_BMC_HW_STRAP1 ( \ |
133 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
134 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
135 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
136 | SCU_AST2500_HW_STRAP_RESERVED28 | \ | |
137 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
138 | SCU_HW_STRAP_2ND_BOOT_WDT | \ | |
139 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
140 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
141 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ | |
142 | SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ | |
143 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \ | |
144 | SCU_AST2500_HW_STRAP_RESERVED1) | |
145 | ||
82b6a3f6 JW |
146 | /* FP5280G2 hardware value: 0XF100D286 */ |
147 | #define FP5280G2_BMC_HW_STRAP1 ( \ | |
148 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
149 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
150 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
151 | SCU_AST2500_HW_STRAP_RESERVED28 | \ | |
152 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
153 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
154 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
155 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \ | |
156 | SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \ | |
157 | SCU_HW_STRAP_MAC1_RGMII | \ | |
158 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
159 | SCU_AST2500_HW_STRAP_RESERVED1) | |
160 | ||
62c2c2eb CLG |
161 | /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ |
162 | #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 | |
163 | ||
9cccb912 PV |
164 | /* Quanta-Q71l hardware value */ |
165 | #define QUANTA_Q71L_BMC_HW_STRAP1 ( \ | |
166 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \ | |
167 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \ | |
168 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
169 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \ | |
170 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
171 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \ | |
172 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
173 | SCU_HW_STRAP_SPI_WIDTH | \ | |
174 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \ | |
175 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
176 | ||
ccc2c418 CLG |
177 | /* AST2600 evb hardware value */ |
178 | #define AST2600_EVB_HW_STRAP1 0x000000C0 | |
179 | #define AST2600_EVB_HW_STRAP2 0x00000003 | |
180 | ||
63ceb818 CLG |
181 | /* Tacoma hardware value */ |
182 | #define TACOMA_BMC_HW_STRAP1 0x00000000 | |
7582591a | 183 | #define TACOMA_BMC_HW_STRAP2 0x00000040 |
63ceb818 | 184 | |
58e52bdb | 185 | /* Rainier hardware value: (QEMU prototype) */ |
b6d1df64 JS |
186 | #define RAINIER_BMC_HW_STRAP1 0x00422016 |
187 | #define RAINIER_BMC_HW_STRAP2 0x80000848 | |
58e52bdb | 188 | |
febbe308 PD |
189 | /* Fuji hardware value */ |
190 | #define FUJI_BMC_HW_STRAP1 0x00000000 | |
191 | #define FUJI_BMC_HW_STRAP2 0x00000000 | |
192 | ||
a20c54b1 PW |
193 | /* Bletchley hardware value */ |
194 | /* TODO: Leave same as EVB for now. */ | |
195 | #define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 | |
196 | #define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2 | |
197 | ||
fb6b3c8d JHY |
198 | /* Qualcomm DC-SCM hardware value */ |
199 | #define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000 | |
200 | #define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041 | |
201 | ||
9bb6d140 JS |
202 | #define AST_SMP_MAILBOX_BASE 0x1e6e2180 |
203 | #define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0) | |
204 | #define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4) | |
205 | #define AST_SMP_MBOX_FIELD_READY (AST_SMP_MAILBOX_BASE + 0x8) | |
206 | #define AST_SMP_MBOX_FIELD_POLLINSN (AST_SMP_MAILBOX_BASE + 0xc) | |
207 | #define AST_SMP_MBOX_CODE (AST_SMP_MAILBOX_BASE + 0x10) | |
208 | #define AST_SMP_MBOX_GOSIGN 0xabbaab00 | |
209 | ||
210 | static void aspeed_write_smpboot(ARMCPU *cpu, | |
211 | const struct arm_boot_info *info) | |
212 | { | |
902bba54 CLG |
213 | AddressSpace *as = arm_boot_address_space(cpu, info); |
214 | static const ARMInsnFixup poll_mailbox_ready[] = { | |
9bb6d140 JS |
215 | /* |
216 | * r2 = per-cpu go sign value | |
217 | * r1 = AST_SMP_MBOX_FIELD_ENTRY | |
218 | * r0 = AST_SMP_MBOX_FIELD_GOSIGN | |
219 | */ | |
902bba54 CLG |
220 | { 0xee100fb0 }, /* mrc p15, 0, r0, c0, c0, 5 */ |
221 | { 0xe21000ff }, /* ands r0, r0, #255 */ | |
222 | { 0xe59f201c }, /* ldr r2, [pc, #28] */ | |
223 | { 0xe1822000 }, /* orr r2, r2, r0 */ | |
224 | ||
225 | { 0xe59f1018 }, /* ldr r1, [pc, #24] */ | |
226 | { 0xe59f0018 }, /* ldr r0, [pc, #24] */ | |
227 | ||
228 | { 0xe320f002 }, /* wfe */ | |
229 | { 0xe5904000 }, /* ldr r4, [r0] */ | |
230 | { 0xe1520004 }, /* cmp r2, r4 */ | |
231 | { 0x1afffffb }, /* bne <wfe> */ | |
232 | { 0xe591f000 }, /* ldr pc, [r1] */ | |
233 | { AST_SMP_MBOX_GOSIGN }, | |
234 | { AST_SMP_MBOX_FIELD_ENTRY }, | |
235 | { AST_SMP_MBOX_FIELD_GOSIGN }, | |
236 | { 0, FIXUP_TERMINATOR } | |
9bb6d140 | 237 | }; |
902bba54 | 238 | static const uint32_t fixupcontext[FIXUP_MAX] = { 0 }; |
9bb6d140 | 239 | |
902bba54 CLG |
240 | arm_write_bootloader("aspeed.smpboot", as, info->smp_loader_start, |
241 | poll_mailbox_ready, fixupcontext); | |
9bb6d140 JS |
242 | } |
243 | ||
244 | static void aspeed_reset_secondary(ARMCPU *cpu, | |
245 | const struct arm_boot_info *info) | |
246 | { | |
247 | AddressSpace *as = arm_boot_address_space(cpu, info); | |
248 | CPUState *cs = CPU(cpu); | |
249 | ||
250 | /* info->smp_bootreg_addr */ | |
251 | address_space_stl_notdirty(as, AST_SMP_MBOX_FIELD_GOSIGN, 0, | |
252 | MEMTXATTRS_UNSPECIFIED, NULL); | |
253 | cpu_set_pc(cs, info->smp_loader_start); | |
254 | } | |
255 | ||
8b744a6a | 256 | static void write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size, |
d769a1da CLG |
257 | Error **errp) |
258 | { | |
05e6e40a | 259 | g_autofree void *storage = NULL; |
0c7209be CLG |
260 | int64_t size; |
261 | ||
262 | /* The block backend size should have already been 'validated' by | |
263 | * the creation of the m25p80 object. | |
264 | */ | |
265 | size = blk_getlength(blk); | |
266 | if (size <= 0) { | |
267 | error_setg(errp, "failed to get flash size"); | |
268 | return; | |
269 | } | |
d769a1da | 270 | |
0c7209be CLG |
271 | if (rom_size > size) { |
272 | rom_size = size; | |
d769a1da CLG |
273 | } |
274 | ||
05e6e40a | 275 | storage = g_malloc0(rom_size); |
a9262f55 | 276 | if (blk_pread(blk, 0, rom_size, storage, 0) < 0) { |
d769a1da CLG |
277 | error_setg(errp, "failed to read the initial flash content"); |
278 | return; | |
279 | } | |
280 | ||
281 | rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); | |
d769a1da CLG |
282 | } |
283 | ||
8b744a6a CLG |
284 | /* |
285 | * Create a ROM and copy the flash contents at the expected address | |
286 | * (0x0). Boots faster than execute-in-place. | |
287 | */ | |
262259ea | 288 | static void aspeed_install_boot_rom(AspeedMachineState *bmc, BlockBackend *blk, |
8b744a6a CLG |
289 | uint64_t rom_size) |
290 | { | |
3c392e87 | 291 | AspeedSoCState *soc = bmc->soc; |
8b744a6a | 292 | |
262259ea | 293 | memory_region_init_rom(&bmc->boot_rom, NULL, "aspeed.boot_rom", rom_size, |
8b744a6a CLG |
294 | &error_abort); |
295 | memory_region_add_subregion_overlap(&soc->spi_boot_container, 0, | |
262259ea | 296 | &bmc->boot_rom, 1); |
8b744a6a CLG |
297 | write_boot_rom(blk, ASPEED_SOC_SPI_BOOT_ADDR, rom_size, &error_abort); |
298 | } | |
299 | ||
1099ad10 | 300 | void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, |
9bd4ac61 | 301 | unsigned int count, int unit0) |
e1ad9bc4 | 302 | { |
179b2058 PW |
303 | int i; |
304 | ||
305 | if (!flashtype) { | |
306 | return; | |
307 | } | |
e1ad9bc4 | 308 | |
9bd4ac61 | 309 | for (i = 0; i < count; ++i) { |
8ec239f2 | 310 | DriveInfo *dinfo = drive_get(IF_MTD, 0, unit0 + i); |
a7d78bef | 311 | DeviceState *dev; |
e1ad9bc4 | 312 | |
a7d78bef | 313 | dev = qdev_new(flashtype); |
e1ad9bc4 | 314 | if (dinfo) { |
a7d78bef | 315 | qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo)); |
e1ad9bc4 | 316 | } |
27a2c66c | 317 | qdev_prop_set_uint8(dev, "cs", i); |
a7d78bef | 318 | qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal); |
e1ad9bc4 CLG |
319 | } |
320 | } | |
321 | ||
a29e3e12 AJ |
322 | static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo) |
323 | { | |
324 | DeviceState *card; | |
325 | ||
756f739b PMD |
326 | if (!dinfo) { |
327 | return; | |
a29e3e12 | 328 | } |
756f739b PMD |
329 | card = qdev_new(TYPE_SD_CARD); |
330 | qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), | |
331 | &error_fatal); | |
3e80f690 MA |
332 | qdev_realize_and_unref(card, |
333 | qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), | |
334 | &error_fatal); | |
a29e3e12 AJ |
335 | } |
336 | ||
d2b3eaef PD |
337 | static void connect_serial_hds_to_uarts(AspeedMachineState *bmc) |
338 | { | |
339 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); | |
3c392e87 | 340 | AspeedSoCState *s = bmc->soc; |
d2b3eaef | 341 | AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); |
f65f6ad5 | 342 | int uart_chosen = bmc->uart_chosen ? bmc->uart_chosen : amc->uart_default; |
d2b3eaef | 343 | |
f65f6ad5 | 344 | aspeed_soc_uart_set_chr(s, uart_chosen, serial_hd(0)); |
d2b3eaef | 345 | for (int i = 1, uart = ASPEED_DEV_UART1; i < sc->uarts_num; i++, uart++) { |
f65f6ad5 | 346 | if (uart == uart_chosen) { |
d2b3eaef PD |
347 | continue; |
348 | } | |
349 | aspeed_soc_uart_set_chr(s, uart, serial_hd(i)); | |
350 | } | |
351 | } | |
352 | ||
baa4732b | 353 | static void aspeed_machine_init(MachineState *machine) |
327d8e4e | 354 | { |
888b2b03 | 355 | AspeedMachineState *bmc = ASPEED_MACHINE(machine); |
baa4732b | 356 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); |
b033271f | 357 | AspeedSoCClass *sc; |
2bea128c | 358 | int i; |
d3bad7e7 | 359 | NICInfo *nd = &nd_table[0]; |
327d8e4e | 360 | |
3c392e87 PMD |
361 | bmc->soc = ASPEED_SOC(object_new(amc->soc_name)); |
362 | object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc)); | |
363 | object_unref(OBJECT(bmc->soc)); | |
364 | sc = ASPEED_SOC_GET_CLASS(bmc->soc); | |
b033271f | 365 | |
533eb415 | 366 | /* |
346160cb CLG |
367 | * This will error out if the RAM size is not supported by the |
368 | * memory controller of the SoC. | |
533eb415 | 369 | */ |
3c392e87 | 370 | object_property_set_uint(OBJECT(bmc->soc), "ram-size", machine->ram_size, |
533eb415 IM |
371 | &error_fatal); |
372 | ||
d3bad7e7 CLG |
373 | for (i = 0; i < sc->macs_num; i++) { |
374 | if ((amc->macs_mask & (1 << i)) && nd->used) { | |
375 | qemu_check_nic_model(nd, TYPE_FTGMAC100); | |
3c392e87 | 376 | qdev_set_nic_properties(DEVICE(&bmc->soc->ftgmac100[i]), nd); |
d3bad7e7 CLG |
377 | nd++; |
378 | } | |
379 | } | |
380 | ||
3c392e87 | 381 | object_property_set_int(OBJECT(bmc->soc), "hw-strap1", amc->hw_strap1, |
87e79af0 | 382 | &error_abort); |
3c392e87 | 383 | object_property_set_int(OBJECT(bmc->soc), "hw-strap2", amc->hw_strap2, |
ccc2c418 | 384 | &error_abort); |
3c392e87 | 385 | object_property_set_link(OBJECT(bmc->soc), "memory", |
4dd9d554 | 386 | OBJECT(get_system_memory()), &error_abort); |
3c392e87 | 387 | object_property_set_link(OBJECT(bmc->soc), "dram", |
0df2d9a6 | 388 | OBJECT(machine->ram), &error_abort); |
b6e70d1d JS |
389 | if (machine->kernel_filename) { |
390 | /* | |
391 | * When booting with a -kernel command line there is no u-boot | |
392 | * that runs to unlock the SCU. In this case set the default to | |
393 | * be unlocked as the kernel expects | |
394 | */ | |
3c392e87 | 395 | object_property_set_int(OBJECT(bmc->soc), "hw-prot-key", |
5325cc34 | 396 | ASPEED_SCU_PROT_KEY, &error_abort); |
b6e70d1d | 397 | } |
d2b3eaef | 398 | connect_serial_hds_to_uarts(bmc); |
3c392e87 | 399 | qdev_realize(DEVICE(bmc->soc), NULL, &error_abort); |
327d8e4e | 400 | |
c7e313ae | 401 | if (defaults_enabled()) { |
3c392e87 | 402 | aspeed_board_init_flashes(&bmc->soc->fmc, |
8ec239f2 | 403 | bmc->fmc_model ? bmc->fmc_model : amc->fmc_model, |
9bd4ac61 | 404 | amc->num_cs, 0); |
3c392e87 | 405 | aspeed_board_init_flashes(&bmc->soc->spi[0], |
8ec239f2 | 406 | bmc->spi_model ? bmc->spi_model : amc->spi_model, |
9bd4ac61 | 407 | 1, amc->num_cs); |
c7e313ae | 408 | } |
74fb1f38 | 409 | |
b7f1a0cb | 410 | if (machine->kernel_filename && sc->num_cpus > 1) { |
9bb6d140 JS |
411 | /* With no u-boot we must set up a boot stub for the secondary CPU */ |
412 | MemoryRegion *smpboot = g_new(MemoryRegion, 1); | |
f489960d | 413 | memory_region_init_ram(smpboot, NULL, "aspeed.smpboot", |
9bb6d140 JS |
414 | 0x80, &error_abort); |
415 | memory_region_add_subregion(get_system_memory(), | |
416 | AST_SMP_MAILBOX_BASE, smpboot); | |
417 | ||
418 | aspeed_board_binfo.write_secondary_boot = aspeed_write_smpboot; | |
419 | aspeed_board_binfo.secondary_cpu_reset_hook = aspeed_reset_secondary; | |
420 | aspeed_board_binfo.smp_loader_start = AST_SMP_MBOX_CODE; | |
421 | } | |
422 | ||
6e504a98 | 423 | aspeed_board_binfo.ram_size = machine->ram_size; |
347df6f8 | 424 | aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM]; |
e1ad9bc4 | 425 | |
baa4732b CLG |
426 | if (amc->i2c_init) { |
427 | amc->i2c_init(bmc); | |
2cf6cb50 CLG |
428 | } |
429 | ||
3c392e87 PMD |
430 | for (i = 0; i < bmc->soc->sdhci.num_slots; i++) { |
431 | sdhci_attach_drive(&bmc->soc->sdhci.slots[i], | |
8ec239f2 | 432 | drive_get(IF_SD, 0, i)); |
a29e3e12 | 433 | } |
2bea128c | 434 | |
3c392e87 PMD |
435 | if (bmc->soc->emmc.num_slots) { |
436 | sdhci_attach_drive(&bmc->soc->emmc.slots[0], | |
437 | drive_get(IF_SD, 0, bmc->soc->sdhci.num_slots)); | |
2bea128c EJ |
438 | } |
439 | ||
8b744a6a | 440 | if (!bmc->mmio_exec) { |
3c392e87 | 441 | DeviceState *dev = ssi_get_cs(bmc->soc->fmc.spi, 0); |
8285490b | 442 | BlockBackend *fmc0 = dev ? m25p80_get_blk(dev) : NULL; |
8b744a6a | 443 | |
8285490b | 444 | if (fmc0) { |
3c392e87 | 445 | uint64_t rom_size = memory_region_size(&bmc->soc->spi_boot); |
8285490b | 446 | aspeed_install_boot_rom(bmc, fmc0, rom_size); |
8b744a6a CLG |
447 | } |
448 | } | |
449 | ||
2744ece8 | 450 | arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); |
74fb1f38 | 451 | } |
b033271f | 452 | |
612b219a | 453 | static void palmetto_bmc_i2c_init(AspeedMachineState *bmc) |
2cf6cb50 | 454 | { |
3c392e87 | 455 | AspeedSoCState *soc = bmc->soc; |
a87e81b9 | 456 | DeviceState *dev; |
3d165f12 | 457 | uint8_t *eeprom_buf = g_malloc0(32 * 1024); |
2cf6cb50 CLG |
458 | |
459 | /* The palmetto platform expects a ds3231 RTC but a ds1338 is | |
460 | * enough to provide basic RTC features. Alarms will be missing */ | |
1373b15b | 461 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); |
a87e81b9 | 462 | |
7a204cbd | 463 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, |
3d165f12 CLG |
464 | eeprom_buf); |
465 | ||
a87e81b9 | 466 | /* add a TMP423 temperature sensor */ |
1373b15b PMD |
467 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), |
468 | "tmp423", 0x4c)); | |
5325cc34 MA |
469 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); |
470 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
471 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
472 | object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort); | |
2cf6cb50 CLG |
473 | } |
474 | ||
9cccb912 PV |
475 | static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc) |
476 | { | |
3c392e87 | 477 | AspeedSoCState *soc = bmc->soc; |
9cccb912 PV |
478 | |
479 | /* | |
480 | * The quanta-q71l platform expects tmp75s which are compatible with | |
481 | * tmp105s. | |
482 | */ | |
483 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c); | |
484 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e); | |
485 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f); | |
486 | ||
487 | /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */ | |
488 | /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */ | |
489 | /* TODO: Add Memory Riser i2c mux and eeproms. */ | |
490 | ||
3ec75e39 PV |
491 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74); |
492 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77); | |
493 | ||
9cccb912 | 494 | /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */ |
3ec75e39 PV |
495 | |
496 | /* i2c-7 */ | |
497 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70); | |
9cccb912 PV |
498 | /* - i2c@0: pmbus@59 */ |
499 | /* - i2c@1: pmbus@58 */ | |
500 | /* - i2c@2: pmbus@58 */ | |
501 | /* - i2c@3: pmbus@59 */ | |
3ec75e39 | 502 | |
9cccb912 PV |
503 | /* TODO: i2c-7: Add PDB FRU eeprom@52 */ |
504 | /* TODO: i2c-8: Add BMC FRU eeprom@50 */ | |
505 | } | |
506 | ||
612b219a | 507 | static void ast2500_evb_i2c_init(AspeedMachineState *bmc) |
2cf6cb50 | 508 | { |
3c392e87 | 509 | AspeedSoCState *soc = bmc->soc; |
3d165f12 CLG |
510 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
511 | ||
7a204cbd | 512 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50, |
3d165f12 | 513 | eeprom_buf); |
2cf6cb50 CLG |
514 | |
515 | /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ | |
1373b15b | 516 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), |
044475f3 | 517 | TYPE_TMP105, 0x4d); |
2cf6cb50 CLG |
518 | } |
519 | ||
612b219a | 520 | static void ast2600_evb_i2c_init(AspeedMachineState *bmc) |
ccc2c418 | 521 | { |
3c392e87 | 522 | AspeedSoCState *soc = bmc->soc; |
52bcd997 HC |
523 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
524 | ||
525 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, | |
526 | eeprom_buf); | |
527 | ||
528 | /* LM75 is compatible with TMP105 driver */ | |
529 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), | |
530 | TYPE_TMP105, 0x4d); | |
ccc2c418 CLG |
531 | } |
532 | ||
34f73a81 KP |
533 | static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc) |
534 | { | |
3c392e87 | 535 | AspeedSoCState *soc = bmc->soc; |
34f73a81 KP |
536 | |
537 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB); | |
538 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB, | |
539 | yosemitev2_bmc_fruid, yosemitev2_bmc_fruid_len); | |
0a1f86ba KP |
540 | /* TMP421 */ |
541 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "tmp421", 0x1f); | |
542 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4e); | |
543 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4f); | |
544 | ||
34f73a81 KP |
545 | } |
546 | ||
612b219a | 547 | static void romulus_bmc_i2c_init(AspeedMachineState *bmc) |
6c4567c7 | 548 | { |
3c392e87 | 549 | AspeedSoCState *soc = bmc->soc; |
6c4567c7 CLG |
550 | |
551 | /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is | |
552 | * good enough */ | |
1373b15b | 553 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); |
6c4567c7 CLG |
554 | } |
555 | ||
6c323aba KP |
556 | static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc) |
557 | { | |
3c392e87 | 558 | AspeedSoCState *soc = bmc->soc; |
6c323aba KP |
559 | |
560 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB); | |
561 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB, | |
562 | tiogapass_bmc_fruid, tiogapass_bmc_fruid_len); | |
a09d357d KP |
563 | /* TMP421 */ |
564 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), "tmp421", 0x1f); | |
565 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4f); | |
566 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4e); | |
6c323aba KP |
567 | } |
568 | ||
f4aec252 CLG |
569 | static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr) |
570 | { | |
571 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id), | |
572 | TYPE_PCA9552, addr); | |
573 | } | |
574 | ||
612b219a | 575 | static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc) |
143b040f | 576 | { |
3c392e87 | 577 | AspeedSoCState *soc = bmc->soc; |
143b040f PW |
578 | |
579 | /* bus 2 : */ | |
1373b15b PMD |
580 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48); |
581 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49); | |
143b040f PW |
582 | /* bus 2 : pca9546 @ 0x73 */ |
583 | ||
584 | /* bus 3 : pca9548 @ 0x70 */ | |
585 | ||
586 | /* bus 4 : */ | |
587 | uint8_t *eeprom4_54 = g_malloc0(8 * 1024); | |
7a204cbd | 588 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, |
143b040f PW |
589 | eeprom4_54); |
590 | /* PCA9539 @ 0x76, but PCA9552 is compatible */ | |
f4aec252 | 591 | create_pca9552(soc, 4, 0x76); |
143b040f | 592 | /* PCA9539 @ 0x77, but PCA9552 is compatible */ |
f4aec252 | 593 | create_pca9552(soc, 4, 0x77); |
143b040f PW |
594 | |
595 | /* bus 6 : */ | |
1373b15b PMD |
596 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48); |
597 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49); | |
143b040f PW |
598 | /* bus 6 : pca9546 @ 0x73 */ |
599 | ||
600 | /* bus 8 : */ | |
601 | uint8_t *eeprom8_56 = g_malloc0(8 * 1024); | |
7a204cbd | 602 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56, |
143b040f | 603 | eeprom8_56); |
f4aec252 CLG |
604 | create_pca9552(soc, 8, 0x60); |
605 | create_pca9552(soc, 8, 0x61); | |
143b040f PW |
606 | /* bus 8 : adc128d818 @ 0x1d */ |
607 | /* bus 8 : adc128d818 @ 0x1f */ | |
608 | ||
609 | /* | |
610 | * bus 13 : pca9548 @ 0x71 | |
611 | * - channel 3: | |
612 | * - tmm421 @ 0x4c | |
613 | * - tmp421 @ 0x4e | |
614 | * - tmp421 @ 0x4f | |
615 | */ | |
616 | ||
617 | } | |
618 | ||
612b219a | 619 | static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc) |
62c2c2eb | 620 | { |
7cfbde5e PMD |
621 | static const struct { |
622 | unsigned gpio_id; | |
623 | LEDColor color; | |
624 | const char *description; | |
625 | bool gpio_polarity; | |
626 | } pca1_leds[] = { | |
627 | {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW}, | |
628 | {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW}, | |
629 | {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW}, | |
630 | }; | |
3c392e87 | 631 | AspeedSoCState *soc = bmc->soc; |
3d165f12 | 632 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
15ce12cf | 633 | DeviceState *dev; |
7cfbde5e | 634 | LEDState *led; |
62c2c2eb | 635 | |
63ceb818 | 636 | /* Bus 3: TODO bmp280@77 */ |
db437ca6 | 637 | dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); |
15ce12cf | 638 | qdev_prop_set_string(dev, "description", "pca1"); |
2616f572 PMD |
639 | i2c_slave_realize_and_unref(I2C_SLAVE(dev), |
640 | aspeed_i2c_get_bus(&soc->i2c, 3), | |
641 | &error_fatal); | |
8c9a61d7 | 642 | |
7cfbde5e PMD |
643 | for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) { |
644 | led = led_create_simple(OBJECT(bmc), | |
645 | pca1_leds[i].gpio_polarity, | |
646 | pca1_leds[i].color, | |
647 | pca1_leds[i].description); | |
648 | qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id, | |
649 | qdev_get_gpio_in(DEVICE(led), 0)); | |
650 | } | |
b61ea6e7 | 651 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76); |
2a75e8c3 | 652 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52); |
1373b15b PMD |
653 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c); |
654 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c); | |
62c2c2eb CLG |
655 | |
656 | /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ | |
1373b15b | 657 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105, |
044475f3 | 658 | 0x4a); |
6c4567c7 CLG |
659 | |
660 | /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is | |
661 | * good enough */ | |
1373b15b | 662 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); |
3d165f12 | 663 | |
7a204cbd | 664 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51, |
3d165f12 | 665 | eeprom_buf); |
db437ca6 | 666 | dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60)); |
15ce12cf | 667 | qdev_prop_set_string(dev, "description", "pca0"); |
2616f572 PMD |
668 | i2c_slave_realize_and_unref(I2C_SLAVE(dev), |
669 | aspeed_i2c_get_bus(&soc->i2c, 11), | |
670 | &error_fatal); | |
63ceb818 | 671 | /* Bus 11: TODO ucd90160@64 */ |
62c2c2eb CLG |
672 | } |
673 | ||
95f068c8 JW |
674 | static void g220a_bmc_i2c_init(AspeedMachineState *bmc) |
675 | { | |
3c392e87 | 676 | AspeedSoCState *soc = bmc->soc; |
95f068c8 JW |
677 | DeviceState *dev; |
678 | ||
679 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), | |
680 | "emc1413", 0x4c)); | |
681 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); | |
682 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
683 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
684 | ||
685 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12), | |
686 | "emc1413", 0x4c)); | |
687 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); | |
688 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
689 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
690 | ||
691 | dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13), | |
692 | "emc1413", 0x4c)); | |
693 | object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); | |
694 | object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); | |
695 | object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); | |
6f5f6507 JW |
696 | |
697 | static uint8_t eeprom_buf[2 * 1024] = { | |
698 | 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe, | |
699 | 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65, | |
700 | 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32, | |
701 | 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42, | |
702 | 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45, | |
703 | 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1, | |
704 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, | |
705 | }; | |
706 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57, | |
707 | eeprom_buf); | |
95f068c8 JW |
708 | } |
709 | ||
82b6a3f6 JW |
710 | static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc) |
711 | { | |
3c392e87 | 712 | AspeedSoCState *soc = bmc->soc; |
82b6a3f6 JW |
713 | I2CSlave *i2c_mux; |
714 | ||
715 | /* The at24c256 */ | |
716 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768); | |
717 | ||
718 | /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */ | |
719 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, | |
720 | 0x48); | |
721 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105, | |
722 | 0x49); | |
723 | ||
724 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), | |
725 | "pca9546", 0x70); | |
726 | /* It expects a TMP112 but a TMP105 is compatible */ | |
727 | i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105, | |
728 | 0x4a); | |
729 | ||
730 | /* It expects a ds3232 but a ds1338 is good enough */ | |
731 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68); | |
732 | ||
733 | /* It expects a pca9555 but a pca9552 is compatible */ | |
f4aec252 | 734 | create_pca9552(soc, 8, 0x30); |
82b6a3f6 JW |
735 | } |
736 | ||
58e52bdb CLG |
737 | static void rainier_bmc_i2c_init(AspeedMachineState *bmc) |
738 | { | |
3c392e87 | 739 | AspeedSoCState *soc = bmc->soc; |
fa6d98c0 JS |
740 | I2CSlave *i2c_mux; |
741 | ||
9077e09a | 742 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB); |
58e52bdb | 743 | |
f4aec252 | 744 | create_pca9552(soc, 3, 0x61); |
bcb122f8 | 745 | |
58e52bdb CLG |
746 | /* The rainier expects a TMP275 but a TMP105 is compatible */ |
747 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, | |
748 | 0x48); | |
749 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, | |
750 | 0x49); | |
751 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105, | |
752 | 0x4a); | |
fa6d98c0 JS |
753 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), |
754 | "pca9546", 0x70); | |
9077e09a PD |
755 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
756 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
757 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB); | |
f4aec252 | 758 | create_pca9552(soc, 4, 0x60); |
58e52bdb CLG |
759 | |
760 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, | |
761 | 0x48); | |
762 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105, | |
763 | 0x49); | |
f4aec252 CLG |
764 | create_pca9552(soc, 5, 0x60); |
765 | create_pca9552(soc, 5, 0x61); | |
fa6d98c0 JS |
766 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), |
767 | "pca9546", 0x70); | |
9077e09a PD |
768 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
769 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
58e52bdb CLG |
770 | |
771 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, | |
772 | 0x48); | |
773 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, | |
774 | 0x4a); | |
775 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105, | |
776 | 0x4b); | |
fa6d98c0 JS |
777 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), |
778 | "pca9546", 0x70); | |
9077e09a PD |
779 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
780 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
781 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB); | |
782 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB); | |
58e52bdb | 783 | |
f4aec252 CLG |
784 | create_pca9552(soc, 7, 0x30); |
785 | create_pca9552(soc, 7, 0x31); | |
786 | create_pca9552(soc, 7, 0x32); | |
787 | create_pca9552(soc, 7, 0x33); | |
f4aec252 CLG |
788 | create_pca9552(soc, 7, 0x60); |
789 | create_pca9552(soc, 7, 0x61); | |
b61ea6e7 | 790 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76); |
58e52bdb CLG |
791 | /* Bus 7: TODO si7021-a20@20 */ |
792 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105, | |
793 | 0x48); | |
2a75e8c3 | 794 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52); |
9077e09a PD |
795 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB); |
796 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB); | |
58e52bdb CLG |
797 | |
798 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, | |
799 | 0x48); | |
800 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105, | |
801 | 0x4a); | |
be85508f NP |
802 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50, |
803 | 64 * KiB, rainier_bb_fruid, rainier_bb_fruid_len); | |
804 | at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, | |
805 | 64 * KiB, rainier_bmc_fruid, rainier_bmc_fruid_len); | |
f4aec252 CLG |
806 | create_pca9552(soc, 8, 0x60); |
807 | create_pca9552(soc, 8, 0x61); | |
58e52bdb CLG |
808 | /* Bus 8: ucd90320@11 */ |
809 | /* Bus 8: ucd90320@b */ | |
810 | /* Bus 8: ucd90320@c */ | |
811 | ||
812 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c); | |
813 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d); | |
9077e09a | 814 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB); |
58e52bdb CLG |
815 | |
816 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c); | |
817 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d); | |
9077e09a | 818 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB); |
58e52bdb CLG |
819 | |
820 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, | |
821 | 0x48); | |
822 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105, | |
823 | 0x49); | |
fa6d98c0 JS |
824 | i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), |
825 | "pca9546", 0x70); | |
9077e09a PD |
826 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB); |
827 | at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB); | |
f4aec252 | 828 | create_pca9552(soc, 11, 0x60); |
fa6d98c0 JS |
829 | |
830 | ||
9077e09a | 831 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB); |
f4aec252 | 832 | create_pca9552(soc, 13, 0x60); |
fa6d98c0 | 833 | |
9077e09a | 834 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB); |
f4aec252 | 835 | create_pca9552(soc, 14, 0x60); |
fa6d98c0 | 836 | |
9077e09a | 837 | at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB); |
f4aec252 | 838 | create_pca9552(soc, 15, 0x60); |
58e52bdb CLG |
839 | } |
840 | ||
febbe308 PD |
841 | static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, |
842 | I2CBus **channels) | |
843 | { | |
844 | I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr); | |
845 | for (int i = 0; i < 8; i++) { | |
846 | channels[i] = pca954x_i2c_get_bus(mux, i); | |
847 | } | |
848 | } | |
849 | ||
850 | #define TYPE_LM75 TYPE_TMP105 | |
851 | #define TYPE_TMP75 TYPE_TMP105 | |
852 | #define TYPE_TMP422 "tmp422" | |
853 | ||
854 | static void fuji_bmc_i2c_init(AspeedMachineState *bmc) | |
855 | { | |
3c392e87 | 856 | AspeedSoCState *soc = bmc->soc; |
febbe308 PD |
857 | I2CBus *i2c[144] = {}; |
858 | ||
859 | for (int i = 0; i < 16; i++) { | |
860 | i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); | |
861 | } | |
862 | I2CBus *i2c180 = i2c[2]; | |
863 | I2CBus *i2c480 = i2c[8]; | |
864 | I2CBus *i2c600 = i2c[11]; | |
865 | ||
866 | get_pca9548_channels(i2c180, 0x70, &i2c[16]); | |
867 | get_pca9548_channels(i2c480, 0x70, &i2c[24]); | |
868 | /* NOTE: The device tree skips [32, 40) in the alias numbering */ | |
869 | get_pca9548_channels(i2c600, 0x77, &i2c[40]); | |
870 | get_pca9548_channels(i2c[24], 0x71, &i2c[48]); | |
871 | get_pca9548_channels(i2c[25], 0x72, &i2c[56]); | |
872 | get_pca9548_channels(i2c[26], 0x76, &i2c[64]); | |
873 | get_pca9548_channels(i2c[27], 0x76, &i2c[72]); | |
874 | for (int i = 0; i < 8; i++) { | |
875 | get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]); | |
876 | } | |
877 | ||
878 | i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c); | |
879 | i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d); | |
880 | ||
ef0eb67e SS |
881 | /* |
882 | * EEPROM 24c64 size is 64Kbits or 8 Kbytes | |
883 | * 24c02 size is 2Kbits or 256 bytes | |
884 | */ | |
885 | at24c_eeprom_init(i2c[19], 0x52, 8 * KiB); | |
886 | at24c_eeprom_init(i2c[20], 0x50, 256); | |
887 | at24c_eeprom_init(i2c[22], 0x52, 256); | |
febbe308 PD |
888 | |
889 | i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48); | |
890 | i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49); | |
891 | i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a); | |
892 | i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c); | |
893 | ||
ef0eb67e | 894 | at24c_eeprom_init(i2c[8], 0x51, 8 * KiB); |
febbe308 PD |
895 | i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a); |
896 | ||
897 | i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c); | |
ef0eb67e | 898 | at24c_eeprom_init(i2c[50], 0x52, 8 * KiB); |
febbe308 PD |
899 | i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48); |
900 | i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49); | |
901 | ||
902 | i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48); | |
903 | i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49); | |
904 | ||
ef0eb67e | 905 | at24c_eeprom_init(i2c[65], 0x53, 8 * KiB); |
febbe308 PD |
906 | i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49); |
907 | i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48); | |
ef0eb67e SS |
908 | at24c_eeprom_init(i2c[68], 0x52, 8 * KiB); |
909 | at24c_eeprom_init(i2c[69], 0x52, 8 * KiB); | |
910 | at24c_eeprom_init(i2c[70], 0x52, 8 * KiB); | |
911 | at24c_eeprom_init(i2c[71], 0x52, 8 * KiB); | |
febbe308 | 912 | |
ef0eb67e | 913 | at24c_eeprom_init(i2c[73], 0x53, 8 * KiB); |
febbe308 PD |
914 | i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49); |
915 | i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48); | |
ef0eb67e SS |
916 | at24c_eeprom_init(i2c[76], 0x52, 8 * KiB); |
917 | at24c_eeprom_init(i2c[77], 0x52, 8 * KiB); | |
918 | at24c_eeprom_init(i2c[78], 0x52, 8 * KiB); | |
919 | at24c_eeprom_init(i2c[79], 0x52, 8 * KiB); | |
920 | at24c_eeprom_init(i2c[28], 0x50, 256); | |
febbe308 PD |
921 | |
922 | for (int i = 0; i < 8; i++) { | |
9077e09a | 923 | at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB); |
febbe308 PD |
924 | i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48); |
925 | i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b); | |
926 | i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a); | |
927 | } | |
928 | } | |
929 | ||
a20c54b1 PW |
930 | #define TYPE_TMP421 "tmp421" |
931 | ||
932 | static void bletchley_bmc_i2c_init(AspeedMachineState *bmc) | |
933 | { | |
3c392e87 | 934 | AspeedSoCState *soc = bmc->soc; |
a20c54b1 PW |
935 | I2CBus *i2c[13] = {}; |
936 | for (int i = 0; i < 13; i++) { | |
937 | if ((i == 8) || (i == 11)) { | |
938 | continue; | |
939 | } | |
940 | i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); | |
941 | } | |
942 | ||
943 | /* Bus 0 - 5 all have the same config. */ | |
944 | for (int i = 0; i < 6; i++) { | |
945 | /* Missing model: ti,ina230 @ 0x45 */ | |
946 | /* Missing model: mps,mp5023 @ 0x40 */ | |
947 | i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f); | |
948 | /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */ | |
949 | i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76); | |
950 | i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67); | |
951 | /* Missing model: fsc,fusb302 @ 0x22 */ | |
952 | } | |
953 | ||
954 | /* Bus 6 */ | |
955 | at24c_eeprom_init(i2c[6], 0x56, 65536); | |
956 | /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */ | |
957 | i2c_slave_create_simple(i2c[6], "ds1338", 0x51); | |
958 | ||
959 | ||
960 | /* Bus 7 */ | |
961 | at24c_eeprom_init(i2c[7], 0x54, 65536); | |
962 | ||
963 | /* Bus 9 */ | |
964 | i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f); | |
965 | ||
966 | /* Bus 10 */ | |
967 | i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f); | |
968 | /* Missing model: ti,hdc1080 @ 0x40 */ | |
969 | i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67); | |
970 | ||
971 | /* Bus 12 */ | |
972 | /* Missing model: adi,adm1278 @ 0x11 */ | |
973 | i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c); | |
974 | i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d); | |
975 | i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67); | |
976 | } | |
977 | ||
fa699e80 PD |
978 | static void fby35_i2c_init(AspeedMachineState *bmc) |
979 | { | |
3c392e87 | 980 | AspeedSoCState *soc = bmc->soc; |
fa699e80 PD |
981 | I2CBus *i2c[16]; |
982 | ||
983 | for (int i = 0; i < 16; i++) { | |
984 | i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); | |
985 | } | |
986 | ||
987 | i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f); | |
988 | i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f); | |
989 | /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */ | |
990 | i2c_slave_create_simple(i2c[11], "adm1272", 0x44); | |
991 | i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e); | |
992 | i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f); | |
993 | ||
9077e09a PD |
994 | at24c_eeprom_init(i2c[4], 0x51, 128 * KiB); |
995 | at24c_eeprom_init(i2c[6], 0x51, 128 * KiB); | |
c0216b94 PD |
996 | at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid, |
997 | fby35_nic_fruid_len); | |
998 | at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid, | |
999 | fby35_bb_fruid_len); | |
1000 | at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid, | |
1001 | fby35_bmc_fruid_len); | |
fa699e80 PD |
1002 | |
1003 | /* | |
1004 | * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on | |
1005 | * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on | |
1006 | * each. | |
1007 | */ | |
1008 | } | |
1009 | ||
fb6b3c8d JHY |
1010 | static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) |
1011 | { | |
3c392e87 | 1012 | AspeedSoCState *soc = bmc->soc; |
fb6b3c8d JHY |
1013 | |
1014 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d); | |
1015 | } | |
1016 | ||
ece4cccd GG |
1017 | static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc) |
1018 | { | |
3c392e87 | 1019 | AspeedSoCState *soc = bmc->soc; |
2a7a5d5c | 1020 | I2CSlave *therm_mux, *cpuvr_mux; |
ece4cccd GG |
1021 | |
1022 | /* Create the generic DC-SCM hardware */ | |
1023 | qcom_dc_scm_bmc_i2c_init(bmc); | |
1024 | ||
1025 | /* Now create the Firework specific hardware */ | |
2a75e8c3 | 1026 | |
2a7a5d5c JHY |
1027 | /* I2C7 CPUVR MUX */ |
1028 | cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), | |
1029 | "pca9546", 0x70); | |
1030 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72); | |
1031 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72); | |
1032 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72); | |
1033 | i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72); | |
1034 | ||
cfc68f16 MK |
1035 | /* I2C8 Thermal Diodes*/ |
1036 | therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), | |
1037 | "pca9548", 0x70); | |
1038 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C); | |
1039 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C); | |
1040 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48); | |
1041 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48); | |
1042 | i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48); | |
1043 | ||
2a75e8c3 MK |
1044 | /* I2C9 Fan Controller (MAX31785) */ |
1045 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52); | |
1046 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54); | |
ece4cccd GG |
1047 | } |
1048 | ||
1a15311a CLG |
1049 | static bool aspeed_get_mmio_exec(Object *obj, Error **errp) |
1050 | { | |
1051 | return ASPEED_MACHINE(obj)->mmio_exec; | |
1052 | } | |
1053 | ||
1054 | static void aspeed_set_mmio_exec(Object *obj, bool value, Error **errp) | |
1055 | { | |
1056 | ASPEED_MACHINE(obj)->mmio_exec = value; | |
1057 | } | |
1058 | ||
1059 | static void aspeed_machine_instance_init(Object *obj) | |
1060 | { | |
1061 | ASPEED_MACHINE(obj)->mmio_exec = false; | |
1062 | } | |
1063 | ||
9820e52f CLG |
1064 | static char *aspeed_get_fmc_model(Object *obj, Error **errp) |
1065 | { | |
1066 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1067 | return g_strdup(bmc->fmc_model); | |
1068 | } | |
1069 | ||
1070 | static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp) | |
1071 | { | |
1072 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1073 | ||
1074 | g_free(bmc->fmc_model); | |
1075 | bmc->fmc_model = g_strdup(value); | |
1076 | } | |
1077 | ||
1078 | static char *aspeed_get_spi_model(Object *obj, Error **errp) | |
1079 | { | |
1080 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1081 | return g_strdup(bmc->spi_model); | |
1082 | } | |
1083 | ||
1084 | static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp) | |
1085 | { | |
1086 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1087 | ||
1088 | g_free(bmc->spi_model); | |
1089 | bmc->spi_model = g_strdup(value); | |
1090 | } | |
1091 | ||
f65f6ad5 CLG |
1092 | static char *aspeed_get_bmc_console(Object *obj, Error **errp) |
1093 | { | |
1094 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1095 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); | |
1096 | int uart_chosen = bmc->uart_chosen ? bmc->uart_chosen : amc->uart_default; | |
1097 | ||
1098 | return g_strdup_printf("uart%d", uart_chosen - ASPEED_DEV_UART1 + 1); | |
1099 | } | |
1100 | ||
1101 | static void aspeed_set_bmc_console(Object *obj, const char *value, Error **errp) | |
1102 | { | |
1103 | AspeedMachineState *bmc = ASPEED_MACHINE(obj); | |
1104 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); | |
1105 | AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(amc->soc_name)); | |
1106 | int val; | |
1107 | ||
1108 | if (sscanf(value, "uart%u", &val) != 1) { | |
1109 | error_setg(errp, "Bad value for \"uart\" property"); | |
1110 | return; | |
1111 | } | |
1112 | ||
1113 | /* The number of UART depends on the SoC */ | |
1114 | if (val < 1 || val > sc->uarts_num) { | |
1115 | error_setg(errp, "\"uart\" should be in range [1 - %d]", sc->uarts_num); | |
1116 | return; | |
1117 | } | |
1118 | bmc->uart_chosen = ASPEED_DEV_UART1 + val - 1; | |
1119 | } | |
1120 | ||
1a15311a CLG |
1121 | static void aspeed_machine_class_props_init(ObjectClass *oc) |
1122 | { | |
1123 | object_class_property_add_bool(oc, "execute-in-place", | |
1124 | aspeed_get_mmio_exec, | |
d2623129 | 1125 | aspeed_set_mmio_exec); |
1a15311a | 1126 | object_class_property_set_description(oc, "execute-in-place", |
7eecec7d | 1127 | "boot directly from CE0 flash device"); |
9820e52f | 1128 | |
f65f6ad5 CLG |
1129 | object_class_property_add_str(oc, "bmc-console", aspeed_get_bmc_console, |
1130 | aspeed_set_bmc_console); | |
1131 | object_class_property_set_description(oc, "bmc-console", | |
1132 | "Change the default UART to \"uartX\""); | |
1133 | ||
9820e52f CLG |
1134 | object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model, |
1135 | aspeed_set_fmc_model); | |
1136 | object_class_property_set_description(oc, "fmc-model", | |
1137 | "Change the FMC Flash model"); | |
1138 | object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model, | |
1139 | aspeed_set_spi_model); | |
1140 | object_class_property_set_description(oc, "spi-model", | |
1141 | "Change the SPI Flash model"); | |
1a15311a CLG |
1142 | } |
1143 | ||
43a0a5c9 | 1144 | static void aspeed_machine_class_init_cpus_defaults(MachineClass *mc) |
b7f1a0cb | 1145 | { |
43a0a5c9 PMD |
1146 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(mc); |
1147 | AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(amc->soc_name)); | |
1148 | ||
1149 | mc->default_cpus = sc->num_cpus; | |
1150 | mc->min_cpus = sc->num_cpus; | |
1151 | mc->max_cpus = sc->num_cpus; | |
b7f1a0cb CLG |
1152 | } |
1153 | ||
fca9ca1b | 1154 | static void aspeed_machine_class_init(ObjectClass *oc, void *data) |
62c2c2eb CLG |
1155 | { |
1156 | MachineClass *mc = MACHINE_CLASS(oc); | |
d3bad7e7 | 1157 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); |
62c2c2eb | 1158 | |
fca9ca1b | 1159 | mc->init = aspeed_machine_init; |
62c2c2eb CLG |
1160 | mc->no_floppy = 1; |
1161 | mc->no_cdrom = 1; | |
1162 | mc->no_parallel = 1; | |
afcbaed6 | 1163 | mc->default_ram_id = "ram"; |
d3bad7e7 | 1164 | amc->macs_mask = ASPEED_MAC0_ON; |
5d63d0c7 | 1165 | amc->uart_default = ASPEED_DEV_UART5; |
1a15311a CLG |
1166 | |
1167 | aspeed_machine_class_props_init(oc); | |
62c2c2eb CLG |
1168 | } |
1169 | ||
baa4732b CLG |
1170 | static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data) |
1171 | { | |
1172 | MachineClass *mc = MACHINE_CLASS(oc); | |
1173 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1174 | ||
1175 | mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; | |
1176 | amc->soc_name = "ast2400-a1"; | |
1177 | amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1; | |
1178 | amc->fmc_model = "n25q256a"; | |
70322913 | 1179 | amc->spi_model = "mx25l25635f"; |
baa4732b CLG |
1180 | amc->num_cs = 1; |
1181 | amc->i2c_init = palmetto_bmc_i2c_init; | |
1182 | mc->default_ram_size = 256 * MiB; | |
43a0a5c9 | 1183 | aspeed_machine_class_init_cpus_defaults(mc); |
baa4732b CLG |
1184 | }; |
1185 | ||
9cccb912 PV |
1186 | static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void *data) |
1187 | { | |
1188 | MachineClass *mc = MACHINE_CLASS(oc); | |
1189 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1190 | ||
1191 | mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)"; | |
1192 | amc->soc_name = "ast2400-a1"; | |
1193 | amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1; | |
1194 | amc->fmc_model = "n25q256a"; | |
1195 | amc->spi_model = "mx25l25635e"; | |
1196 | amc->num_cs = 1; | |
1197 | amc->i2c_init = quanta_q71l_bmc_i2c_init; | |
1198 | mc->default_ram_size = 128 * MiB; | |
43a0a5c9 | 1199 | aspeed_machine_class_init_cpus_defaults(mc); |
9cccb912 PV |
1200 | } |
1201 | ||
40a38df5 ES |
1202 | static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, |
1203 | void *data) | |
1204 | { | |
1205 | MachineClass *mc = MACHINE_CLASS(oc); | |
1206 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1207 | ||
1208 | mc->desc = "Supermicro X11 BMC (ARM926EJ-S)"; | |
1209 | amc->soc_name = "ast2400-a1"; | |
1210 | amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1; | |
1211 | amc->fmc_model = "mx25l25635e"; | |
1212 | amc->spi_model = "mx25l25635e"; | |
1213 | amc->num_cs = 1; | |
1214 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; | |
1215 | amc->i2c_init = palmetto_bmc_i2c_init; | |
1216 | mc->default_ram_size = 256 * MiB; | |
43a0a5c9 | 1217 | aspeed_machine_class_init_cpus_defaults(mc); |
40a38df5 ES |
1218 | } |
1219 | ||
47936597 GR |
1220 | static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, |
1221 | void *data) | |
1222 | { | |
1223 | MachineClass *mc = MACHINE_CLASS(oc); | |
1224 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1225 | ||
1226 | mc->desc = "Supermicro X11 SPI BMC (ARM1176)"; | |
1227 | amc->soc_name = "ast2500-a1"; | |
1228 | amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1; | |
1229 | amc->fmc_model = "mx25l25635e"; | |
1230 | amc->spi_model = "mx25l25635e"; | |
1231 | amc->num_cs = 1; | |
1232 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; | |
1233 | amc->i2c_init = palmetto_bmc_i2c_init; | |
1234 | mc->default_ram_size = 512 * MiB; | |
43a0a5c9 | 1235 | aspeed_machine_class_init_cpus_defaults(mc); |
47936597 GR |
1236 | } |
1237 | ||
baa4732b CLG |
1238 | static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data) |
1239 | { | |
1240 | MachineClass *mc = MACHINE_CLASS(oc); | |
1241 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1242 | ||
1243 | mc->desc = "Aspeed AST2500 EVB (ARM1176)"; | |
1244 | amc->soc_name = "ast2500-a1"; | |
1245 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
753abfc4 | 1246 | amc->fmc_model = "mx25l25635e"; |
70322913 | 1247 | amc->spi_model = "mx25l25635f"; |
baa4732b CLG |
1248 | amc->num_cs = 1; |
1249 | amc->i2c_init = ast2500_evb_i2c_init; | |
1250 | mc->default_ram_size = 512 * MiB; | |
43a0a5c9 | 1251 | aspeed_machine_class_init_cpus_defaults(mc); |
baa4732b CLG |
1252 | }; |
1253 | ||
34f73a81 KP |
1254 | static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, void *data) |
1255 | { | |
1256 | MachineClass *mc = MACHINE_CLASS(oc); | |
1257 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1258 | ||
1259 | mc->desc = "Facebook YosemiteV2 BMC (ARM1176)"; | |
1260 | amc->soc_name = "ast2500-a1"; | |
1261 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
1262 | amc->hw_strap2 = 0; | |
1263 | amc->fmc_model = "n25q256a"; | |
1264 | amc->spi_model = "mx25l25635e"; | |
1265 | amc->num_cs = 2; | |
1266 | amc->i2c_init = yosemitev2_bmc_i2c_init; | |
1267 | mc->default_ram_size = 512 * MiB; | |
43a0a5c9 | 1268 | aspeed_machine_class_init_cpus_defaults(mc); |
34f73a81 KP |
1269 | }; |
1270 | ||
baa4732b CLG |
1271 | static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) |
1272 | { | |
1273 | MachineClass *mc = MACHINE_CLASS(oc); | |
1274 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1275 | ||
1276 | mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; | |
1277 | amc->soc_name = "ast2500-a1"; | |
1278 | amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1; | |
1279 | amc->fmc_model = "n25q256a"; | |
1280 | amc->spi_model = "mx66l1g45g"; | |
1281 | amc->num_cs = 2; | |
1282 | amc->i2c_init = romulus_bmc_i2c_init; | |
1283 | mc->default_ram_size = 512 * MiB; | |
43a0a5c9 | 1284 | aspeed_machine_class_init_cpus_defaults(mc); |
fca9ca1b CLG |
1285 | }; |
1286 | ||
6c323aba KP |
1287 | static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, void *data) |
1288 | { | |
1289 | MachineClass *mc = MACHINE_CLASS(oc); | |
1290 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1291 | ||
1292 | mc->desc = "Facebook Tiogapass BMC (ARM1176)"; | |
1293 | amc->soc_name = "ast2500-a1"; | |
1294 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
1295 | amc->hw_strap2 = 0; | |
1296 | amc->fmc_model = "n25q256a"; | |
1297 | amc->spi_model = "mx25l25635e"; | |
1298 | amc->num_cs = 2; | |
1299 | amc->i2c_init = tiogapass_bmc_i2c_init; | |
1300 | mc->default_ram_size = 1 * GiB; | |
43a0a5c9 | 1301 | aspeed_machine_class_init_cpus_defaults(mc); |
6c323aba KP |
1302 | }; |
1303 | ||
143b040f PW |
1304 | static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data) |
1305 | { | |
1306 | MachineClass *mc = MACHINE_CLASS(oc); | |
1307 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1308 | ||
1309 | mc->desc = "OCP SonoraPass BMC (ARM1176)"; | |
1310 | amc->soc_name = "ast2500-a1"; | |
1311 | amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1; | |
1312 | amc->fmc_model = "mx66l1g45g"; | |
1313 | amc->spi_model = "mx66l1g45g"; | |
1314 | amc->num_cs = 2; | |
1315 | amc->i2c_init = sonorapass_bmc_i2c_init; | |
1316 | mc->default_ram_size = 512 * MiB; | |
43a0a5c9 | 1317 | aspeed_machine_class_init_cpus_defaults(mc); |
143b040f PW |
1318 | }; |
1319 | ||
baa4732b CLG |
1320 | static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data) |
1321 | { | |
1322 | MachineClass *mc = MACHINE_CLASS(oc); | |
1323 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1324 | ||
1325 | mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)"; | |
1326 | amc->soc_name = "ast2500-a1"; | |
1327 | amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1; | |
70322913 | 1328 | amc->fmc_model = "mx25l25635f"; |
baa4732b CLG |
1329 | amc->spi_model = "mx66l1g45g"; |
1330 | amc->num_cs = 2; | |
1331 | amc->i2c_init = witherspoon_bmc_i2c_init; | |
1332 | mc->default_ram_size = 512 * MiB; | |
43a0a5c9 | 1333 | aspeed_machine_class_init_cpus_defaults(mc); |
baa4732b CLG |
1334 | }; |
1335 | ||
1336 | static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data) | |
1337 | { | |
1338 | MachineClass *mc = MACHINE_CLASS(oc); | |
1339 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1340 | ||
f548f201 | 1341 | mc->desc = "Aspeed AST2600 EVB (Cortex-A7)"; |
c5811bb3 | 1342 | amc->soc_name = "ast2600-a3"; |
baa4732b CLG |
1343 | amc->hw_strap1 = AST2600_EVB_HW_STRAP1; |
1344 | amc->hw_strap2 = AST2600_EVB_HW_STRAP2; | |
753abfc4 | 1345 | amc->fmc_model = "mx66u51235f"; |
baa4732b CLG |
1346 | amc->spi_model = "mx66u51235f"; |
1347 | amc->num_cs = 1; | |
29193286 GR |
1348 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON | |
1349 | ASPEED_MAC3_ON; | |
baa4732b CLG |
1350 | amc->i2c_init = ast2600_evb_i2c_init; |
1351 | mc->default_ram_size = 1 * GiB; | |
43a0a5c9 | 1352 | aspeed_machine_class_init_cpus_defaults(mc); |
baa4732b CLG |
1353 | }; |
1354 | ||
63ceb818 CLG |
1355 | static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data) |
1356 | { | |
1357 | MachineClass *mc = MACHINE_CLASS(oc); | |
1358 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1359 | ||
f548f201 | 1360 | mc->desc = "OpenPOWER Tacoma BMC (Cortex-A7)"; |
c5811bb3 | 1361 | amc->soc_name = "ast2600-a3"; |
63ceb818 CLG |
1362 | amc->hw_strap1 = TACOMA_BMC_HW_STRAP1; |
1363 | amc->hw_strap2 = TACOMA_BMC_HW_STRAP2; | |
1364 | amc->fmc_model = "mx66l1g45g"; | |
1365 | amc->spi_model = "mx66l1g45g"; | |
1366 | amc->num_cs = 2; | |
d3bad7e7 | 1367 | amc->macs_mask = ASPEED_MAC2_ON; |
63ceb818 CLG |
1368 | amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */ |
1369 | mc->default_ram_size = 1 * GiB; | |
43a0a5c9 | 1370 | aspeed_machine_class_init_cpus_defaults(mc); |
63ceb818 CLG |
1371 | }; |
1372 | ||
95f068c8 JW |
1373 | static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data) |
1374 | { | |
1375 | MachineClass *mc = MACHINE_CLASS(oc); | |
1376 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1377 | ||
1378 | mc->desc = "Bytedance G220A BMC (ARM1176)"; | |
1379 | amc->soc_name = "ast2500-a1"; | |
1380 | amc->hw_strap1 = G220A_BMC_HW_STRAP1; | |
1381 | amc->fmc_model = "n25q512a"; | |
1382 | amc->spi_model = "mx25l25635e"; | |
1383 | amc->num_cs = 2; | |
5bb825c8 | 1384 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; |
95f068c8 JW |
1385 | amc->i2c_init = g220a_bmc_i2c_init; |
1386 | mc->default_ram_size = 1024 * MiB; | |
43a0a5c9 | 1387 | aspeed_machine_class_init_cpus_defaults(mc); |
95f068c8 JW |
1388 | }; |
1389 | ||
82b6a3f6 JW |
1390 | static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data) |
1391 | { | |
1392 | MachineClass *mc = MACHINE_CLASS(oc); | |
1393 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1394 | ||
1395 | mc->desc = "Inspur FP5280G2 BMC (ARM1176)"; | |
1396 | amc->soc_name = "ast2500-a1"; | |
1397 | amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1; | |
1398 | amc->fmc_model = "n25q512a"; | |
1399 | amc->spi_model = "mx25l25635e"; | |
1400 | amc->num_cs = 2; | |
1401 | amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; | |
1402 | amc->i2c_init = fp5280g2_bmc_i2c_init; | |
1403 | mc->default_ram_size = 512 * MiB; | |
43a0a5c9 | 1404 | aspeed_machine_class_init_cpus_defaults(mc); |
82b6a3f6 JW |
1405 | }; |
1406 | ||
58e52bdb CLG |
1407 | static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data) |
1408 | { | |
1409 | MachineClass *mc = MACHINE_CLASS(oc); | |
1410 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1411 | ||
f548f201 | 1412 | mc->desc = "IBM Rainier BMC (Cortex-A7)"; |
c5811bb3 | 1413 | amc->soc_name = "ast2600-a3"; |
58e52bdb CLG |
1414 | amc->hw_strap1 = RAINIER_BMC_HW_STRAP1; |
1415 | amc->hw_strap2 = RAINIER_BMC_HW_STRAP2; | |
1416 | amc->fmc_model = "mx66l1g45g"; | |
1417 | amc->spi_model = "mx66l1g45g"; | |
1418 | amc->num_cs = 2; | |
1419 | amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; | |
1420 | amc->i2c_init = rainier_bmc_i2c_init; | |
1421 | mc->default_ram_size = 1 * GiB; | |
43a0a5c9 | 1422 | aspeed_machine_class_init_cpus_defaults(mc); |
58e52bdb CLG |
1423 | }; |
1424 | ||
1e2c22c9 | 1425 | #define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) |
febbe308 PD |
1426 | |
1427 | static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data) | |
1428 | { | |
1429 | MachineClass *mc = MACHINE_CLASS(oc); | |
1430 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1431 | ||
1432 | mc->desc = "Facebook Fuji BMC (Cortex-A7)"; | |
1433 | amc->soc_name = "ast2600-a3"; | |
1434 | amc->hw_strap1 = FUJI_BMC_HW_STRAP1; | |
1435 | amc->hw_strap2 = FUJI_BMC_HW_STRAP2; | |
1436 | amc->fmc_model = "mx66l1g45g"; | |
1437 | amc->spi_model = "mx66l1g45g"; | |
1438 | amc->num_cs = 2; | |
1439 | amc->macs_mask = ASPEED_MAC3_ON; | |
1440 | amc->i2c_init = fuji_bmc_i2c_init; | |
1441 | amc->uart_default = ASPEED_DEV_UART1; | |
1442 | mc->default_ram_size = FUJI_BMC_RAM_SIZE; | |
43a0a5c9 | 1443 | aspeed_machine_class_init_cpus_defaults(mc); |
febbe308 PD |
1444 | }; |
1445 | ||
1e2c22c9 | 1446 | #define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) |
104bdaff | 1447 | |
a20c54b1 PW |
1448 | static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data) |
1449 | { | |
1450 | MachineClass *mc = MACHINE_CLASS(oc); | |
1451 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1452 | ||
1453 | mc->desc = "Facebook Bletchley BMC (Cortex-A7)"; | |
1454 | amc->soc_name = "ast2600-a3"; | |
1455 | amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1; | |
1456 | amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2; | |
1457 | amc->fmc_model = "w25q01jvq"; | |
1458 | amc->spi_model = NULL; | |
1459 | amc->num_cs = 2; | |
1460 | amc->macs_mask = ASPEED_MAC2_ON; | |
1461 | amc->i2c_init = bletchley_bmc_i2c_init; | |
104bdaff | 1462 | mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE; |
43a0a5c9 | 1463 | aspeed_machine_class_init_cpus_defaults(mc); |
a20c54b1 PW |
1464 | } |
1465 | ||
7966d70f | 1466 | static void fby35_reset(MachineState *state, ShutdownCause reason) |
fa699e80 PD |
1467 | { |
1468 | AspeedMachineState *bmc = ASPEED_MACHINE(state); | |
3c392e87 | 1469 | AspeedGPIOState *gpio = &bmc->soc->gpio; |
fa699e80 | 1470 | |
7966d70f | 1471 | qemu_devices_reset(reason); |
fa699e80 | 1472 | |
f0418558 | 1473 | /* Board ID: 7 (Class-1, 4 slots) */ |
fa699e80 PD |
1474 | object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal); |
1475 | object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal); | |
1476 | object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal); | |
1477 | object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal); | |
f0418558 PD |
1478 | |
1479 | /* Slot presence pins, inverse polarity. (False means present) */ | |
1480 | object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal); | |
1481 | object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal); | |
1482 | object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal); | |
1483 | object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal); | |
1484 | ||
1485 | /* Slot 12v power pins, normal polarity. (True means powered-on) */ | |
1486 | object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal); | |
1487 | object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal); | |
1488 | object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal); | |
1489 | object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal); | |
fa699e80 PD |
1490 | } |
1491 | ||
1492 | static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data) | |
1493 | { | |
1494 | MachineClass *mc = MACHINE_CLASS(oc); | |
1495 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1496 | ||
1497 | mc->desc = "Facebook fby35 BMC (Cortex-A7)"; | |
1498 | mc->reset = fby35_reset; | |
1499 | amc->fmc_model = "mx66l1g45g"; | |
1500 | amc->num_cs = 2; | |
1501 | amc->macs_mask = ASPEED_MAC3_ON; | |
1502 | amc->i2c_init = fby35_i2c_init; | |
1503 | /* FIXME: Replace this macro with something more general */ | |
1504 | mc->default_ram_size = FUJI_BMC_RAM_SIZE; | |
43a0a5c9 | 1505 | aspeed_machine_class_init_cpus_defaults(mc); |
fa699e80 PD |
1506 | } |
1507 | ||
66c895b8 JL |
1508 | #define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024) |
1509 | /* Main SYSCLK frequency in Hz (200MHz) */ | |
1510 | #define SYSCLK_FRQ 200000000ULL | |
1511 | ||
1512 | static void aspeed_minibmc_machine_init(MachineState *machine) | |
1513 | { | |
1514 | AspeedMachineState *bmc = ASPEED_MACHINE(machine); | |
1515 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); | |
1516 | Clock *sysclk; | |
1517 | ||
1518 | sysclk = clock_new(OBJECT(machine), "SYSCLK"); | |
1519 | clock_set_hz(sysclk, SYSCLK_FRQ); | |
1520 | ||
3c392e87 PMD |
1521 | bmc->soc = ASPEED_SOC(object_new(amc->soc_name)); |
1522 | object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc)); | |
1523 | object_unref(OBJECT(bmc->soc)); | |
1524 | qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk); | |
66c895b8 | 1525 | |
3c392e87 | 1526 | object_property_set_link(OBJECT(bmc->soc), "memory", |
4dd9d554 | 1527 | OBJECT(get_system_memory()), &error_abort); |
d2b3eaef | 1528 | connect_serial_hds_to_uarts(bmc); |
3c392e87 | 1529 | qdev_realize(DEVICE(bmc->soc), NULL, &error_abort); |
66c895b8 | 1530 | |
3c392e87 | 1531 | aspeed_board_init_flashes(&bmc->soc->fmc, |
66c895b8 JL |
1532 | bmc->fmc_model ? bmc->fmc_model : amc->fmc_model, |
1533 | amc->num_cs, | |
1534 | 0); | |
1535 | ||
3c392e87 | 1536 | aspeed_board_init_flashes(&bmc->soc->spi[0], |
66c895b8 JL |
1537 | bmc->spi_model ? bmc->spi_model : amc->spi_model, |
1538 | amc->num_cs, amc->num_cs); | |
1539 | ||
3c392e87 | 1540 | aspeed_board_init_flashes(&bmc->soc->spi[1], |
66c895b8 JL |
1541 | bmc->spi_model ? bmc->spi_model : amc->spi_model, |
1542 | amc->num_cs, (amc->num_cs * 2)); | |
1543 | ||
1544 | if (amc->i2c_init) { | |
1545 | amc->i2c_init(bmc); | |
1546 | } | |
1547 | ||
1548 | armv7m_load_kernel(ARM_CPU(first_cpu), | |
1549 | machine->kernel_filename, | |
761c532a | 1550 | 0, |
66c895b8 JL |
1551 | AST1030_INTERNAL_FLASH_SIZE); |
1552 | } | |
1553 | ||
4c70ab16 TL |
1554 | static void ast1030_evb_i2c_init(AspeedMachineState *bmc) |
1555 | { | |
3c392e87 | 1556 | AspeedSoCState *soc = bmc->soc; |
4c70ab16 | 1557 | |
673d8215 | 1558 | /* U10 24C08 connects to SDA/SCL Group 1 by default */ |
4c70ab16 TL |
1559 | uint8_t *eeprom_buf = g_malloc0(32 * 1024); |
1560 | smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf); | |
1561 | ||
1562 | /* U11 LM75 connects to SDA/SCL Group 2 by default */ | |
1563 | i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d); | |
1564 | } | |
1565 | ||
66c895b8 JL |
1566 | static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc, |
1567 | void *data) | |
1568 | { | |
1569 | MachineClass *mc = MACHINE_CLASS(oc); | |
1570 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1571 | ||
1572 | mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)"; | |
1573 | amc->soc_name = "ast1030-a1"; | |
1574 | amc->hw_strap1 = 0; | |
1575 | amc->hw_strap2 = 0; | |
1576 | mc->init = aspeed_minibmc_machine_init; | |
4c70ab16 | 1577 | amc->i2c_init = ast1030_evb_i2c_init; |
66c895b8 | 1578 | mc->default_ram_size = 0; |
66c895b8 JL |
1579 | amc->fmc_model = "sst25vf032b"; |
1580 | amc->spi_model = "sst25vf032b"; | |
1581 | amc->num_cs = 2; | |
1582 | amc->macs_mask = 0; | |
43a0a5c9 | 1583 | aspeed_machine_class_init_cpus_defaults(mc); |
66c895b8 JL |
1584 | } |
1585 | ||
fb6b3c8d JHY |
1586 | static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, |
1587 | void *data) | |
1588 | { | |
1589 | MachineClass *mc = MACHINE_CLASS(oc); | |
1590 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1591 | ||
1592 | mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)"; | |
1593 | amc->soc_name = "ast2600-a3"; | |
1594 | amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; | |
1595 | amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; | |
1596 | amc->fmc_model = "n25q512a"; | |
1597 | amc->spi_model = "n25q512a"; | |
1598 | amc->num_cs = 2; | |
1599 | amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; | |
1600 | amc->i2c_init = qcom_dc_scm_bmc_i2c_init; | |
1601 | mc->default_ram_size = 1 * GiB; | |
43a0a5c9 | 1602 | aspeed_machine_class_init_cpus_defaults(mc); |
fb6b3c8d JHY |
1603 | }; |
1604 | ||
ece4cccd GG |
1605 | static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc, |
1606 | void *data) | |
1607 | { | |
1608 | MachineClass *mc = MACHINE_CLASS(oc); | |
1609 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
1610 | ||
1611 | mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)"; | |
1612 | amc->soc_name = "ast2600-a3"; | |
1613 | amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; | |
1614 | amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; | |
1615 | amc->fmc_model = "n25q512a"; | |
1616 | amc->spi_model = "n25q512a"; | |
1617 | amc->num_cs = 2; | |
1618 | amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; | |
1619 | amc->i2c_init = qcom_dc_scm_firework_i2c_init; | |
1620 | mc->default_ram_size = 1 * GiB; | |
43a0a5c9 | 1621 | aspeed_machine_class_init_cpus_defaults(mc); |
ece4cccd GG |
1622 | }; |
1623 | ||
baa4732b | 1624 | static const TypeInfo aspeed_machine_types[] = { |
fca9ca1b | 1625 | { |
baa4732b CLG |
1626 | .name = MACHINE_TYPE_NAME("palmetto-bmc"), |
1627 | .parent = TYPE_ASPEED_MACHINE, | |
1628 | .class_init = aspeed_machine_palmetto_class_init, | |
40a38df5 ES |
1629 | }, { |
1630 | .name = MACHINE_TYPE_NAME("supermicrox11-bmc"), | |
1631 | .parent = TYPE_ASPEED_MACHINE, | |
1632 | .class_init = aspeed_machine_supermicrox11_bmc_class_init, | |
47936597 GR |
1633 | }, { |
1634 | .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"), | |
1635 | .parent = TYPE_ASPEED_MACHINE, | |
1636 | .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init, | |
fca9ca1b | 1637 | }, { |
baa4732b CLG |
1638 | .name = MACHINE_TYPE_NAME("ast2500-evb"), |
1639 | .parent = TYPE_ASPEED_MACHINE, | |
1640 | .class_init = aspeed_machine_ast2500_evb_class_init, | |
fca9ca1b | 1641 | }, { |
baa4732b CLG |
1642 | .name = MACHINE_TYPE_NAME("romulus-bmc"), |
1643 | .parent = TYPE_ASPEED_MACHINE, | |
1644 | .class_init = aspeed_machine_romulus_class_init, | |
143b040f PW |
1645 | }, { |
1646 | .name = MACHINE_TYPE_NAME("sonorapass-bmc"), | |
1647 | .parent = TYPE_ASPEED_MACHINE, | |
1648 | .class_init = aspeed_machine_sonorapass_class_init, | |
fca9ca1b | 1649 | }, { |
baa4732b CLG |
1650 | .name = MACHINE_TYPE_NAME("witherspoon-bmc"), |
1651 | .parent = TYPE_ASPEED_MACHINE, | |
1652 | .class_init = aspeed_machine_witherspoon_class_init, | |
ccc2c418 | 1653 | }, { |
baa4732b CLG |
1654 | .name = MACHINE_TYPE_NAME("ast2600-evb"), |
1655 | .parent = TYPE_ASPEED_MACHINE, | |
1656 | .class_init = aspeed_machine_ast2600_evb_class_init, | |
34f73a81 KP |
1657 | }, { |
1658 | .name = MACHINE_TYPE_NAME("yosemitev2-bmc"), | |
1659 | .parent = TYPE_ASPEED_MACHINE, | |
1660 | .class_init = aspeed_machine_yosemitev2_class_init, | |
63ceb818 CLG |
1661 | }, { |
1662 | .name = MACHINE_TYPE_NAME("tacoma-bmc"), | |
1663 | .parent = TYPE_ASPEED_MACHINE, | |
1664 | .class_init = aspeed_machine_tacoma_class_init, | |
6c323aba KP |
1665 | }, { |
1666 | .name = MACHINE_TYPE_NAME("tiogapass-bmc"), | |
1667 | .parent = TYPE_ASPEED_MACHINE, | |
1668 | .class_init = aspeed_machine_tiogapass_class_init, | |
95f068c8 JW |
1669 | }, { |
1670 | .name = MACHINE_TYPE_NAME("g220a-bmc"), | |
1671 | .parent = TYPE_ASPEED_MACHINE, | |
1672 | .class_init = aspeed_machine_g220a_class_init, | |
fb6b3c8d JHY |
1673 | }, { |
1674 | .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"), | |
1675 | .parent = TYPE_ASPEED_MACHINE, | |
1676 | .class_init = aspeed_machine_qcom_dc_scm_v1_class_init, | |
ece4cccd GG |
1677 | }, { |
1678 | .name = MACHINE_TYPE_NAME("qcom-firework-bmc"), | |
1679 | .parent = TYPE_ASPEED_MACHINE, | |
1680 | .class_init = aspeed_machine_qcom_firework_class_init, | |
82b6a3f6 JW |
1681 | }, { |
1682 | .name = MACHINE_TYPE_NAME("fp5280g2-bmc"), | |
1683 | .parent = TYPE_ASPEED_MACHINE, | |
1684 | .class_init = aspeed_machine_fp5280g2_class_init, | |
9cccb912 PV |
1685 | }, { |
1686 | .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"), | |
1687 | .parent = TYPE_ASPEED_MACHINE, | |
1688 | .class_init = aspeed_machine_quanta_q71l_class_init, | |
58e52bdb CLG |
1689 | }, { |
1690 | .name = MACHINE_TYPE_NAME("rainier-bmc"), | |
1691 | .parent = TYPE_ASPEED_MACHINE, | |
1692 | .class_init = aspeed_machine_rainier_class_init, | |
febbe308 PD |
1693 | }, { |
1694 | .name = MACHINE_TYPE_NAME("fuji-bmc"), | |
1695 | .parent = TYPE_ASPEED_MACHINE, | |
1696 | .class_init = aspeed_machine_fuji_class_init, | |
a20c54b1 PW |
1697 | }, { |
1698 | .name = MACHINE_TYPE_NAME("bletchley-bmc"), | |
1699 | .parent = TYPE_ASPEED_MACHINE, | |
1700 | .class_init = aspeed_machine_bletchley_class_init, | |
fa699e80 PD |
1701 | }, { |
1702 | .name = MACHINE_TYPE_NAME("fby35-bmc"), | |
1703 | .parent = MACHINE_TYPE_NAME("ast2600-evb"), | |
1704 | .class_init = aspeed_machine_fby35_class_init, | |
66c895b8 JL |
1705 | }, { |
1706 | .name = MACHINE_TYPE_NAME("ast1030-evb"), | |
1707 | .parent = TYPE_ASPEED_MACHINE, | |
1708 | .class_init = aspeed_minibmc_machine_ast1030_evb_class_init, | |
baa4732b CLG |
1709 | }, { |
1710 | .name = TYPE_ASPEED_MACHINE, | |
1711 | .parent = TYPE_MACHINE, | |
888b2b03 | 1712 | .instance_size = sizeof(AspeedMachineState), |
1a15311a | 1713 | .instance_init = aspeed_machine_instance_init, |
baa4732b CLG |
1714 | .class_size = sizeof(AspeedMachineClass), |
1715 | .class_init = aspeed_machine_class_init, | |
1716 | .abstract = true, | |
fca9ca1b | 1717 | } |
baa4732b | 1718 | }; |
74fb1f38 | 1719 | |
baa4732b | 1720 | DEFINE_TYPES(aspeed_machine_types) |