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2 years agoOvmfPkg/XenAcpiPlatformDxe: create from AcpiPlatformDxe
Laszlo Ersek [Wed, 26 May 2021 20:14:14 +0000 (22:14 +0200)]
OvmfPkg/XenAcpiPlatformDxe: create from AcpiPlatformDxe

Create an almost verbatim copy of the
"OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf" driver for the OvmfXen
platform. We're going to trim the driver in subsequent patches.
Ultimately, the XenAcpiPlatformDxe driver will duplicate a negligible
amount of code that is currently present in the QemuFwCfgAcpiPlatformDxe
driver.

List the new driver in "Maintainers.txt", in the "OvmfPkg: Xen-related
modules" section.

Switch the OvmfXen platform to the new driver at once.

This patch should be reviewed with "git show --find-copies-harder".

Cc: Andrew Fish <afish@apple.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Julien Grall <julien@xen.org>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-12-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2 years agoOvmfPkg/AcpiPlatformDxe: consolidate #includes and [LibraryClasses]
Laszlo Ersek [Wed, 26 May 2021 20:14:13 +0000 (22:14 +0200)]
OvmfPkg/AcpiPlatformDxe: consolidate #includes and [LibraryClasses]

- #include only such public headers in "AcpiPlatform.h" that are required
  by the function declarations and type definitions introduced in
  "AcpiPlatform.h". Don't use "AcpiPlatform.h" as a convenience #include
  file.

- In every file, list every necessary public #include individually, with
  an example identifier that's actually consumed.

- Remove unnecessary lib classes, add unlisted lib classes.

- Remove unnecessary #include directives, add unlisted #include
  directives.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-11-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg/AcpiPlatformDxe: move "QemuLoader.h" to IndustryStandard
Laszlo Ersek [Wed, 26 May 2021 20:14:12 +0000 (22:14 +0200)]
OvmfPkg/AcpiPlatformDxe: move "QemuLoader.h" to IndustryStandard

Turn the "QemuLoader.h" header into a public (IndustryStandard) one. The
QEMU ACPI linker-loader interface is stable between QEMU and multiple
guest firmwares.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-10-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg/AcpiPlatformDxe/QemuLoader.h: remove QemuFwCfgLib class dependency
Laszlo Ersek [Wed, 26 May 2021 20:14:11 +0000 (22:14 +0200)]
OvmfPkg/AcpiPlatformDxe/QemuLoader.h: remove QemuFwCfgLib class dependency

"QemuLoader.h" needs the QEMU_FW_CFG_FNAME_SIZE macro. This macro used to
live in the QemuFwCfgLib class header, but we moved it to the more
foundational IndustryStandard include file called "QemuFwCfg.h" in commit
5583a8a4ffd0 ("OvmfPkg/QemuFwCfgLib: move types/macros from lib class to
IndustryStandard", 2017-02-22).

Replace the lib class dependency with the more basic IndustryStandard
dependency in "QemuLoader.h".

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-9-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg/AcpiPlatformDxe: sort #includes and [LibraryClasses]
Laszlo Ersek [Wed, 26 May 2021 20:14:10 +0000 (22:14 +0200)]
OvmfPkg/AcpiPlatformDxe: sort #includes and [LibraryClasses]

Place all public #includes first, all module-private #includes second.
Separate them with a single empty line. Keep each section sorted in
itself.

Sort all sections in both INF files.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-8-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg/AcpiPlatformDxe: fix header file warts
Laszlo Ersek [Wed, 26 May 2021 20:14:09 +0000 (22:14 +0200)]
OvmfPkg/AcpiPlatformDxe: fix header file warts

- Remove the leading underscores from the #include guard macro names;
  clean up the names in general.

- Remove the useless "Include/" directory prefix from the public header
  pathnames.

- Fix incorrect file-top comment.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-7-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg/README: bump minimum QEMU version to 1.7.1, machine types to 1.7
Laszlo Ersek [Wed, 26 May 2021 20:14:08 +0000 (22:14 +0200)]
OvmfPkg/README: bump minimum QEMU version to 1.7.1, machine types to 1.7

Due to switching to the QemuFwCfgAcpiPlatformDxe driver earlier in this
series, require QEMU version 1.7.1 in the "OvmfPkg/README" file, and
require 1.7 or later machine types too.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-6-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg: switch the AmdSev platform to the fw_cfg-only ACPI platform driver
Laszlo Ersek [Wed, 26 May 2021 20:14:07 +0000 (22:14 +0200)]
OvmfPkg: switch the AmdSev platform to the fw_cfg-only ACPI platform driver

For consistency with the historical OvmfPkg* platforms, switch the
remotely attested, QEMU/KVM-only, AmdSev platform from the AcpiPlatformDxe
driver to the QemuFwCfgAcpiPlatformDxe driver.

No module remains dependent on XenPlatformLib, so remove the
XenPlatformLib class resolution too, from the DSC file.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-5-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg: switch IA32, IA32X64, X64 to the fw_cfg-only ACPI platform driver
Laszlo Ersek [Wed, 26 May 2021 20:14:06 +0000 (22:14 +0200)]
OvmfPkg: switch IA32, IA32X64, X64 to the fw_cfg-only ACPI platform driver

Switch the historical OvmfPkg* platforms from the AcpiPlatformDxe driver
to the QemuFwCfgAcpiPlatformDxe driver. (The latter is used by the
ArmVirtQemu* platforms as well.)

The change effectively replaces the following call tree:

  InstallAcpiTables                [AcpiPlatform.c]

    XenDetected                    [XenPlatformLib] *
    InstallXenTables               [Xen.c]          *
      GetXenAcpiRsdp               [Xen.c]          *

    InstallQemuFwCfgTables         [QemuFwCfgAcpi.c]
      ...

    InstallOvmfFvTables            [AcpiPlatform.c] *
      QemuDetected                 [Qemu.c]         *
      LocateFvInstanceWithTables   [AcpiPlatform.c] *
        QemuInstallAcpiTable       [Qemu.c]         *
          QemuInstallAcpiMadtTable [Qemu.c]         *
            CountBits16            [Qemu.c]         *
          QemuInstallAcpiSsdtTable [Qemu.c]         *
            GetSuspendStates       [Qemu.c]         *
            PopulateFwData         [Qemu.c]         *

with the one below:

  InstallAcpiTables        [QemuFwCfgAcpiPlatform.c]
    InstallQemuFwCfgTables [QemuFwCfgAcpi.c]
      ...

eliminating the sub-trees highlighted with "*".

There are two consequences:

(1) Xen compatibility is removed from the ACPI platform driver of the
   historical OvmfPkg* platforms.

(2) The ACPI tables that are statically built into OVMF (via
    "OvmfPkg/AcpiTables/AcpiTables.inf") are never installed. In
    particular, OVMF's own runtime preparation of the MADT and SSDT is
    eliminated.

Because of (2), remove the "OvmfPkg/AcpiTables/AcpiTables.inf" module as
well -- and then the ACPITABLE build rule too.

Note that (2) only removes effectively dead code; the QEMU ACPI
linker-loader has taken priority since QEMU 1.7.1 (2014). References:

- https://wiki.qemu.org/Planning/1.7
- https://wiki.qemu.org/Features/ACPITableGeneration
- edk2 commit 96bbdbc85693 ("OvmfPkg: AcpiPlatformDxe: download ACPI
                            tables from QEMU", 2014-03-31)
- edk2 commit 387536e472aa ("OvmfPkg: AcpiPlatformDxe: implement QEMU's
                            full ACPI table loader interface", 2014-09-22)

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-4-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg: remove the Xen drivers from the AmdSev platform
Laszlo Ersek [Wed, 26 May 2021 20:14:05 +0000 (22:14 +0200)]
OvmfPkg: remove the Xen drivers from the AmdSev platform

For symmetry with the historical OvmfPkg* platforms, remove the three Xen
drivers from the remotely attested, QEMU/KVM-only, AmdSev platform. Xen
(HVM and PVH) guests are supported by the dedicated OvmfXen platform.

No module remains dependent on XenHypercallLib, so remove the
XenHypercallLib class resolution too, from the DSC file.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-3-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoOvmfPkg: remove the Xen drivers from the IA32, IA32X64, and X64 platforms
Laszlo Ersek [Wed, 26 May 2021 20:14:04 +0000 (22:14 +0200)]
OvmfPkg: remove the Xen drivers from the IA32, IA32X64, and X64 platforms

Remove the three Xen drivers as the first step for removing Xen support
from the historical OvmfPkg* platforms. Xen (HVM and PVH) guests are
supported by the dedicated OvmfXen platform.

No module remains dependent on XenHypercallLib, so remove the
XenHypercallLib class resolutions too, from the DSC files.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-2-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2 years agoBaseTools: Change CLANG8ELF to CLANGDWARF
Ni, Ray [Wed, 2 Jun 2021 08:11:45 +0000 (16:11 +0800)]
BaseTools: Change CLANG8ELF to CLANGDWARF

CLANGDWARF is more proper because it's similar to CLANGPDB that generates
PE images but with DWARF debug symbols.
This toolchain is needed for creating ELF format universal payload that
follows https://universalpayload.github.io/documentation/.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoBaseTools: Update ClangBase.lds to keep dynamic section
Ni, Ray [Wed, 2 Jun 2021 08:11:44 +0000 (16:11 +0800)]
BaseTools: Update ClangBase.lds to keep dynamic section

The .dynamic section is needed for ELF runtime relocation.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoBaseTools: Add new CLANG8ELF tool chain for new LLVM/CLANG8
Liming Gao [Wed, 2 Jun 2021 08:11:43 +0000 (16:11 +0800)]
BaseTools: Add new CLANG8ELF tool chain for new LLVM/CLANG8

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1603
LLVM/CLANG8 formal release http://releases.llvm.org/download.html#8.0.0
It can be downloaded and installed in Windows/Linux/Mac OS.
CLANG8ELF tool chain is added to generate ELF image, and convert to PE/COFF.
On Windows OS, set CLANG_HOST_BIN=n, set CLANG8_BIN=LLVM installed directory
For example:
  set CLANG_HOST_BIN=n # use windows nmake
  set CLANG8_BIN=C:\Program Files\LLVM\bin\
On Linux/Mac, set CLANG8_BIN=LLVM installed directory

This tool chain can be used to compile the firmware code. On windows OS,
Visual Studio is still required to compile BaseTools C tools and nmake.exe.
On Linux/Mac OS, gcc is used to compile BaseTools C tools. make is used
for makefile.

This tool chain is verified on OVMF Ia32, X64 and Ia32X64 to boot Shell.
This tool chain is verified in Windows/Linux and Mac OS.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
2 years agoBaseTools: Update build_rule to skip CLANG resource section generation
Liming Gao [Wed, 2 Jun 2021 08:11:42 +0000 (16:11 +0800)]
BaseTools: Update build_rule to skip CLANG resource section generation

LLVM/CLANG doesn't support resource section generation when ELF image generated.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
2 years agoBaseTools GenFw: Support CLANG8ELF with conversion ELF to PE/COFF image
Liming Gao [Wed, 2 Jun 2021 08:11:41 +0000 (16:11 +0800)]
BaseTools GenFw: Support CLANG8ELF with conversion ELF to PE/COFF image

CLANG8ELF tool chain generated ELF image with the different attributes
in section. Update GenFw to handle them.
1. .text section with writable attribute (support)
2. .reloc section has the symbol for *ABS* (skip)

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
2 years agoBaseTools: Add ClangBase.lds for CLANG8 tool chain with max-page-size
Liming Gao [Wed, 2 Jun 2021 08:11:40 +0000 (16:11 +0800)]
BaseTools: Add ClangBase.lds for CLANG8 tool chain with max-page-size

LLVM LLD linker doesn't support common-page-size option. So, max-page-size
is used. To not impact GCC tool chain, new ClangBase.lds is added.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Feng Bob C <bob.c.feng@intel.com>
2 years agoMdePkg/BaseLib: Fix AsmReadSs() with GCC toolchain
Satoshi Tanda [Mon, 24 May 2021 04:50:18 +0000 (12:50 +0800)]
MdePkg/BaseLib: Fix AsmReadSs() with GCC toolchain

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3405

AsmReadSs() in Ia32/GccInlinePriv.c and X64/GccInlinePriv.c return the
DS segment selector value instead of SS.

Signed-off-by: Satoshi Tanda <tanda.sat@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg/VirtioMmioDeviceLib: Add EFIAPI to VirtioMmioSetQueueAddress
Gerd Hoffmann [Wed, 2 Jun 2021 04:59:35 +0000 (06:59 +0200)]
OvmfPkg/VirtioMmioDeviceLib: Add EFIAPI to VirtioMmioSetQueueAddress

This error was found while compiling VirtioMmioDeviceLib for X64
with the GCC5 toolchain, where EFIAPI makes a difference.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20210602045935.762211-1-kraxel@redhat.com>
[lersek@redhat.com: prepend module name to subject, trim subject back to
 allowed length]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoDynamicTablesPkg: Use AML_NAME_SEG_SIZE define
Pierre Gondois [Tue, 1 Jun 2021 22:04:50 +0000 (23:04 +0100)]
DynamicTablesPkg: Use AML_NAME_SEG_SIZE define

Use the newly introduced defined value in:
MdePkg/Include/IndustryStandard/AcpiAml.h

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2 years agoMdePkg/MdeModulePkg: Move AML_NAME_SEG_SIZE definition
Pierre Gondois [Tue, 1 Jun 2021 22:04:49 +0000 (23:04 +0100)]
MdePkg/MdeModulePkg: Move AML_NAME_SEG_SIZE definition

A NameSeg is made 4 chars.
Cf. ACPI 6.4 s20.2.2 "Name Objects Encoding":
NameSeg := <leadnamechar namechar namechar namechar>
Notice that NameSegs shorter than 4 characters are filled
with trailing underscores (‘_’s).

AML_NAME_SEG_SIZE is currently defined in:
- DynamicTablesPkg/Library/Common/AmlLib/AmlDefines.h
- MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiSdt.h
Since the value can be inferred from the ACPI specification
and to avoid multiple definitions, move it to
MdePkg/Include/IndustryStandard/

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2 years agoMdeModulePkg/Xhci: Fix TRT when data length is 0
Wenyi Xie [Thu, 27 May 2021 12:04:26 +0000 (20:04 +0800)]
MdeModulePkg/Xhci: Fix TRT when data length is 0

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3418

According to xhci spec, at USB packet level, a Control Transfer
consists of multiple transactions partitioned into stages: a
setup stage, an optional data stage, and a terminating status
stage. If Data Stage does not exist, the Transfer Type flag(TRT)
should be No Data Stage.
So if data length equals to 0, TRT is set to 0.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2 years agoEmbeddedPkg/RealTimeClockRuntimeDxe: Improve GetWakeupTime
Marcin Wojtas [Mon, 24 May 2021 03:54:41 +0000 (05:54 +0200)]
EmbeddedPkg/RealTimeClockRuntimeDxe: Improve GetWakeupTime

GetWakeupTime should return full time information, including
the daylight/timezone. Make use of the existing non-volatile
variables for that purpose. Moreover add an error checking
of possibly invalid parameters.
This partially fixes FWTS and SCT Set/GetWakeupTime tests on
Marvell platforms.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2 years agoMdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype
Ashish Singhal [Tue, 18 May 2021 18:37:39 +0000 (02:37 +0800)]
MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype

Add macros for NVIDIA 16550 UART specific debug port subtype in both
DBG2 as well as SPCR header file.

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sunny Wang <sunny.wang@arm.com>
2 years agoMdePkg: Add new 16550-compatible Serial Port Subtypes to DBG2
Marcin Wojtas [Sun, 23 May 2021 09:15:12 +0000 (17:15 +0800)]
MdePkg: Add new 16550-compatible Serial Port Subtypes to DBG2

The Microsoft Debug Port Table 2 (DBG2) specification revision
May 31, 2017 adds support for 16550-compatible Serial Port
Subtype with parameters defined in Generic Address Structure (GAS) [1]

Reflect that in the EDK2 headers.

[1] https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sunny Wang <sunny.wang@arm.com>
2 years agoMdePkg: MmControl: Fix function and structure definition mismatches
Kun Qin [Thu, 27 May 2021 08:17:23 +0000 (16:17 +0800)]
MdePkg: MmControl: Fix function and structure definition mismatches

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3397

Current Ppi/MmControl.h file has structure definition of "struct
_PEI_MM_CONTROL_PPI". This name mismatches with its definition in PI
Specification v1.7 (Errata) as "struct _EFI_PEI_MM_CONTROL_PPI".

In addition, field types "PEI_MM_ACTIVATE" and "PEI_MM_DEACTIVATE" used
in "struct _PEI_MM_CONTROL_PPI" mismatches with the definition of
"EFI_PEI_MM_ACTIVATE" and "EFI_PEI_MM_DEACTIVATE" in the PI spec.

This change fixes these mismatches by using the PI spec defined names.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Fixes: 6f33f7a262314af35e2b99c849e08928ea49aa55
Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoIntelFsp2WrapperPkg: Remove microcode related PCDs
Lou, Yun [Thu, 15 Apr 2021 06:48:47 +0000 (14:48 +0800)]
IntelFsp2WrapperPkg: Remove microcode related PCDs

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3334

IntelFsp2WrapperPkg defines following PCDs:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize
  PcdFlashMicrocodeOffset

But the PCD name caused confusion because UefiCpuPkg defines:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize

PcdCpuMicrocodePatchAddress in IntelFsp2WrapperPkg means the base
address of the FV that holds the microcode.
PcdCpuMicrocodePatchAddress in UefiCpuPkg means the address of the
microcode.

The relationship between the PCDs is:
IntelFsp2WrapperPkg.PcdCpuMicrocodePatchAddress
 +  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchAddress

IntelFsp2WrapperPkg.PcdCpuMicrocodePatchRegionSize
 -  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchRegionSize

To avoid confusion and actually the PCDs in IntelFsp2WrapperPkg
are only used by a sample FSP-T wrapper, this patch removes
the 3 PCDs defined in IntelFsp2WrapperPkg.

The FSP-T wrapper is updated to directly use the ones in UefiCpuPkg.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2 years agoOvmfPkg/BaseMemEncryptSevLib: remove Flush parameter
Brijesh Singh [Wed, 19 May 2021 18:19:49 +0000 (13:19 -0500)]
OvmfPkg/BaseMemEncryptSevLib: remove Flush parameter

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The Flush parameter is used to provide a hint whether the specified range
is Mmio address. Now that we have a dedicated helper to clear the
memory encryption mask for the Mmio address range, its safe to remove the
Flush parameter from MemEncryptSev{Set,Clear}PageEncMask().

Since the address specified in the MemEncryptSev{Set,Clear}PageEncMask()
points to a system RAM, thus a cache flush is required during the
encryption mask update.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-14-brijesh.singh@amd.com>

2 years agoOvmfPkg/TpmMmioSevDecryptPei: use MemEncryptSevClearMmioPageEncMask()
Brijesh Singh [Wed, 19 May 2021 18:19:48 +0000 (13:19 -0500)]
OvmfPkg/TpmMmioSevDecryptPei: use MemEncryptSevClearMmioPageEncMask()

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Use the MemEncryptSevClearMmioPageEncMask() to clear memory encryption mask
for the Mmio address range.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-13-brijesh.singh@amd.com>

2 years agoOvmfPkg/QemuFlashFvbServicesRuntimeDxe: use Mmio helper to clear enc mask
Brijesh Singh [Wed, 19 May 2021 18:19:47 +0000 (13:19 -0500)]
OvmfPkg/QemuFlashFvbServicesRuntimeDxe: use Mmio helper to clear enc mask

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Use the MemEncryptSevClearMmioPageEncMask() to clear memory encryption mask
for the Mmio address range.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-12-brijesh.singh@amd.com>

2 years agoOvmfPkg/AmdSevDxe: use MemEncryptSevClearMmioPageEncMask() to clear EncMask
Brijesh Singh [Wed, 19 May 2021 18:19:46 +0000 (13:19 -0500)]
OvmfPkg/AmdSevDxe: use MemEncryptSevClearMmioPageEncMask() to clear EncMask

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Use the MemEncryptSevClearMmioPageEncMask() to clear memory encryption mask
for the Mmio and NonExistent address range.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-11-brijesh.singh@amd.com>

2 years agoOvmfPkg/BaseMemEncryptSevLib: introduce MemEncryptSevClearMmioPageEncMask()
Brijesh Singh [Wed, 19 May 2021 18:19:45 +0000 (13:19 -0500)]
OvmfPkg/BaseMemEncryptSevLib: introduce MemEncryptSevClearMmioPageEncMask()

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The MemEncryptSevClearMmioPageEncMask() helper can be used for clearing
the memory encryption mask for the Mmio region.

The MemEncryptSevClearMmioPageEncMask() is a simplified version of
MemEncryptSevClearPageEncMask() -- it does not flush the caches after
clearing the page encryption mask.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-10-brijesh.singh@amd.com>

2 years agoMdePkg/BaseLib: add support for RMPADJUST instruction
Tom Lendacky [Wed, 19 May 2021 18:19:44 +0000 (13:19 -0500)]
MdePkg/BaseLib: add support for RMPADJUST instruction

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The RMPADJUST instruction will be used by the SEV-SNP guest to modify the
RMP permissions for a guest page. See AMD APM volume 3 for further
details.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-9-brijesh.singh@amd.com>

2 years agoMdePkg/BaseLib: add support for PVALIDATE instruction
Brijesh Singh [Wed, 19 May 2021 18:19:43 +0000 (13:19 -0500)]
MdePkg/BaseLib: add support for PVALIDATE instruction

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The PVALIDATE instruction validates or rescinds validation of a guest
page RMP entry. Upon completion, a return code is stored in EAX, rFLAGS
bits OF, ZF, AF, PF and SF are set based on this return code. If the
instruction completed succesfully, the rFLAGS bit CF indicates if the
contents of the RMP entry were changed or not.

For more information about the instruction see AMD APM volume 3.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-8-brijesh.singh@amd.com>

2 years agoMdePkg/Register/Amd: define GHCB macros for SNP AP creation
Tom Lendacky [Wed, 19 May 2021 18:19:42 +0000 (13:19 -0500)]
MdePkg/Register/Amd: define GHCB macros for SNP AP creation

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Version 2 of GHCB introduces NAE for creating AP when SEV-SNP is enabled
in the guest VM. See the GHCB specification, Table 5 "List of Supported
Non-Automatic Events" and sections 4.1.9 and 4.3.2, for further details.

While at it, define the VMSA state save area that is required for creating
the AP. The save area format is defined in AMD APM volume 2, Table B-4
(there is a mistake in the table that defines the size of the reserved
area at offset 0xc8 as a dword, when it is actually a word). The format of
the save area segment registers is further defined in AMD APM volume 2,
sections 10 and 15.5.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-7-brijesh.singh@amd.com>
[lersek@redhat.com: fix typo in BZ reference]

2 years agoMdePkg/Register/Amd: define GHCB macro for the Page State Change
Brijesh Singh [Wed, 19 May 2021 18:19:41 +0000 (13:19 -0500)]
MdePkg/Register/Amd: define GHCB macro for the Page State Change

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The Page State Change NAE exit will be used by the SEV-SNP guest to
request a page state change using the GHCB protocol. See the GHCB
spec section 4.1.6 and 2.3.1 for more detail on the structure
definitions.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Erdem Aktas <erdemaktas@google.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-6-brijesh.singh@amd.com>

2 years agoMdePkg/Register/Amd: define GHCB macro for Register GPA structure
Brijesh Singh [Wed, 19 May 2021 18:19:40 +0000 (13:19 -0500)]
MdePkg/Register/Amd: define GHCB macro for Register GPA structure

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

An SEV-SNP guest is required to perform the GHCB GPA registration. See
the GHCB specification for further details.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Erdem Aktas <erdemaktas@google.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-5-brijesh.singh@amd.com>

2 years agoMdePkg/Register/Amd: define GHCB macros for hypervisor feature detection
Brijesh Singh [Wed, 19 May 2021 18:19:39 +0000 (13:19 -0500)]
MdePkg/Register/Amd: define GHCB macros for hypervisor feature detection

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Version 2 of GHCB introduces advertisement of features that are supported
by the hypervisor. See the GHCB spec section 2.2 for an additional details.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Erdem Aktas <erdemaktas@google.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-4-brijesh.singh@amd.com>

2 years agoMdePkg/Register/Amd: realign macros with more space for future expansion
Brijesh Singh [Wed, 19 May 2021 18:19:38 +0000 (13:19 -0500)]
MdePkg/Register/Amd: realign macros with more space for future expansion

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Version 2 of the GHCB spec introduces several new SNP-specific NAEs.
Unfortunately, the names for those NAEs break the alignment. Add some
white spaces so that the SNP support patches do not break the alignment.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-3-brijesh.singh@amd.com>

2 years agoMdePkg/Register/Amd: expand the SEV MSR to include the SNP definition
Brijesh Singh [Wed, 19 May 2021 18:19:37 +0000 (13:19 -0500)]
MdePkg/Register/Amd: expand the SEV MSR to include the SNP definition

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Define the SEV-SNP MSR bits.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-2-brijesh.singh@amd.com>

2 years agoUefiCpuPkg/MpInitLib: Allocate a separate SEV-ES AP reset stack area
Lendacky, Thomas [Fri, 14 May 2021 20:28:45 +0000 (15:28 -0500)]
UefiCpuPkg/MpInitLib: Allocate a separate SEV-ES AP reset stack area

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3324

The SEV-ES stacks currently share a page with the reset code and data.
Separate the SEV-ES stacks from the reset vector code and data to avoid
possible stack overflows from overwriting the code and/or data.

When SEV-ES is enabled, invoke the GetWakeupBuffer() routine a second time
to allocate a new area, below the reset vector and data.

Both the PEI and DXE versions of GetWakeupBuffer() are changed so that
when PcdSevEsIsEnabled is true, they will track the previous reset buffer
allocation in order to ensure that the new buffer allocation is below the
previous allocation. When PcdSevEsIsEnabled is false, the original logic
is followed.

Fixes: 7b7508ad784d16a5208c8d12dff43aef6df0835b
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Marvin Häuser <mhaeuser@posteo.de>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <3cae2ac836884b131725866264e0a0e1897052de.1621024125.git.thomas.lendacky@amd.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2 years agoMaintainers.txt: add Sami Mujawar as top-level ArmVirtPkg reviewer
Laszlo Ersek [Fri, 14 May 2021 11:48:57 +0000 (13:48 +0200)]
Maintainers.txt: add Sami Mujawar as top-level ArmVirtPkg reviewer

For distributing ArmVirtPkg patch review tasks better, move Sami Mujawar
from the "ArmVirtPkg: Kvmtool" section to the top-level "ArmVirtPkg"
section.

Given that "ArmVirtPkg: Kvmtool" remains without a specific "R" role,
remove "ArmVirtPkg: Kvmtool" altogether.

Cc: Andrew Fish <afish@apple.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Julien Grall <julien@xen.org>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210514114857.12286-1-lersek@redhat.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2 years agoArmPkg/ArmGic: Fix maximum number of interrupts in GICv3
Andreas Sandberg [Tue, 9 Mar 2021 16:45:10 +0000 (16:45 +0000)]
ArmPkg/ArmGic: Fix maximum number of interrupts in GICv3

Bugzilla: 3415 (https://bugzilla.tianocore.org/show_bug.cgi?id=3415)

The GICv3 architecture supports up to 1020 ordinary interrupt
lines. The actual number of interrupts supported is described by the
ITLinesNumber field in the GICD_TYPER register. The total number of
implemented registers is normally calculated as
32*(ITLinesNumber+1). However, maximum value (0x1f) is a special case
since that would indicate that 1024 interrupts are implemented.

Add handling for this special case in ArmGicGetMaxNumInterrupts.

Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2 years agoMdeModulePkg/VariableLock: downgrade compatibility warnings to DEBUG_WARN
Laszlo Ersek [Fri, 21 May 2021 20:40:37 +0000 (22:40 +0200)]
MdeModulePkg/VariableLock: downgrade compatibility warnings to DEBUG_WARN

Commit a18a9bde36d2 ("MdeModulePkg/Variable/RuntimeDxe: Restore Variable
Lock Protocol behavior", 2020-12-15), for bug 3111, added two such sets of
debug messages that:

(a) are relevant for developers,

(b) yet should not necessarily poke end-users, because no functionality
suffers in practice.

Both message sets are in function VariableLockRequestToLock(): the first
is a generic interface deprecation warning; the second is the
double-locking situation, which we permit for compatibility (return status
EFI_SUCCESS).

Both message sets should be emitted with the DEBUG_WARN mask, not the most
serious DEBUG_ERROR mask. On some platforms, the serial console carries
both terminal traffic, and grave (DEBUG_ERROR-only) log messages. On such
platforms, both message sets may be perceived as a nuisance by end-users,
as there is nothing they can do, and there's nothing they *should* do --
in practice, nothing malfunctions.

(Such a platform is ArmVirtQemu, built with "-D
DEBUG_PRINT_ERROR_LEVEL=0x80000000".)

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3410
Fixes: a18a9bde36d2ffc12df29cdced1efa1f8f9f2021
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210521204037.11980-1-lersek@redhat.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoMdeModulePkg/PlatformDriOverrideDxe: Fix overflow condition check
Li, Walon [Thu, 13 May 2021 02:48:40 +0000 (10:48 +0800)]
MdeModulePkg/PlatformDriOverrideDxe: Fix overflow condition check

Code mistake, VariableIndex is smaller normally than buffer+buffersize
so should not break loop.

Signed-off-by: Walon Li <walon.li@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoBaseTools: build: Set ReturnCode on POSTBUILD fail
Garrett Kirkendall [Fri, 14 May 2021 15:01:43 +0000 (23:01 +0800)]
BaseTools: build: Set ReturnCode on POSTBUILD fail

When build.by POSTBUILD handling section returns other than 0, set
ReturnCode to POSTBUILD_ERROR so build.py exits with return code other
than 0.

Fix for https://bugzilla.tianocore.org/show_bug.cgi?id=1977

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoCryptoPkg/BaseCryptLib: Fix possible uninitialized use
Sergei Dmitrouk [Tue, 18 May 2021 16:09:42 +0000 (00:09 +0800)]
CryptoPkg/BaseCryptLib: Fix possible uninitialized use

`Result` can be used uninitialized in both functions after following
either first or second `goto` statement.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Sergei Dmitrouk <sergei@posteo.net>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2 years agoMdeModulePkg/PciBusDxe: Fix possible uninitialized use
Sergei Dmitrouk [Tue, 18 May 2021 16:09:41 +0000 (00:09 +0800)]
MdeModulePkg/PciBusDxe: Fix possible uninitialized use

If the function gets invalid value for the `ResizableBarOp` parameter
and asserts are disabled, `Bit` can be used uninitialized.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Sergei Dmitrouk <sergei@posteo.net>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2 years agoShellPkg/HttpDynamicCommand: Fix possible uninitialized use
Sergei Dmitrouk [Tue, 18 May 2021 16:09:40 +0000 (00:09 +0800)]
ShellPkg/HttpDynamicCommand: Fix possible uninitialized use

`Status` can be used uninitialized:

    /* Evaluates to FALSE */
    if (ShellGetExecutionBreakFlag ()) {
        Status = EFI_ABORTED;
        break;
    }

    /* Evaluates to FALSE */
    if (!Context->ContentDownloaded && !Context->ResponseToken.Event) {
        Status = ...;
        ASSERT_EFI_ERROR (Status);
    } else {
        ResponseMessage.Data.Response = NULL;
    }

    /* UNINITIALIZED USE */
    if (EFI_ERROR (Status)) {
        break;
    }

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Signed-off-by: Sergei Dmitrouk <sergei@posteo.net>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoMdeModulePkg: Retrieve boot manager menu from any fv
Zhiguang Liu [Mon, 26 Apr 2021 08:25:39 +0000 (16:25 +0800)]
MdeModulePkg: Retrieve boot manager menu from any fv

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3384

Currently, UefiBootManagerLib has the below assumption:
  Assume the BootManagerMenuFile is in the same FV as the module links to this library.
It has some limitation now, so remove the assumption.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2 years agoUefiCpuPkg/PiSmmCpu: Remove hardcode 48 address size limitation
Ray Ni [Tue, 11 May 2021 16:34:49 +0000 (00:34 +0800)]
UefiCpuPkg/PiSmmCpu: Remove hardcode 48 address size limitation

5-level paging can be enabled on CPU which supports up to 52 physical
address size. But when the feature was enabled, the 48 address size
limit was not removed and the 5-level paging testing didn't access
address >= 2^48. So the issue wasn't detected until recently an
address >= 2^48 is accessed.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2 years agoIntelFsp2Pkg: YAML script bug fix
Loo, Tung Lun [Mon, 17 May 2021 04:04:13 +0000 (12:04 +0800)]
IntelFsp2Pkg: YAML script bug fix

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3395

This patch fixes the issue observed during
BSF file to YAML file conversion. It also
addresses the issue during multibyte array
data conversion check, for example the data
representation of 0xFFFF instead of 0xFF, 0xFF
would be thrown exception "Array size is not
proper" without this patch.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Loo Tung Lun <tung.lun.loo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2 years agoBaseTools: Add DTCPP_FLAGS for GCC5 RISCV64 toolchain
Daniel Schaefer [Fri, 14 May 2021 06:03:03 +0000 (14:03 +0800)]
BaseTools: Add DTCPP_FLAGS for GCC5 RISCV64 toolchain

Some/all platforms are going to require EDK2 to build a device tree and
use it in the early stages of boot.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2 years agoBaseTools/Brotli: Fix compressed data loss issue
Chen, Christine [Fri, 14 May 2021 06:04:44 +0000 (14:04 +0800)]
BaseTools/Brotli: Fix compressed data loss issue

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2946

Currenly, when using the Brotli tool to compress data, the output
compressed binary file does not record complete compressed data
when size of input file is too large, which makes the data loss and
will trigger decompress-check issue.

The Brotli document mentioned:
The brotli tool use BrotliEncoderCompressStream method to compresses
input stream to output stream. Under some circumstances (e.g. lack of
output stream capacity) the BrotliEncoderOperation would require
several calls to BrotliEncoderCompressStream. The method must be
called again until both input stream is depleted and encoder has no
more output after the method is called.

This patch fixes this issue based on the Brotli document.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2 years agoMdeModulePkg: Fix various typos
Rebecca Cran [Wed, 5 May 2021 15:04:55 +0000 (23:04 +0800)]
MdeModulePkg: Fix various typos

Fix various typos throughout MdeModulePkg.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2 years agoUefiCpuPkg/CpuExceptionHandler: Add missing comma to exception name array
Lendacky, Thomas [Thu, 13 May 2021 15:26:56 +0000 (10:26 -0500)]
UefiCpuPkg/CpuExceptionHandler: Add missing comma to exception name array

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3373

An update to expand the mExceptionNameStr array failed to add a comma
after original last entry, therefore causing the #CP name to have extra
incorrect characters and the remaining entries to be indexed incorrectly
(off by 1).

Add a comma after the "#CP" entry to resolve this issue.

Fixes: 5277540e37e88a1a69f9517c4ad895051b4b3ed3
Cc: Allen Wynn <Allen_Wynn@Dell.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <40e55bf6563ed8ea4962a1219efbe1ab77a56cc4.1620919615.git.thomas.lendacky@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg/VirtioFsDxe: suppress incorrect gcc warnings
Sergei Dmitrouk [Tue, 11 May 2021 22:56:16 +0000 (22:56 +0000)]
OvmfPkg/VirtioFsDxe: suppress incorrect gcc warnings

`CreateDirectoryIfCreating` is used only if `PermitCreation` is set.

`NewNodeIsDirectory` might not set in case of error, but that would lead
to leaving the function before invalid use.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3228
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Sergei Dmitrouk <sergei@posteo.net>
Message-Id: <20210511225616.5942-3-sergei@posteo.net>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoShellPkg/UefiShellCommandLib: suppress incorrect gcc warning
Sergei Dmitrouk [Tue, 11 May 2021 22:56:15 +0000 (22:56 +0000)]
ShellPkg/UefiShellCommandLib: suppress incorrect gcc warning

`Dupes` is used only if `Duplicates != NULL` and function is left if
allocation of memory for `Dupes` fails, so it can't be used
uninitialized.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3228
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Signed-off-by: Sergei Dmitrouk <sergei@posteo.net>
Message-Id: <20210511225616.5942-2-sergei@posteo.net>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoCryptoPkg: BaseCryptLib: Add RSA PSS verify support
Sachin Agrawal [Fri, 9 Apr 2021 22:14:04 +0000 (06:14 +0800)]
CryptoPkg: BaseCryptLib: Add RSA PSS verify support

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3314

This patch uses Openssl's EVP API's to perform RSASSA-PSS verification
of a binary blob.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Sachin Agrawal <sachin.agrawal@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2 years agoBaseTools: Add support for version 3 of FMP Image Header structure
Sughosh Ganu [Thu, 22 Apr 2021 07:50:59 +0000 (15:50 +0800)]
BaseTools: Add support for version 3 of FMP Image Header structure

Add support for the ImageCapsuleSupport field, introduced in version 3
of the EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER structure. This
structure member is used to indicate if the corresponding payload has
support for authentication and dependency.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2 years agoUefiCpuPkg/MpInitLib: Properly cast from PCD to SEV-ES jump table pointer
Lendacky, Thomas [Mon, 10 May 2021 14:24:55 +0000 (09:24 -0500)]
UefiCpuPkg/MpInitLib: Properly cast from PCD to SEV-ES jump table pointer

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3385

A VS2012 build fails with a cast conversion warning when the SEV-ES work
area PCD is cast as a pointer to the SEV_ES_AP_JMP_FAR type.

When casting from a PCD value to a pointer, the cast should first be done
to a UINTN and then to the pointer. Update the code to perform a cast to
a UINTN before casting to a pointer to the SEV_ES_AP_JMP_FAR type.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Fixes: 7b7508ad784d16a5208c8d12dff43aef6df0835b
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <c89bc819856d448360430c32cb3833a9667f987b.1620656694.git.thomas.lendacky@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoSecurityPkg: Add support for RngDxe on AARCH64
Rebecca Cran [Mon, 10 May 2021 21:53:08 +0000 (15:53 -0600)]
SecurityPkg: Add support for RngDxe on AARCH64

AARCH64 support has been added to BaseRngLib via the optional
ARMv8.5 FEAT_RNG.

Refactor RngDxe to support AARCH64, note support for it in the
VALID_ARCHITECTURES line of RngDxe.inf and enable it in SecurityPkg.dsc.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2 years agoMdePkg/BaseRngLib: Add support for ARMv8.5 RNG instructions
Rebecca Cran [Mon, 10 May 2021 21:53:07 +0000 (15:53 -0600)]
MdePkg/BaseRngLib: Add support for ARMv8.5 RNG instructions

Make BaseRngLib more generic by moving x86-specific functionality into
'Rand' and adding files under 'AArch64' to support the optional ARMv8.5
RNG instruction RNDR that is a part of FEAT_RNG.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2 years agoBaseTools: Fix DSC override of Guided tool
Michael D Kinney [Fri, 7 May 2021 15:40:29 +0000 (08:40 -0700)]
BaseTools: Fix DSC override of Guided tool

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3359

If the DSC file provides an override of a Guided tool path
and/or Guided tool GUID value, then make sure the one from the
DSC file is used if it is higher priority than the Guided tool
in the tools_def.txt file.  This makes the Guided tool used by
GenFds match the tool listed GuidedSectionTools.txt.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2 years agoArmPkg: Update SCMI Base Protocol version to 0x20000
Nicola Mazzucato [Mon, 10 May 2021 08:26:16 +0000 (09:26 +0100)]
ArmPkg: Update SCMI Base Protocol version to 0x20000

The SCP-firmware has moved to full support for SCMIv2 which means that
the base protocol can be either compliant with SCMI v1 or v2.

Allow any version between SCMI v1.0 and SCMI v2.0 to be compatible
with the current implementation.

Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Tested-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2 years agoUnitTestFrameworkPkg: Sample unit test hangs when running in OVMF/QEMU
Getnat Ejigu [Fri, 30 Apr 2021 21:07:49 +0000 (14:07 -0700)]
UnitTestFrameworkPkg: Sample unit test hangs when running in OVMF/QEMU

Sample unit tests in UnitTestFrameworkPkg hangs when running in OVMF/QEMU
environment. Build target is X64/GCC5. Fixing this issue by adding EFIAPI
to ReportPrint() function that use VA_ARGS.

Signed-off-by: Getnat Ejigu <getnatejigu@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2 years agoBaseTools: Fix New Target/ToolChain/Arch in DSC [BuildOptions] issues
Michael D Kinney [Fri, 30 Apr 2021 02:01:05 +0000 (19:01 -0700)]
BaseTools: Fix New Target/ToolChain/Arch in DSC [BuildOptions] issues

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3359

* Save/Restore global state in GetToolChainAndFamilyFromDsc()
  This resolves an issue where the multi-arch build for
  UefiPayloadPkg would skip the autogen and build of IA32
  components.
* Expand tools wildcard.
  This resolves the issue where autogen makefile contents
  would have a BUIDLRULEFAMILY tools definitions with an
  '*' in the tool field that breaks the build from invalid
  makefile syntax.
* Build rule family higher priority than Family.
  This resolves the issue where flags were appended from
  both the BUILDRULEFAMILY and FAMILY when only
  BUILDRULEFAMILY should be appended when present.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Steven Shi <steven.shi@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2 years agoOvmfPkg/Tcg2ConfigPei: Update Depex for IA32 and X64
Lendacky, Thomas [Thu, 29 Apr 2021 17:12:14 +0000 (12:12 -0500)]
OvmfPkg/Tcg2ConfigPei: Update Depex for IA32 and X64

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345

The OVMF Tcg2Config PEIM adds the gOvmfTpmMmioAccessiblePpiGuid as a
Depex for IA32 and X64 builds so that the MMIO range is properly mapped
as unencrypted for an SEV-ES guest before the Tcg2Config PEIM is loaded.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <d6538e6c557173d260e272a0e5659683175e2e06.1619716333.git.thomas.lendacky@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg/TpmMmioSevDecryptPei: Mark TPM MMIO range as unencrypted for SEV-ES
Lendacky, Thomas [Thu, 29 Apr 2021 17:12:13 +0000 (12:12 -0500)]
OvmfPkg/TpmMmioSevDecryptPei: Mark TPM MMIO range as unencrypted for SEV-ES

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345

During PEI, the MMIO range for the TPM is marked as encrypted when running
as an SEV guest. While this isn't an issue for an SEV guest because of
the way the nested page fault is handled, it does result in an SEV-ES
guest terminating because of a mitigation check in the #VC handler to
prevent MMIO to an encrypted address. For an SEV-ES guest, this range
must be marked as unencrypted.

Create a new x86 PEIM for TPM support that will map the TPM MMIO range as
unencrypted when SEV-ES is active. The gOvmfTpmMmioAccessiblePpiGuid PPI
will be unconditionally installed before exiting. The PEIM will exit with
the EFI_ABORTED status so that the PEIM does not stay resident. This new
PEIM will depend on the installation of the permanent PEI RAM, by
PlatformPei, so that in case page table splitting is required during the
clearing of the encryption bit, the new page table(s) will be allocated
from permanent PEI RAM.

Update all OVMF Ia32 and X64 build packages to include this new PEIM.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <42794cec1f9d5bc24cbfb9dcdbe5e281ef259ef5.1619716333.git.thomas.lendacky@amd.com>
[lersek@redhat.com: refresh subject line]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg: Define a new PPI GUID to signal TPM MMIO accessability
Lendacky, Thomas [Thu, 29 Apr 2021 17:12:12 +0000 (12:12 -0500)]
OvmfPkg: Define a new PPI GUID to signal TPM MMIO accessability

Define a new PPI GUID that is to be used as a signal of when it is safe
to access the TPM MMIO range. This is needed so that, when SEV is active,
the MMIO range can be mapped unencrypted before it is accessed.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <03e292339273721724c8b14605cfe9d7bbe45a71.1619716333.git.thomas.lendacky@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvmfPkg/VmgExitLib: Add support for new MMIO MOV opcodes
Lendacky, Thomas [Thu, 29 Apr 2021 17:12:11 +0000 (12:12 -0500)]
OvmfPkg/VmgExitLib: Add support for new MMIO MOV opcodes

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345

Enabling TPM support results in guest termination of an SEV-ES guest
because it uses MMIO opcodes that are not currently supported.

Add support for the new MMIO opcodes (0xA0 - 0xA3), MOV instructions which
use a memory offset directly encoded in the instruction. Also, add a DEBUG
statement to identify an unsupported MMIO opcode being used.

Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <2fdde57707b52ae39c49341c9d97053aaff56e4a.1619716333.git.thomas.lendacky@amd.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2 years agoOvfmPkg/VmgExitLib: Properly decode MMIO MOVZX and MOVSX opcodes
Lendacky, Thomas [Thu, 29 Apr 2021 17:12:10 +0000 (12:12 -0500)]
OvfmPkg/VmgExitLib: Properly decode MMIO MOVZX and MOVSX opcodes

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3345

The MOVZX and MOVSX instructions use the ModRM byte in the instruction,
but the instruction decoding support was not decoding it. This resulted
in invalid decoding and failing of the MMIO operation. Also, when
performing the zero-extend or sign-extend operation, the memory operation
should be using the size, and not the size enumeration value.

Add the ModRM byte decoding for the MOVZX and MOVSX opcodes and use the
true data size to perform the extend operations. Additionally, add a
DEBUG statement identifying the MMIO address being flagged as encrypted
during the MMIO address validation.

Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <5949d54cb2c9ab69256f67ed5654b32654c0501c.1619716333.git.thomas.lendacky@amd.com>

3 years agoBaseTools/Source/Python: New Target/ToolChain/Arch in DSC [BuildOptions]
Michael D Kinney [Wed, 21 Apr 2021 06:12:51 +0000 (23:12 -0700)]
BaseTools/Source/Python: New Target/ToolChain/Arch in DSC [BuildOptions]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3359

Update BaseTools to support new build targets, new tool chains,
and new architectures declared in DSC file [BuildOptions] sections.

* Do not expand * when tools_def.txt is parsed.  Only expand when
  both tools_def.txt and DSC [BuilsOptions] sections have been parsed.
  This also requires more flexible matching of tool keys that contain *
  in tool key fields.

* Pre-scan the platform DSC file for FAMILY and TOOLCHAIN declarations
  DSC in [BuildOptions] sections before the FAMILY and TOOLCHAIN need
  to be known.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
3 years agoEmulatorPkg: Temp remove IA32 GCC CI builds
Michael D Kinney [Wed, 28 Apr 2021 20:53:55 +0000 (13:53 -0700)]
EmulatorPkg: Temp remove IA32 GCC CI builds

EmulatorPkg IA32 GCC builds are not working due to a failure
to install the i386 library dependencies in Ubuntu 18.04.

Temporarily disable these specific CI tests until the issue
can be resolved.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
3 years agoAzurePipelines: Add support for ArmPlatformPkg
Pierre Gondois [Wed, 21 Apr 2021 10:07:33 +0000 (11:07 +0100)]
AzurePipelines: Add support for ArmPlatformPkg

Add an entry to build the ArmPlatformPkg in the CI.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3349
Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoAzurePipelines: Add support for ArmPkg
Pierre Gondois [Fri, 12 Mar 2021 15:27:59 +0000 (15:27 +0000)]
AzurePipelines: Add support for ArmPkg

Add an entry to build the ArmPkg in the CI.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3348
Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years ago.pytool: Document LicenseCheck and EccCheck
Pierre Gondois [Wed, 10 Feb 2021 10:03:43 +0000 (10:03 +0000)]
.pytool: Document LicenseCheck and EccCheck

Add an entry in the documentation for the LicenseCheck and
EccCheck plugins.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Acked-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years ago.pytool: Enable CI for ArmPlatformPkg
Pierre Gondois [Wed, 21 Apr 2021 10:05:34 +0000 (11:05 +0100)]
.pytool: Enable CI for ArmPlatformPkg

Enable the CI for the ArmPlatformPkg.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years ago.pytool: Enable CI for ArmPkg
Pierre Gondois [Wed, 21 Apr 2021 10:04:11 +0000 (11:04 +0100)]
.pytool: Enable CI for ArmPkg

Enable the CI for the ArmPkg.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPlatformPkg: Add ArmPlatformPkg.ci.yaml
Pierre Gondois [Fri, 12 Feb 2021 10:25:56 +0000 (10:25 +0000)]
ArmPlatformPkg: Add ArmPlatformPkg.ci.yaml

Add ArmPlatformPkg.ci.yaml to configure the CI for the
ArmPlatformPkg.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Add ArmPkg.ci.yaml
Pierre Gondois [Tue, 20 Apr 2021 14:28:39 +0000 (15:28 +0100)]
ArmPkg: Add ArmPkg.ci.yaml

Add ArmPkg.ci.yaml to configure the CI for the
ArmPkg.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Correct small typos
Pierre Gondois [Tue, 20 Apr 2021 14:25:17 +0000 (15:25 +0100)]
ArmPkg: Correct small typos

The 'cspell' CI test detected some small typos in ArmPkg.
Correct them.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Add OemMiscLibNull library to ArmPkg.dsc
Pierre Gondois [Tue, 20 Apr 2021 13:34:53 +0000 (14:34 +0100)]
ArmPkg: Add OemMiscLibNull library to ArmPkg.dsc

Add the OemMiscLibNull library to the [Components] section of
ArmPkg.dsc, allowing to complete the 'DscCompleteCheck' CI test.

According to .pytool/Readme about the 'DscCompleteCheck' test:
The test considers it an error if any INF does not appear in the
`Components` section of the package-level DSC.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Re-order libraries in ArmPkg.dec
Pierre Gondois [Tue, 27 Apr 2021 10:17:11 +0000 (11:17 +0100)]
ArmPkg: Re-order libraries in ArmPkg.dec

This patch alphabetically orders libraries advertised in ArmPkg.dec.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
3 years agoArmPkg: Document libraries in ArmPkg.dec
Pierre Gondois [Tue, 27 Apr 2021 10:13:49 +0000 (11:13 +0100)]
ArmPkg: Document libraries in ArmPkg.dec

This patch documents the libraries advertised in ArmPkg.dec.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
3 years agoArmPlatformPkg: Document libraries in ArmPlatformPkg.dec
Pierre Gondois [Tue, 27 Apr 2021 10:12:11 +0000 (11:12 +0100)]
ArmPlatformPkg: Document libraries in ArmPlatformPkg.dec

This patch documents the libraries advertised in ArmPlatformPkg.dec.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Add missing library headers to ArmPkg.dec
Pierre Gondois [Tue, 20 Apr 2021 13:56:18 +0000 (14:56 +0100)]
ArmPkg: Add missing library headers to ArmPkg.dec

Some library headers are missing/incorrect in ArmPkg.dec.
This makes the 'LibraryClassCheck' CI test fail. This patch
adds/corrects them.

According to .pytool/Readme about the 'LibraryClassCheck' test:
This test scans at all library header files found in the
`Library` folders in all of the package's declared include
directories and ensures that all files have a matching
LibraryClass declaration in the DEC file for the package.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3254
Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=3258
Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Fix Ecc error 3002 in StandaloneMmMmuLib
Pierre Gondois [Tue, 20 Apr 2021 13:04:04 +0000 (14:04 +0100)]
ArmPkg: Fix Ecc error 3002 in StandaloneMmMmuLib

This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Fix Ecc error 8003
Pierre Gondois [Tue, 20 Apr 2021 11:00:23 +0000 (12:00 +0100)]
ArmPkg: Fix Ecc error 8003

This patch fixes the following Ecc reported error:
The #ifndef at the start of an include file should have
one postfix underscore, and no prefix underscore character

Some include guards have been modified to match the name of the
header file. Some comments have also been added on the closing
'#endif'.

Cc: Bret Barkelew <bret.barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
3 years agoArmPkg: Fix typo of Manufacturer in comment in SmbiosMiscDxe
Rebecca Cran [Wed, 31 Mar 2021 02:16:19 +0000 (20:16 -0600)]
ArmPkg: Fix typo of Manufacturer in comment in SmbiosMiscDxe

'Manufacturer' was spelled wrongly in a comment in
MiscChassisManufacturerData.c.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
3 years agoArmPkg: Fix calculation of offset of chassis SKU Number in SmbiosMiscDxe
Rebecca Cran [Wed, 31 Mar 2021 02:16:18 +0000 (20:16 -0600)]
ArmPkg: Fix calculation of offset of chassis SKU Number in SmbiosMiscDxe

The calculation of the chassis SKU number field was being calculated
incorrectly, forgetting that there's one element already present in
the structure.
Fix the calculation and improve code readability by introducing a
SkuNumberField variable.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
3 years agoArmPkg: Allow platforms to report their boot status via OemMiscLib call
Rebecca Cran [Wed, 31 Mar 2021 02:16:17 +0000 (20:16 -0600)]
ArmPkg: Allow platforms to report their boot status via OemMiscLib call

Add a new function to OemMiscLib to allow platforms to report their boot
status into the Type32 SMBIOS table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
3 years agoArmPkg: Allow platforms to supply more data for SMBIOS Type3 record
Rebecca Cran [Wed, 31 Mar 2021 02:16:16 +0000 (20:16 -0600)]
ArmPkg: Allow platforms to supply more data for SMBIOS Type3 record

Add OemMiscLib calls to allow platforms to provide the following
information about the chassis:

o Bootup state
o Power supply/supplies state
o Thermal state
o Security state
o Chassis height (in RMU)
o Number of power cords

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
3 years agoBaseTools/GenMake: Sort generated makefile tool definitions
Michael D Kinney [Fri, 23 Apr 2021 19:31:09 +0000 (12:31 -0700)]
BaseTools/GenMake: Sort generated makefile tool definitions

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3353

Sort the tool definition content of generated makefiles to help
verify that makefile contents have not changed after BaseTools
code changes.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
3 years agoSecurityPkg: Add constraints on PK strength
Jiaqi Gao [Mon, 26 Apr 2021 04:31:15 +0000 (12:31 +0800)]
SecurityPkg: Add constraints on PK strength

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3293

Add constraints on the key strength of enrolled platform key(PK), which
must be greater than or equal to 2048 bit. PK key strength is required
by Intel SDL and MSFT, etc. This limitation prevents user from using
weak keys as PK.

The original code to check the certificate file type is placed in a new
function CheckX509Certificate(), which checks if the X.509 certificate
meets the requirements of encode type, RSA-Key strengh, etc.

Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com>
Reviewed-by: Min Xu <min.m.xu@intel.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
3 years agoBaseTools/Source/Python: Verify TAB_TOD_DEFINES_FAMILY key present
Michael D Kinney [Tue, 20 Apr 2021 17:28:12 +0000 (10:28 -0700)]
BaseTools/Source/Python: Verify TAB_TOD_DEFINES_FAMILY key present

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3344

Veify that TAB_TOD_DEFINES_FAMILY key is present in ToolDef
dictionary before access.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
3 years agoMaintainers.txt: Add 'Erdem Aktas' to Confidential Computing reviewers
Erdem Aktas [Thu, 22 Apr 2021 15:05:15 +0000 (08:05 -0700)]
Maintainers.txt: Add 'Erdem Aktas' to Confidential Computing reviewers

Add 'Erdem Aktas' as a reviewer for OvmfPkg/Confidential Computing.

Signed-off-by: Erdem Aktas <erdemaktas@google.com>
Message-Id: <a557b66c92d3e44dcd02db7ee3800d1f9fef81b4.1619102863.git.erdemaktas@google.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Min M Xu <min.m.xu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
3 years agoBaseTools: Add double quote around CLANG_BIN path string
Shi, Steven [Sat, 17 Apr 2021 12:21:33 +0000 (20:21 +0800)]
BaseTools: Add double quote around CLANG_BIN path string

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3341

Current CLANG_BIN env variable is set without double quote
around the LLVM default installation path string in windows,
which causes some CI build service cannot find the LLVM path
in windows.
This patch enhance it to add double quote around it.

Signed-off-by: Steven Shi <steven.shi@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
3 years agoMdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure.
Jason [Thu, 8 Apr 2021 06:28:59 +0000 (14:28 +0800)]
MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3309

Define new element(Hybird) in CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS
(07h) data structure.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed: Ray Ni <ray.ni@intel.com>

3 years agoUefiCpuPkg: PiSmmCpuDxeSmm: Not to Change Bitwidth During Static Paging
Kun Qin [Wed, 14 Apr 2021 20:25:47 +0000 (04:25 +0800)]
UefiCpuPkg: PiSmmCpuDxeSmm: Not to Change Bitwidth During Static Paging

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3300

Current implementation of SetStaticPageTable routine in PiSmmCpuDxeSmm
driver will check a global variable mPhysicalAddressBits, and eventually
cap any value larger than 39 at 39.

This global variable is used in ConvertMemoryPageAttributes, which backs
SmmSetMemoryAttributes and SmmClearMemoryAttributes. Thus for a processor
that supports more than 39 bits width, trying to mark page table regions
higher than 39-bit will always return EFI_UNSUPPROTED.

This change updated the interface of SetStaticPageTable function to take
PhysicalAddressBits as an input parameter, in order to avoid changing/
accessing the global variable.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Fixes: 4eee0cc7cc0db74489b99c19eba056b53eda6358
Signed-off-by: Kun Qin <kuqin12@gmail.com>