\r
#include "LcdGraphicsOutputDxe.h"\r
\r
-extern BOOLEAN mDisplayInitialized;\r
+extern BOOLEAN mDisplayInitialized;\r
\r
//\r
// Function Definitions\r
IN UINTN DestinationY,\r
IN UINTN Width,\r
IN UINTN Height\r
-)\r
+ )\r
{\r
- EFI_STATUS Status;\r
- UINTN SourceLine;\r
- UINTN DestinationLine;\r
- UINTN WidthInBytes;\r
- UINTN LineCount;\r
- INTN Step;\r
- VOID *SourceAddr;\r
- VOID *DestinationAddr;\r
+ EFI_STATUS Status;\r
+ UINTN SourceLine;\r
+ UINTN DestinationLine;\r
+ UINTN WidthInBytes;\r
+ UINTN LineCount;\r
+ INTN Step;\r
+ VOID *SourceAddr;\r
+ VOID *DestinationAddr;\r
\r
Status = EFI_SUCCESS;\r
\r
- if( DestinationY <= SourceY ) {\r
+ if ( DestinationY <= SourceY ) {\r
// scrolling up (or horizontally but without overlap)\r
- SourceLine = SourceY;\r
- DestinationLine = DestinationY;\r
- Step = 1;\r
+ SourceLine = SourceY;\r
+ DestinationLine = DestinationY;\r
+ Step = 1;\r
} else {\r
// scrolling down\r
- SourceLine = SourceY + Height;\r
- DestinationLine = DestinationY + Height;\r
- Step = -1;\r
+ SourceLine = SourceY + Height;\r
+ DestinationLine = DestinationY + Height;\r
+ Step = -1;\r
}\r
\r
switch (BitsPerPixel) {\r
+ case LcdBitsPerPixel_24:\r
\r
- case LcdBitsPerPixel_24:\r
+ WidthInBytes = Width * 4;\r
\r
- WidthInBytes = Width * 4;\r
+ for ( LineCount = 0; LineCount < Height; LineCount++ ) {\r
+ // Update the start addresses of source & destination using 32bit pointer arithmetic\r
+ SourceAddr = (VOID *)((UINT32 *)FrameBufferBase + SourceLine * HorizontalResolution + SourceX);\r
+ DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
\r
- for( LineCount = 0; LineCount < Height; LineCount++ ) {\r
- // Update the start addresses of source & destination using 32bit pointer arithmetic\r
- SourceAddr = (VOID *)((UINT32 *)FrameBufferBase + SourceLine * HorizontalResolution + SourceX );\r
- DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
+ // Copy the entire line Y from video ram to the temp buffer\r
+ CopyMem (DestinationAddr, SourceAddr, WidthInBytes);\r
\r
- // Copy the entire line Y from video ram to the temp buffer\r
- CopyMem( DestinationAddr, SourceAddr, WidthInBytes);\r
+ // Update the line numbers\r
+ SourceLine += Step;\r
+ DestinationLine += Step;\r
+ }\r
\r
- // Update the line numbers\r
- SourceLine += Step;\r
- DestinationLine += Step;\r
- }\r
- break;\r
+ break;\r
\r
- case LcdBitsPerPixel_16_555:\r
- case LcdBitsPerPixel_16_565:\r
- case LcdBitsPerPixel_12_444:\r
+ case LcdBitsPerPixel_16_555:\r
+ case LcdBitsPerPixel_16_565:\r
+ case LcdBitsPerPixel_12_444:\r
\r
- WidthInBytes = Width * 2;\r
+ WidthInBytes = Width * 2;\r
\r
- for( LineCount = 0; LineCount < Height; LineCount++ ) {\r
- // Update the start addresses of source & destination using 16bit pointer arithmetic\r
- SourceAddr = (VOID *)((UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourceX );\r
- DestinationAddr = (VOID *)((UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
+ for ( LineCount = 0; LineCount < Height; LineCount++ ) {\r
+ // Update the start addresses of source & destination using 16bit pointer arithmetic\r
+ SourceAddr = (VOID *)((UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourceX);\r
+ DestinationAddr = (VOID *)((UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
\r
- // Copy the entire line Y from video ram to the temp buffer\r
- CopyMem( DestinationAddr, SourceAddr, WidthInBytes);\r
+ // Copy the entire line Y from video ram to the temp buffer\r
+ CopyMem (DestinationAddr, SourceAddr, WidthInBytes);\r
\r
- // Update the line numbers\r
- SourceLine += Step;\r
- DestinationLine += Step;\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_8:\r
- case LcdBitsPerPixel_4:\r
- case LcdBitsPerPixel_2:\r
- case LcdBitsPerPixel_1:\r
- default:\r
- // Can't handle this case\r
- DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
- Status = EFI_INVALID_PARAMETER;\r
- goto EXIT;\r
- // break;\r
+ // Update the line numbers\r
+ SourceLine += Step;\r
+ DestinationLine += Step;\r
+ }\r
\r
+ break;\r
+\r
+ case LcdBitsPerPixel_8:\r
+ case LcdBitsPerPixel_4:\r
+ case LcdBitsPerPixel_2:\r
+ case LcdBitsPerPixel_1:\r
+ default:\r
+ // Can't handle this case\r
+ DEBUG ((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
+ Status = EFI_INVALID_PARAMETER;\r
+ goto EXIT;\r
+ // break;\r
}\r
\r
- EXIT:\r
+EXIT:\r
return Status;\r
}\r
\r
IN UINTN DestinationY,\r
IN UINTN Width,\r
IN UINTN Height\r
-)\r
+ )\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
- UINT32 *PixelBuffer32bit;\r
- UINT32 *SourcePixel32bit;\r
- UINT32 *DestinationPixel32bit;\r
+ UINT32 *PixelBuffer32bit;\r
+ UINT32 *SourcePixel32bit;\r
+ UINT32 *DestinationPixel32bit;\r
\r
- UINT16 *PixelBuffer16bit;\r
- UINT16 *SourcePixel16bit;\r
- UINT16 *DestinationPixel16bit;\r
+ UINT16 *PixelBuffer16bit;\r
+ UINT16 *SourcePixel16bit;\r
+ UINT16 *DestinationPixel16bit;\r
\r
- UINT32 SourcePixelY;\r
- UINT32 DestinationPixelY;\r
- UINTN SizeIn32Bits;\r
- UINTN SizeIn16Bits;\r
+ UINT32 SourcePixelY;\r
+ UINT32 DestinationPixelY;\r
+ UINTN SizeIn32Bits;\r
+ UINTN SizeIn16Bits;\r
\r
Status = EFI_SUCCESS;\r
\r
switch (BitsPerPixel) {\r
+ case LcdBitsPerPixel_24:\r
+ // Allocate a temporary buffer\r
\r
- case LcdBitsPerPixel_24:\r
- // Allocate a temporary buffer\r
-\r
- PixelBuffer32bit = (UINT32 *) AllocatePool((Height * Width) * sizeof(UINT32));\r
-\r
- if (PixelBuffer32bit == NULL) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto EXIT;\r
- }\r
-\r
- SizeIn32Bits = Width * 4;\r
-\r
- // Copy from the video ram (source region) to a temp buffer\r
- for (SourcePixelY = SourceY, DestinationPixel32bit = PixelBuffer32bit;\r
- SourcePixelY < SourceY + Height;\r
- SourcePixelY++, DestinationPixel32bit += Width)\r
- {\r
- // Update the start address of line Y (source)\r
- SourcePixel32bit = (UINT32 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;\r
+ PixelBuffer32bit = (UINT32 *)AllocatePool ((Height * Width) * sizeof (UINT32));\r
\r
- // Copy the entire line Y from video ram to the temp buffer\r
- CopyMem( (VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);\r
- }\r
+ if (PixelBuffer32bit == NULL) {\r
+ Status = EFI_OUT_OF_RESOURCES;\r
+ goto EXIT;\r
+ }\r
\r
- // Copy from the temp buffer to the video ram (destination region)\r
- for (DestinationPixelY = DestinationY, SourcePixel32bit = PixelBuffer32bit;\r
- DestinationPixelY < DestinationY + Height;\r
- DestinationPixelY++, SourcePixel32bit += Width)\r
- {\r
- // Update the start address of line Y (target)\r
- DestinationPixel32bit = (UINT32 *)FrameBufferBase + DestinationPixelY * HorizontalResolution + DestinationX;\r
+ SizeIn32Bits = Width * 4;\r
\r
- // Copy the entire line Y from the temp buffer to video ram\r
- CopyMem( (VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);\r
- }\r
+ // Copy from the video ram (source region) to a temp buffer\r
+ for (SourcePixelY = SourceY, DestinationPixel32bit = PixelBuffer32bit;\r
+ SourcePixelY < SourceY + Height;\r
+ SourcePixelY++, DestinationPixel32bit += Width)\r
+ {\r
+ // Update the start address of line Y (source)\r
+ SourcePixel32bit = (UINT32 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;\r
\r
- // Free up the allocated memory\r
- FreePool((VOID *) PixelBuffer32bit);\r
+ // Copy the entire line Y from video ram to the temp buffer\r
+ CopyMem ((VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);\r
+ }\r
\r
- break;\r
+ // Copy from the temp buffer to the video ram (destination region)\r
+ for (DestinationPixelY = DestinationY, SourcePixel32bit = PixelBuffer32bit;\r
+ DestinationPixelY < DestinationY + Height;\r
+ DestinationPixelY++, SourcePixel32bit += Width)\r
+ {\r
+ // Update the start address of line Y (target)\r
+ DestinationPixel32bit = (UINT32 *)FrameBufferBase + DestinationPixelY * HorizontalResolution + DestinationX;\r
\r
+ // Copy the entire line Y from the temp buffer to video ram\r
+ CopyMem ((VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);\r
+ }\r
\r
- case LcdBitsPerPixel_16_555:\r
- case LcdBitsPerPixel_16_565:\r
- case LcdBitsPerPixel_12_444:\r
- // Allocate a temporary buffer\r
- PixelBuffer16bit = (UINT16 *) AllocatePool((Height * Width) * sizeof(UINT16));\r
+ // Free up the allocated memory\r
+ FreePool ((VOID *)PixelBuffer32bit);\r
\r
- if (PixelBuffer16bit == NULL) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto EXIT;\r
- }\r
+ break;\r
\r
- // Access each pixel inside the source area of the Video Memory and copy it to the temp buffer\r
+ case LcdBitsPerPixel_16_555:\r
+ case LcdBitsPerPixel_16_565:\r
+ case LcdBitsPerPixel_12_444:\r
+ // Allocate a temporary buffer\r
+ PixelBuffer16bit = (UINT16 *)AllocatePool ((Height * Width) * sizeof (UINT16));\r
\r
- SizeIn16Bits = Width * 2;\r
+ if (PixelBuffer16bit == NULL) {\r
+ Status = EFI_OUT_OF_RESOURCES;\r
+ goto EXIT;\r
+ }\r
\r
- for (SourcePixelY = SourceY, DestinationPixel16bit = PixelBuffer16bit;\r
- SourcePixelY < SourceY + Height;\r
- SourcePixelY++, DestinationPixel16bit += Width)\r
- {\r
- // Calculate the source address:\r
- SourcePixel16bit = (UINT16 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;\r
+ // Access each pixel inside the source area of the Video Memory and copy it to the temp buffer\r
\r
- // Copy the entire line Y from Video to the temp buffer\r
- CopyMem( (VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);\r
- }\r
+ SizeIn16Bits = Width * 2;\r
\r
- // Copy from the temp buffer into the destination area of the Video Memory\r
+ for (SourcePixelY = SourceY, DestinationPixel16bit = PixelBuffer16bit;\r
+ SourcePixelY < SourceY + Height;\r
+ SourcePixelY++, DestinationPixel16bit += Width)\r
+ {\r
+ // Calculate the source address:\r
+ SourcePixel16bit = (UINT16 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;\r
\r
- for (DestinationPixelY = DestinationY, SourcePixel16bit = PixelBuffer16bit;\r
- DestinationPixelY < DestinationY + Height;\r
- DestinationPixelY++, SourcePixel16bit += Width)\r
- {\r
- // Calculate the target address:\r
- DestinationPixel16bit = (UINT16 *)FrameBufferBase + (DestinationPixelY * HorizontalResolution + DestinationX);\r
+ // Copy the entire line Y from Video to the temp buffer\r
+ CopyMem ((VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);\r
+ }\r
\r
- // Copy the entire line Y from the temp buffer to Video\r
- CopyMem( (VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);\r
- }\r
+ // Copy from the temp buffer into the destination area of the Video Memory\r
\r
- // Free the allocated memory\r
- FreePool((VOID *) PixelBuffer16bit);\r
+ for (DestinationPixelY = DestinationY, SourcePixel16bit = PixelBuffer16bit;\r
+ DestinationPixelY < DestinationY + Height;\r
+ DestinationPixelY++, SourcePixel16bit += Width)\r
+ {\r
+ // Calculate the target address:\r
+ DestinationPixel16bit = (UINT16 *)FrameBufferBase + (DestinationPixelY * HorizontalResolution + DestinationX);\r
\r
- break;\r
+ // Copy the entire line Y from the temp buffer to Video\r
+ CopyMem ((VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);\r
+ }\r
\r
+ // Free the allocated memory\r
+ FreePool ((VOID *)PixelBuffer16bit);\r
\r
- case LcdBitsPerPixel_8:\r
- case LcdBitsPerPixel_4:\r
- case LcdBitsPerPixel_2:\r
- case LcdBitsPerPixel_1:\r
- default:\r
- // Can't handle this case\r
- DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
- Status = EFI_INVALID_PARAMETER;\r
- goto EXIT;\r
- // break;\r
+ break;\r
\r
+ case LcdBitsPerPixel_8:\r
+ case LcdBitsPerPixel_4:\r
+ case LcdBitsPerPixel_2:\r
+ case LcdBitsPerPixel_1:\r
+ default:\r
+ // Can't handle this case\r
+ DEBUG ((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
+ Status = EFI_INVALID_PARAMETER;\r
+ goto EXIT;\r
+ // break;\r
}\r
\r
EXIT:\r
STATIC\r
EFI_STATUS\r
BltVideoFill (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiSourcePixel OPTIONAL,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiSourcePixel OPTIONAL,\r
+ IN UINTN SourceX,\r
+ IN UINTN SourceY,\r
+ IN UINTN DestinationX,\r
+ IN UINTN DestinationY,\r
+ IN UINTN Width,\r
+ IN UINTN Height,\r
+ IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
)\r
{\r
- EFI_PIXEL_BITMASK* PixelInformation;\r
+ EFI_PIXEL_BITMASK *PixelInformation;\r
EFI_STATUS Status;\r
UINT32 HorizontalResolution;\r
LCD_BPP BitsPerPixel;\r
- VOID *FrameBufferBase;\r
- VOID *DestinationAddr;\r
- UINT16 *DestinationPixel16bit;\r
- UINT16 Pixel16bit;\r
- UINT32 DestinationPixelX;\r
- UINT32 DestinationLine;\r
- UINTN WidthInBytes;\r
-\r
- Status = EFI_SUCCESS;\r
- PixelInformation = &This->Mode->Info->PixelInformation;\r
- FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
+ VOID *FrameBufferBase;\r
+ VOID *DestinationAddr;\r
+ UINT16 *DestinationPixel16bit;\r
+ UINT16 Pixel16bit;\r
+ UINT32 DestinationPixelX;\r
+ UINT32 DestinationLine;\r
+ UINTN WidthInBytes;\r
+\r
+ Status = EFI_SUCCESS;\r
+ PixelInformation = &This->Mode->Info->PixelInformation;\r
+ FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
HorizontalResolution = This->Mode->Info->HorizontalResolution;\r
\r
- LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);\r
+ LcdPlatformGetBpp (This->Mode->Mode, &BitsPerPixel);\r
\r
switch (BitsPerPixel) {\r
- case LcdBitsPerPixel_24:\r
- WidthInBytes = Width * 4;\r
-\r
- // Copy the SourcePixel into every pixel inside the target rectangle\r
- for (DestinationLine = DestinationY;\r
- DestinationLine < DestinationY + Height;\r
- DestinationLine++)\r
- {\r
- // Calculate the target address using 32bit pointer arithmetic:\r
- DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
-\r
- // Fill the entire line\r
- SetMem32 (DestinationAddr, WidthInBytes, *((UINT32 *)EfiSourcePixel));\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_16_555:\r
- // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel\r
- Pixel16bit = (UINT16) (\r
- ( (EfiSourcePixel->Red << 7) & PixelInformation->RedMask )\r
- | ( (EfiSourcePixel->Green << 2) & PixelInformation->GreenMask )\r
- | ( (EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask )\r
-// | ( 0 & PixelInformation->ReservedMask )\r
- );\r
-\r
- // Copy the SourcePixel into every pixel inside the target rectangle\r
- for (DestinationLine = DestinationY;\r
- DestinationLine < DestinationY + Height;\r
- DestinationLine++)\r
- {\r
- for (DestinationPixelX = DestinationX;\r
- DestinationPixelX < DestinationX + Width;\r
- DestinationPixelX++)\r
+ case LcdBitsPerPixel_24:\r
+ WidthInBytes = Width * 4;\r
+\r
+ // Copy the SourcePixel into every pixel inside the target rectangle\r
+ for (DestinationLine = DestinationY;\r
+ DestinationLine < DestinationY + Height;\r
+ DestinationLine++)\r
{\r
- // Calculate the target address:\r
- DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+ // Calculate the target address using 32bit pointer arithmetic:\r
+ DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
\r
- // Copy the pixel into the new target\r
- *DestinationPixel16bit = Pixel16bit;\r
+ // Fill the entire line\r
+ SetMem32 (DestinationAddr, WidthInBytes, *((UINT32 *)EfiSourcePixel));\r
}\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_16_565:\r
- // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel\r
- Pixel16bit = (UINT16) (\r
- ( (EfiSourcePixel->Red << 8) & PixelInformation->RedMask )\r
- | ( (EfiSourcePixel->Green << 3) & PixelInformation->GreenMask )\r
- | ( (EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask )\r
- );\r
-\r
- // Copy the SourcePixel into every pixel inside the target rectangle\r
- for (DestinationLine = DestinationY;\r
- DestinationLine < DestinationY + Height;\r
- DestinationLine++)\r
- {\r
- for (DestinationPixelX = DestinationX;\r
- DestinationPixelX < DestinationX + Width;\r
- DestinationPixelX++)\r
- {\r
- // Calculate the target address:\r
- DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
\r
- // Copy the pixel into the new target\r
- *DestinationPixel16bit = Pixel16bit;\r
+ break;\r
+\r
+ case LcdBitsPerPixel_16_555:\r
+ // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel\r
+ Pixel16bit = (UINT16)(\r
+ ((EfiSourcePixel->Red << 7) & PixelInformation->RedMask)\r
+ | ((EfiSourcePixel->Green << 2) & PixelInformation->GreenMask)\r
+ | ((EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask)\r
+ // | ( 0 & PixelInformation->ReservedMask )\r
+ );\r
+\r
+ // Copy the SourcePixel into every pixel inside the target rectangle\r
+ for (DestinationLine = DestinationY;\r
+ DestinationLine < DestinationY + Height;\r
+ DestinationLine++)\r
+ {\r
+ for (DestinationPixelX = DestinationX;\r
+ DestinationPixelX < DestinationX + Width;\r
+ DestinationPixelX++)\r
+ {\r
+ // Calculate the target address:\r
+ DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+\r
+ // Copy the pixel into the new target\r
+ *DestinationPixel16bit = Pixel16bit;\r
+ }\r
}\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_12_444:\r
- // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel\r
- Pixel16bit = (UINT16) (\r
- ( (EfiSourcePixel->Red >> 4) & PixelInformation->RedMask )\r
- | ( (EfiSourcePixel->Green ) & PixelInformation->GreenMask )\r
- | ( (EfiSourcePixel->Blue << 4) & PixelInformation->BlueMask )\r
- );\r
-\r
- // Copy the SourcePixel into every pixel inside the target rectangle\r
- for (DestinationLine = DestinationY;\r
- DestinationLine < DestinationY + Height;\r
- DestinationLine++)\r
- {\r
- for (DestinationPixelX = DestinationX;\r
- DestinationPixelX < DestinationX + Width;\r
- DestinationPixelX++)\r
+\r
+ break;\r
+\r
+ case LcdBitsPerPixel_16_565:\r
+ // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel\r
+ Pixel16bit = (UINT16)(\r
+ ((EfiSourcePixel->Red << 8) & PixelInformation->RedMask)\r
+ | ((EfiSourcePixel->Green << 3) & PixelInformation->GreenMask)\r
+ | ((EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask)\r
+ );\r
+\r
+ // Copy the SourcePixel into every pixel inside the target rectangle\r
+ for (DestinationLine = DestinationY;\r
+ DestinationLine < DestinationY + Height;\r
+ DestinationLine++)\r
{\r
- // Calculate the target address:\r
- DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+ for (DestinationPixelX = DestinationX;\r
+ DestinationPixelX < DestinationX + Width;\r
+ DestinationPixelX++)\r
+ {\r
+ // Calculate the target address:\r
+ DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+\r
+ // Copy the pixel into the new target\r
+ *DestinationPixel16bit = Pixel16bit;\r
+ }\r
+ }\r
+\r
+ break;\r
\r
- // Copy the pixel into the new target\r
- *DestinationPixel16bit = Pixel16bit;\r
+ case LcdBitsPerPixel_12_444:\r
+ // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel\r
+ Pixel16bit = (UINT16)(\r
+ ((EfiSourcePixel->Red >> 4) & PixelInformation->RedMask)\r
+ | ((EfiSourcePixel->Green) & PixelInformation->GreenMask)\r
+ | ((EfiSourcePixel->Blue << 4) & PixelInformation->BlueMask)\r
+ );\r
+\r
+ // Copy the SourcePixel into every pixel inside the target rectangle\r
+ for (DestinationLine = DestinationY;\r
+ DestinationLine < DestinationY + Height;\r
+ DestinationLine++)\r
+ {\r
+ for (DestinationPixelX = DestinationX;\r
+ DestinationPixelX < DestinationX + Width;\r
+ DestinationPixelX++)\r
+ {\r
+ // Calculate the target address:\r
+ DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+\r
+ // Copy the pixel into the new target\r
+ *DestinationPixel16bit = Pixel16bit;\r
+ }\r
}\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_8:\r
- case LcdBitsPerPixel_4:\r
- case LcdBitsPerPixel_2:\r
- case LcdBitsPerPixel_1:\r
- default:\r
- // Can't handle this case\r
- DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoFill: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
- Status = EFI_INVALID_PARAMETER;\r
- break;\r
+\r
+ break;\r
+\r
+ case LcdBitsPerPixel_8:\r
+ case LcdBitsPerPixel_4:\r
+ case LcdBitsPerPixel_2:\r
+ case LcdBitsPerPixel_1:\r
+ default:\r
+ // Can't handle this case\r
+ DEBUG ((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoFill: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
+ Status = EFI_INVALID_PARAMETER;\r
+ break;\r
}\r
\r
return Status;\r
STATIC\r
EFI_STATUS\r
BltVideoToBltBuffer (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
+ IN UINTN SourceX,\r
+ IN UINTN SourceY,\r
+ IN UINTN DestinationX,\r
+ IN UINTN DestinationY,\r
+ IN UINTN Width,\r
+ IN UINTN Height,\r
+ IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 HorizontalResolution;\r
- LCD_BPP BitsPerPixel;\r
- EFI_PIXEL_BITMASK *PixelInformation;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiDestinationPixel;\r
- VOID *FrameBufferBase;\r
- VOID *SourceAddr;\r
- VOID *DestinationAddr;\r
- UINT16 *SourcePixel16bit;\r
- UINT16 Pixel16bit;\r
- UINT32 SourcePixelX;\r
- UINT32 SourceLine;\r
- UINT32 DestinationPixelX;\r
- UINT32 DestinationLine;\r
- UINT32 BltBufferHorizontalResolution;\r
- UINTN WidthInBytes;\r
-\r
- Status = EFI_SUCCESS;\r
- PixelInformation = &This->Mode->Info->PixelInformation;\r
+ EFI_STATUS Status;\r
+ UINT32 HorizontalResolution;\r
+ LCD_BPP BitsPerPixel;\r
+ EFI_PIXEL_BITMASK *PixelInformation;\r
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiDestinationPixel;\r
+ VOID *FrameBufferBase;\r
+ VOID *SourceAddr;\r
+ VOID *DestinationAddr;\r
+ UINT16 *SourcePixel16bit;\r
+ UINT16 Pixel16bit;\r
+ UINT32 SourcePixelX;\r
+ UINT32 SourceLine;\r
+ UINT32 DestinationPixelX;\r
+ UINT32 DestinationLine;\r
+ UINT32 BltBufferHorizontalResolution;\r
+ UINTN WidthInBytes;\r
+\r
+ Status = EFI_SUCCESS;\r
+ PixelInformation = &This->Mode->Info->PixelInformation;\r
HorizontalResolution = This->Mode->Info->HorizontalResolution;\r
- FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
+ FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
\r
- if(( Delta != 0 ) && ( Delta != Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {\r
+ if ((Delta != 0) && (Delta != Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {\r
// Delta is not zero and it is different from the width.\r
// Divide it by the size of a pixel to find out the buffer's horizontal resolution.\r
- BltBufferHorizontalResolution = (UINT32) (Delta / sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL));\r
+ BltBufferHorizontalResolution = (UINT32)(Delta / sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));\r
} else {\r
BltBufferHorizontalResolution = Width;\r
}\r
\r
- LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);\r
+ LcdPlatformGetBpp (This->Mode->Mode, &BitsPerPixel);\r
\r
switch (BitsPerPixel) {\r
- case LcdBitsPerPixel_24:\r
- WidthInBytes = Width * 4;\r
-\r
- // Access each line inside the Video Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++)\r
- {\r
- // Calculate the source and target addresses using 32bit pointer arithmetic:\r
- SourceAddr = (VOID *)((UINT32 *)FrameBufferBase + SourceLine * HorizontalResolution + SourceX );\r
- DestinationAddr = (VOID *)((UINT32 *)BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationX);\r
-\r
- // Copy the entire line\r
- CopyMem( DestinationAddr, SourceAddr, WidthInBytes);\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_16_555:\r
- // Access each pixel inside the Video Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++)\r
- {\r
- for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
- SourcePixelX < SourceX + Width;\r
- SourcePixelX++, DestinationPixelX++)\r
+ case LcdBitsPerPixel_24:\r
+ WidthInBytes = Width * 4;\r
+\r
+ // Access each line inside the Video Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
{\r
- // Calculate the source and target addresses:\r
- SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;\r
- EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;\r
-\r
- // Snapshot the pixel from the video buffer once, to speed up the operation.\r
- // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.\r
- Pixel16bit = *SourcePixel16bit;\r
-\r
- // Copy the pixel into the new target\r
- EfiDestinationPixel->Red = (UINT8) ( (Pixel16bit & PixelInformation->RedMask ) >> 7 );\r
- EfiDestinationPixel->Green = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask ) >> 2);\r
- EfiDestinationPixel->Blue = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask ) << 3 );\r
- // EfiDestinationPixel->Reserved = (UINT8) 0;\r
+ // Calculate the source and target addresses using 32bit pointer arithmetic:\r
+ SourceAddr = (VOID *)((UINT32 *)FrameBufferBase + SourceLine * HorizontalResolution + SourceX);\r
+ DestinationAddr = (VOID *)((UINT32 *)BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationX);\r
+\r
+ // Copy the entire line\r
+ CopyMem (DestinationAddr, SourceAddr, WidthInBytes);\r
}\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_16_565:\r
- // Access each pixel inside the Video Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++)\r
- {\r
- for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
- SourcePixelX < SourceX + Width;\r
- SourcePixelX++, DestinationPixelX++)\r
+\r
+ break;\r
+\r
+ case LcdBitsPerPixel_16_555:\r
+ // Access each pixel inside the Video Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
{\r
- // Calculate the source and target addresses:\r
- SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;\r
- EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;\r
-\r
- // Snapshot the pixel from the video buffer once, to speed up the operation.\r
- // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.\r
- Pixel16bit = *SourcePixel16bit;\r
-\r
- // Copy the pixel into the new target\r
- // There is no info for the Reserved byte, so we set it to zero\r
- EfiDestinationPixel->Red = (UINT8) ( (Pixel16bit & PixelInformation->RedMask ) >> 8 );\r
- EfiDestinationPixel->Green = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask ) >> 3);\r
- EfiDestinationPixel->Blue = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask ) << 3 );\r
- // EfiDestinationPixel->Reserved = (UINT8) 0;\r
+ for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
+ SourcePixelX < SourceX + Width;\r
+ SourcePixelX++, DestinationPixelX++)\r
+ {\r
+ // Calculate the source and target addresses:\r
+ SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;\r
+ EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;\r
+\r
+ // Snapshot the pixel from the video buffer once, to speed up the operation.\r
+ // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.\r
+ Pixel16bit = *SourcePixel16bit;\r
+\r
+ // Copy the pixel into the new target\r
+ EfiDestinationPixel->Red = (UINT8)((Pixel16bit & PixelInformation->RedMask) >> 7);\r
+ EfiDestinationPixel->Green = (UINT8)((Pixel16bit & PixelInformation->GreenMask) >> 2);\r
+ EfiDestinationPixel->Blue = (UINT8)((Pixel16bit & PixelInformation->BlueMask) << 3);\r
+ // EfiDestinationPixel->Reserved = (UINT8) 0;\r
+ }\r
}\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_12_444:\r
- // Access each pixel inside the Video Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++)\r
- {\r
- for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
- SourcePixelX < SourceX + Width;\r
- SourcePixelX++, DestinationPixelX++)\r
+\r
+ break;\r
+\r
+ case LcdBitsPerPixel_16_565:\r
+ // Access each pixel inside the Video Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
{\r
- // Calculate the source and target addresses:\r
- SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;\r
- EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;\r
-\r
- // Snapshot the pixel from the video buffer once, to speed up the operation.\r
- // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.\r
- Pixel16bit = *SourcePixel16bit;\r
-\r
- // Copy the pixel into the new target\r
- EfiDestinationPixel->Red = (UINT8) ( (Pixel16bit & PixelInformation->RedMask ) >> 4 );\r
- EfiDestinationPixel->Green = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask ) );\r
- EfiDestinationPixel->Blue = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask ) << 4 );\r
- // EfiDestinationPixel->Reserved = (UINT8) 0;\r
+ for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
+ SourcePixelX < SourceX + Width;\r
+ SourcePixelX++, DestinationPixelX++)\r
+ {\r
+ // Calculate the source and target addresses:\r
+ SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;\r
+ EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;\r
+\r
+ // Snapshot the pixel from the video buffer once, to speed up the operation.\r
+ // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.\r
+ Pixel16bit = *SourcePixel16bit;\r
+\r
+ // Copy the pixel into the new target\r
+ // There is no info for the Reserved byte, so we set it to zero\r
+ EfiDestinationPixel->Red = (UINT8)((Pixel16bit & PixelInformation->RedMask) >> 8);\r
+ EfiDestinationPixel->Green = (UINT8)((Pixel16bit & PixelInformation->GreenMask) >> 3);\r
+ EfiDestinationPixel->Blue = (UINT8)((Pixel16bit & PixelInformation->BlueMask) << 3);\r
+ // EfiDestinationPixel->Reserved = (UINT8) 0;\r
+ }\r
}\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_8:\r
- case LcdBitsPerPixel_4:\r
- case LcdBitsPerPixel_2:\r
- case LcdBitsPerPixel_1:\r
- default:\r
- // Can't handle this case\r
- DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoToBltBuffer: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
- Status = EFI_INVALID_PARAMETER;\r
- break;\r
+\r
+ break;\r
+\r
+ case LcdBitsPerPixel_12_444:\r
+ // Access each pixel inside the Video Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
+ {\r
+ for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
+ SourcePixelX < SourceX + Width;\r
+ SourcePixelX++, DestinationPixelX++)\r
+ {\r
+ // Calculate the source and target addresses:\r
+ SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;\r
+ EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;\r
+\r
+ // Snapshot the pixel from the video buffer once, to speed up the operation.\r
+ // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.\r
+ Pixel16bit = *SourcePixel16bit;\r
+\r
+ // Copy the pixel into the new target\r
+ EfiDestinationPixel->Red = (UINT8)((Pixel16bit & PixelInformation->RedMask) >> 4);\r
+ EfiDestinationPixel->Green = (UINT8)((Pixel16bit & PixelInformation->GreenMask));\r
+ EfiDestinationPixel->Blue = (UINT8)((Pixel16bit & PixelInformation->BlueMask) << 4);\r
+ // EfiDestinationPixel->Reserved = (UINT8) 0;\r
+ }\r
+ }\r
+\r
+ break;\r
+\r
+ case LcdBitsPerPixel_8:\r
+ case LcdBitsPerPixel_4:\r
+ case LcdBitsPerPixel_2:\r
+ case LcdBitsPerPixel_1:\r
+ default:\r
+ // Can't handle this case\r
+ DEBUG ((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoToBltBuffer: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
+ Status = EFI_INVALID_PARAMETER;\r
+ break;\r
}\r
+\r
return Status;\r
}\r
\r
STATIC\r
EFI_STATUS\r
BltBufferToVideo (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
+ IN UINTN SourceX,\r
+ IN UINTN SourceY,\r
+ IN UINTN DestinationX,\r
+ IN UINTN DestinationY,\r
+ IN UINTN Width,\r
+ IN UINTN Height,\r
+ IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 HorizontalResolution;\r
- LCD_BPP BitsPerPixel;\r
- EFI_PIXEL_BITMASK *PixelInformation;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiSourcePixel;\r
- VOID *FrameBufferBase;\r
- VOID *SourceAddr;\r
- VOID *DestinationAddr;\r
- UINT16 *DestinationPixel16bit;\r
- UINT32 SourcePixelX;\r
- UINT32 SourceLine;\r
- UINT32 DestinationPixelX;\r
- UINT32 DestinationLine;\r
- UINT32 BltBufferHorizontalResolution;\r
- UINTN WidthInBytes;\r
-\r
- Status = EFI_SUCCESS;\r
- PixelInformation = &This->Mode->Info->PixelInformation;\r
+ EFI_STATUS Status;\r
+ UINT32 HorizontalResolution;\r
+ LCD_BPP BitsPerPixel;\r
+ EFI_PIXEL_BITMASK *PixelInformation;\r
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiSourcePixel;\r
+ VOID *FrameBufferBase;\r
+ VOID *SourceAddr;\r
+ VOID *DestinationAddr;\r
+ UINT16 *DestinationPixel16bit;\r
+ UINT32 SourcePixelX;\r
+ UINT32 SourceLine;\r
+ UINT32 DestinationPixelX;\r
+ UINT32 DestinationLine;\r
+ UINT32 BltBufferHorizontalResolution;\r
+ UINTN WidthInBytes;\r
+\r
+ Status = EFI_SUCCESS;\r
+ PixelInformation = &This->Mode->Info->PixelInformation;\r
HorizontalResolution = This->Mode->Info->HorizontalResolution;\r
- FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
+ FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
\r
- if(( Delta != 0 ) && ( Delta != Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {\r
+ if ((Delta != 0) && (Delta != Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {\r
// Delta is not zero and it is different from the width.\r
// Divide it by the size of a pixel to find out the buffer's horizontal resolution.\r
- BltBufferHorizontalResolution = (UINT32) (Delta / sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL));\r
+ BltBufferHorizontalResolution = (UINT32)(Delta / sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));\r
} else {\r
BltBufferHorizontalResolution = Width;\r
}\r
\r
- LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);\r
+ LcdPlatformGetBpp (This->Mode->Mode, &BitsPerPixel);\r
\r
switch (BitsPerPixel) {\r
- case LcdBitsPerPixel_24:\r
- WidthInBytes = Width * 4;\r
-\r
- // Access each pixel inside the BltBuffer Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++)\r
- {\r
- // Calculate the source and target addresses using 32bit pointer arithmetic:\r
- SourceAddr = (VOID *)((UINT32 *)BltBuffer + SourceLine * BltBufferHorizontalResolution + SourceX );\r
- DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
-\r
- // Copy the entire row Y\r
- CopyMem( DestinationAddr, SourceAddr, WidthInBytes);\r
- }\r
- break;\r
+ case LcdBitsPerPixel_24:\r
+ WidthInBytes = Width * 4;\r
\r
- case LcdBitsPerPixel_16_555:\r
- // Access each pixel inside the BltBuffer Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++) {\r
+ // Access each pixel inside the BltBuffer Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
+ {\r
+ // Calculate the source and target addresses using 32bit pointer arithmetic:\r
+ SourceAddr = (VOID *)((UINT32 *)BltBuffer + SourceLine * BltBufferHorizontalResolution + SourceX);\r
+ DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);\r
+\r
+ // Copy the entire row Y\r
+ CopyMem (DestinationAddr, SourceAddr, WidthInBytes);\r
+ }\r
+\r
+ break;\r
\r
- for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
- SourcePixelX < SourceX + Width;\r
- SourcePixelX++, DestinationPixelX++)\r
+ case LcdBitsPerPixel_16_555:\r
+ // Access each pixel inside the BltBuffer Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
{\r
- // Calculate the source and target addresses:\r
- EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;\r
- DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
-\r
- // Copy the pixel into the new target\r
- // Only the most significant bits will be copied across:\r
- // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits\r
- *DestinationPixel16bit = (UINT16) (\r
- ( (EfiSourcePixel->Red << 7) & PixelInformation->RedMask )\r
- | ( (EfiSourcePixel->Green << 2) & PixelInformation->GreenMask )\r
- | ( (EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask )\r
- // | ( 0 & PixelInformation->ReservedMask )\r
- );\r
+ for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
+ SourcePixelX < SourceX + Width;\r
+ SourcePixelX++, DestinationPixelX++)\r
+ {\r
+ // Calculate the source and target addresses:\r
+ EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;\r
+ DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+\r
+ // Copy the pixel into the new target\r
+ // Only the most significant bits will be copied across:\r
+ // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits\r
+ *DestinationPixel16bit = (UINT16)(\r
+ ((EfiSourcePixel->Red << 7) & PixelInformation->RedMask)\r
+ | ((EfiSourcePixel->Green << 2) & PixelInformation->GreenMask)\r
+ | ((EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask)\r
+ // | ( 0 & PixelInformation->ReservedMask )\r
+ );\r
+ }\r
}\r
- }\r
- break;\r
\r
- case LcdBitsPerPixel_16_565:\r
- // Access each pixel inside the BltBuffer Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++) {\r
+ break;\r
\r
- for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
- SourcePixelX < SourceX + Width;\r
- SourcePixelX++, DestinationPixelX++)\r
+ case LcdBitsPerPixel_16_565:\r
+ // Access each pixel inside the BltBuffer Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
{\r
- // Calculate the source and target addresses:\r
- EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;\r
- DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
-\r
- // Copy the pixel into the new target\r
- // Only the most significant bits will be copied across:\r
- // To convert from 8 bits to 5 or 6 bits per pixel we throw away the 3 or 2 least significant bits\r
- // There is no room for the Reserved byte so we ignore that completely\r
- *DestinationPixel16bit = (UINT16) (\r
- ( (EfiSourcePixel->Red << 8) & PixelInformation->RedMask )\r
- | ( (EfiSourcePixel->Green << 3) & PixelInformation->GreenMask )\r
- | ( (EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask )\r
- );\r
+ for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
+ SourcePixelX < SourceX + Width;\r
+ SourcePixelX++, DestinationPixelX++)\r
+ {\r
+ // Calculate the source and target addresses:\r
+ EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;\r
+ DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+\r
+ // Copy the pixel into the new target\r
+ // Only the most significant bits will be copied across:\r
+ // To convert from 8 bits to 5 or 6 bits per pixel we throw away the 3 or 2 least significant bits\r
+ // There is no room for the Reserved byte so we ignore that completely\r
+ *DestinationPixel16bit = (UINT16)(\r
+ ((EfiSourcePixel->Red << 8) & PixelInformation->RedMask)\r
+ | ((EfiSourcePixel->Green << 3) & PixelInformation->GreenMask)\r
+ | ((EfiSourcePixel->Blue >> 3) & PixelInformation->BlueMask)\r
+ );\r
+ }\r
}\r
- }\r
- break;\r
\r
- case LcdBitsPerPixel_12_444:\r
- // Access each pixel inside the BltBuffer Memory\r
- for (SourceLine = SourceY, DestinationLine = DestinationY;\r
- SourceLine < SourceY + Height;\r
- SourceLine++, DestinationLine++) {\r
+ break;\r
\r
- for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
- SourcePixelX < SourceX + Width;\r
- SourcePixelX++, DestinationPixelX++)\r
+ case LcdBitsPerPixel_12_444:\r
+ // Access each pixel inside the BltBuffer Memory\r
+ for (SourceLine = SourceY, DestinationLine = DestinationY;\r
+ SourceLine < SourceY + Height;\r
+ SourceLine++, DestinationLine++)\r
{\r
- // Calculate the source and target addresses:\r
- EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;\r
- DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
-\r
- // Copy the pixel into the new target\r
- // Only the most significant bits will be copied across:\r
- // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits\r
- *DestinationPixel16bit = (UINT16) (\r
- ( (EfiSourcePixel->Red << 4) & PixelInformation->RedMask )\r
- | ( (EfiSourcePixel->Green ) & PixelInformation->GreenMask )\r
- | ( (EfiSourcePixel->Blue >> 4) & PixelInformation->BlueMask )\r
- // | ( 0 & PixelInformation->ReservedMask )\r
- );\r
+ for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;\r
+ SourcePixelX < SourceX + Width;\r
+ SourcePixelX++, DestinationPixelX++)\r
+ {\r
+ // Calculate the source and target addresses:\r
+ EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;\r
+ DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;\r
+\r
+ // Copy the pixel into the new target\r
+ // Only the most significant bits will be copied across:\r
+ // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits\r
+ *DestinationPixel16bit = (UINT16)(\r
+ ((EfiSourcePixel->Red << 4) & PixelInformation->RedMask)\r
+ | ((EfiSourcePixel->Green) & PixelInformation->GreenMask)\r
+ | ((EfiSourcePixel->Blue >> 4) & PixelInformation->BlueMask)\r
+ // | ( 0 & PixelInformation->ReservedMask )\r
+ );\r
+ }\r
}\r
- }\r
- break;\r
-\r
- case LcdBitsPerPixel_8:\r
- case LcdBitsPerPixel_4:\r
- case LcdBitsPerPixel_2:\r
- case LcdBitsPerPixel_1:\r
- default:\r
- // Can't handle this case\r
- DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltBufferToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
- Status = EFI_INVALID_PARAMETER;\r
- break;\r
+\r
+ break;\r
+\r
+ case LcdBitsPerPixel_8:\r
+ case LcdBitsPerPixel_4:\r
+ case LcdBitsPerPixel_2:\r
+ case LcdBitsPerPixel_1:\r
+ default:\r
+ // Can't handle this case\r
+ DEBUG ((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltBufferToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));\r
+ Status = EFI_INVALID_PARAMETER;\r
+ break;\r
}\r
+\r
return Status;\r
}\r
\r
STATIC\r
EFI_STATUS\r
BltVideoToVideo (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
+ IN UINTN SourceX,\r
+ IN UINTN SourceY,\r
+ IN UINTN DestinationX,\r
+ IN UINTN DestinationY,\r
+ IN UINTN Width,\r
+ IN UINTN Height,\r
+ IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 HorizontalResolution;\r
- LCD_BPP BitsPerPixel;\r
- VOID *FrameBufferBase;\r
+ EFI_STATUS Status;\r
+ UINT32 HorizontalResolution;\r
+ LCD_BPP BitsPerPixel;\r
+ VOID *FrameBufferBase;\r
\r
HorizontalResolution = This->Mode->Info->HorizontalResolution;\r
- FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
+ FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
\r
//\r
// BltVideo to BltVideo:\r
// Source is the Video Memory,\r
// Destination is the Video Memory\r
\r
- LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);\r
+ LcdPlatformGetBpp (This->Mode->Mode, &BitsPerPixel);\r
FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));\r
\r
// The UEFI spec currently states:\r
// "There is no limitation on the overlapping of the source and destination rectangles"\r
// Therefore, we must be careful to avoid overwriting the source data\r
- if( SourceY == DestinationY ) {\r
+ if ( SourceY == DestinationY ) {\r
// Copying within the same height, e.g. horizontal shift\r
- if( SourceX == DestinationX ) {\r
+ if ( SourceX == DestinationX ) {\r
// Nothing to do\r
Status = EFI_SUCCESS;\r
- } else if( ((SourceX>DestinationX)?(SourceX - DestinationX):(DestinationX - SourceX)) < Width ) {\r
+ } else if (((SourceX > DestinationX) ? (SourceX - DestinationX) : (DestinationX - SourceX)) < Width ) {\r
// There is overlap\r
- Status = VideoCopyHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );\r
+ Status = VideoCopyHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height);\r
} else {\r
// No overlap\r
- Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );\r
+ Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height);\r
}\r
} else {\r
// Copying from different heights\r
- Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );\r
+ Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height);\r
}\r
\r
return Status;\r
EFI_STATUS\r
EFIAPI\r
LcdGraphicsBlt (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
- IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
- IN UINTN SourceX,\r
- IN UINTN SourceY,\r
- IN UINTN DestinationX,\r
- IN UINTN DestinationY,\r
- IN UINTN Width,\r
- IN UINTN Height,\r
- IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,\r
+ IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,\r
+ IN UINTN SourceX,\r
+ IN UINTN SourceY,\r
+ IN UINTN DestinationX,\r
+ IN UINTN DestinationY,\r
+ IN UINTN Width,\r
+ IN UINTN Height,\r
+ IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 HorizontalResolution;\r
- UINT32 VerticalResolution;\r
- LCD_INSTANCE* Instance;\r
+ EFI_STATUS Status;\r
+ UINT32 HorizontalResolution;\r
+ UINT32 VerticalResolution;\r
+ LCD_INSTANCE *Instance;\r
\r
- Instance = LCD_INSTANCE_FROM_GOP_THIS(This);\r
+ Instance = LCD_INSTANCE_FROM_GOP_THIS (This);\r
\r
// Setup the hardware if not already done\r
if (!mDisplayInitialized) {\r
Status = InitializeDisplay (Instance);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
}\r
HorizontalResolution = This->Mode->Info->HorizontalResolution;\r
VerticalResolution = This->Mode->Info->VerticalResolution;\r
\r
- DEBUG((DEBUG_INFO, "LcdGraphicsBlt (BltOperation:%d,DestX:%d,DestY:%d,Width:%d,Height:%d) res(%d,%d)\n",\r
- BltOperation,DestinationX,DestinationY,Width,Height,HorizontalResolution,VerticalResolution));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "LcdGraphicsBlt (BltOperation:%d,DestX:%d,DestY:%d,Width:%d,Height:%d) res(%d,%d)\n",\r
+ BltOperation,\r
+ DestinationX,\r
+ DestinationY,\r
+ Width,\r
+ Height,\r
+ HorizontalResolution,\r
+ VerticalResolution\r
+ ));\r
\r
// Check we have reasonable parameters\r
- if (Width == 0 || Height == 0) {\r
- DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid dimension: Zero size area.\n" ));\r
+ if ((Width == 0) || (Height == 0)) {\r
+ DEBUG ((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid dimension: Zero size area.\n"));\r
Status = EFI_INVALID_PARAMETER;\r
goto EXIT;\r
}\r
\r
if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToBltBuffer)) {\r
- ASSERT( BltBuffer != NULL);\r
+ ASSERT (BltBuffer != NULL);\r
}\r
\r
/*if ((DestinationX >= HorizontalResolution) || (DestinationY >= VerticalResolution)) {\r
// If we are reading data out of the video buffer, check that the source area is within the display limits\r
if ((BltOperation == EfiBltVideoToBltBuffer) || (BltOperation == EfiBltVideoToVideo)) {\r
if ((SourceY + Height > VerticalResolution) || (SourceX + Width > HorizontalResolution)) {\r
- DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid source resolution.\n" ));\r
- DEBUG((DEBUG_INFO, " - SourceY=%d + Height=%d > VerticalResolution=%d.\n", SourceY, Height, VerticalResolution ));\r
- DEBUG((DEBUG_INFO, " - SourceX=%d + Width=%d > HorizontalResolution=%d.\n", SourceX, Width, HorizontalResolution ));\r
+ DEBUG ((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid source resolution.\n"));\r
+ DEBUG ((DEBUG_INFO, " - SourceY=%d + Height=%d > VerticalResolution=%d.\n", SourceY, Height, VerticalResolution));\r
+ DEBUG ((DEBUG_INFO, " - SourceX=%d + Width=%d > HorizontalResolution=%d.\n", SourceX, Width, HorizontalResolution));\r
Status = EFI_INVALID_PARAMETER;\r
goto EXIT;\r
}\r
// If we are writing data into the video buffer, that the destination area is within the display limits\r
if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToVideo)) {\r
if ((DestinationY + Height > VerticalResolution) || (DestinationX + Width > HorizontalResolution)) {\r
- DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid destination resolution.\n" ));\r
- DEBUG((DEBUG_INFO, " - DestinationY=%d + Height=%d > VerticalResolution=%d.\n", DestinationY, Height, VerticalResolution ));\r
- DEBUG((DEBUG_INFO, " - DestinationX=%d + Width=%d > HorizontalResolution=%d.\n", DestinationX, Width, HorizontalResolution ));\r
+ DEBUG ((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid destination resolution.\n"));\r
+ DEBUG ((DEBUG_INFO, " - DestinationY=%d + Height=%d > VerticalResolution=%d.\n", DestinationY, Height, VerticalResolution));\r
+ DEBUG ((DEBUG_INFO, " - DestinationX=%d + Width=%d > HorizontalResolution=%d.\n", DestinationX, Width, HorizontalResolution));\r
Status = EFI_INVALID_PARAMETER;\r
goto EXIT;\r
}\r
//\r
\r
switch (BltOperation) {\r
- case EfiBltVideoFill:\r
- Status = BltVideoFill (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
- break;\r
+ case EfiBltVideoFill:\r
+ Status = BltVideoFill (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
+ break;\r
\r
- case EfiBltVideoToBltBuffer:\r
- Status = BltVideoToBltBuffer (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
- break;\r
+ case EfiBltVideoToBltBuffer:\r
+ Status = BltVideoToBltBuffer (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
+ break;\r
\r
- case EfiBltBufferToVideo:\r
- Status = BltBufferToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
- break;\r
+ case EfiBltBufferToVideo:\r
+ Status = BltBufferToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
+ break;\r
\r
- case EfiBltVideoToVideo:\r
- Status = BltVideoToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
- break;\r
+ case EfiBltVideoToVideo:\r
+ Status = BltVideoToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);\r
+ break;\r
\r
- case EfiGraphicsOutputBltOperationMax:\r
- default:\r
- DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: Invalid Operation\n"));\r
- Status = EFI_INVALID_PARAMETER;\r
- break;\r
+ case EfiGraphicsOutputBltOperationMax:\r
+ default:\r
+ DEBUG ((DEBUG_ERROR, "LcdGraphicsBlt: Invalid Operation\n"));\r
+ Status = EFI_INVALID_PARAMETER;\r
+ break;\r
}\r
\r
EXIT:\r
// Global variables\r
//\r
\r
-BOOLEAN mDisplayInitialized = FALSE;\r
+BOOLEAN mDisplayInitialized = FALSE;\r
\r
-LCD_INSTANCE mLcdTemplate = {\r
+LCD_INSTANCE mLcdTemplate = {\r
LCD_INSTANCE_SIGNATURE,\r
- NULL, // Handle\r
- { // ModeInfo\r
- 0, // Version\r
- 0, // HorizontalResolution\r
- 0, // VerticalResolution\r
+ NULL, // Handle\r
+ { // ModeInfo\r
+ 0, // Version\r
+ 0, // HorizontalResolution\r
+ 0, // VerticalResolution\r
PixelBltOnly, // PixelFormat\r
- { 0 }, // PixelInformation\r
- 0, // PixelsPerScanLine\r
+ { 0 }, // PixelInformation\r
+ 0, // PixelsPerScanLine\r
},\r
{\r
- 0, // MaxMode;\r
- 0, // Mode;\r
+ 0, // MaxMode;\r
+ 0, // Mode;\r
NULL, // Info;\r
- 0, // SizeOfInfo;\r
- 0, // FrameBufferBase;\r
- 0 // FrameBufferSize;\r
+ 0, // SizeOfInfo;\r
+ 0, // FrameBufferBase;\r
+ 0 // FrameBufferSize;\r
},\r
- { // Gop\r
- LcdGraphicsQueryMode, // QueryMode\r
- LcdGraphicsSetMode, // SetMode\r
- LcdGraphicsBlt, // Blt\r
- NULL // *Mode\r
+ { // Gop\r
+ LcdGraphicsQueryMode, // QueryMode\r
+ LcdGraphicsSetMode, // SetMode\r
+ LcdGraphicsBlt, // Blt\r
+ NULL // *Mode\r
},\r
{ // DevicePath\r
{\r
{\r
- HARDWARE_DEVICE_PATH, HW_VENDOR_DP,\r
+ HARDWARE_DEVICE_PATH, HW_VENDOR_DP,\r
{\r
(UINT8)(sizeof (VENDOR_DEVICE_PATH)),\r
(UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)\r
\r
EFI_STATUS\r
LcdInstanceContructor (\r
- OUT LCD_INSTANCE** NewInstance\r
+ OUT LCD_INSTANCE **NewInstance\r
)\r
{\r
- LCD_INSTANCE* Instance;\r
+ LCD_INSTANCE *Instance;\r
\r
Instance = AllocateCopyPool (sizeof (LCD_INSTANCE), &mLcdTemplate);\r
if (Instance == NULL) {\r
\r
EFI_STATUS\r
InitializeDisplay (\r
- IN LCD_INSTANCE* Instance\r
+ IN LCD_INSTANCE *Instance\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_PHYSICAL_ADDRESS VramBaseAddress;\r
- UINTN VramSize;\r
+ EFI_STATUS Status;\r
+ EFI_PHYSICAL_ADDRESS VramBaseAddress;\r
+ UINTN VramSize;\r
\r
Status = LcdPlatformGetVram (&VramBaseAddress, &VramSize);\r
if (EFI_ERROR (Status)) {\r
EFI_STATUS\r
EFIAPI\r
LcdGraphicsOutputDxeInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- LCD_INSTANCE* Instance;\r
+ EFI_STATUS Status;\r
+ LCD_INSTANCE *Instance;\r
\r
Status = LcdIdentify ();\r
if (EFI_ERROR (Status)) {\r
EFI_STATUS\r
EFIAPI\r
LcdGraphicsQueryMode (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN UINT32 ModeNumber,\r
- OUT UINTN *SizeOfInfo,\r
- OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN UINT32 ModeNumber,\r
+ OUT UINTN *SizeOfInfo,\r
+ OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info\r
)\r
{\r
- EFI_STATUS Status;\r
- LCD_INSTANCE *Instance;\r
+ EFI_STATUS Status;\r
+ LCD_INSTANCE *Instance;\r
\r
Instance = LCD_INSTANCE_FROM_GOP_THIS (This);\r
\r
if ((This == NULL) ||\r
(Info == NULL) ||\r
(SizeOfInfo == NULL) ||\r
- (ModeNumber >= This->Mode->MaxMode)) {\r
+ (ModeNumber >= This->Mode->MaxMode))\r
+ {\r
DEBUG ((DEBUG_ERROR, "LcdGraphicsQueryMode: ERROR - For mode number %d : Invalid Parameter.\n", ModeNumber));\r
Status = EFI_INVALID_PARAMETER;\r
goto EXIT;\r
EFI_STATUS\r
EFIAPI\r
LcdGraphicsSetMode (\r
- IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
- IN UINT32 ModeNumber\r
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
+ IN UINT32 ModeNumber\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL FillColour;\r
- LCD_INSTANCE* Instance;\r
- LCD_BPP Bpp;\r
+ EFI_STATUS Status;\r
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL FillColour;\r
+ LCD_INSTANCE *Instance;\r
+ LCD_BPP Bpp;\r
\r
Instance = LCD_INSTANCE_FROM_GOP_THIS (This);\r
\r
DEBUG ((DEBUG_ERROR, "LcdGraphicsSetMode: ERROR - Couldn't get bytes per pixel, status: %r\n", Status));\r
goto EXIT;\r
}\r
+\r
This->Mode->FrameBufferSize = Instance->ModeInfo.VerticalResolution\r
- * Instance->ModeInfo.PixelsPerScanLine\r
- * GetBytesPerPixel (Bpp);\r
+ * Instance->ModeInfo.PixelsPerScanLine\r
+ * GetBytesPerPixel (Bpp);\r
\r
// Set the hardware to the new mode\r
Status = LcdSetMode (ModeNumber);\r
\r
// Fill the entire visible area with the same colour.\r
Status = This->Blt (\r
- This,\r
- &FillColour,\r
- EfiBltVideoFill,\r
- 0,\r
- 0,\r
- 0,\r
- 0,\r
- This->Mode->Info->HorizontalResolution,\r
- This->Mode->Info->VerticalResolution,\r
- 0\r
- );\r
+ This,\r
+ &FillColour,\r
+ EfiBltVideoFill,\r
+ 0,\r
+ 0,\r
+ 0,\r
+ 0,\r
+ This->Mode->Info->HorizontalResolution,\r
+ This->Mode->Info->VerticalResolution,\r
+ 0\r
+ );\r
\r
EXIT:\r
return Status;\r
\r
UINTN\r
GetBytesPerPixel (\r
- IN LCD_BPP Bpp\r
+ IN LCD_BPP Bpp\r
)\r
{\r
switch (Bpp) {\r
- case LcdBitsPerPixel_24:\r
- return 4;\r
-\r
- case LcdBitsPerPixel_16_565:\r
- case LcdBitsPerPixel_16_555:\r
- case LcdBitsPerPixel_12_444:\r
- return 2;\r
-\r
- case LcdBitsPerPixel_8:\r
- case LcdBitsPerPixel_4:\r
- case LcdBitsPerPixel_2:\r
- case LcdBitsPerPixel_1:\r
- return 1;\r
-\r
- default:\r
- return 0;\r
+ case LcdBitsPerPixel_24:\r
+ return 4;\r
+\r
+ case LcdBitsPerPixel_16_565:\r
+ case LcdBitsPerPixel_16_555:\r
+ case LcdBitsPerPixel_12_444:\r
+ return 2;\r
+\r
+ case LcdBitsPerPixel_8:\r
+ case LcdBitsPerPixel_4:\r
+ case LcdBitsPerPixel_2:\r
+ case LcdBitsPerPixel_1:\r
+ return 1;\r
+\r
+ default:\r
+ return 0;\r
}\r
}\r
// Device structures\r
//\r
typedef struct {\r
- VENDOR_DEVICE_PATH Guid;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
+ VENDOR_DEVICE_PATH Guid;\r
+ EFI_DEVICE_PATH_PROTOCOL End;\r
} LCD_GRAPHICS_DEVICE_PATH;\r
\r
typedef struct {\r
- UINT32 Signature;\r
- EFI_HANDLE Handle;\r
- EFI_GRAPHICS_OUTPUT_MODE_INFORMATION ModeInfo;\r
- EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE Mode;\r
- EFI_GRAPHICS_OUTPUT_PROTOCOL Gop;\r
- LCD_GRAPHICS_DEVICE_PATH DevicePath;\r
- EFI_EVENT ExitBootServicesEvent;\r
+ UINT32 Signature;\r
+ EFI_HANDLE Handle;\r
+ EFI_GRAPHICS_OUTPUT_MODE_INFORMATION ModeInfo;\r
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE Mode;\r
+ EFI_GRAPHICS_OUTPUT_PROTOCOL Gop;\r
+ LCD_GRAPHICS_DEVICE_PATH DevicePath;\r
+ EFI_EVENT ExitBootServicesEvent;\r
} LCD_INSTANCE;\r
\r
#define LCD_INSTANCE_SIGNATURE SIGNATURE_32('l', 'c', 'd', '0')\r
\r
-#define LCD_INSTANCE_FROM_GOP_THIS(a) CR (a, LCD_INSTANCE, Gop, LCD_INSTANCE_SIGNATURE)\r
+#define LCD_INSTANCE_FROM_GOP_THIS(a) CR (a, LCD_INSTANCE, Gop, LCD_INSTANCE_SIGNATURE)\r
\r
//\r
// Function Prototypes\r
\r
VOID\r
LcdGraphicsExitBootServicesEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
-);\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ );\r
\r
EFI_STATUS\r
EFIAPI\r
IN UINT32 ModeNumber,\r
OUT UINTN *SizeOfInfo,\r
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info\r
-);\r
+ );\r
\r
EFI_STATUS\r
EFIAPI\r
LcdGraphicsSetMode (\r
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,\r
IN UINT32 ModeNumber\r
-);\r
+ );\r
\r
EFI_STATUS\r
EFIAPI\r
IN UINTN Width,\r
IN UINTN Height,\r
IN UINTN Delta OPTIONAL\r
-);\r
+ );\r
\r
UINTN\r
GetBytesPerPixel (\r
- IN LCD_BPP Bpp\r
+ IN LCD_BPP Bpp\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
GraphicsOutputDxeInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
-);\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
\r
EFI_STATUS\r
InitializeDisplay (\r
- IN LCD_INSTANCE* Instance\r
-);\r
+ IN LCD_INSTANCE *Instance\r
+ );\r
\r
#endif /* LCD_GRAPHICS_OUTPUT_DXE_H_ */\r
//\r
// Global variable declarations\r
//\r
-extern NOR_FLASH_INSTANCE **mNorFlashInstances;\r
-extern UINT32 mNorFlashDeviceCount;\r
+extern NOR_FLASH_INSTANCE **mNorFlashInstances;\r
+extern UINT32 mNorFlashDeviceCount;\r
\r
UINT32\r
NorFlashReadStatusRegister (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN SR_Address\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN SR_Address\r
)\r
{\r
// Prepare to read the status register\r
STATIC\r
BOOLEAN\r
NorFlashBlockIsLocked (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
)\r
{\r
- UINT32 LockStatus;\r
+ UINT32 LockStatus;\r
\r
// Send command for reading device id\r
SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);\r
\r
// Read block lock status\r
- LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));\r
+ LockStatus = MmioRead32 (CREATE_NOR_ADDRESS (BlockAddress, 2));\r
\r
// Decode block lock status\r
- LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);\r
+ LockStatus = FOLD_32BIT_INTO_16BIT (LockStatus);\r
\r
if ((LockStatus & 0x2) != 0) {\r
- DEBUG((DEBUG_ERROR, "NorFlashBlockIsLocked: WARNING: Block LOCKED DOWN\n"));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashBlockIsLocked: WARNING: Block LOCKED DOWN\n"));\r
}\r
\r
return ((LockStatus & 0x1) != 0);\r
STATIC\r
EFI_STATUS\r
NorFlashUnlockSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
)\r
{\r
- UINT32 LockStatus;\r
+ UINT32 LockStatus;\r
\r
// Raise the Task Priority Level to TPL_NOTIFY to serialise all its operations\r
// and to protect shared data structures.\r
SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);\r
\r
// Read block lock status\r
- LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));\r
+ LockStatus = MmioRead32 (CREATE_NOR_ADDRESS (BlockAddress, 2));\r
\r
// Decode block lock status\r
- LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);\r
+ LockStatus = FOLD_32BIT_INTO_16BIT (LockStatus);\r
} while ((LockStatus & 0x1) == 1);\r
} else {\r
// Request a lock setup\r
// Put device back into Read Array mode\r
SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_READ_ARRAY);\r
\r
- DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: BlockAddress=0x%08x\n", BlockAddress));\r
+ DEBUG ((DEBUG_BLKIO, "UnlockSingleBlock: BlockAddress=0x%08x\n", BlockAddress));\r
\r
return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
NorFlashUnlockSingleBlockIfNecessary (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = EFI_SUCCESS;\r
\r
return Status;\r
}\r
\r
-\r
/**\r
* The following function presumes that the block has already been unlocked.\r
**/\r
EFI_STATUS\r
NorFlashEraseSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 StatusRegister;\r
+ EFI_STATUS Status;\r
+ UINT32 StatusRegister;\r
\r
Status = EFI_SUCCESS;\r
\r
// Request a block erase and then confirm it\r
- SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP);\r
- SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM);\r
+ SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP);\r
+ SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM);\r
\r
// Wait until the status register gives us the all clear\r
do {\r
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);\r
\r
if (StatusRegister & P30_SR_BIT_VPP) {\r
- DEBUG((DEBUG_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: VPP Range Error\n", BlockAddress));\r
+ DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: VPP Range Error\n", BlockAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
if ((StatusRegister & (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) == (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) {\r
- DEBUG((DEBUG_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Command Sequence Error\n", BlockAddress));\r
+ DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Command Sequence Error\n", BlockAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
if (StatusRegister & P30_SR_BIT_ERASE) {\r
- DEBUG((DEBUG_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Erase Error StatusRegister:0x%X\n", BlockAddress, StatusRegister));\r
+ DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Erase Error StatusRegister:0x%X\n", BlockAddress, StatusRegister));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {\r
// The debug level message has been reduced because a device lock might happen. In this case we just retry it ...\r
- DEBUG((DEBUG_INFO,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error\n", BlockAddress));\r
+ DEBUG ((DEBUG_INFO, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error\n", BlockAddress));\r
Status = EFI_WRITE_PROTECTED;\r
}\r
\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
// Clear the Status Register\r
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);\r
}\r
\r
EFI_STATUS\r
NorFlashWriteSingleWord (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN WordAddress,\r
- IN UINT32 WriteData\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN WordAddress,\r
+ IN UINT32 WriteData\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 StatusRegister;\r
+ EFI_STATUS Status;\r
+ UINT32 StatusRegister;\r
\r
Status = EFI_SUCCESS;\r
\r
// Request a write single word command\r
- SEND_NOR_COMMAND(WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP);\r
+ SEND_NOR_COMMAND (WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP);\r
\r
// Store the word into NOR Flash;\r
MmioWrite32 (WordAddress, WriteData);\r
// The chip is busy while the WRITE bit is not asserted\r
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);\r
\r
-\r
// Perform a full status check:\r
// Mask the relevant bits of Status Register.\r
// Everything should be zero, if not, we have a problem\r
\r
if (StatusRegister & P30_SR_BIT_VPP) {\r
- DEBUG((DEBUG_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): VPP Range Error\n",WordAddress));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleWord(WordAddress:0x%X): VPP Range Error\n", WordAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
if (StatusRegister & P30_SR_BIT_PROGRAM) {\r
- DEBUG((DEBUG_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Program Error\n",WordAddress));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleWord(WordAddress:0x%X): Program Error\n", WordAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {\r
- DEBUG((DEBUG_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Device Protect Error\n",WordAddress));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleWord(WordAddress:0x%X): Device Protect Error\n", WordAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
- if (!EFI_ERROR(Status)) {\r
+ if (!EFI_ERROR (Status)) {\r
// Clear the Status Register\r
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);\r
}\r
*/\r
EFI_STATUS\r
NorFlashWriteBuffer (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN TargetAddress,\r
- IN UINTN BufferSizeInBytes,\r
- IN UINT32 *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN TargetAddress,\r
+ IN UINTN BufferSizeInBytes,\r
+ IN UINT32 *Buffer\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN BufferSizeInWords;\r
- UINTN Count;\r
- volatile UINT32 *Data;\r
- UINTN WaitForBuffer;\r
- BOOLEAN BufferAvailable;\r
- UINT32 StatusRegister;\r
+ EFI_STATUS Status;\r
+ UINTN BufferSizeInWords;\r
+ UINTN Count;\r
+ volatile UINT32 *Data;\r
+ UINTN WaitForBuffer;\r
+ BOOLEAN BufferAvailable;\r
+ UINT32 StatusRegister;\r
\r
WaitForBuffer = MAX_BUFFERED_PROG_ITERATIONS;\r
BufferAvailable = FALSE;\r
// Check the availability of the buffer\r
do {\r
// Issue the Buffered Program Setup command\r
- SEND_NOR_COMMAND(TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_SETUP);\r
+ SEND_NOR_COMMAND (TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_SETUP);\r
\r
// Read back the status register bit#7 from the same address\r
if (((*Data) & P30_SR_BIT_WRITE) == P30_SR_BIT_WRITE) {\r
\r
// Update the loop counter\r
WaitForBuffer--;\r
-\r
} while ((WaitForBuffer > 0) && (BufferAvailable == FALSE));\r
\r
// The buffer was not available for writing\r
\r
// Write the word count, which is (buffer_size_in_words - 1),\r
// because word count 0 means one word.\r
- SEND_NOR_COMMAND(TargetAddress, 0, (BufferSizeInWords - 1));\r
+ SEND_NOR_COMMAND (TargetAddress, 0, (BufferSizeInWords - 1));\r
\r
// Write the data to the NOR Flash, advancing each address by 4 bytes\r
- for(Count=0; Count < BufferSizeInWords; Count++, Data++, Buffer++) {\r
+ for (Count = 0; Count < BufferSizeInWords; Count++, Data++, Buffer++) {\r
MmioWrite32 ((UINTN)Data, *Buffer);\r
}\r
\r
// The chip is busy while the WRITE bit is not asserted\r
} while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);\r
\r
-\r
// Perform a full status check:\r
// Mask the relevant bits of Status Register.\r
// Everything should be zero, if not, we have a problem\r
\r
- Status = EFI_SUCCESS;\r
+ Status = EFI_SUCCESS;\r
\r
if (StatusRegister & P30_SR_BIT_VPP) {\r
- DEBUG((DEBUG_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): VPP Range Error\n", TargetAddress));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteBuffer(TargetAddress:0x%X): VPP Range Error\n", TargetAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
if (StatusRegister & P30_SR_BIT_PROGRAM) {\r
- DEBUG((DEBUG_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Program Error\n", TargetAddress));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteBuffer(TargetAddress:0x%X): Program Error\n", TargetAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {\r
- DEBUG((DEBUG_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Device Protect Error\n",TargetAddress));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteBuffer(TargetAddress:0x%X): Device Protect Error\n", TargetAddress));\r
Status = EFI_DEVICE_ERROR;\r
}\r
\r
- if (!EFI_ERROR(Status)) {\r
+ if (!EFI_ERROR (Status)) {\r
// Clear the Status Register\r
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);\r
}\r
\r
EFI_STATUS\r
NorFlashWriteBlocks (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- IN VOID *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ IN VOID *Buffer\r
)\r
{\r
- UINT32 *pWriteBuffer;\r
- EFI_STATUS Status;\r
- EFI_LBA CurrentBlock;\r
- UINT32 BlockSizeInWords;\r
- UINT32 NumBlocks;\r
- UINT32 BlockCount;\r
+ UINT32 *pWriteBuffer;\r
+ EFI_STATUS Status;\r
+ EFI_LBA CurrentBlock;\r
+ UINT32 BlockSizeInWords;\r
+ UINT32 NumBlocks;\r
+ UINT32 BlockCount;\r
\r
Status = EFI_SUCCESS;\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if(Instance->Media.ReadOnly == TRUE) {\r
+ if (Instance->Media.ReadOnly == TRUE) {\r
return EFI_WRITE_PROTECTED;\r
}\r
\r
// We must have some bytes to read\r
- DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BufferSizeInBytes=0x%x\n", BufferSizeInBytes));\r
- if(BufferSizeInBytes == 0) {\r
+ DEBUG ((DEBUG_BLKIO, "NorFlashWriteBlocks: BufferSizeInBytes=0x%x\n", BufferSizeInBytes));\r
+ if (BufferSizeInBytes == 0) {\r
return EFI_BAD_BUFFER_SIZE;\r
}\r
\r
// The size of the buffer must be a multiple of the block size\r
- DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BlockSize in bytes =0x%x\n", Instance->Media.BlockSize));\r
+ DEBUG ((DEBUG_BLKIO, "NorFlashWriteBlocks: BlockSize in bytes =0x%x\n", Instance->Media.BlockSize));\r
if ((BufferSizeInBytes % Instance->Media.BlockSize) != 0) {\r
return EFI_BAD_BUFFER_SIZE;\r
}\r
\r
// All blocks must be within the device\r
- NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize ;\r
+ NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize;\r
\r
- DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld.\n", NumBlocks, Instance->Media.LastBlock, Lba));\r
+ DEBUG ((DEBUG_BLKIO, "NorFlashWriteBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld.\n", NumBlocks, Instance->Media.LastBlock, Lba));\r
\r
if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {\r
- DEBUG((DEBUG_ERROR, "NorFlashWriteBlocks: ERROR - Write will exceed last block.\n"));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteBlocks: ERROR - Write will exceed last block.\n"));\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
pWriteBuffer = (UINT32 *)Buffer;\r
\r
CurrentBlock = Lba;\r
- for (BlockCount=0; BlockCount < NumBlocks; BlockCount++, CurrentBlock++, pWriteBuffer = pWriteBuffer + BlockSizeInWords) {\r
-\r
- DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock));\r
+ for (BlockCount = 0; BlockCount < NumBlocks; BlockCount++, CurrentBlock++, pWriteBuffer = pWriteBuffer + BlockSizeInWords) {\r
+ DEBUG ((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock));\r
\r
Status = NorFlashWriteFullBlock (Instance, CurrentBlock, pWriteBuffer, BlockSizeInWords);\r
\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
break;\r
}\r
}\r
\r
- DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Exit Status = \"%r\".\n", Status));\r
+ DEBUG ((DEBUG_BLKIO, "NorFlashWriteBlocks: Exit Status = \"%r\".\n", Status));\r
return Status;\r
}\r
\r
-#define BOTH_ALIGNED(a, b, align) ((((UINTN)(a) | (UINTN)(b)) & ((align) - 1)) == 0)\r
+#define BOTH_ALIGNED(a, b, align) ((((UINTN)(a) | (UINTN)(b)) & ((align) - 1)) == 0)\r
\r
/**\r
Copy Length bytes from Source to Destination, using aligned accesses only.\r
STATIC\r
VOID *\r
AlignedCopyMem (\r
- OUT VOID *DestinationBuffer,\r
- IN CONST VOID *SourceBuffer,\r
- IN UINTN Length\r
+ OUT VOID *DestinationBuffer,\r
+ IN CONST VOID *SourceBuffer,\r
+ IN UINTN Length\r
)\r
{\r
- UINT8 *Destination8;\r
- CONST UINT8 *Source8;\r
- UINT32 *Destination32;\r
- CONST UINT32 *Source32;\r
- UINT64 *Destination64;\r
- CONST UINT64 *Source64;\r
-\r
- if (BOTH_ALIGNED(DestinationBuffer, SourceBuffer, 8) && Length >= 8) {\r
+ UINT8 *Destination8;\r
+ CONST UINT8 *Source8;\r
+ UINT32 *Destination32;\r
+ CONST UINT32 *Source32;\r
+ UINT64 *Destination64;\r
+ CONST UINT64 *Source64;\r
+\r
+ if (BOTH_ALIGNED (DestinationBuffer, SourceBuffer, 8) && (Length >= 8)) {\r
Destination64 = DestinationBuffer;\r
- Source64 = SourceBuffer;\r
+ Source64 = SourceBuffer;\r
while (Length >= 8) {\r
*Destination64++ = *Source64++;\r
- Length -= 8;\r
+ Length -= 8;\r
}\r
\r
Destination8 = (UINT8 *)Destination64;\r
- Source8 = (CONST UINT8 *)Source64;\r
- } else if (BOTH_ALIGNED(DestinationBuffer, SourceBuffer, 4) && Length >= 4) {\r
+ Source8 = (CONST UINT8 *)Source64;\r
+ } else if (BOTH_ALIGNED (DestinationBuffer, SourceBuffer, 4) && (Length >= 4)) {\r
Destination32 = DestinationBuffer;\r
- Source32 = SourceBuffer;\r
+ Source32 = SourceBuffer;\r
while (Length >= 4) {\r
*Destination32++ = *Source32++;\r
- Length -= 4;\r
+ Length -= 4;\r
}\r
\r
Destination8 = (UINT8 *)Destination32;\r
- Source8 = (CONST UINT8 *)Source32;\r
+ Source8 = (CONST UINT8 *)Source32;\r
} else {\r
Destination8 = DestinationBuffer;\r
- Source8 = SourceBuffer;\r
+ Source8 = SourceBuffer;\r
}\r
+\r
while (Length-- != 0) {\r
*Destination8++ = *Source8++;\r
}\r
+\r
return DestinationBuffer;\r
}\r
\r
EFI_STATUS\r
NorFlashReadBlocks (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- OUT VOID *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ OUT VOID *Buffer\r
)\r
{\r
- UINT32 NumBlocks;\r
- UINTN StartAddress;\r
-\r
- DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BufferSize=0x%xB BlockSize=0x%xB LastBlock=%ld, Lba=%ld.\n",\r
- BufferSizeInBytes, Instance->Media.BlockSize, Instance->Media.LastBlock, Lba));\r
+ UINT32 NumBlocks;\r
+ UINTN StartAddress;\r
+\r
+ DEBUG ((\r
+ DEBUG_BLKIO,\r
+ "NorFlashReadBlocks: BufferSize=0x%xB BlockSize=0x%xB LastBlock=%ld, Lba=%ld.\n",\r
+ BufferSizeInBytes,\r
+ Instance->Media.BlockSize,\r
+ Instance->Media.LastBlock,\r
+ Lba\r
+ ));\r
\r
// The buffer must be valid\r
if (Buffer == NULL) {\r
}\r
\r
// All blocks must be within the device\r
- NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize ;\r
+ NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize;\r
\r
if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {\r
- DEBUG((DEBUG_ERROR, "NorFlashReadBlocks: ERROR - Read will exceed last block\n"));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashReadBlocks: ERROR - Read will exceed last block\n"));\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// Get the address to start reading from\r
- StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,\r
- Lba,\r
- Instance->Media.BlockSize\r
- );\r
+ StartAddress = GET_NOR_BLOCK_ADDRESS (\r
+ Instance->RegionBaseAddress,\r
+ Lba,\r
+ Instance->Media.BlockSize\r
+ );\r
\r
// Put the device into Read Array mode\r
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);\r
\r
EFI_STATUS\r
NorFlashRead (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN UINTN BufferSizeInBytes,\r
- OUT VOID *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN UINTN BufferSizeInBytes,\r
+ OUT VOID *Buffer\r
)\r
{\r
UINTN StartAddress;\r
}\r
\r
// Get the address to start reading from\r
- StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,\r
- Lba,\r
- Instance->Media.BlockSize\r
- );\r
+ StartAddress = GET_NOR_BLOCK_ADDRESS (\r
+ Instance->RegionBaseAddress,\r
+ Lba,\r
+ Instance->Media.BlockSize\r
+ );\r
\r
// Put the device into Read Array mode\r
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);\r
*/\r
EFI_STATUS\r
NorFlashWriteSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
)\r
{\r
EFI_STATUS TempStatus;\r
\r
// The write must not span block boundaries.\r
// We need to check each variable individually because adding two large values together overflows.\r
- if ( ( Offset >= BlockSize ) ||\r
- ( *NumBytes > BlockSize ) ||\r
- ( (Offset + *NumBytes) > BlockSize ) ) {\r
- DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleBlock: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));\r
+ if ((Offset >= BlockSize) ||\r
+ (*NumBytes > BlockSize) ||\r
+ ((Offset + *NumBytes) > BlockSize))\r
+ {\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleBlock: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize));\r
return EFI_BAD_BUFFER_SIZE;\r
}\r
\r
// We must have some bytes to write\r
if (*NumBytes == 0) {\r
- DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleBlock: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));\r
+ DEBUG ((DEBUG_ERROR, "NorFlashWriteSingleBlock: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize));\r
return EFI_BAD_BUFFER_SIZE;\r
}\r
\r
while (BytesToWrite > 0) {\r
// Read full word from NOR, splice as required. A word is the smallest\r
// unit we can write.\r
- TempStatus = NorFlashRead (Instance, Lba, CurOffset & ~(0x3), sizeof(Tmp), &Tmp);\r
+ TempStatus = NorFlashRead (Instance, Lba, CurOffset & ~(0x3), sizeof (Tmp), &Tmp);\r
if (EFI_ERROR (TempStatus)) {\r
return EFI_DEVICE_ERROR;\r
}\r
\r
// Physical address of word in NOR to write.\r
- WordAddr = (CurOffset & ~(0x3)) + GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,\r
- Lba, BlockSize);\r
+ WordAddr = (CurOffset & ~(0x3)) + GET_NOR_BLOCK_ADDRESS (\r
+ Instance->RegionBaseAddress,\r
+ Lba,\r
+ BlockSize\r
+ );\r
// The word of data that is to be written.\r
- TmpBuf = *((UINT32*)(Buffer + (*NumBytes - BytesToWrite)));\r
+ TmpBuf = *((UINT32 *)(Buffer + (*NumBytes - BytesToWrite)));\r
\r
// First do word aligned chunks.\r
if ((CurOffset & 0x3) == 0) {\r
break;\r
}\r
}\r
+\r
// Write this word to NOR\r
- WordToWrite = TmpBuf;\r
- CurOffset += sizeof(TmpBuf);\r
- BytesToWrite -= sizeof(TmpBuf);\r
+ WordToWrite = TmpBuf;\r
+ CurOffset += sizeof (TmpBuf);\r
+ BytesToWrite -= sizeof (TmpBuf);\r
} else {\r
// BytesToWrite < 4. Do small writes and left-overs\r
Mask = ~((~0) << (BytesToWrite * 8));\r
break;\r
}\r
}\r
+\r
// Merge old and new data. Write merged word to NOR\r
- WordToWrite = (Tmp & ~Mask) | TmpBuf;\r
- CurOffset += BytesToWrite;\r
+ WordToWrite = (Tmp & ~Mask) | TmpBuf;\r
+ CurOffset += BytesToWrite;\r
BytesToWrite = 0;\r
}\r
} else {\r
break;\r
}\r
}\r
+\r
// Merge old and new data. Write merged word to NOR\r
- WordToWrite = (Tmp & ~Mask) | TmpBuf;\r
+ WordToWrite = (Tmp & ~Mask) | TmpBuf;\r
BytesToWrite -= (4 - (CurOffset & 0x3));\r
- CurOffset += (4 - (CurOffset & 0x3));\r
+ CurOffset += (4 - (CurOffset & 0x3));\r
} else {\r
// Unaligned and fits in one word.\r
Mask = (~((~0) << (BytesToWrite * 8))) << ((CurOffset & 0x3) * 8);\r
break;\r
}\r
}\r
+\r
// Merge old and new data. Write merged word to NOR\r
- WordToWrite = (Tmp & ~Mask) | TmpBuf;\r
- CurOffset += BytesToWrite;\r
+ WordToWrite = (Tmp & ~Mask) | TmpBuf;\r
+ CurOffset += BytesToWrite;\r
BytesToWrite = 0;\r
}\r
}\r
if (EFI_ERROR (TempStatus)) {\r
return EFI_DEVICE_ERROR;\r
}\r
+\r
PrevBlockAddress = BlockAddress;\r
}\r
+\r
TempStatus = NorFlashWriteSingleWord (Instance, WordAddr, WordToWrite);\r
if (EFI_ERROR (TempStatus)) {\r
return EFI_DEVICE_ERROR;\r
}\r
}\r
+\r
// Exit if we got here and could write all the data. Otherwise do the\r
// Erase-Write cycle.\r
if (!DoErase) {\r
}\r
\r
// Put the data at the appropriate location inside the buffer area\r
- CopyMem ((VOID*)((UINTN)Instance->ShadowBuffer + Offset), Buffer, *NumBytes);\r
+ CopyMem ((VOID *)((UINTN)Instance->ShadowBuffer + Offset), Buffer, *NumBytes);\r
\r
// Write the modified buffer back to the NorFlash\r
TempStatus = NorFlashWriteBlocks (Instance, Lba, BlockSize, Instance->ShadowBuffer);\r
EFI_STATUS\r
EFIAPI\r
NorFlashDiskIoReadDisk (\r
- IN EFI_DISK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN UINT64 DiskOffset,\r
- IN UINTN BufferSize,\r
- OUT VOID *Buffer\r
+ IN EFI_DISK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN UINT64 DiskOffset,\r
+ IN UINTN BufferSize,\r
+ OUT VOID *Buffer\r
)\r
{\r
- NOR_FLASH_INSTANCE *Instance;\r
+ NOR_FLASH_INSTANCE *Instance;\r
UINT32 BlockSize;\r
UINT32 BlockOffset;\r
EFI_LBA Lba;\r
\r
- Instance = INSTANCE_FROM_DISKIO_THIS(This);\r
+ Instance = INSTANCE_FROM_DISKIO_THIS (This);\r
\r
if (MediaId != Instance->Media.MediaId) {\r
return EFI_MEDIA_CHANGED;\r
}\r
\r
BlockSize = Instance->Media.BlockSize;\r
- Lba = (EFI_LBA) DivU64x32Remainder (DiskOffset, BlockSize, &BlockOffset);\r
+ Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, &BlockOffset);\r
\r
return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);\r
}\r
EFI_STATUS\r
EFIAPI\r
NorFlashDiskIoWriteDisk (\r
- IN EFI_DISK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN UINT64 DiskOffset,\r
- IN UINTN BufferSize,\r
- IN VOID *Buffer\r
+ IN EFI_DISK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN UINT64 DiskOffset,\r
+ IN UINTN BufferSize,\r
+ IN VOID *Buffer\r
)\r
{\r
- NOR_FLASH_INSTANCE *Instance;\r
+ NOR_FLASH_INSTANCE *Instance;\r
UINT32 BlockSize;\r
UINT32 BlockOffset;\r
EFI_LBA Lba;\r
UINTN WriteSize;\r
EFI_STATUS Status;\r
\r
- Instance = INSTANCE_FROM_DISKIO_THIS(This);\r
+ Instance = INSTANCE_FROM_DISKIO_THIS (This);\r
\r
if (MediaId != Instance->Media.MediaId) {\r
return EFI_MEDIA_CHANGED;\r
}\r
\r
BlockSize = Instance->Media.BlockSize;\r
- Lba = (EFI_LBA) DivU64x32Remainder (DiskOffset, BlockSize, &BlockOffset);\r
+ Lba = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, &BlockOffset);\r
\r
RemainingBytes = BufferSize;\r
\r
// Write a partial block\r
Status = NorFlashWriteSingleBlock (Instance, Lba, BlockOffset, &WriteSize, Buffer);\r
}\r
+\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
// Now continue writing either all the remaining bytes or single blocks.\r
RemainingBytes -= WriteSize;\r
- Buffer = (UINT8 *) Buffer + WriteSize;\r
+ Buffer = (UINT8 *)Buffer + WriteSize;\r
Lba++;\r
BlockOffset = 0;\r
- WriteSize = MIN (RemainingBytes, BlockSize);\r
+ WriteSize = MIN (RemainingBytes, BlockSize);\r
} while (RemainingBytes);\r
\r
return Status;\r
\r
EFI_STATUS\r
NorFlashReset (\r
- IN NOR_FLASH_INSTANCE *Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
)\r
{\r
// As there is no specific RESET to perform, ensure that the devices is in the default Read Array mode\r
VOID\r
EFIAPI\r
NorFlashVirtualNotifyEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
)\r
{\r
- UINTN Index;\r
+ UINTN Index;\r
\r
for (Index = 0; Index < mNorFlashDeviceCount; Index++) {\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->DeviceBaseAddress);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->RegionBaseAddress);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->DeviceBaseAddress);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->RegionBaseAddress);\r
\r
// Convert BlockIo protocol\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->BlockIoProtocol.FlushBlocks);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->BlockIoProtocol.ReadBlocks);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->BlockIoProtocol.Reset);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->BlockIoProtocol.WriteBlocks);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->BlockIoProtocol.FlushBlocks);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->BlockIoProtocol.ReadBlocks);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->BlockIoProtocol.Reset);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->BlockIoProtocol.WriteBlocks);\r
\r
// Convert Fvb\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->FvbProtocol.EraseBlocks);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->FvbProtocol.GetAttributes);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->FvbProtocol.GetBlockSize);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->FvbProtocol.GetPhysicalAddress);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->FvbProtocol.Read);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->FvbProtocol.SetAttributes);\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->FvbProtocol.Write);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->FvbProtocol.EraseBlocks);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->FvbProtocol.GetAttributes);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->FvbProtocol.GetBlockSize);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->FvbProtocol.GetPhysicalAddress);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->FvbProtocol.Read);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->FvbProtocol.SetAttributes);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->FvbProtocol.Write);\r
\r
if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {\r
- EfiConvertPointer (0x0, (VOID**)&mNorFlashInstances[Index]->ShadowBuffer);\r
+ EfiConvertPointer (0x0, (VOID **)&mNorFlashInstances[Index]->ShadowBuffer);\r
}\r
}\r
\r
#ifndef __NOR_FLASH_H__\r
#define __NOR_FLASH_H__\r
\r
-\r
#include <Base.h>\r
#include <PiDxe.h>\r
\r
#include <Library/UefiLib.h>\r
#include <Library/UefiRuntimeLib.h>\r
\r
-#define NOR_FLASH_ERASE_RETRY 10\r
+#define NOR_FLASH_ERASE_RETRY 10\r
\r
// Device access macros\r
// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
\r
-#define HIGH_16_BITS 0xFFFF0000\r
-#define LOW_16_BITS 0x0000FFFF\r
-#define LOW_8_BITS 0x000000FF\r
+#define HIGH_16_BITS 0xFFFF0000\r
+#define LOW_16_BITS 0x0000FFFF\r
+#define LOW_8_BITS 0x000000FF\r
\r
-#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )\r
+#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )\r
\r
-#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )\r
-#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )\r
+#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )\r
+#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )\r
\r
// Each command must be sent simultaneously to both chips,\r
// i.e. at the lower 16 bits AND at the higher 16 bits\r
-#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))\r
-#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )\r
-#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
-#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
+#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))\r
+#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )\r
+#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
+#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize) ( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
\r
// Status Register Bits\r
-#define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)\r
-#define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)\r
-#define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)\r
-#define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)\r
-#define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)\r
-#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)\r
-#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)\r
-#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)\r
+#define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)\r
+#define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)\r
+#define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)\r
+#define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)\r
+#define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)\r
+#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)\r
+#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)\r
+#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)\r
\r
// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
\r
// On chip buffer size for buffered programming operations\r
// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
-#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)\r
-#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
-#define MAX_BUFFERED_PROG_ITERATIONS 10000000\r
-#define BOUNDARY_OF_32_WORDS 0x7F\r
+#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)\r
+#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
+#define MAX_BUFFERED_PROG_ITERATIONS 10000000\r
+#define BOUNDARY_OF_32_WORDS 0x7F\r
\r
// CFI Addresses\r
-#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10\r
-#define P30_CFI_ADDR_VENDOR_ID 0x13\r
+#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10\r
+#define P30_CFI_ADDR_VENDOR_ID 0x13\r
\r
// CFI Data\r
-#define CFI_QRY 0x00595251\r
+#define CFI_QRY 0x00595251\r
\r
// READ Commands\r
-#define P30_CMD_READ_DEVICE_ID 0x0090\r
-#define P30_CMD_READ_STATUS_REGISTER 0x0070\r
-#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050\r
-#define P30_CMD_READ_ARRAY 0x00FF\r
-#define P30_CMD_READ_CFI_QUERY 0x0098\r
+#define P30_CMD_READ_DEVICE_ID 0x0090\r
+#define P30_CMD_READ_STATUS_REGISTER 0x0070\r
+#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050\r
+#define P30_CMD_READ_ARRAY 0x00FF\r
+#define P30_CMD_READ_CFI_QUERY 0x0098\r
\r
// WRITE Commands\r
-#define P30_CMD_WORD_PROGRAM_SETUP 0x0040\r
-#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010\r
-#define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8\r
-#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0\r
-#define P30_CMD_BEFP_SETUP 0x0080\r
-#define P30_CMD_BEFP_CONFIRM 0x00D0\r
+#define P30_CMD_WORD_PROGRAM_SETUP 0x0040\r
+#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010\r
+#define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8\r
+#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0\r
+#define P30_CMD_BEFP_SETUP 0x0080\r
+#define P30_CMD_BEFP_CONFIRM 0x00D0\r
\r
// ERASE Commands\r
-#define P30_CMD_BLOCK_ERASE_SETUP 0x0020\r
-#define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0\r
+#define P30_CMD_BLOCK_ERASE_SETUP 0x0020\r
+#define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0\r
\r
// SUSPEND Commands\r
-#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0\r
-#define P30_CMD_SUSPEND_RESUME 0x00D0\r
+#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0\r
+#define P30_CMD_SUSPEND_RESUME 0x00D0\r
\r
// BLOCK LOCKING / UNLOCKING Commands\r
-#define P30_CMD_LOCK_BLOCK_SETUP 0x0060\r
-#define P30_CMD_LOCK_BLOCK 0x0001\r
-#define P30_CMD_UNLOCK_BLOCK 0x00D0\r
-#define P30_CMD_LOCK_DOWN_BLOCK 0x002F\r
+#define P30_CMD_LOCK_BLOCK_SETUP 0x0060\r
+#define P30_CMD_LOCK_BLOCK 0x0001\r
+#define P30_CMD_UNLOCK_BLOCK 0x00D0\r
+#define P30_CMD_LOCK_DOWN_BLOCK 0x002F\r
\r
// PROTECTION Commands\r
-#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
+#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
\r
// CONFIGURATION Commands\r
-#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
-#define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003\r
+#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
+#define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003\r
\r
-#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')\r
-#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
-#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
-#define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)\r
+#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')\r
+#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
+#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
+#define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)\r
\r
-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;\r
+typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;\r
\r
#pragma pack (1)\r
typedef struct {\r
- VENDOR_DEVICE_PATH Vendor;\r
- UINT8 Index;\r
- EFI_DEVICE_PATH_PROTOCOL End;\r
+ VENDOR_DEVICE_PATH Vendor;\r
+ UINT8 Index;\r
+ EFI_DEVICE_PATH_PROTOCOL End;\r
} NOR_FLASH_DEVICE_PATH;\r
#pragma pack ()\r
\r
struct _NOR_FLASH_INSTANCE {\r
- UINT32 Signature;\r
- EFI_HANDLE Handle;\r
+ UINT32 Signature;\r
+ EFI_HANDLE Handle;\r
\r
- UINTN DeviceBaseAddress;\r
- UINTN RegionBaseAddress;\r
- UINTN Size;\r
- EFI_LBA StartLba;\r
+ UINTN DeviceBaseAddress;\r
+ UINTN RegionBaseAddress;\r
+ UINTN Size;\r
+ EFI_LBA StartLba;\r
\r
- EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;\r
- EFI_BLOCK_IO_MEDIA Media;\r
- EFI_DISK_IO_PROTOCOL DiskIoProtocol;\r
+ EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;\r
+ EFI_BLOCK_IO_MEDIA Media;\r
+ EFI_DISK_IO_PROTOCOL DiskIoProtocol;\r
\r
- EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
- VOID* ShadowBuffer;\r
+ EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
+ VOID *ShadowBuffer;\r
\r
- NOR_FLASH_DEVICE_PATH DevicePath;\r
+ NOR_FLASH_DEVICE_PATH DevicePath;\r
};\r
\r
EFI_STATUS\r
NorFlashReadCfiData (\r
- IN UINTN DeviceBaseAddress,\r
- IN UINTN CFI_Offset,\r
- IN UINT32 NumberOfBytes,\r
- OUT UINT32 *Data\r
+ IN UINTN DeviceBaseAddress,\r
+ IN UINTN CFI_Offset,\r
+ IN UINT32 NumberOfBytes,\r
+ OUT UINT32 *Data\r
);\r
\r
EFI_STATUS\r
NorFlashWriteBuffer (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN TargetAddress,\r
- IN UINTN BufferSizeInBytes,\r
- IN UINT32 *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN TargetAddress,\r
+ IN UINTN BufferSizeInBytes,\r
+ IN UINT32 *Buffer\r
);\r
\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReset (\r
- IN EFI_BLOCK_IO_PROTOCOL *This,\r
- IN BOOLEAN ExtendedVerification\r
+ IN EFI_BLOCK_IO_PROTOCOL *This,\r
+ IN BOOLEAN ExtendedVerification\r
);\r
\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReadBlocks (\r
- IN EFI_BLOCK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- OUT VOID *Buffer\r
-);\r
+ IN EFI_BLOCK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ OUT VOID *Buffer\r
+ );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoWriteBlocks (\r
- IN EFI_BLOCK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- IN VOID *Buffer\r
-);\r
+ IN EFI_BLOCK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ IN VOID *Buffer\r
+ );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoFlushBlocks (\r
- IN EFI_BLOCK_IO_PROTOCOL *This\r
-);\r
+ IN EFI_BLOCK_IO_PROTOCOL *This\r
+ );\r
\r
//\r
// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk\r
EFI_STATUS\r
EFIAPI\r
NorFlashDiskIoReadDisk (\r
- IN EFI_DISK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN UINT64 Offset,\r
- IN UINTN BufferSize,\r
- OUT VOID *Buffer\r
+ IN EFI_DISK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN UINT64 Offset,\r
+ IN UINTN BufferSize,\r
+ OUT VOID *Buffer\r
);\r
\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashDiskIoWriteDisk (\r
- IN EFI_DISK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN UINT64 Offset,\r
- IN UINTN BufferSize,\r
- IN VOID *Buffer\r
+ IN EFI_DISK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN UINT64 Offset,\r
+ IN UINTN BufferSize,\r
+ IN VOID *Buffer\r
);\r
\r
//\r
\r
EFI_STATUS\r
EFIAPI\r
-FvbGetAttributes(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+FvbGetAttributes (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
-FvbSetAttributes(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+FvbSetAttributes (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
-FvbGetPhysicalAddress(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- OUT EFI_PHYSICAL_ADDRESS *Address\r
+FvbGetPhysicalAddress (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ OUT EFI_PHYSICAL_ADDRESS *Address\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
-FvbGetBlockSize(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- OUT UINTN *BlockSize,\r
- OUT UINTN *NumberOfBlocks\r
+FvbGetBlockSize (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ OUT UINTN *BlockSize,\r
+ OUT UINTN *NumberOfBlocks\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
-FvbRead(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN OUT UINT8 *Buffer\r
+FvbRead (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN OUT UINT8 *Buffer\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
-FvbWrite(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+FvbWrite (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
-FvbEraseBlocks(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+FvbEraseBlocks (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
...\r
);\r
\r
EFI_STATUS\r
ValidateFvHeader (\r
- IN NOR_FLASH_INSTANCE *Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
);\r
\r
EFI_STATUS\r
InitializeFvAndVariableStoreHeaders (\r
- IN NOR_FLASH_INSTANCE *Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
);\r
\r
VOID\r
EFIAPI\r
FvbVirtualNotifyEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
);\r
\r
//\r
\r
EFI_STATUS\r
NorFlashWriteFullBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINT32 *DataBuffer,\r
- IN UINT32 BlockSizeInWords\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINT32 *DataBuffer,\r
+ IN UINT32 BlockSizeInWords\r
);\r
\r
EFI_STATUS\r
NorFlashUnlockAndEraseSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
);\r
\r
EFI_STATUS\r
NorFlashCreateInstance (\r
- IN UINTN NorFlashDeviceBase,\r
- IN UINTN NorFlashRegionBase,\r
- IN UINTN NorFlashSize,\r
- IN UINT32 Index,\r
- IN UINT32 BlockSize,\r
- IN BOOLEAN SupportFvb,\r
- OUT NOR_FLASH_INSTANCE** NorFlashInstance\r
+ IN UINTN NorFlashDeviceBase,\r
+ IN UINTN NorFlashRegionBase,\r
+ IN UINTN NorFlashSize,\r
+ IN UINT32 Index,\r
+ IN UINT32 BlockSize,\r
+ IN BOOLEAN SupportFvb,\r
+ OUT NOR_FLASH_INSTANCE **NorFlashInstance\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashFvbInitialize (\r
- IN NOR_FLASH_INSTANCE* Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
);\r
\r
-\r
//\r
// NorFlash.c\r
//\r
EFI_STATUS\r
NorFlashWriteSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
);\r
\r
EFI_STATUS\r
NorFlashWriteBlocks (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- IN VOID *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ IN VOID *Buffer\r
);\r
\r
EFI_STATUS\r
NorFlashReadBlocks (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- OUT VOID *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ OUT VOID *Buffer\r
);\r
\r
EFI_STATUS\r
NorFlashRead (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN UINTN BufferSizeInBytes,\r
- OUT VOID *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN UINTN BufferSizeInBytes,\r
+ OUT VOID *Buffer\r
);\r
\r
EFI_STATUS\r
NorFlashWrite (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
);\r
\r
EFI_STATUS\r
NorFlashReset (\r
- IN NOR_FLASH_INSTANCE *Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
);\r
\r
EFI_STATUS\r
NorFlashEraseSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
);\r
\r
EFI_STATUS\r
NorFlashUnlockSingleBlockIfNecessary (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
);\r
\r
EFI_STATUS\r
NorFlashWriteSingleWord (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN WordAddress,\r
- IN UINT32 WriteData\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN WordAddress,\r
+ IN UINT32 WriteData\r
);\r
\r
VOID\r
EFIAPI\r
NorFlashVirtualNotifyEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
);\r
\r
#endif /* __NOR_FLASH_H__ */\r
IN BOOLEAN ExtendedVerification\r
)\r
{\r
- NOR_FLASH_INSTANCE *Instance;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- Instance = INSTANCE_FROM_BLKIO_THIS(This);\r
+ Instance = INSTANCE_FROM_BLKIO_THIS (This);\r
\r
DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoReset(MediaId=0x%x)\n", This->Media->MediaId));\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReadBlocks (\r
- IN EFI_BLOCK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- OUT VOID *Buffer\r
+ IN EFI_BLOCK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ OUT VOID *Buffer\r
)\r
{\r
NOR_FLASH_INSTANCE *Instance;\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Instance = INSTANCE_FROM_BLKIO_THIS(This);\r
- Media = This->Media;\r
+ Instance = INSTANCE_FROM_BLKIO_THIS (This);\r
+ Media = This->Media;\r
\r
DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoReadBlocks(MediaId=0x%x, Lba=%ld, BufferSize=0x%x bytes (%d kB), BufferPtr @ 0x%08x)\n", MediaId, Lba, BufferSizeInBytes, Buffer));\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoWriteBlocks (\r
- IN EFI_BLOCK_IO_PROTOCOL *This,\r
- IN UINT32 MediaId,\r
- IN EFI_LBA Lba,\r
- IN UINTN BufferSizeInBytes,\r
- IN VOID *Buffer\r
+ IN EFI_BLOCK_IO_PROTOCOL *This,\r
+ IN UINT32 MediaId,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN BufferSizeInBytes,\r
+ IN VOID *Buffer\r
)\r
{\r
NOR_FLASH_INSTANCE *Instance;\r
EFI_STATUS Status;\r
\r
- Instance = INSTANCE_FROM_BLKIO_THIS(This);\r
+ Instance = INSTANCE_FROM_BLKIO_THIS (This);\r
\r
DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoWriteBlocks(MediaId=0x%x, Lba=%ld, BufferSize=0x%x bytes (%d kB), BufferPtr @ 0x%08x)\n", MediaId, Lba, BufferSizeInBytes, Buffer));\r
\r
- if( !This->Media->MediaPresent ) {\r
+ if ( !This->Media->MediaPresent ) {\r
Status = EFI_NO_MEDIA;\r
- } else if( This->Media->MediaId != MediaId ) {\r
+ } else if ( This->Media->MediaId != MediaId ) {\r
Status = EFI_MEDIA_CHANGED;\r
- } else if( This->Media->ReadOnly ) {\r
+ } else if ( This->Media->ReadOnly ) {\r
Status = EFI_WRITE_PROTECTED;\r
} else {\r
- Status = NorFlashWriteBlocks (Instance,Lba,BufferSizeInBytes,Buffer);\r
+ Status = NorFlashWriteBlocks (Instance, Lba, BufferSizeInBytes, Buffer);\r
}\r
\r
return Status;\r
\r
#include "NorFlash.h"\r
\r
-STATIC EFI_EVENT mNorFlashVirtualAddrChangeEvent;\r
+STATIC EFI_EVENT mNorFlashVirtualAddrChangeEvent;\r
\r
//\r
// Global variable declarations\r
//\r
-NOR_FLASH_INSTANCE **mNorFlashInstances;\r
-UINT32 mNorFlashDeviceCount;\r
-UINTN mFlashNvStorageVariableBase;\r
-EFI_EVENT mFvbVirtualAddrChangeEvent;\r
+NOR_FLASH_INSTANCE **mNorFlashInstances;\r
+UINT32 mNorFlashDeviceCount;\r
+UINTN mFlashNvStorageVariableBase;\r
+EFI_EVENT mFvbVirtualAddrChangeEvent;\r
\r
NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {\r
NOR_FLASH_SIGNATURE, // Signature\r
- NULL, // Handle ... NEED TO BE FILLED\r
+ NULL, // Handle ... NEED TO BE FILLED\r
\r
0, // DeviceBaseAddress ... NEED TO BE FILLED\r
0, // RegionBaseAddress ... NEED TO BE FILLED\r
\r
{\r
EFI_BLOCK_IO_PROTOCOL_REVISION2, // Revision\r
- NULL, // Media ... NEED TO BE FILLED\r
- NorFlashBlockIoReset, // Reset;\r
- NorFlashBlockIoReadBlocks, // ReadBlocks\r
- NorFlashBlockIoWriteBlocks, // WriteBlocks\r
- NorFlashBlockIoFlushBlocks // FlushBlocks\r
+ NULL, // Media ... NEED TO BE FILLED\r
+ NorFlashBlockIoReset, // Reset;\r
+ NorFlashBlockIoReadBlocks, // ReadBlocks\r
+ NorFlashBlockIoWriteBlocks, // WriteBlocks\r
+ NorFlashBlockIoFlushBlocks // FlushBlocks\r
}, // BlockIoProtocol\r
\r
{\r
- 0, // MediaId ... NEED TO BE FILLED\r
+ 0, // MediaId ... NEED TO BE FILLED\r
FALSE, // RemovableMedia\r
- TRUE, // MediaPresent\r
+ TRUE, // MediaPresent\r
FALSE, // LogicalPartition\r
FALSE, // ReadOnly\r
FALSE, // WriteCaching;\r
- 0, // BlockSize ... NEED TO BE FILLED\r
- 4, // IoAlign\r
- 0, // LastBlock ... NEED TO BE FILLED\r
- 0, // LowestAlignedLba\r
- 1, // LogicalBlocksPerPhysicalBlock\r
- }, //Media;\r
+ 0, // BlockSize ... NEED TO BE FILLED\r
+ 4, // IoAlign\r
+ 0, // LastBlock ... NEED TO BE FILLED\r
+ 0, // LowestAlignedLba\r
+ 1, // LogicalBlocksPerPhysicalBlock\r
+ }, // Media;\r
\r
{\r
EFI_DISK_IO_PROTOCOL_REVISION, // Revision\r
},\r
\r
{\r
- FvbGetAttributes, // GetAttributes\r
- FvbSetAttributes, // SetAttributes\r
- FvbGetPhysicalAddress, // GetPhysicalAddress\r
- FvbGetBlockSize, // GetBlockSize\r
- FvbRead, // Read\r
- FvbWrite, // Write\r
- FvbEraseBlocks, // EraseBlocks\r
- NULL, //ParentHandle\r
- }, // FvbProtoccol;\r
+ FvbGetAttributes, // GetAttributes\r
+ FvbSetAttributes, // SetAttributes\r
+ FvbGetPhysicalAddress, // GetPhysicalAddress\r
+ FvbGetBlockSize, // GetBlockSize\r
+ FvbRead, // Read\r
+ FvbWrite, // Write\r
+ FvbEraseBlocks, // EraseBlocks\r
+ NULL, // ParentHandle\r
+ }, // FvbProtoccol;\r
NULL, // ShadowBuffer\r
{\r
{\r
(UINT8)(OFFSET_OF (NOR_FLASH_DEVICE_PATH, End) >> 8)\r
}\r
},\r
- { 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } }, // GUID ... NEED TO BE FILLED\r
+ { 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }\r
+ }, // GUID ... NEED TO BE FILLED\r
},\r
0, // Index\r
{\r
END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
{ sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }\r
}\r
- } // DevicePath\r
+ } // DevicePath\r
};\r
\r
EFI_STATUS\r
NorFlashCreateInstance (\r
- IN UINTN NorFlashDeviceBase,\r
- IN UINTN NorFlashRegionBase,\r
- IN UINTN NorFlashSize,\r
- IN UINT32 Index,\r
- IN UINT32 BlockSize,\r
- IN BOOLEAN SupportFvb,\r
- OUT NOR_FLASH_INSTANCE** NorFlashInstance\r
+ IN UINTN NorFlashDeviceBase,\r
+ IN UINTN NorFlashRegionBase,\r
+ IN UINTN NorFlashSize,\r
+ IN UINT32 Index,\r
+ IN UINT32 BlockSize,\r
+ IN BOOLEAN SupportFvb,\r
+ OUT NOR_FLASH_INSTANCE **NorFlashInstance\r
)\r
{\r
- EFI_STATUS Status;\r
- NOR_FLASH_INSTANCE* Instance;\r
+ EFI_STATUS Status;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- ASSERT(NorFlashInstance != NULL);\r
+ ASSERT (NorFlashInstance != NULL);\r
\r
- Instance = AllocateRuntimeCopyPool (sizeof(NOR_FLASH_INSTANCE),&mNorFlashInstanceTemplate);\r
+ Instance = AllocateRuntimeCopyPool (sizeof (NOR_FLASH_INSTANCE), &mNorFlashInstanceTemplate);\r
if (Instance == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
Instance->DeviceBaseAddress = NorFlashDeviceBase;\r
Instance->RegionBaseAddress = NorFlashRegionBase;\r
- Instance->Size = NorFlashSize;\r
+ Instance->Size = NorFlashSize;\r
\r
Instance->BlockIoProtocol.Media = &Instance->Media;\r
- Instance->Media.MediaId = Index;\r
- Instance->Media.BlockSize = BlockSize;\r
- Instance->Media.LastBlock = (NorFlashSize / BlockSize)-1;\r
+ Instance->Media.MediaId = Index;\r
+ Instance->Media.BlockSize = BlockSize;\r
+ Instance->Media.LastBlock = (NorFlashSize / BlockSize)-1;\r
\r
CopyGuid (&Instance->DevicePath.Vendor.Guid, &gEfiCallerIdGuid);\r
Instance->DevicePath.Index = (UINT8)Index;\r
\r
- Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);;\r
+ Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);\r
if (Instance->ShadowBuffer == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
NorFlashFvbInitialize (Instance);\r
\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
- &Instance->Handle,\r
- &gEfiDevicePathProtocolGuid, &Instance->DevicePath,\r
- &gEfiBlockIoProtocolGuid, &Instance->BlockIoProtocol,\r
- &gEfiFirmwareVolumeBlockProtocolGuid, &Instance->FvbProtocol,\r
- NULL\r
- );\r
- if (EFI_ERROR(Status)) {\r
+ &Instance->Handle,\r
+ &gEfiDevicePathProtocolGuid,\r
+ &Instance->DevicePath,\r
+ &gEfiBlockIoProtocolGuid,\r
+ &Instance->BlockIoProtocol,\r
+ &gEfiFirmwareVolumeBlockProtocolGuid,\r
+ &Instance->FvbProtocol,\r
+ NULL\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
FreePool (Instance);\r
return Status;\r
}\r
} else {\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
&Instance->Handle,\r
- &gEfiDevicePathProtocolGuid, &Instance->DevicePath,\r
- &gEfiBlockIoProtocolGuid, &Instance->BlockIoProtocol,\r
- &gEfiDiskIoProtocolGuid, &Instance->DiskIoProtocol,\r
+ &gEfiDevicePathProtocolGuid,\r
+ &Instance->DevicePath,\r
+ &gEfiBlockIoProtocolGuid,\r
+ &Instance->BlockIoProtocol,\r
+ &gEfiDiskIoProtocolGuid,\r
+ &Instance->DiskIoProtocol,\r
NULL\r
);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
FreePool (Instance);\r
return Status;\r
}\r
**/\r
EFI_STATUS\r
NorFlashUnlockAndEraseSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN Index;\r
- EFI_TPL OriginalTPL;\r
+ EFI_STATUS Status;\r
+ UINTN Index;\r
+ EFI_TPL OriginalTPL;\r
\r
if (!EfiAtRuntime ()) {\r
// Raise TPL to TPL_HIGH to stop anyone from interrupting us.\r
if (EFI_ERROR (Status)) {\r
break;\r
}\r
+\r
Status = NorFlashEraseSingleBlock (Instance, BlockAddress);\r
Index++;\r
} while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));\r
\r
if (Index == NOR_FLASH_ERASE_RETRY) {\r
- DEBUG((DEBUG_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress,Index));\r
+ DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress, Index));\r
}\r
\r
if (!EfiAtRuntime ()) {\r
\r
EFI_STATUS\r
NorFlashWriteFullBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINT32 *DataBuffer,\r
- IN UINT32 BlockSizeInWords\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINT32 *DataBuffer,\r
+ IN UINT32 BlockSizeInWords\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN WordAddress;\r
- UINT32 WordIndex;\r
- UINTN BufferIndex;\r
- UINTN BlockAddress;\r
- UINTN BuffersInBlock;\r
- UINTN RemainingWords;\r
- EFI_TPL OriginalTPL;\r
- UINTN Cnt;\r
+ EFI_STATUS Status;\r
+ UINTN WordAddress;\r
+ UINT32 WordIndex;\r
+ UINTN BufferIndex;\r
+ UINTN BlockAddress;\r
+ UINTN BuffersInBlock;\r
+ UINTN RemainingWords;\r
+ EFI_TPL OriginalTPL;\r
+ UINTN Cnt;\r
\r
Status = EFI_SUCCESS;\r
\r
}\r
\r
Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));\r
goto EXIT;\r
}\r
\r
\r
// Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero\r
if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {\r
-\r
// First, break the entire block into buffer-sized chunks.\r
BuffersInBlock = (UINTN)(BlockSizeInWords * 4) / P30_MAX_BUFFER_SIZE_IN_BYTES;\r
\r
// Then feed each buffer chunk to the NOR Flash\r
// If a buffer does not contain any data, don't write it.\r
- for(BufferIndex=0;\r
+ for (BufferIndex = 0;\r
BufferIndex < BuffersInBlock;\r
BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS\r
- ) {\r
+ )\r
+ {\r
// Check the buffer to see if it contains any data (not set all 1s).\r
for (Cnt = 0; Cnt < P30_MAX_BUFFER_SIZE_IN_WORDS; Cnt++) {\r
if (~DataBuffer[Cnt] != 0 ) {\r
// Some data found, write the buffer.\r
- Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES,\r
- DataBuffer);\r
- if (EFI_ERROR(Status)) {\r
+ Status = NorFlashWriteBuffer (\r
+ Instance,\r
+ WordAddress,\r
+ P30_MAX_BUFFER_SIZE_IN_BYTES,\r
+ DataBuffer\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
+\r
break;\r
}\r
}\r
// Finally, finish off any remaining words that are less than the maximum size of the buffer\r
RemainingWords = BlockSizeInWords % P30_MAX_BUFFER_SIZE_IN_WORDS;\r
\r
- if(RemainingWords != 0) {\r
+ if (RemainingWords != 0) {\r
Status = NorFlashWriteBuffer (Instance, WordAddress, (RemainingWords * 4), DataBuffer);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
}\r
-\r
} else {\r
// For now, use the single word programming algorithm\r
// It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,\r
// i.e. which ends in the range 0x......01 - 0x......7F.\r
- for(WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {\r
+ for (WordIndex = 0; WordIndex < BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {\r
Status = NorFlashWriteSingleWord (Instance, WordAddress, *DataBuffer);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
}\r
gBS->RestoreTPL (OriginalTPL);\r
}\r
\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));\r
}\r
+\r
return Status;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashInitialise (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 Index;\r
- NOR_FLASH_DESCRIPTION* NorFlashDevices;\r
- BOOLEAN ContainVariableStorage;\r
+ EFI_STATUS Status;\r
+ UINT32 Index;\r
+ NOR_FLASH_DESCRIPTION *NorFlashDevices;\r
+ BOOLEAN ContainVariableStorage;\r
\r
Status = NorFlashPlatformInitialization ();\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR,"NorFlashInitialise: Fail to initialize Nor Flash devices\n"));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NorFlashInitialise: Fail to initialize Nor Flash devices\n"));\r
return Status;\r
}\r
\r
Status = NorFlashPlatformGetDevices (&NorFlashDevices, &mNorFlashDeviceCount);\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR,"NorFlashInitialise: Fail to get Nor Flash devices\n"));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NorFlashInitialise: Fail to get Nor Flash devices\n"));\r
return Status;\r
}\r
\r
- mNorFlashInstances = AllocateRuntimePool (sizeof(NOR_FLASH_INSTANCE*) * mNorFlashDeviceCount);\r
+ mNorFlashInstances = AllocateRuntimePool (sizeof (NOR_FLASH_INSTANCE *) * mNorFlashDeviceCount);\r
\r
for (Index = 0; Index < mNorFlashDeviceCount; Index++) {\r
// Check if this NOR Flash device contain the variable storage region\r
\r
- if (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) {\r
- ContainVariableStorage =\r
- (NorFlashDevices[Index].RegionBaseAddress <= PcdGet64 (PcdFlashNvStorageVariableBase64)) &&\r
- (PcdGet64 (PcdFlashNvStorageVariableBase64) + PcdGet32 (PcdFlashNvStorageVariableSize) <=\r
- NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
- } else {\r
- ContainVariableStorage =\r
- (NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&\r
- (PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <=\r
- NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
- }\r
+ if (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) {\r
+ ContainVariableStorage =\r
+ (NorFlashDevices[Index].RegionBaseAddress <= PcdGet64 (PcdFlashNvStorageVariableBase64)) &&\r
+ (PcdGet64 (PcdFlashNvStorageVariableBase64) + PcdGet32 (PcdFlashNvStorageVariableSize) <=\r
+ NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
+ } else {\r
+ ContainVariableStorage =\r
+ (NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&\r
+ (PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <=\r
+ NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
+ }\r
\r
Status = NorFlashCreateInstance (\r
- NorFlashDevices[Index].DeviceBaseAddress,\r
- NorFlashDevices[Index].RegionBaseAddress,\r
- NorFlashDevices[Index].Size,\r
- Index,\r
- NorFlashDevices[Index].BlockSize,\r
- ContainVariableStorage,\r
- &mNorFlashInstances[Index]\r
- );\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR,"NorFlashInitialise: Fail to create instance for NorFlash[%d]\n",Index));\r
+ NorFlashDevices[Index].DeviceBaseAddress,\r
+ NorFlashDevices[Index].RegionBaseAddress,\r
+ NorFlashDevices[Index].Size,\r
+ Index,\r
+ NorFlashDevices[Index].BlockSize,\r
+ ContainVariableStorage,\r
+ &mNorFlashInstances[Index]\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NorFlashInitialise: Fail to create instance for NorFlash[%d]\n", Index));\r
}\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashFvbInitialize (\r
- IN NOR_FLASH_INSTANCE* Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 FvbNumLba;\r
- EFI_BOOT_MODE BootMode;\r
- UINTN RuntimeMmioRegionSize;\r
+ EFI_STATUS Status;\r
+ UINT32 FvbNumLba;\r
+ EFI_BOOT_MODE BootMode;\r
+ UINTN RuntimeMmioRegionSize;\r
\r
- DEBUG((DEBUG_BLKIO,"NorFlashFvbInitialize\n"));\r
- ASSERT((Instance != NULL));\r
+ DEBUG ((DEBUG_BLKIO, "NorFlashFvbInitialize\n"));\r
+ ASSERT ((Instance != NULL));\r
\r
//\r
// Declare the Non-Volatile storage as EFI_MEMORY_RUNTIME\r
RuntimeMmioRegionSize = (Instance->RegionBaseAddress - Instance->DeviceBaseAddress) + Instance->Size;\r
\r
Status = gDS->AddMemorySpace (\r
- EfiGcdMemoryTypeMemoryMappedIo,\r
- Instance->DeviceBaseAddress, RuntimeMmioRegionSize,\r
- EFI_MEMORY_UC | EFI_MEMORY_RUNTIME\r
- );\r
+ EfiGcdMemoryTypeMemoryMappedIo,\r
+ Instance->DeviceBaseAddress,\r
+ RuntimeMmioRegionSize,\r
+ EFI_MEMORY_UC | EFI_MEMORY_RUNTIME\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
Status = gDS->SetMemorySpaceAttributes (\r
- Instance->DeviceBaseAddress, RuntimeMmioRegionSize,\r
- EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);\r
+ Instance->DeviceBaseAddress,\r
+ RuntimeMmioRegionSize,\r
+ EFI_MEMORY_UC | EFI_MEMORY_RUNTIME\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
mFlashNvStorageVariableBase = (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?\r
- PcdGet64 (PcdFlashNvStorageVariableBase64) : PcdGet32 (PcdFlashNvStorageVariableBase);\r
+ PcdGet64 (PcdFlashNvStorageVariableBase64) : PcdGet32 (PcdFlashNvStorageVariableBase);\r
\r
// Set the index of the first LBA for the FVB\r
Instance->StartLba = (mFlashNvStorageVariableBase - Instance->RegionBaseAddress) / Instance->Media.BlockSize;\r
}\r
\r
// Install the Default FVB header if required\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
// There is no valid header, so time to install one.\r
DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__));\r
- DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n",\r
- __FUNCTION__));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: Installing a correct one for this volume.\n",\r
+ __FUNCTION__\r
+ ));\r
\r
// Erase all the NorFlash that is reserved for variable storage\r
- FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) + PcdGet32(PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;\r
+ FvbNumLba = (PcdGet32 (PcdFlashNvStorageVariableSize) + PcdGet32 (PcdFlashNvStorageFtwWorkingSize) + PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;\r
\r
Status = FvbEraseBlocks (&Instance->FvbProtocol, (EFI_LBA)0, FvbNumLba, EFI_LBA_LIST_TERMINATOR);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
// Install all appropriate headers\r
Status = InitializeFvAndVariableStoreHeaders (Instance);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
}\r
\r
#include "NorFlash.h"\r
\r
-extern UINTN mFlashNvStorageVariableBase;\r
+extern UINTN mFlashNvStorageVariableBase;\r
///\r
/// The Firmware Volume Block Protocol is the low-level interface\r
/// to a firmware volume. File-level access to a firmware volume\r
**/\r
EFI_STATUS\r
InitializeFvAndVariableStoreHeaders (\r
- IN NOR_FLASH_INSTANCE *Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
)\r
{\r
- EFI_STATUS Status;\r
- VOID* Headers;\r
- UINTN HeadersLength;\r
- EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader;\r
- VARIABLE_STORE_HEADER *VariableStoreHeader;\r
- UINT32 NvStorageFtwSpareSize;\r
- UINT32 NvStorageFtwWorkingSize;\r
- UINT32 NvStorageVariableSize;\r
- UINT64 NvStorageFtwSpareBase;\r
- UINT64 NvStorageFtwWorkingBase;\r
- UINT64 NvStorageVariableBase;\r
-\r
- HeadersLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY) + sizeof(VARIABLE_STORE_HEADER);\r
- Headers = AllocateZeroPool(HeadersLength);\r
+ EFI_STATUS Status;\r
+ VOID *Headers;\r
+ UINTN HeadersLength;\r
+ EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader;\r
+ VARIABLE_STORE_HEADER *VariableStoreHeader;\r
+ UINT32 NvStorageFtwSpareSize;\r
+ UINT32 NvStorageFtwWorkingSize;\r
+ UINT32 NvStorageVariableSize;\r
+ UINT64 NvStorageFtwSpareBase;\r
+ UINT64 NvStorageFtwWorkingBase;\r
+ UINT64 NvStorageVariableBase;\r
+\r
+ HeadersLength = sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY) + sizeof (VARIABLE_STORE_HEADER);\r
+ Headers = AllocateZeroPool (HeadersLength);\r
\r
NvStorageFtwWorkingSize = PcdGet32 (PcdFlashNvStorageFtwWorkingSize);\r
- NvStorageFtwSpareSize = PcdGet32 (PcdFlashNvStorageFtwSpareSize);\r
- NvStorageVariableSize = PcdGet32 (PcdFlashNvStorageVariableSize);\r
+ NvStorageFtwSpareSize = PcdGet32 (PcdFlashNvStorageFtwSpareSize);\r
+ NvStorageVariableSize = PcdGet32 (PcdFlashNvStorageVariableSize);\r
\r
NvStorageFtwSpareBase = (PcdGet64 (PcdFlashNvStorageFtwSpareBase64) != 0) ?\r
- PcdGet64 (PcdFlashNvStorageFtwSpareBase64) : PcdGet32 (PcdFlashNvStorageFtwSpareBase);\r
+ PcdGet64 (PcdFlashNvStorageFtwSpareBase64) : PcdGet32 (PcdFlashNvStorageFtwSpareBase);\r
NvStorageFtwWorkingBase = (PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) != 0) ?\r
- PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) : PcdGet32 (PcdFlashNvStorageFtwWorkingBase);\r
+ PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) : PcdGet32 (PcdFlashNvStorageFtwWorkingBase);\r
NvStorageVariableBase = (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?\r
- PcdGet64 (PcdFlashNvStorageVariableBase64) : PcdGet32 (PcdFlashNvStorageVariableBase);\r
+ PcdGet64 (PcdFlashNvStorageVariableBase64) : PcdGet32 (PcdFlashNvStorageVariableBase);\r
\r
// FirmwareVolumeHeader->FvLength is declared to have the Variable area AND the FTW working area AND the FTW Spare contiguous.\r
if ((NvStorageVariableBase + NvStorageVariableSize) != NvStorageFtwWorkingBase) {\r
- DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwWorkingBase is not contiguous with NvStorageVariableBase region\n",\r
- __FUNCTION__));\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "%a: NvStorageFtwWorkingBase is not contiguous with NvStorageVariableBase region\n",\r
+ __FUNCTION__\r
+ ));\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
if ((NvStorageFtwWorkingBase + NvStorageFtwWorkingSize) != NvStorageFtwSpareBase) {\r
- DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwSpareBase is not contiguous with NvStorageFtwWorkingBase region\n",\r
- __FUNCTION__));\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "%a: NvStorageFtwSpareBase is not contiguous with NvStorageFtwWorkingBase region\n",\r
+ __FUNCTION__\r
+ ));\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// Check if the size of the area is at least one block size\r
if ((NvStorageVariableSize <= 0) || (NvStorageVariableSize / Instance->Media.BlockSize <= 0)) {\r
- DEBUG ((DEBUG_ERROR, "%a: NvStorageVariableSize is 0x%x, should be atleast one block size\n", __FUNCTION__,\r
- NvStorageVariableSize));\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "%a: NvStorageVariableSize is 0x%x, should be atleast one block size\n",\r
+ __FUNCTION__,\r
+ NvStorageVariableSize\r
+ ));\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
if ((NvStorageFtwWorkingSize <= 0) || (NvStorageFtwWorkingSize / Instance->Media.BlockSize <= 0)) {\r
- DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwWorkingSize is 0x%x, should be atleast one block size\n", __FUNCTION__,\r
- NvStorageFtwWorkingSize));\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "%a: NvStorageFtwWorkingSize is 0x%x, should be atleast one block size\n",\r
+ __FUNCTION__,\r
+ NvStorageFtwWorkingSize\r
+ ));\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
if ((NvStorageFtwSpareSize <= 0) || (NvStorageFtwSpareSize / Instance->Media.BlockSize <= 0)) {\r
- DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwSpareSize is 0x%x, should be atleast one block size\n", __FUNCTION__,\r
- NvStorageFtwSpareSize));\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "%a: NvStorageFtwSpareSize is 0x%x, should be atleast one block size\n",\r
+ __FUNCTION__,\r
+ NvStorageFtwSpareSize\r
+ ));\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// Ensure the Variable area Base Addresses are aligned on a block size boundaries\r
if ((NvStorageVariableBase % Instance->Media.BlockSize != 0) ||\r
(NvStorageFtwWorkingBase % Instance->Media.BlockSize != 0) ||\r
- (NvStorageFtwSpareBase % Instance->Media.BlockSize != 0)) {\r
+ (NvStorageFtwSpareBase % Instance->Media.BlockSize != 0))\r
+ {\r
DEBUG ((DEBUG_ERROR, "%a: NvStorage Base addresses must be aligned to block size boundaries", __FUNCTION__));\r
return EFI_INVALID_PARAMETER;\r
}\r
//\r
// EFI_FIRMWARE_VOLUME_HEADER\r
//\r
- FirmwareVolumeHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Headers;\r
+ FirmwareVolumeHeader = (EFI_FIRMWARE_VOLUME_HEADER *)Headers;\r
CopyGuid (&FirmwareVolumeHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid);\r
FirmwareVolumeHeader->FvLength =\r
- PcdGet32(PcdFlashNvStorageVariableSize) +\r
- PcdGet32(PcdFlashNvStorageFtwWorkingSize) +\r
- PcdGet32(PcdFlashNvStorageFtwSpareSize);\r
- FirmwareVolumeHeader->Signature = EFI_FVH_SIGNATURE;\r
- FirmwareVolumeHeader->Attributes = (EFI_FVB_ATTRIBUTES_2) (\r
- EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled\r
- EFI_FVB2_READ_STATUS | // Reads are currently enabled\r
- EFI_FVB2_STICKY_WRITE | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY\r
- EFI_FVB2_MEMORY_MAPPED | // It is memory mapped\r
- EFI_FVB2_ERASE_POLARITY | // After erasure all bits take this value (i.e. '1')\r
- EFI_FVB2_WRITE_STATUS | // Writes are currently enabled\r
- EFI_FVB2_WRITE_ENABLED_CAP // Writes may be enabled\r
- );\r
- FirmwareVolumeHeader->HeaderLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY);\r
- FirmwareVolumeHeader->Revision = EFI_FVH_REVISION;\r
+ PcdGet32 (PcdFlashNvStorageVariableSize) +\r
+ PcdGet32 (PcdFlashNvStorageFtwWorkingSize) +\r
+ PcdGet32 (PcdFlashNvStorageFtwSpareSize);\r
+ FirmwareVolumeHeader->Signature = EFI_FVH_SIGNATURE;\r
+ FirmwareVolumeHeader->Attributes = (EFI_FVB_ATTRIBUTES_2)(\r
+ EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled\r
+ EFI_FVB2_READ_STATUS | // Reads are currently enabled\r
+ EFI_FVB2_STICKY_WRITE | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY\r
+ EFI_FVB2_MEMORY_MAPPED | // It is memory mapped\r
+ EFI_FVB2_ERASE_POLARITY | // After erasure all bits take this value (i.e. '1')\r
+ EFI_FVB2_WRITE_STATUS | // Writes are currently enabled\r
+ EFI_FVB2_WRITE_ENABLED_CAP // Writes may be enabled\r
+ );\r
+ FirmwareVolumeHeader->HeaderLength = sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY);\r
+ FirmwareVolumeHeader->Revision = EFI_FVH_REVISION;\r
FirmwareVolumeHeader->BlockMap[0].NumBlocks = Instance->Media.LastBlock + 1;\r
- FirmwareVolumeHeader->BlockMap[0].Length = Instance->Media.BlockSize;\r
+ FirmwareVolumeHeader->BlockMap[0].Length = Instance->Media.BlockSize;\r
FirmwareVolumeHeader->BlockMap[1].NumBlocks = 0;\r
- FirmwareVolumeHeader->BlockMap[1].Length = 0;\r
- FirmwareVolumeHeader->Checksum = CalculateCheckSum16 ((UINT16*)FirmwareVolumeHeader,FirmwareVolumeHeader->HeaderLength);\r
+ FirmwareVolumeHeader->BlockMap[1].Length = 0;\r
+ FirmwareVolumeHeader->Checksum = CalculateCheckSum16 ((UINT16 *)FirmwareVolumeHeader, FirmwareVolumeHeader->HeaderLength);\r
\r
//\r
// VARIABLE_STORE_HEADER\r
//\r
- VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)Headers + FirmwareVolumeHeader->HeaderLength);\r
+ VariableStoreHeader = (VARIABLE_STORE_HEADER *)((UINTN)Headers + FirmwareVolumeHeader->HeaderLength);\r
CopyGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid);\r
- VariableStoreHeader->Size = PcdGet32(PcdFlashNvStorageVariableSize) - FirmwareVolumeHeader->HeaderLength;\r
- VariableStoreHeader->Format = VARIABLE_STORE_FORMATTED;\r
- VariableStoreHeader->State = VARIABLE_STORE_HEALTHY;\r
+ VariableStoreHeader->Size = PcdGet32 (PcdFlashNvStorageVariableSize) - FirmwareVolumeHeader->HeaderLength;\r
+ VariableStoreHeader->Format = VARIABLE_STORE_FORMATTED;\r
+ VariableStoreHeader->State = VARIABLE_STORE_HEALTHY;\r
\r
// Install the combined super-header in the NorFlash\r
Status = FvbWrite (&Instance->FvbProtocol, 0, 0, &HeadersLength, Headers);\r
**/\r
EFI_STATUS\r
ValidateFvHeader (\r
- IN NOR_FLASH_INSTANCE *Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
)\r
{\r
UINT16 Checksum;\r
UINTN VariableStoreLength;\r
UINTN FvLength;\r
\r
- FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress;\r
+ FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)Instance->RegionBaseAddress;\r
\r
- FvLength = PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) +\r
- PcdGet32(PcdFlashNvStorageFtwSpareSize);\r
+ FvLength = PcdGet32 (PcdFlashNvStorageVariableSize) + PcdGet32 (PcdFlashNvStorageFtwWorkingSize) +\r
+ PcdGet32 (PcdFlashNvStorageFtwSpareSize);\r
\r
//\r
// Verify the header revision, header signature, length\r
// Length of FvBlock cannot be 2**64-1\r
// HeaderLength cannot be an odd number\r
//\r
- if ( (FwVolHeader->Revision != EFI_FVH_REVISION)\r
- || (FwVolHeader->Signature != EFI_FVH_SIGNATURE)\r
- || (FwVolHeader->FvLength != FvLength)\r
- )\r
+ if ( (FwVolHeader->Revision != EFI_FVH_REVISION)\r
+ || (FwVolHeader->Signature != EFI_FVH_SIGNATURE)\r
+ || (FwVolHeader->FvLength != FvLength)\r
+ )\r
{\r
- DEBUG ((DEBUG_INFO, "%a: No Firmware Volume header present\n",\r
- __FUNCTION__));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: No Firmware Volume header present\n",\r
+ __FUNCTION__\r
+ ));\r
return EFI_NOT_FOUND;\r
}\r
\r
// Check the Firmware Volume Guid\r
- if( CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid) == FALSE ) {\r
- DEBUG ((DEBUG_INFO, "%a: Firmware Volume Guid non-compatible\n",\r
- __FUNCTION__));\r
+ if ( CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid) == FALSE ) {\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: Firmware Volume Guid non-compatible\n",\r
+ __FUNCTION__\r
+ ));\r
return EFI_NOT_FOUND;\r
}\r
\r
// Verify the header checksum\r
- Checksum = CalculateSum16((UINT16*)FwVolHeader, FwVolHeader->HeaderLength);\r
+ Checksum = CalculateSum16 ((UINT16 *)FwVolHeader, FwVolHeader->HeaderLength);\r
if (Checksum != 0) {\r
- DEBUG ((DEBUG_INFO, "%a: FV checksum is invalid (Checksum:0x%X)\n",\r
- __FUNCTION__, Checksum));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: FV checksum is invalid (Checksum:0x%X)\n",\r
+ __FUNCTION__,\r
+ Checksum\r
+ ));\r
return EFI_NOT_FOUND;\r
}\r
\r
- VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINTN)FwVolHeader + FwVolHeader->HeaderLength);\r
+ VariableStoreHeader = (VARIABLE_STORE_HEADER *)((UINTN)FwVolHeader + FwVolHeader->HeaderLength);\r
\r
// Check the Variable Store Guid\r
if (!CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) &&\r
- !CompareGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid)) {\r
- DEBUG ((DEBUG_INFO, "%a: Variable Store Guid non-compatible\n",\r
- __FUNCTION__));\r
+ !CompareGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGuid))\r
+ {\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: Variable Store Guid non-compatible\n",\r
+ __FUNCTION__\r
+ ));\r
return EFI_NOT_FOUND;\r
}\r
\r
VariableStoreLength = PcdGet32 (PcdFlashNvStorageVariableSize) - FwVolHeader->HeaderLength;\r
if (VariableStoreHeader->Size != VariableStoreLength) {\r
- DEBUG ((DEBUG_INFO, "%a: Variable Store Length does not match\n",\r
- __FUNCTION__));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: Variable Store Length does not match\n",\r
+ __FUNCTION__\r
+ ));\r
return EFI_NOT_FOUND;\r
}\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
-FvbGetAttributes(\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
+FvbGetAttributes (\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
)\r
{\r
EFI_FVB_ATTRIBUTES_2 FlashFvbAttributes;\r
- NOR_FLASH_INSTANCE *Instance;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- Instance = INSTANCE_FROM_FVB_THIS(This);\r
+ Instance = INSTANCE_FROM_FVB_THIS (This);\r
\r
- FlashFvbAttributes = (EFI_FVB_ATTRIBUTES_2) (\r
+ FlashFvbAttributes = (EFI_FVB_ATTRIBUTES_2)(\r
\r
- EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled\r
- EFI_FVB2_READ_STATUS | // Reads are currently enabled\r
- EFI_FVB2_STICKY_WRITE | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY\r
- EFI_FVB2_MEMORY_MAPPED | // It is memory mapped\r
- EFI_FVB2_ERASE_POLARITY // After erasure all bits take this value (i.e. '1')\r
+ EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled\r
+ EFI_FVB2_READ_STATUS | // Reads are currently enabled\r
+ EFI_FVB2_STICKY_WRITE | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY\r
+ EFI_FVB2_MEMORY_MAPPED | // It is memory mapped\r
+ EFI_FVB2_ERASE_POLARITY // After erasure all bits take this value (i.e. '1')\r
\r
- );\r
+ );\r
\r
// Check if it is write protected\r
if (Instance->Media.ReadOnly != TRUE) {\r
-\r
FlashFvbAttributes = FlashFvbAttributes |\r
EFI_FVB2_WRITE_STATUS | // Writes are currently enabled\r
EFI_FVB2_WRITE_ENABLED_CAP; // Writes may be enabled\r
**/\r
EFI_STATUS\r
EFIAPI\r
-FvbSetAttributes(\r
+FvbSetAttributes (\r
IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
)\r
{\r
- DEBUG ((DEBUG_BLKIO, "FvbSetAttributes(0x%X) is not supported\n",*Attributes));\r
+ DEBUG ((DEBUG_BLKIO, "FvbSetAttributes(0x%X) is not supported\n", *Attributes));\r
return EFI_UNSUPPORTED;\r
}\r
\r
OUT EFI_PHYSICAL_ADDRESS *Address\r
)\r
{\r
- NOR_FLASH_INSTANCE *Instance;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- Instance = INSTANCE_FROM_FVB_THIS(This);\r
+ Instance = INSTANCE_FROM_FVB_THIS (This);\r
\r
DEBUG ((DEBUG_BLKIO, "FvbGetPhysicalAddress(BaseAddress=0x%08x)\n", Instance->RegionBaseAddress));\r
\r
- ASSERT(Address != NULL);\r
+ ASSERT (Address != NULL);\r
\r
*Address = mFlashNvStorageVariableBase;\r
return EFI_SUCCESS;\r
OUT UINTN *NumberOfBlocks\r
)\r
{\r
- EFI_STATUS Status;\r
- NOR_FLASH_INSTANCE *Instance;\r
+ EFI_STATUS Status;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- Instance = INSTANCE_FROM_FVB_THIS(This);\r
+ Instance = INSTANCE_FROM_FVB_THIS (This);\r
\r
DEBUG ((DEBUG_BLKIO, "FvbGetBlockSize(Lba=%ld, BlockSize=0x%x, LastBlock=%ld)\n", Lba, Instance->Media.BlockSize, Instance->Media.LastBlock));\r
\r
Status = EFI_INVALID_PARAMETER;\r
} else {\r
// This is easy because in this platform each NorFlash device has equal sized blocks.\r
- *BlockSize = (UINTN) Instance->Media.BlockSize;\r
- *NumberOfBlocks = (UINTN) (Instance->Media.LastBlock - Lba + 1);\r
+ *BlockSize = (UINTN)Instance->Media.BlockSize;\r
+ *NumberOfBlocks = (UINTN)(Instance->Media.LastBlock - Lba + 1);\r
\r
DEBUG ((DEBUG_BLKIO, "FvbGetBlockSize: *BlockSize=0x%x, *NumberOfBlocks=0x%x.\n", *BlockSize, *NumberOfBlocks));\r
\r
EFI_STATUS\r
EFIAPI\r
FvbRead (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN OUT UINT8 *Buffer\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN OUT UINT8 *Buffer\r
)\r
{\r
- EFI_STATUS TempStatus;\r
- UINTN BlockSize;\r
- NOR_FLASH_INSTANCE *Instance;\r
+ EFI_STATUS TempStatus;\r
+ UINTN BlockSize;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- Instance = INSTANCE_FROM_FVB_THIS(This);\r
+ Instance = INSTANCE_FROM_FVB_THIS (This);\r
\r
DEBUG ((DEBUG_BLKIO, "FvbRead(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer));\r
\r
// Cache the block size to avoid de-referencing pointers all the time\r
BlockSize = Instance->Media.BlockSize;\r
\r
- DEBUG ((DEBUG_BLKIO, "FvbRead: Check if (Offset=0x%x + NumBytes=0x%x) <= BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));\r
+ DEBUG ((DEBUG_BLKIO, "FvbRead: Check if (Offset=0x%x + NumBytes=0x%x) <= BlockSize=0x%x\n", Offset, *NumBytes, BlockSize));\r
\r
// The read must not span block boundaries.\r
// We need to check each variable individually because adding two large values together overflows.\r
if ((Offset >= BlockSize) ||\r
(*NumBytes > BlockSize) ||\r
- ((Offset + *NumBytes) > BlockSize)) {\r
- DEBUG ((DEBUG_ERROR, "FvbRead: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));\r
+ ((Offset + *NumBytes) > BlockSize))\r
+ {\r
+ DEBUG ((DEBUG_ERROR, "FvbRead: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize));\r
return EFI_BAD_BUFFER_SIZE;\r
}\r
\r
return EFI_DEVICE_ERROR;\r
}\r
}\r
+\r
return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
FvbWrite (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
- IN EFI_LBA Lba,\r
- IN UINTN Offset,\r
- IN OUT UINTN *NumBytes,\r
- IN UINT8 *Buffer\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
)\r
{\r
- NOR_FLASH_INSTANCE *Instance;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
Instance = INSTANCE_FROM_FVB_THIS (This);\r
\r
EFI_STATUS\r
EFIAPI\r
FvbEraseBlocks (\r
- IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
+ IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
...\r
)\r
{\r
- EFI_STATUS Status;\r
- VA_LIST Args;\r
- UINTN BlockAddress; // Physical address of Lba to erase\r
- EFI_LBA StartingLba; // Lba from which we start erasing\r
- UINTN NumOfLba; // Number of Lba blocks to erase\r
- NOR_FLASH_INSTANCE *Instance;\r
+ EFI_STATUS Status;\r
+ VA_LIST Args;\r
+ UINTN BlockAddress; // Physical address of Lba to erase\r
+ EFI_LBA StartingLba; // Lba from which we start erasing\r
+ UINTN NumOfLba; // Number of Lba blocks to erase\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- Instance = INSTANCE_FROM_FVB_THIS(This);\r
+ Instance = INSTANCE_FROM_FVB_THIS (This);\r
\r
DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks()\n"));\r
\r
\r
// Have we reached the end of the list?\r
if (StartingLba == EFI_LBA_LIST_TERMINATOR) {\r
- //Exit the while loop\r
+ // Exit the while loop\r
break;\r
}\r
\r
goto EXIT;\r
}\r
} while (TRUE);\r
+\r
VA_END (Args);\r
\r
//\r
\r
// Go through each one and erase it\r
while (NumOfLba > 0) {\r
-\r
// Get the physical address of Lba to erase\r
BlockAddress = GET_NOR_BLOCK_ADDRESS (\r
- Instance->RegionBaseAddress,\r
- Instance->StartLba + StartingLba,\r
- Instance->Media.BlockSize\r
- );\r
+ Instance->RegionBaseAddress,\r
+ Instance->StartLba + StartingLba,\r
+ Instance->Media.BlockSize\r
+ );\r
\r
// Erase it\r
DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Erasing Lba=%ld @ 0x%08x.\n", Instance->StartLba + StartingLba, BlockAddress));\r
Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
VA_END (Args);\r
Status = EFI_DEVICE_ERROR;\r
goto EXIT;\r
NumOfLba--;\r
}\r
} while (TRUE);\r
+\r
VA_END (Args);\r
\r
EXIT:\r
VOID\r
EFIAPI\r
FvbVirtualNotifyEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
)\r
{\r
- EfiConvertPointer (0x0, (VOID**)&mFlashNvStorageVariableBase);\r
+ EfiConvertPointer (0x0, (VOID **)&mFlashNvStorageVariableBase);\r
return;\r
}\r
//\r
// Global variable declarations\r
//\r
-NOR_FLASH_INSTANCE **mNorFlashInstances;\r
-UINT32 mNorFlashDeviceCount;\r
-UINTN mFlashNvStorageVariableBase;\r
+NOR_FLASH_INSTANCE **mNorFlashInstances;\r
+UINT32 mNorFlashDeviceCount;\r
+UINTN mFlashNvStorageVariableBase;\r
\r
NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {\r
NOR_FLASH_SIGNATURE, // Signature\r
- NULL, // Handle ... NEED TO BE FILLED\r
+ NULL, // Handle ... NEED TO BE FILLED\r
\r
0, // DeviceBaseAddress ... NEED TO BE FILLED\r
0, // RegionBaseAddress ... NEED TO BE FILLED\r
\r
{\r
EFI_BLOCK_IO_PROTOCOL_REVISION2, // Revision\r
- NULL, // Media ... NEED TO BE FILLED\r
- NULL, // Reset;\r
- NULL, // ReadBlocks\r
- NULL, // WriteBlocks\r
- NULL // FlushBlocks\r
+ NULL, // Media ... NEED TO BE FILLED\r
+ NULL, // Reset;\r
+ NULL, // ReadBlocks\r
+ NULL, // WriteBlocks\r
+ NULL // FlushBlocks\r
}, // BlockIoProtocol\r
\r
{\r
- 0, // MediaId ... NEED TO BE FILLED\r
+ 0, // MediaId ... NEED TO BE FILLED\r
FALSE, // RemovableMedia\r
- TRUE, // MediaPresent\r
+ TRUE, // MediaPresent\r
FALSE, // LogicalPartition\r
FALSE, // ReadOnly\r
FALSE, // WriteCaching;\r
- 0, // BlockSize ... NEED TO BE FILLED\r
- 4, // IoAlign\r
- 0, // LastBlock ... NEED TO BE FILLED\r
- 0, // LowestAlignedLba\r
- 1, // LogicalBlocksPerPhysicalBlock\r
- }, //Media;\r
+ 0, // BlockSize ... NEED TO BE FILLED\r
+ 4, // IoAlign\r
+ 0, // LastBlock ... NEED TO BE FILLED\r
+ 0, // LowestAlignedLba\r
+ 1, // LogicalBlocksPerPhysicalBlock\r
+ }, // Media;\r
\r
{\r
EFI_DISK_IO_PROTOCOL_REVISION, // Revision\r
- NULL, // ReadDisk\r
- NULL // WriteDisk\r
+ NULL, // ReadDisk\r
+ NULL // WriteDisk\r
},\r
\r
{\r
- FvbGetAttributes, // GetAttributes\r
- FvbSetAttributes, // SetAttributes\r
- FvbGetPhysicalAddress, // GetPhysicalAddress\r
- FvbGetBlockSize, // GetBlockSize\r
- FvbRead, // Read\r
- FvbWrite, // Write\r
- FvbEraseBlocks, // EraseBlocks\r
- NULL, //ParentHandle\r
- }, // FvbProtoccol;\r
+ FvbGetAttributes, // GetAttributes\r
+ FvbSetAttributes, // SetAttributes\r
+ FvbGetPhysicalAddress, // GetPhysicalAddress\r
+ FvbGetBlockSize, // GetBlockSize\r
+ FvbRead, // Read\r
+ FvbWrite, // Write\r
+ FvbEraseBlocks, // EraseBlocks\r
+ NULL, // ParentHandle\r
+ }, // FvbProtoccol;\r
NULL, // ShadowBuffer\r
{\r
{\r
(UINT8)(OFFSET_OF (NOR_FLASH_DEVICE_PATH, End) >> 8)\r
}\r
},\r
- { 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } }, // GUID ... NEED TO BE FILLED\r
+ { 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }\r
+ }, // GUID ... NEED TO BE FILLED\r
},\r
0, // Index\r
{\r
END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
{ sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }\r
}\r
- } // DevicePath\r
+ } // DevicePath\r
};\r
\r
EFI_STATUS\r
NorFlashCreateInstance (\r
- IN UINTN NorFlashDeviceBase,\r
- IN UINTN NorFlashRegionBase,\r
- IN UINTN NorFlashSize,\r
- IN UINT32 Index,\r
- IN UINT32 BlockSize,\r
- IN BOOLEAN SupportFvb,\r
- OUT NOR_FLASH_INSTANCE** NorFlashInstance\r
+ IN UINTN NorFlashDeviceBase,\r
+ IN UINTN NorFlashRegionBase,\r
+ IN UINTN NorFlashSize,\r
+ IN UINT32 Index,\r
+ IN UINT32 BlockSize,\r
+ IN BOOLEAN SupportFvb,\r
+ OUT NOR_FLASH_INSTANCE **NorFlashInstance\r
)\r
{\r
- EFI_STATUS Status;\r
- NOR_FLASH_INSTANCE* Instance;\r
+ EFI_STATUS Status;\r
+ NOR_FLASH_INSTANCE *Instance;\r
\r
- ASSERT(NorFlashInstance != NULL);\r
+ ASSERT (NorFlashInstance != NULL);\r
\r
- Instance = AllocateRuntimeCopyPool (sizeof(NOR_FLASH_INSTANCE),&mNorFlashInstanceTemplate);\r
+ Instance = AllocateRuntimeCopyPool (sizeof (NOR_FLASH_INSTANCE), &mNorFlashInstanceTemplate);\r
if (Instance == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
Instance->DeviceBaseAddress = NorFlashDeviceBase;\r
Instance->RegionBaseAddress = NorFlashRegionBase;\r
- Instance->Size = NorFlashSize;\r
+ Instance->Size = NorFlashSize;\r
\r
Instance->BlockIoProtocol.Media = &Instance->Media;\r
- Instance->Media.MediaId = Index;\r
- Instance->Media.BlockSize = BlockSize;\r
- Instance->Media.LastBlock = (NorFlashSize / BlockSize)-1;\r
+ Instance->Media.MediaId = Index;\r
+ Instance->Media.BlockSize = BlockSize;\r
+ Instance->Media.LastBlock = (NorFlashSize / BlockSize)-1;\r
\r
CopyGuid (&Instance->DevicePath.Vendor.Guid, &gEfiCallerIdGuid);\r
Instance->DevicePath.Index = (UINT8)Index;\r
\r
- Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);;\r
+ Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);\r
if (Instance->ShadowBuffer == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
EFI_NATIVE_INTERFACE,\r
&Instance->FvbProtocol\r
);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
FreePool (Instance);\r
return Status;\r
}\r
} else {\r
- DEBUG((DEBUG_ERROR,"standalone MM NOR Flash driver only support FVB.\n"));\r
+ DEBUG ((DEBUG_ERROR, "standalone MM NOR Flash driver only support FVB.\n"));\r
FreePool (Instance);\r
return EFI_UNSUPPORTED;\r
}\r
**/\r
EFI_STATUS\r
NorFlashUnlockAndEraseSingleBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN UINTN BlockAddress\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN UINTN BlockAddress\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN Index;\r
+ EFI_STATUS Status;\r
+ UINTN Index;\r
\r
Index = 0;\r
// The block erase might fail a first time (SW bug ?). Retry it ...\r
if (EFI_ERROR (Status)) {\r
break;\r
}\r
+\r
Status = NorFlashEraseSingleBlock (Instance, BlockAddress);\r
Index++;\r
} while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));\r
\r
if (Index == NOR_FLASH_ERASE_RETRY) {\r
- DEBUG((DEBUG_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress,Index));\r
+ DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress, Index));\r
}\r
\r
return Status;\r
\r
EFI_STATUS\r
NorFlashWriteFullBlock (\r
- IN NOR_FLASH_INSTANCE *Instance,\r
- IN EFI_LBA Lba,\r
- IN UINT32 *DataBuffer,\r
- IN UINT32 BlockSizeInWords\r
+ IN NOR_FLASH_INSTANCE *Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINT32 *DataBuffer,\r
+ IN UINT32 BlockSizeInWords\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN WordAddress;\r
- UINT32 WordIndex;\r
- UINTN BufferIndex;\r
- UINTN BlockAddress;\r
- UINTN BuffersInBlock;\r
- UINTN RemainingWords;\r
- UINTN Cnt;\r
+ EFI_STATUS Status;\r
+ UINTN WordAddress;\r
+ UINT32 WordIndex;\r
+ UINTN BufferIndex;\r
+ UINTN BlockAddress;\r
+ UINTN BuffersInBlock;\r
+ UINTN RemainingWords;\r
+ UINTN Cnt;\r
\r
Status = EFI_SUCCESS;\r
\r
WordAddress = BlockAddress;\r
\r
Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));\r
goto EXIT;\r
}\r
\r
\r
// Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero\r
if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {\r
-\r
// First, break the entire block into buffer-sized chunks.\r
BuffersInBlock = (UINTN)(BlockSizeInWords * 4) / P30_MAX_BUFFER_SIZE_IN_BYTES;\r
\r
// Then feed each buffer chunk to the NOR Flash\r
// If a buffer does not contain any data, don't write it.\r
- for(BufferIndex=0;\r
+ for (BufferIndex = 0;\r
BufferIndex < BuffersInBlock;\r
BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS\r
- ) {\r
+ )\r
+ {\r
// Check the buffer to see if it contains any data (not set all 1s).\r
for (Cnt = 0; Cnt < P30_MAX_BUFFER_SIZE_IN_WORDS; Cnt++) {\r
if (~DataBuffer[Cnt] != 0 ) {\r
// Some data found, write the buffer.\r
- Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES,\r
- DataBuffer);\r
- if (EFI_ERROR(Status)) {\r
+ Status = NorFlashWriteBuffer (\r
+ Instance,\r
+ WordAddress,\r
+ P30_MAX_BUFFER_SIZE_IN_BYTES,\r
+ DataBuffer\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
+\r
break;\r
}\r
}\r
// Finally, finish off any remaining words that are less than the maximum size of the buffer\r
RemainingWords = BlockSizeInWords % P30_MAX_BUFFER_SIZE_IN_WORDS;\r
\r
- if(RemainingWords != 0) {\r
+ if (RemainingWords != 0) {\r
Status = NorFlashWriteBuffer (Instance, WordAddress, (RemainingWords * 4), DataBuffer);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
}\r
-\r
} else {\r
// For now, use the single word programming algorithm\r
// It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,\r
// i.e. which ends in the range 0x......01 - 0x......7F.\r
- for(WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {\r
+ for (WordIndex = 0; WordIndex < BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {\r
Status = NorFlashWriteSingleWord (Instance, WordAddress, *DataBuffer);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
}\r
}\r
\r
EXIT:\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));\r
}\r
+\r
return Status;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashInitialise (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_MM_SYSTEM_TABLE *MmSystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_MM_SYSTEM_TABLE *MmSystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 Index;\r
- NOR_FLASH_DESCRIPTION* NorFlashDevices;\r
- BOOLEAN ContainVariableStorage;\r
+ EFI_STATUS Status;\r
+ UINT32 Index;\r
+ NOR_FLASH_DESCRIPTION *NorFlashDevices;\r
+ BOOLEAN ContainVariableStorage;\r
\r
Status = NorFlashPlatformInitialization ();\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR,"NorFlashInitialise: Fail to initialize Nor Flash devices\n"));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NorFlashInitialise: Fail to initialize Nor Flash devices\n"));\r
return Status;\r
}\r
\r
Status = NorFlashPlatformGetDevices (&NorFlashDevices, &mNorFlashDeviceCount);\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR,"NorFlashInitialise: Fail to get Nor Flash devices\n"));\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NorFlashInitialise: Fail to get Nor Flash devices\n"));\r
return Status;\r
}\r
\r
- mNorFlashInstances = AllocatePool (sizeof(NOR_FLASH_INSTANCE*) * mNorFlashDeviceCount);\r
+ mNorFlashInstances = AllocatePool (sizeof (NOR_FLASH_INSTANCE *) * mNorFlashDeviceCount);\r
\r
for (Index = 0; Index < mNorFlashDeviceCount; Index++) {\r
// Check if this NOR Flash device contain the variable storage region\r
\r
- if (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) != 0) {\r
- ContainVariableStorage =\r
- (NorFlashDevices[Index].RegionBaseAddress <= FixedPcdGet64 (PcdFlashNvStorageVariableBase64)) &&\r
- (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) + FixedPcdGet32 (PcdFlashNvStorageVariableSize) <=\r
- NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
- } else {\r
- ContainVariableStorage =\r
- (NorFlashDevices[Index].RegionBaseAddress <= FixedPcdGet32 (PcdFlashNvStorageVariableBase)) &&\r
- (FixedPcdGet32 (PcdFlashNvStorageVariableBase) + FixedPcdGet32 (PcdFlashNvStorageVariableSize) <=\r
- NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
- }\r
+ if (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) != 0) {\r
+ ContainVariableStorage =\r
+ (NorFlashDevices[Index].RegionBaseAddress <= FixedPcdGet64 (PcdFlashNvStorageVariableBase64)) &&\r
+ (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) + FixedPcdGet32 (PcdFlashNvStorageVariableSize) <=\r
+ NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
+ } else {\r
+ ContainVariableStorage =\r
+ (NorFlashDevices[Index].RegionBaseAddress <= FixedPcdGet32 (PcdFlashNvStorageVariableBase)) &&\r
+ (FixedPcdGet32 (PcdFlashNvStorageVariableBase) + FixedPcdGet32 (PcdFlashNvStorageVariableSize) <=\r
+ NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);\r
+ }\r
\r
Status = NorFlashCreateInstance (\r
- NorFlashDevices[Index].DeviceBaseAddress,\r
- NorFlashDevices[Index].RegionBaseAddress,\r
- NorFlashDevices[Index].Size,\r
- Index,\r
- NorFlashDevices[Index].BlockSize,\r
- ContainVariableStorage,\r
- &mNorFlashInstances[Index]\r
- );\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((DEBUG_ERROR,"NorFlashInitialise: Fail to create instance for NorFlash[%d]\n",Index));\r
+ NorFlashDevices[Index].DeviceBaseAddress,\r
+ NorFlashDevices[Index].RegionBaseAddress,\r
+ NorFlashDevices[Index].Size,\r
+ Index,\r
+ NorFlashDevices[Index].BlockSize,\r
+ ContainVariableStorage,\r
+ &mNorFlashInstances[Index]\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "NorFlashInitialise: Fail to create instance for NorFlash[%d]\n", Index));\r
}\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashFvbInitialize (\r
- IN NOR_FLASH_INSTANCE* Instance\r
+ IN NOR_FLASH_INSTANCE *Instance\r
)\r
{\r
EFI_STATUS Status;\r
UINT32 FvbNumLba;\r
\r
- ASSERT((Instance != NULL));\r
-\r
+ ASSERT ((Instance != NULL));\r
\r
mFlashNvStorageVariableBase = (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?\r
- FixedPcdGet64 (PcdFlashNvStorageVariableBase64) : FixedPcdGet32 (PcdFlashNvStorageVariableBase);\r
+ FixedPcdGet64 (PcdFlashNvStorageVariableBase64) : FixedPcdGet32 (PcdFlashNvStorageVariableBase);\r
// Set the index of the first LBA for the FVB\r
Instance->StartLba = (mFlashNvStorageVariableBase - Instance->RegionBaseAddress) / Instance->Media.BlockSize;\r
\r
Status = ValidateFvHeader (Instance);\r
\r
// Install the Default FVB header if required\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
// There is no valid header, so time to install one.\r
DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__));\r
- DEBUG ((DEBUG_INFO, "%a: Installing a correct one for this volume.\n",\r
- __FUNCTION__));\r
+ DEBUG ((\r
+ DEBUG_INFO,\r
+ "%a: Installing a correct one for this volume.\n",\r
+ __FUNCTION__\r
+ ));\r
\r
// Erase all the NorFlash that is reserved for variable storage\r
- FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) + PcdGet32(PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;\r
+ FvbNumLba = (PcdGet32 (PcdFlashNvStorageVariableSize) + PcdGet32 (PcdFlashNvStorageFtwWorkingSize) + PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;\r
\r
Status = FvbEraseBlocks (&Instance->FvbProtocol, (EFI_LBA)0, FvbNumLba, EFI_LBA_LIST_TERMINATOR);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
// Install all appropriate headers\r
Status = InitializeFvAndVariableStoreHeaders (Instance);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
}\r
\r
**/\r
\r
-\r
#include <PiDxe.h>\r
\r
#include <Library/BaseLib.h>\r
\r
#include "PL061Gpio.h"\r
\r
-PLATFORM_GPIO_CONTROLLER *mPL061PlatformGpio;\r
+PLATFORM_GPIO_CONTROLLER *mPL061PlatformGpio;\r
\r
EFI_STATUS\r
EFIAPI\r
PL061Locate (\r
- IN EMBEDDED_GPIO_PIN Gpio,\r
- OUT UINTN *ControllerIndex,\r
- OUT UINTN *ControllerOffset,\r
- OUT UINTN *RegisterBase\r
+ IN EMBEDDED_GPIO_PIN Gpio,\r
+ OUT UINTN *ControllerIndex,\r
+ OUT UINTN *ControllerOffset,\r
+ OUT UINTN *RegisterBase\r
)\r
{\r
- UINT32 Index;\r
+ UINT32 Index;\r
\r
for (Index = 0; Index < mPL061PlatformGpio->GpioControllerCount; Index++) {\r
- if ( (Gpio >= mPL061PlatformGpio->GpioController[Index].GpioIndex)\r
- && (Gpio < mPL061PlatformGpio->GpioController[Index].GpioIndex\r
- + mPL061PlatformGpio->GpioController[Index].InternalGpioCount)) {\r
- *ControllerIndex = Index;\r
+ if ( (Gpio >= mPL061PlatformGpio->GpioController[Index].GpioIndex)\r
+ && (Gpio < mPL061PlatformGpio->GpioController[Index].GpioIndex\r
+ + mPL061PlatformGpio->GpioController[Index].InternalGpioCount))\r
+ {\r
+ *ControllerIndex = Index;\r
*ControllerOffset = Gpio % mPL061PlatformGpio->GpioController[Index].InternalGpioCount;\r
- *RegisterBase = mPL061PlatformGpio->GpioController[Index].RegisterBase;\r
+ *RegisterBase = mPL061PlatformGpio->GpioController[Index].RegisterBase;\r
return EFI_SUCCESS;\r
}\r
}\r
+\r
DEBUG ((DEBUG_ERROR, "%a, failed to locate gpio %d\n", __func__, Gpio));\r
return EFI_INVALID_PARAMETER;\r
}\r
UINTN\r
EFIAPI\r
PL061EffectiveAddress (\r
- IN UINTN Address,\r
- IN UINTN Mask\r
+ IN UINTN Address,\r
+ IN UINTN Mask\r
)\r
{\r
return ((Address + PL061_GPIO_DATA_REG_OFFSET) + (Mask << 2));\r
UINTN\r
EFIAPI\r
PL061GetPins (\r
- IN UINTN Address,\r
- IN UINTN Mask\r
+ IN UINTN Address,\r
+ IN UINTN Mask\r
)\r
{\r
return MmioRead8 (PL061EffectiveAddress (Address, Mask));\r
VOID\r
EFIAPI\r
PL061SetPins (\r
- IN UINTN Address,\r
- IN UINTN Mask,\r
- IN UINTN Value\r
+ IN UINTN Address,\r
+ IN UINTN Mask,\r
+ IN UINTN Value\r
)\r
{\r
MmioWrite8 (PL061EffectiveAddress (Address, Mask), Value);\r
/**\r
Function implementations\r
**/\r
-\r
EFI_STATUS\r
PL061Identify (\r
VOID\r
)\r
{\r
- UINTN Index;\r
- UINTN RegisterBase;\r
+ UINTN Index;\r
+ UINTN RegisterBase;\r
\r
- if ( (mPL061PlatformGpio->GpioCount == 0)\r
- || (mPL061PlatformGpio->GpioControllerCount == 0)) {\r
- return EFI_NOT_FOUND;\r
+ if ( (mPL061PlatformGpio->GpioCount == 0)\r
+ || (mPL061PlatformGpio->GpioControllerCount == 0))\r
+ {\r
+ return EFI_NOT_FOUND;\r
}\r
\r
for (Index = 0; Index < mPL061PlatformGpio->GpioControllerCount; Index++) {\r
RegisterBase = mPL061PlatformGpio->GpioController[Index].RegisterBase;\r
\r
// Check if this is a PrimeCell Peripheral\r
- if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D)\r
- || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0)\r
- || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05)\r
- || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1)) {\r
+ if ( (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID0) != 0x0D)\r
+ || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID1) != 0xF0)\r
+ || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID2) != 0x05)\r
+ || (MmioRead8 (RegisterBase + PL061_GPIO_PCELL_ID3) != 0xB1))\r
+ {\r
return EFI_NOT_FOUND;\r
}\r
\r
// Check if this PrimeCell Peripheral is the PL061 GPIO\r
- if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61)\r
- || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10)\r
- || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04)\r
- || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00)) {\r
+ if ( (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID0) != 0x61)\r
+ || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID1) != 0x10)\r
+ || ((MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04)\r
+ || (MmioRead8 (RegisterBase + PL061_GPIO_PERIPH_ID3) != 0x00))\r
+ {\r
return EFI_NOT_FOUND;\r
}\r
}\r
EFI_STATUS\r
EFIAPI\r
Get (\r
- IN EMBEDDED_GPIO *This,\r
- IN EMBEDDED_GPIO_PIN Gpio,\r
- OUT UINTN *Value\r
+ IN EMBEDDED_GPIO *This,\r
+ IN EMBEDDED_GPIO_PIN Gpio,\r
+ OUT UINTN *Value\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN Index, Offset, RegisterBase;\r
+ EFI_STATUS Status;\r
+ UINTN Index, Offset, RegisterBase;\r
\r
Status = PL061Locate (Gpio, &Index, &Offset, &RegisterBase);\r
ASSERT_EFI_ERROR (Status);\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if (PL061GetPins (RegisterBase, GPIO_PIN_MASK(Offset)) != 0) {\r
+ if (PL061GetPins (RegisterBase, GPIO_PIN_MASK (Offset)) != 0) {\r
*Value = 1;\r
} else {\r
*Value = 0;\r
IN EMBEDDED_GPIO_MODE Mode\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN Index, Offset, RegisterBase;\r
+ EFI_STATUS Status;\r
+ UINTN Index, Offset, RegisterBase;\r
\r
Status = PL061Locate (Gpio, &Index, &Offset, &RegisterBase);\r
ASSERT_EFI_ERROR (Status);\r
\r
- switch (Mode)\r
- {\r
+ switch (Mode) {\r
case GPIO_MODE_INPUT:\r
// Set the corresponding direction bit to LOW for input\r
- MmioAnd8 (RegisterBase + PL061_GPIO_DIR_REG,\r
- ~GPIO_PIN_MASK(Offset) & 0xFF);\r
+ MmioAnd8 (\r
+ RegisterBase + PL061_GPIO_DIR_REG,\r
+ ~GPIO_PIN_MASK(Offset) & 0xFF\r
+ );\r
break;\r
\r
case GPIO_MODE_OUTPUT_0:\r
// Set the corresponding direction bit to HIGH for output\r
- MmioOr8 (RegisterBase + PL061_GPIO_DIR_REG, GPIO_PIN_MASK(Offset));\r
+ MmioOr8 (RegisterBase + PL061_GPIO_DIR_REG, GPIO_PIN_MASK (Offset));\r
// Set the corresponding data bit to LOW for 0\r
- PL061SetPins (RegisterBase, GPIO_PIN_MASK(Offset), 0);\r
+ PL061SetPins (RegisterBase, GPIO_PIN_MASK (Offset), 0);\r
break;\r
\r
case GPIO_MODE_OUTPUT_1:\r
// Set the corresponding direction bit to HIGH for output\r
- MmioOr8 (RegisterBase + PL061_GPIO_DIR_REG, GPIO_PIN_MASK(Offset));\r
+ MmioOr8 (RegisterBase + PL061_GPIO_DIR_REG, GPIO_PIN_MASK (Offset));\r
// Set the corresponding data bit to HIGH for 1\r
- PL061SetPins (RegisterBase, GPIO_PIN_MASK(Offset), 0xff);\r
+ PL061SetPins (RegisterBase, GPIO_PIN_MASK (Offset), 0xff);\r
break;\r
\r
default:\r
OUT EMBEDDED_GPIO_MODE *Mode\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN Index, Offset, RegisterBase;\r
+ EFI_STATUS Status;\r
+ UINTN Index, Offset, RegisterBase;\r
\r
Status = PL061Locate (Gpio, &Index, &Offset, &RegisterBase);\r
ASSERT_EFI_ERROR (Status);\r
}\r
\r
// Check if it is input or output\r
- if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) {\r
+ if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK (Offset)) {\r
// Pin set to output\r
- if (PL061GetPins (RegisterBase, GPIO_PIN_MASK(Offset)) != 0) {\r
+ if (PL061GetPins (RegisterBase, GPIO_PIN_MASK (Offset)) != 0) {\r
*Mode = GPIO_MODE_OUTPUT_1;\r
} else {\r
*Mode = GPIO_MODE_OUTPUT_0;\r
/**\r
Protocol variable definition\r
**/\r
-EMBEDDED_GPIO gGpio = {\r
+EMBEDDED_GPIO gGpio = {\r
Get,\r
Set,\r
GetMode,\r
EFI_STATUS\r
EFIAPI\r
PL061InstallProtocol (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_HANDLE Handle;\r
- GPIO_CONTROLLER *GpioController;\r
+ EFI_STATUS Status;\r
+ EFI_HANDLE Handle;\r
+ GPIO_CONTROLLER *GpioController;\r
\r
//\r
// Make sure the Gpio protocol has not been installed in the system yet.\r
return EFI_BAD_BUFFER_SIZE;\r
}\r
\r
- mPL061PlatformGpio->GpioCount = PL061_GPIO_PINS;\r
+ mPL061PlatformGpio->GpioCount = PL061_GPIO_PINS;\r
mPL061PlatformGpio->GpioControllerCount = 1;\r
- mPL061PlatformGpio->GpioController = (GPIO_CONTROLLER *)((UINTN) mPL061PlatformGpio + sizeof (PLATFORM_GPIO_CONTROLLER));\r
+ mPL061PlatformGpio->GpioController = (GPIO_CONTROLLER *)((UINTN)mPL061PlatformGpio + sizeof (PLATFORM_GPIO_CONTROLLER));\r
\r
- GpioController = mPL061PlatformGpio->GpioController;\r
- GpioController->RegisterBase = (UINTN) PcdGet32 (PcdPL061GpioBase);\r
- GpioController->GpioIndex = 0;\r
+ GpioController = mPL061PlatformGpio->GpioController;\r
+ GpioController->RegisterBase = (UINTN)PcdGet32 (PcdPL061GpioBase);\r
+ GpioController->GpioIndex = 0;\r
GpioController->InternalGpioCount = PL061_GPIO_PINS;\r
}\r
\r
- Status = PL061Identify();\r
- if (EFI_ERROR(Status)) {\r
+ Status = PL061Identify ();\r
+ if (EFI_ERROR (Status)) {\r
return EFI_DEVICE_ERROR;\r
}\r
\r
// Install the Embedded GPIO Protocol onto a new handle\r
Handle = NULL;\r
- Status = gBS->InstallMultipleProtocolInterfaces(\r
+ Status = gBS->InstallMultipleProtocolInterfaces (\r
&Handle,\r
- &gEmbeddedGpioProtocolGuid, &gGpio,\r
+ &gEmbeddedGpioProtocolGuid,\r
+ &gGpio,\r
NULL\r
- );\r
- if (EFI_ERROR(Status)) {\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
Status = EFI_OUT_OF_RESOURCES;\r
}\r
\r
\r
**/\r
\r
-\r
#ifndef __PL061_GPIO_H__\r
#define __PL061_GPIO_H__\r
\r
#include <Protocol/EmbeddedGpio.h>\r
\r
// PL061 GPIO Registers\r
-#define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)\r
-#define PL061_GPIO_DATA_REG 0x000\r
-#define PL061_GPIO_DIR_REG 0x400\r
-#define PL061_GPIO_IS_REG 0x404\r
-#define PL061_GPIO_IBE_REG 0x408\r
-#define PL061_GPIO_IEV_REG 0x40C\r
-#define PL061_GPIO_IE_REG 0x410\r
-#define PL061_GPIO_RIS_REG 0x414\r
-#define PL061_GPIO_MIS_REG 0x410\r
-#define PL061_GPIO_IC_REG 0x41C\r
-#define PL061_GPIO_AFSEL_REG 0x420\r
-\r
-#define PL061_GPIO_PERIPH_ID0 0xFE0\r
-#define PL061_GPIO_PERIPH_ID1 0xFE4\r
-#define PL061_GPIO_PERIPH_ID2 0xFE8\r
-#define PL061_GPIO_PERIPH_ID3 0xFEC\r
-\r
-#define PL061_GPIO_PCELL_ID0 0xFF0\r
-#define PL061_GPIO_PCELL_ID1 0xFF4\r
-#define PL061_GPIO_PCELL_ID2 0xFF8\r
-#define PL061_GPIO_PCELL_ID3 0xFFC\r
-\r
-#define PL061_GPIO_PINS 8\r
+#define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)\r
+#define PL061_GPIO_DATA_REG 0x000\r
+#define PL061_GPIO_DIR_REG 0x400\r
+#define PL061_GPIO_IS_REG 0x404\r
+#define PL061_GPIO_IBE_REG 0x408\r
+#define PL061_GPIO_IEV_REG 0x40C\r
+#define PL061_GPIO_IE_REG 0x410\r
+#define PL061_GPIO_RIS_REG 0x414\r
+#define PL061_GPIO_MIS_REG 0x410\r
+#define PL061_GPIO_IC_REG 0x41C\r
+#define PL061_GPIO_AFSEL_REG 0x420\r
+\r
+#define PL061_GPIO_PERIPH_ID0 0xFE0\r
+#define PL061_GPIO_PERIPH_ID1 0xFE4\r
+#define PL061_GPIO_PERIPH_ID2 0xFE8\r
+#define PL061_GPIO_PERIPH_ID3 0xFEC\r
+\r
+#define PL061_GPIO_PCELL_ID0 0xFF0\r
+#define PL061_GPIO_PCELL_ID1 0xFF4\r
+#define PL061_GPIO_PCELL_ID2 0xFF8\r
+#define PL061_GPIO_PCELL_ID3 0xFFC\r
+\r
+#define PL061_GPIO_PINS 8\r
\r
// All bits low except one bit high, native bit length\r
-#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))\r
+#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))\r
\r
-#endif // __PL061_GPIO_H__\r
+#endif // __PL061_GPIO_H__\r
\r
**/\r
\r
-\r
#include <PiDxe.h>\r
\r
#include <Library/BaseLib.h>\r
VOID\r
EFIAPI\r
SP805InterruptHandler (\r
- IN HARDWARE_INTERRUPT_SOURCE Source,\r
- IN EFI_SYSTEM_CONTEXT SystemContext\r
+ IN HARDWARE_INTERRUPT_SOURCE Source,\r
+ IN EFI_SYSTEM_CONTEXT SystemContext\r
)\r
{\r
SP805Unlock ();\r
EFI_STATUS\r
EFIAPI\r
SP805RegisterHandler (\r
- IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r
- IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction\r
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r
+ IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction\r
)\r
{\r
- if (mWatchdogNotify == NULL && NotifyFunction == NULL) {\r
+ if ((mWatchdogNotify == NULL) && (NotifyFunction == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if (mWatchdogNotify != NULL && NotifyFunction != NULL) {\r
+ if ((mWatchdogNotify != NULL) && (NotifyFunction != NULL)) {\r
return EFI_ALREADY_STARTED;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
SP805SetTimerPeriod (\r
- IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r
- IN UINT64 TimerPeriod // In 100ns units\r
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r
+ IN UINT64 TimerPeriod // In 100ns units\r
)\r
{\r
EFI_STATUS Status;\r
EFI_STATUS\r
EFIAPI\r
SP805GetTimerPeriod (\r
- IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r
- OUT UINT64 *TimerPeriod\r
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r
+ OUT UINT64 *TimerPeriod\r
)\r
{\r
if (TimerPeriod == NULL) {\r
Retrieves the period of the timer interrupt in 100 nS units.\r
\r
**/\r
-STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {\r
+STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {\r
SP805RegisterHandler,\r
SP805SetTimerPeriod,\r
SP805GetTimerPeriod\r
EFI_STATUS\r
EFIAPI\r
SP805Initialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
EFI_STATUS Status;\r
EFI_HANDLE Handle;\r
\r
// Find the interrupt controller protocol. ASSERT if not found.\r
- Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL,\r
- (VOID **)&mInterrupt);\r
+ Status = gBS->LocateProtocol (\r
+ &gHardwareInterruptProtocolGuid,\r
+ NULL,\r
+ (VOID **)&mInterrupt\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
// Unlock access to the SP805 registers\r
SP805Lock ();\r
\r
if (PcdGet32 (PcdSP805WatchdogInterrupt) > 0) {\r
- Status = mInterrupt->RegisterInterruptSource (mInterrupt,\r
+ Status = mInterrupt->RegisterInterruptSource (\r
+ mInterrupt,\r
PcdGet32 (PcdSP805WatchdogInterrupt),\r
- SP805InterruptHandler);\r
+ SP805InterruptHandler\r
+ );\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((DEBUG_ERROR, "%a: failed to register watchdog interrupt - %r\n",\r
- __FUNCTION__, Status));\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "%a: failed to register watchdog interrupt - %r\n",\r
+ __FUNCTION__,\r
+ Status\r
+ ));\r
return Status;\r
}\r
} else {\r
- DEBUG ((DEBUG_WARN, "%a: no interrupt specified, running in RESET mode only\n",\r
- __FUNCTION__));\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
+ "%a: no interrupt specified, running in RESET mode only\n",\r
+ __FUNCTION__\r
+ ));\r
}\r
\r
//\r
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);\r
\r
// Register for an ExitBootServicesEvent\r
- Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,\r
- ExitBootServicesEvent, NULL, &mEfiExitBootServicesEvent);\r
+ Status = gBS->CreateEvent (\r
+ EVT_SIGNAL_EXIT_BOOT_SERVICES,\r
+ TPL_NOTIFY,\r
+ ExitBootServicesEvent,\r
+ NULL,\r
+ &mEfiExitBootServicesEvent\r
+ );\r
if (EFI_ERROR (Status)) {\r
Status = EFI_OUT_OF_RESOURCES;\r
goto EXIT;\r
Handle = NULL;\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
&Handle,\r
- &gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,\r
+ &gEfiWatchdogTimerArchProtocolGuid,\r
+ &mWatchdogTimer,\r
NULL\r
);\r
if (EFI_ERROR (Status)) {\r
\r
**/\r
\r
-\r
#ifndef __SP805_WATCHDOG_H__\r
#define __SP805_WATCHDOG_H__\r
\r
// SP805 Watchdog Registers\r
-#define SP805_WDOG_LOAD_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x000)\r
-#define SP805_WDOG_CURRENT_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x004)\r
-#define SP805_WDOG_CONTROL_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x008)\r
-#define SP805_WDOG_INT_CLR_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x00C)\r
-#define SP805_WDOG_RAW_INT_STS_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x010)\r
-#define SP805_WDOG_MSK_INT_STS_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x014)\r
-#define SP805_WDOG_LOCK_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xC00)\r
-\r
-#define SP805_WDOG_PERIPH_ID0 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE0)\r
-#define SP805_WDOG_PERIPH_ID1 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE4)\r
-#define SP805_WDOG_PERIPH_ID2 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE8)\r
-#define SP805_WDOG_PERIPH_ID3 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFEC)\r
-\r
-#define SP805_WDOG_PCELL_ID0 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF0)\r
-#define SP805_WDOG_PCELL_ID1 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF4)\r
-#define SP805_WDOG_PCELL_ID2 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF8)\r
-#define SP805_WDOG_PCELL_ID3 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFFC)\r
+#define SP805_WDOG_LOAD_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x000)\r
+#define SP805_WDOG_CURRENT_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x004)\r
+#define SP805_WDOG_CONTROL_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x008)\r
+#define SP805_WDOG_INT_CLR_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x00C)\r
+#define SP805_WDOG_RAW_INT_STS_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x010)\r
+#define SP805_WDOG_MSK_INT_STS_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0x014)\r
+#define SP805_WDOG_LOCK_REG ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xC00)\r
+\r
+#define SP805_WDOG_PERIPH_ID0 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE0)\r
+#define SP805_WDOG_PERIPH_ID1 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE4)\r
+#define SP805_WDOG_PERIPH_ID2 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFE8)\r
+#define SP805_WDOG_PERIPH_ID3 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFEC)\r
+\r
+#define SP805_WDOG_PCELL_ID0 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF0)\r
+#define SP805_WDOG_PCELL_ID1 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF4)\r
+#define SP805_WDOG_PCELL_ID2 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFF8)\r
+#define SP805_WDOG_PCELL_ID3 ((UINT32)PcdGet32 (PcdSP805WatchdogBase) + 0xFFC)\r
\r
// Timer control register bit definitions\r
#define SP805_WDOG_CTRL_INTEN BIT0\r
#define SP805_WDOG_LOCK_IS_LOCKED 0x00000001\r
#define SP805_WDOG_SPECIAL_UNLOCK_CODE 0x1ACCE551\r
\r
-#endif // __SP805_WATCHDOG_H__\r
+#endif // __SP805_WATCHDOG_H__\r
**/\r
UINTN\r
ArmPlatformGetCorePosition (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
);\r
\r
/**\r
**/\r
UINTN\r
ArmPlatformIsPrimaryCore (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
);\r
\r
/**\r
**/\r
RETURN_STATUS\r
ArmPlatformInitialize (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
);\r
\r
/**\r
**/\r
VOID\r
ArmPlatformGetVirtualMemoryMap (\r
- OUT ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r
+ OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap\r
);\r
\r
/**\r
\r
#include <Protocol/GraphicsOutput.h>\r
\r
-#define LCD_VRAM_SIZE SIZE_8MB\r
+#define LCD_VRAM_SIZE SIZE_8MB\r
\r
// Modes definitions\r
-#define VGA 0\r
-#define SVGA 1\r
-#define XGA 2\r
-#define SXGA 3\r
-#define WSXGA 4\r
-#define UXGA 5\r
-#define HD 6\r
-#define WVGA 7\r
-#define QHD 8\r
-#define WSVGA 9\r
-#define HD720 10\r
-#define WXGA 11\r
+#define VGA 0\r
+#define SVGA 1\r
+#define XGA 2\r
+#define SXGA 3\r
+#define WSXGA 4\r
+#define UXGA 5\r
+#define HD 6\r
+#define WVGA 7\r
+#define QHD 8\r
+#define WSVGA 9\r
+#define HD720 10\r
+#define WXGA 11\r
\r
// VGA Mode: 640 x 480\r
-#define VGA_H_RES_PIXELS 640\r
-#define VGA_V_RES_PIXELS 480\r
-#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */\r
+#define VGA_H_RES_PIXELS 640\r
+#define VGA_V_RES_PIXELS 480\r
+#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */\r
\r
-#define VGA_H_SYNC ( 80 - 1)\r
-#define VGA_H_FRONT_PORCH ( 16 - 1)\r
-#define VGA_H_BACK_PORCH ( 64 - 1)\r
+#define VGA_H_SYNC ( 80 - 1)\r
+#define VGA_H_FRONT_PORCH ( 16 - 1)\r
+#define VGA_H_BACK_PORCH ( 64 - 1)\r
\r
-#define VGA_V_SYNC ( 4 - 1)\r
-#define VGA_V_FRONT_PORCH ( 3 - 1)\r
-#define VGA_V_BACK_PORCH ( 13 - 1)\r
+#define VGA_V_SYNC ( 4 - 1)\r
+#define VGA_V_FRONT_PORCH ( 3 - 1)\r
+#define VGA_V_BACK_PORCH ( 13 - 1)\r
\r
// SVGA Mode: 800 x 600\r
-#define SVGA_H_RES_PIXELS 800\r
-#define SVGA_V_RES_PIXELS 600\r
-#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */\r
+#define SVGA_H_RES_PIXELS 800\r
+#define SVGA_V_RES_PIXELS 600\r
+#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */\r
\r
-#define SVGA_H_SYNC ( 80 - 1)\r
-#define SVGA_H_FRONT_PORCH ( 32 - 1)\r
-#define SVGA_H_BACK_PORCH (112 - 1)\r
+#define SVGA_H_SYNC ( 80 - 1)\r
+#define SVGA_H_FRONT_PORCH ( 32 - 1)\r
+#define SVGA_H_BACK_PORCH (112 - 1)\r
\r
-#define SVGA_V_SYNC ( 4 - 1)\r
-#define SVGA_V_FRONT_PORCH ( 3 - 1)\r
-#define SVGA_V_BACK_PORCH ( 17 - 1)\r
+#define SVGA_V_SYNC ( 4 - 1)\r
+#define SVGA_V_FRONT_PORCH ( 3 - 1)\r
+#define SVGA_V_BACK_PORCH ( 17 - 1)\r
\r
// XGA Mode: 1024 x 768\r
-#define XGA_H_RES_PIXELS 1024\r
-#define XGA_V_RES_PIXELS 768\r
-#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */\r
+#define XGA_H_RES_PIXELS 1024\r
+#define XGA_V_RES_PIXELS 768\r
+#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */\r
\r
-#define XGA_H_SYNC (104 - 1)\r
-#define XGA_H_FRONT_PORCH ( 48 - 1)\r
-#define XGA_H_BACK_PORCH (152 - 1)\r
+#define XGA_H_SYNC (104 - 1)\r
+#define XGA_H_FRONT_PORCH ( 48 - 1)\r
+#define XGA_H_BACK_PORCH (152 - 1)\r
\r
-#define XGA_V_SYNC ( 4 - 1)\r
-#define XGA_V_FRONT_PORCH ( 3 - 1)\r
-#define XGA_V_BACK_PORCH ( 23 - 1)\r
+#define XGA_V_SYNC ( 4 - 1)\r
+#define XGA_V_FRONT_PORCH ( 3 - 1)\r
+#define XGA_V_BACK_PORCH ( 23 - 1)\r
\r
// SXGA Mode: 1280 x 1024\r
-#define SXGA_H_RES_PIXELS 1280\r
-#define SXGA_V_RES_PIXELS 1024\r
-#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */\r
+#define SXGA_H_RES_PIXELS 1280\r
+#define SXGA_V_RES_PIXELS 1024\r
+#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */\r
\r
-#define SXGA_H_SYNC (136 - 1)\r
-#define SXGA_H_FRONT_PORCH ( 80 - 1)\r
-#define SXGA_H_BACK_PORCH (216 - 1)\r
+#define SXGA_H_SYNC (136 - 1)\r
+#define SXGA_H_FRONT_PORCH ( 80 - 1)\r
+#define SXGA_H_BACK_PORCH (216 - 1)\r
\r
-#define SXGA_V_SYNC ( 7 - 1)\r
-#define SXGA_V_FRONT_PORCH ( 3 - 1)\r
-#define SXGA_V_BACK_PORCH ( 29 - 1)\r
+#define SXGA_V_SYNC ( 7 - 1)\r
+#define SXGA_V_FRONT_PORCH ( 3 - 1)\r
+#define SXGA_V_BACK_PORCH ( 29 - 1)\r
\r
// WSXGA+ Mode: 1680 x 1050\r
-#define WSXGA_H_RES_PIXELS 1680\r
-#define WSXGA_V_RES_PIXELS 1050\r
-#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */\r
+#define WSXGA_H_RES_PIXELS 1680\r
+#define WSXGA_V_RES_PIXELS 1050\r
+#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */\r
\r
-#define WSXGA_H_SYNC (170 - 1)\r
-#define WSXGA_H_FRONT_PORCH (104 - 1)\r
-#define WSXGA_H_BACK_PORCH (274 - 1)\r
+#define WSXGA_H_SYNC (170 - 1)\r
+#define WSXGA_H_FRONT_PORCH (104 - 1)\r
+#define WSXGA_H_BACK_PORCH (274 - 1)\r
\r
-#define WSXGA_V_SYNC ( 5 - 1)\r
-#define WSXGA_V_FRONT_PORCH ( 4 - 1)\r
-#define WSXGA_V_BACK_PORCH ( 41 - 1)\r
+#define WSXGA_V_SYNC ( 5 - 1)\r
+#define WSXGA_V_FRONT_PORCH ( 4 - 1)\r
+#define WSXGA_V_BACK_PORCH ( 41 - 1)\r
\r
// UXGA Mode: 1600 x 1200\r
-#define UXGA_H_RES_PIXELS 1600\r
-#define UXGA_V_RES_PIXELS 1200\r
-#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */\r
+#define UXGA_H_RES_PIXELS 1600\r
+#define UXGA_V_RES_PIXELS 1200\r
+#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */\r
\r
-#define UXGA_H_SYNC (168 - 1)\r
-#define UXGA_H_FRONT_PORCH (112 - 1)\r
-#define UXGA_H_BACK_PORCH (280 - 1)\r
+#define UXGA_H_SYNC (168 - 1)\r
+#define UXGA_H_FRONT_PORCH (112 - 1)\r
+#define UXGA_H_BACK_PORCH (280 - 1)\r
\r
-#define UXGA_V_SYNC ( 4 - 1)\r
-#define UXGA_V_FRONT_PORCH ( 3 - 1)\r
-#define UXGA_V_BACK_PORCH ( 38 - 1)\r
+#define UXGA_V_SYNC ( 4 - 1)\r
+#define UXGA_V_FRONT_PORCH ( 3 - 1)\r
+#define UXGA_V_BACK_PORCH ( 38 - 1)\r
\r
// HD Mode: 1920 x 1080\r
-#define HD_H_RES_PIXELS 1920\r
-#define HD_V_RES_PIXELS 1080\r
-#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */\r
+#define HD_H_RES_PIXELS 1920\r
+#define HD_V_RES_PIXELS 1080\r
+#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */\r
\r
-#define HD_H_SYNC ( 79 - 1)\r
-#define HD_H_FRONT_PORCH (128 - 1)\r
-#define HD_H_BACK_PORCH (328 - 1)\r
+#define HD_H_SYNC ( 79 - 1)\r
+#define HD_H_FRONT_PORCH (128 - 1)\r
+#define HD_H_BACK_PORCH (328 - 1)\r
\r
-#define HD_V_SYNC ( 5 - 1)\r
-#define HD_V_FRONT_PORCH ( 3 - 1)\r
-#define HD_V_BACK_PORCH ( 32 - 1)\r
+#define HD_V_SYNC ( 5 - 1)\r
+#define HD_V_FRONT_PORCH ( 3 - 1)\r
+#define HD_V_BACK_PORCH ( 32 - 1)\r
\r
// WVGA Mode: 800 x 480\r
-#define WVGA_H_RES_PIXELS 800\r
-#define WVGA_V_RES_PIXELS 480\r
-#define WVGA_OSC_FREQUENCY 29500000 /* 0x01C22260 */\r
-#define WVGA_H_SYNC ( 72 - 1)\r
-#define WVGA_H_FRONT_PORCH ( 24 - 1)\r
-#define WVGA_H_BACK_PORCH ( 96 - 1)\r
-#define WVGA_V_SYNC ( 7 - 1)\r
-#define WVGA_V_FRONT_PORCH ( 3 - 1)\r
-#define WVGA_V_BACK_PORCH ( 10 - 1)\r
+#define WVGA_H_RES_PIXELS 800\r
+#define WVGA_V_RES_PIXELS 480\r
+#define WVGA_OSC_FREQUENCY 29500000 /* 0x01C22260 */\r
+#define WVGA_H_SYNC ( 72 - 1)\r
+#define WVGA_H_FRONT_PORCH ( 24 - 1)\r
+#define WVGA_H_BACK_PORCH ( 96 - 1)\r
+#define WVGA_V_SYNC ( 7 - 1)\r
+#define WVGA_V_FRONT_PORCH ( 3 - 1)\r
+#define WVGA_V_BACK_PORCH ( 10 - 1)\r
\r
// QHD Mode: 960 x 540\r
-#define QHD_H_RES_PIXELS 960\r
-#define QHD_V_RES_PIXELS 540\r
-#define QHD_OSC_FREQUENCY 40750000 /* 0x026DCBB0 */\r
-#define QHD_H_SYNC ( 96 - 1)\r
-#define QHD_H_FRONT_PORCH ( 32 - 1)\r
-#define QHD_H_BACK_PORCH (128 - 1)\r
-#define QHD_V_SYNC ( 5 - 1)\r
-#define QHD_V_FRONT_PORCH ( 3 - 1)\r
-#define QHD_V_BACK_PORCH ( 14 - 1)\r
+#define QHD_H_RES_PIXELS 960\r
+#define QHD_V_RES_PIXELS 540\r
+#define QHD_OSC_FREQUENCY 40750000 /* 0x026DCBB0 */\r
+#define QHD_H_SYNC ( 96 - 1)\r
+#define QHD_H_FRONT_PORCH ( 32 - 1)\r
+#define QHD_H_BACK_PORCH (128 - 1)\r
+#define QHD_V_SYNC ( 5 - 1)\r
+#define QHD_V_FRONT_PORCH ( 3 - 1)\r
+#define QHD_V_BACK_PORCH ( 14 - 1)\r
\r
// WSVGA Mode: 1024 x 600\r
-#define WSVGA_H_RES_PIXELS 1024\r
-#define WSVGA_V_RES_PIXELS 600\r
-#define WSVGA_OSC_FREQUENCY 49000000 /* 0x02EBAE40 */\r
-#define WSVGA_H_SYNC (104 - 1)\r
-#define WSVGA_H_FRONT_PORCH ( 40 - 1)\r
-#define WSVGA_H_BACK_PORCH (144 - 1)\r
-#define WSVGA_V_SYNC ( 10 - 1)\r
-#define WSVGA_V_FRONT_PORCH ( 3 - 1)\r
-#define WSVGA_V_BACK_PORCH ( 11 - 1)\r
+#define WSVGA_H_RES_PIXELS 1024\r
+#define WSVGA_V_RES_PIXELS 600\r
+#define WSVGA_OSC_FREQUENCY 49000000 /* 0x02EBAE40 */\r
+#define WSVGA_H_SYNC (104 - 1)\r
+#define WSVGA_H_FRONT_PORCH ( 40 - 1)\r
+#define WSVGA_H_BACK_PORCH (144 - 1)\r
+#define WSVGA_V_SYNC ( 10 - 1)\r
+#define WSVGA_V_FRONT_PORCH ( 3 - 1)\r
+#define WSVGA_V_BACK_PORCH ( 11 - 1)\r
\r
// HD720 Mode: 1280 x 720\r
-#define HD720_H_RES_PIXELS 1280\r
-#define HD720_V_RES_PIXELS 720\r
-#define HD720_OSC_FREQUENCY 74500000 /* 0x0470C7A0 */\r
-#define HD720_H_SYNC (128 - 1)\r
-#define HD720_H_FRONT_PORCH ( 64 - 1)\r
-#define HD720_H_BACK_PORCH (192 - 1)\r
-#define HD720_V_SYNC ( 5 - 1)\r
-#define HD720_V_FRONT_PORCH ( 3 - 1)\r
-#define HD720_V_BACK_PORCH ( 20 - 1)\r
+#define HD720_H_RES_PIXELS 1280\r
+#define HD720_V_RES_PIXELS 720\r
+#define HD720_OSC_FREQUENCY 74500000 /* 0x0470C7A0 */\r
+#define HD720_H_SYNC (128 - 1)\r
+#define HD720_H_FRONT_PORCH ( 64 - 1)\r
+#define HD720_H_BACK_PORCH (192 - 1)\r
+#define HD720_V_SYNC ( 5 - 1)\r
+#define HD720_V_FRONT_PORCH ( 3 - 1)\r
+#define HD720_V_BACK_PORCH ( 20 - 1)\r
\r
// WXGA Mode: 1280 x 800\r
-#define WXGA_H_RES_PIXELS 1280\r
-#define WXGA_V_RES_PIXELS 800\r
-#define WXGA_OSC_FREQUENCY 83500000 /* 0x04FA1BE0 */\r
-#define WXGA_H_SYNC (128 - 1)\r
-#define WXGA_H_FRONT_PORCH ( 72 - 1)\r
-#define WXGA_H_BACK_PORCH (200 - 1)\r
-#define WXGA_V_SYNC ( 6 - 1)\r
-#define WXGA_V_FRONT_PORCH ( 3 - 1)\r
-#define WXGA_V_BACK_PORCH ( 22 - 1)\r
+#define WXGA_H_RES_PIXELS 1280\r
+#define WXGA_V_RES_PIXELS 800\r
+#define WXGA_OSC_FREQUENCY 83500000 /* 0x04FA1BE0 */\r
+#define WXGA_H_SYNC (128 - 1)\r
+#define WXGA_H_FRONT_PORCH ( 72 - 1)\r
+#define WXGA_H_BACK_PORCH (200 - 1)\r
+#define WXGA_V_SYNC ( 6 - 1)\r
+#define WXGA_V_FRONT_PORCH ( 3 - 1)\r
+#define WXGA_V_BACK_PORCH ( 22 - 1)\r
\r
// Colour Masks\r
-#define LCD_24BPP_RED_MASK 0x00FF0000\r
-#define LCD_24BPP_GREEN_MASK 0x0000FF00\r
-#define LCD_24BPP_BLUE_MASK 0x000000FF\r
-#define LCD_24BPP_RESERVED_MASK 0xFF000000\r
-\r
-#define LCD_16BPP_555_RED_MASK 0x00007C00\r
-#define LCD_16BPP_555_GREEN_MASK 0x000003E0\r
-#define LCD_16BPP_555_BLUE_MASK 0x0000001F\r
-#define LCD_16BPP_555_RESERVED_MASK 0x00000000\r
-\r
-#define LCD_16BPP_565_RED_MASK 0x0000F800\r
-#define LCD_16BPP_565_GREEN_MASK 0x000007E0\r
-#define LCD_16BPP_565_BLUE_MASK 0x0000001F\r
-#define LCD_16BPP_565_RESERVED_MASK 0x00008000\r
-\r
-#define LCD_12BPP_444_RED_MASK 0x00000F00\r
-#define LCD_12BPP_444_GREEN_MASK 0x000000F0\r
-#define LCD_12BPP_444_BLUE_MASK 0x0000000F\r
-#define LCD_12BPP_444_RESERVED_MASK 0x0000F000\r
+#define LCD_24BPP_RED_MASK 0x00FF0000\r
+#define LCD_24BPP_GREEN_MASK 0x0000FF00\r
+#define LCD_24BPP_BLUE_MASK 0x000000FF\r
+#define LCD_24BPP_RESERVED_MASK 0xFF000000\r
+\r
+#define LCD_16BPP_555_RED_MASK 0x00007C00\r
+#define LCD_16BPP_555_GREEN_MASK 0x000003E0\r
+#define LCD_16BPP_555_BLUE_MASK 0x0000001F\r
+#define LCD_16BPP_555_RESERVED_MASK 0x00000000\r
+\r
+#define LCD_16BPP_565_RED_MASK 0x0000F800\r
+#define LCD_16BPP_565_GREEN_MASK 0x000007E0\r
+#define LCD_16BPP_565_BLUE_MASK 0x0000001F\r
+#define LCD_16BPP_565_RESERVED_MASK 0x00008000\r
+\r
+#define LCD_12BPP_444_RED_MASK 0x00000F00\r
+#define LCD_12BPP_444_GREEN_MASK 0x000000F0\r
+#define LCD_12BPP_444_BLUE_MASK 0x0000000F\r
+#define LCD_12BPP_444_RESERVED_MASK 0x0000F000\r
\r
/** The enumeration maps the PL111 LcdBpp values used in the LCD Control\r
Register\r
\r
// Display timing settings.\r
typedef struct {\r
- UINT32 Resolution;\r
- UINT32 Sync;\r
- UINT32 BackPorch;\r
- UINT32 FrontPorch;\r
+ UINT32 Resolution;\r
+ UINT32 Sync;\r
+ UINT32 BackPorch;\r
+ UINT32 FrontPorch;\r
} SCAN_TIMINGS;\r
\r
/** Platform related initialization function.\r
**/\r
EFI_STATUS\r
LcdPlatformInitializeDisplay (\r
- IN EFI_HANDLE Handle\r
+ IN EFI_HANDLE Handle\r
);\r
\r
/** Allocate VRAM memory in DRAM for the framebuffer\r
**/\r
EFI_STATUS\r
LcdPlatformGetVram (\r
- OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,\r
- OUT UINTN* VramSize\r
+ OUT EFI_PHYSICAL_ADDRESS *VramBaseAddress,\r
+ OUT UINTN *VramSize\r
);\r
\r
/** Return total number of modes supported.\r
**/\r
EFI_STATUS\r
LcdPlatformSetMode (\r
- IN UINT32 ModeNumber\r
+ IN UINT32 ModeNumber\r
);\r
\r
/** Return information for the requested mode number.\r
**/\r
EFI_STATUS\r
LcdPlatformGetTimings (\r
- IN UINT32 ModeNumber,\r
- OUT SCAN_TIMINGS **Horizontal,\r
- OUT SCAN_TIMINGS **Vertical\r
+ IN UINT32 ModeNumber,\r
+ OUT SCAN_TIMINGS **Horizontal,\r
+ OUT SCAN_TIMINGS **Vertical\r
);\r
\r
/** Return bits per pixel information for a mode number.\r
**/\r
EFI_STATUS\r
LcdPlatformGetBpp (\r
- IN UINT32 ModeNumber,\r
- OUT LCD_BPP* Bpp\r
+ IN UINT32 ModeNumber,\r
+ OUT LCD_BPP *Bpp\r
);\r
\r
#endif /* LCD_PLATFORM_LIB_H_ */\r
#define _NORFLASHPLATFORMLIB_H_\r
\r
typedef struct {\r
- UINTN DeviceBaseAddress; // Start address of the Device Base Address (DBA)\r
- UINTN RegionBaseAddress; // Start address of one single region\r
- UINTN Size;\r
- UINTN BlockSize;\r
+ UINTN DeviceBaseAddress; // Start address of the Device Base Address (DBA)\r
+ UINTN RegionBaseAddress; // Start address of one single region\r
+ UINTN Size;\r
+ UINTN BlockSize;\r
} NOR_FLASH_DESCRIPTION;\r
\r
EFI_STATUS\r
\r
EFI_STATUS\r
NorFlashPlatformGetDevices (\r
- OUT NOR_FLASH_DESCRIPTION **NorFlashDescriptions,\r
- OUT UINT32 *Count\r
+ OUT NOR_FLASH_DESCRIPTION **NorFlashDescriptions,\r
+ OUT UINT32 *Count\r
);\r
\r
#endif /* _NORFLASHPLATFORMLIB_H_ */\r
RETURN_STATUS\r
EFIAPI\r
PL011UartGetControl (\r
- IN UINTN UartBase,\r
+ IN UINTN UartBase,\r
OUT UINT32 *Control\r
);\r
\r
UINTN\r
EFIAPI\r
PL011UartWrite (\r
- IN UINTN UartBase,\r
- IN UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
+ IN UINTN UartBase,\r
+ IN UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
);\r
\r
/**\r
UINTN\r
EFIAPI\r
PL011UartRead (\r
- IN UINTN UartBase,\r
- OUT UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
+ IN UINTN UartBase,\r
+ OUT UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
);\r
\r
/**\r
BOOLEAN\r
EFIAPI\r
PL011UartPoll (\r
- IN UINTN UartBase\r
+ IN UINTN UartBase\r
);\r
\r
#endif\r
#include "ArmMaliDp.h"\r
\r
// CORE_ID of the MALI DP\r
-STATIC UINT32 mDpDeviceId;\r
+STATIC UINT32 mDpDeviceId;\r
\r
/** Disable the graphics layer\r
\r
**/\r
STATIC\r
VOID\r
-LayerGraphicsDisable (VOID)\r
+LayerGraphicsDisable (\r
+ VOID\r
+ )\r
{\r
MmioAnd32 (DP_BASE + DP_DE_LG_CONTROL, ~DP_DE_LG_ENABLE);\r
}\r
**/\r
STATIC\r
VOID\r
-LayerGraphicsEnable (VOID)\r
+LayerGraphicsEnable (\r
+ VOID\r
+ )\r
{\r
MmioOr32 (DP_BASE + DP_DE_LG_CONTROL, DP_DE_LG_ENABLE);\r
}\r
STATIC\r
VOID\r
LayerGraphicsSetFrame (\r
- IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress\r
+ IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress\r
)\r
{\r
// Disable the graphics layer.\r
STATIC\r
VOID\r
LayerGraphicsConfig (\r
- IN CONST EFI_GRAPHICS_PIXEL_FORMAT UefiGfxPixelFormat,\r
- IN CONST UINT32 HRes,\r
- IN CONST UINT32 VRes\r
+ IN CONST EFI_GRAPHICS_PIXEL_FORMAT UefiGfxPixelFormat,\r
+ IN CONST UINT32 HRes,\r
+ IN CONST UINT32 VRes\r
)\r
{\r
- UINT32 PixelFormat;\r
+ UINT32 PixelFormat;\r
\r
// Disable the graphics layer before configuring any settings.\r
LayerGraphicsDisable ();\r
STATIC\r
VOID\r
SetDisplayEngineTiming (\r
- IN CONST SCAN_TIMINGS * CONST Horizontal,\r
- IN CONST SCAN_TIMINGS * CONST Vertical\r
+ IN CONST SCAN_TIMINGS *CONST Horizontal,\r
+ IN CONST SCAN_TIMINGS *CONST Vertical\r
)\r
{\r
- UINTN RegHIntervals;\r
- UINTN RegVIntervals;\r
- UINTN RegSyncControl;\r
- UINTN RegHVActiveSize;\r
+ UINTN RegHIntervals;\r
+ UINTN RegVIntervals;\r
+ UINTN RegSyncControl;\r
+ UINTN RegHVActiveSize;\r
\r
if (mDpDeviceId == MALIDP_500) {\r
// MALI DP500 timing registers.\r
- RegHIntervals = DP_BASE + DP_DE_DP500_H_INTERVALS;\r
- RegVIntervals = DP_BASE + DP_DE_DP500_V_INTERVALS;\r
- RegSyncControl = DP_BASE + DP_DE_DP500_SYNC_CONTROL;\r
+ RegHIntervals = DP_BASE + DP_DE_DP500_H_INTERVALS;\r
+ RegVIntervals = DP_BASE + DP_DE_DP500_V_INTERVALS;\r
+ RegSyncControl = DP_BASE + DP_DE_DP500_SYNC_CONTROL;\r
RegHVActiveSize = DP_BASE + DP_DE_DP500_HV_ACTIVESIZE;\r
} else {\r
// MALI DP550/DP650 timing registers.\r
- RegHIntervals = DP_BASE + DP_DE_H_INTERVALS;\r
- RegVIntervals = DP_BASE + DP_DE_V_INTERVALS;\r
- RegSyncControl = DP_BASE + DP_DE_SYNC_CONTROL;\r
+ RegHIntervals = DP_BASE + DP_DE_H_INTERVALS;\r
+ RegVIntervals = DP_BASE + DP_DE_V_INTERVALS;\r
+ RegSyncControl = DP_BASE + DP_DE_SYNC_CONTROL;\r
RegHVActiveSize = DP_BASE + DP_DE_HV_ACTIVESIZE;\r
}\r
\r
ArmMaliDpGetCoreId (\r
)\r
{\r
- UINT32 DpCoreId;\r
+ UINT32 DpCoreId;\r
\r
// First check for DP500 as register offset for DP550/DP650 CORE_ID\r
// is beyond 3K/4K register space of the DP500.\r
- DpCoreId = MmioRead32 (DP_BASE + DP_DE_DP500_CORE_ID);\r
+ DpCoreId = MmioRead32 (DP_BASE + DP_DE_DP500_CORE_ID);\r
DpCoreId >>= DP_DE_DP500_CORE_ID_SHIFT;\r
\r
if (DpCoreId == MALIDP_500) {\r
}\r
\r
// Check for DP550 or DP650.\r
- DpCoreId = MmioRead32 (DP_BASE + DP_DC_CORE_ID);\r
+ DpCoreId = MmioRead32 (DP_BASE + DP_DC_CORE_ID);\r
DpCoreId >>= DP_DC_CORE_ID_SHIFT;\r
\r
if ((DpCoreId == MALIDP_550) || (DpCoreId == MALIDP_650)) {\r
on the platform.\r
**/\r
EFI_STATUS\r
-LcdIdentify (VOID)\r
+LcdIdentify (\r
+ VOID\r
+ )\r
{\r
- DEBUG ((DEBUG_WARN,\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
"Probing ARM Mali DP500/DP550/DP650 at base address 0x%p\n",\r
DP_BASE\r
));\r
}\r
\r
if (mDpDeviceId == MALIDP_NOT_PRESENT) {\r
- DEBUG ((DEBUG_WARN, "ARM Mali DP not found...\n"));\r
- return EFI_NOT_FOUND;\r
+ DEBUG ((DEBUG_WARN, "ARM Mali DP not found...\n"));\r
+ return EFI_NOT_FOUND;\r
}\r
\r
DEBUG ((DEBUG_WARN, "Found ARM Mali DP %x\n", mDpDeviceId));\r
**/\r
EFI_STATUS\r
LcdInitialize (\r
- IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress\r
+ IN CONST EFI_PHYSICAL_ADDRESS FrameBaseAddress\r
)\r
{\r
DEBUG ((DEBUG_WARN, "Framebuffer base address = %p\n", FrameBaseAddress));\r
}\r
\r
if (mDpDeviceId == MALIDP_NOT_PRESENT) {\r
- DEBUG ((DEBUG_ERROR, "ARM Mali DP initialization failed,"\r
- "no ARM Mali DP present\n"));\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "ARM Mali DP initialization failed,"\r
+ "no ARM Mali DP present\n"\r
+ ));\r
return EFI_NOT_FOUND;\r
}\r
\r
**/\r
STATIC\r
VOID\r
-SetConfigurationMode (VOID)\r
+SetConfigurationMode (\r
+ VOID\r
+ )\r
{\r
// Request configuration Mode.\r
if (mDpDeviceId == MALIDP_500) {\r
**/\r
STATIC\r
VOID\r
-SetNormalMode (VOID)\r
+SetNormalMode (\r
+ VOID\r
+ )\r
{\r
// Disable configuration Mode.\r
if (mDpDeviceId == MALIDP_500) {\r
**/\r
STATIC\r
VOID\r
-SetConfigValid (VOID)\r
+SetConfigValid (\r
+ VOID\r
+ )\r
{\r
if (mDpDeviceId == MALIDP_500) {\r
MmioOr32 (DP_BASE + DP_DP500_CONFIG_VALID, DP_DC_CONFIG_VALID);\r
\r
**/\r
VOID\r
-LcdShutdown (VOID)\r
+LcdShutdown (\r
+ VOID\r
+ )\r
{\r
// Disable graphics layer.\r
LayerGraphicsDisable ();\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
+\r
#ifndef ARMMALIDP_H_\r
#define ARMMALIDP_H_\r
\r
-#define DP_BASE (FixedPcdGet64 (PcdArmMaliDpBase))\r
+#define DP_BASE (FixedPcdGet64 (PcdArmMaliDpBase))\r
\r
// MALI DP Ids\r
-#define MALIDP_NOT_PRESENT 0xFFF\r
-#define MALIDP_500 0x500\r
-#define MALIDP_550 0x550\r
-#define MALIDP_650 0x650\r
+#define MALIDP_NOT_PRESENT 0xFFF\r
+#define MALIDP_500 0x500\r
+#define MALIDP_550 0x550\r
+#define MALIDP_650 0x650\r
\r
// DP500 Peripheral Ids\r
-#define DP500_ID_PART_0 0x00\r
-#define DP500_ID_DES_0 0xB\r
-#define DP500_ID_PART_1 0x5\r
+#define DP500_ID_PART_0 0x00\r
+#define DP500_ID_DES_0 0xB\r
+#define DP500_ID_PART_1 0x5\r
\r
-#define DP500_ID_REVISION 0x1\r
-#define DP500_ID_JEDEC 0x1\r
-#define DP500_ID_DES_1 0x3\r
+#define DP500_ID_REVISION 0x1\r
+#define DP500_ID_JEDEC 0x1\r
+#define DP500_ID_DES_1 0x3\r
\r
-#define DP500_PERIPHERAL_ID0_VAL (DP500_ID_PART_0)\r
-#define DP500_PERIPHERAL_ID1_VAL ((DP500_ID_DES_0 << 4) \\r
+#define DP500_PERIPHERAL_ID0_VAL (DP500_ID_PART_0)\r
+#define DP500_PERIPHERAL_ID1_VAL ((DP500_ID_DES_0 << 4) \\r
| DP500_ID_PART_1)\r
-#define DP500_PERIPHERAL_ID2_VAL ((DP500_ID_REVISION << 4) \\r
+#define DP500_PERIPHERAL_ID2_VAL ((DP500_ID_REVISION << 4) \\r
| (DP500_ID_JEDEC << 3) \\r
| (DP500_ID_DES_1))\r
\r
// DP550 Peripheral Ids\r
-#define DP550_ID_PART_0 0x50\r
-#define DP550_ID_DES_0 0xB\r
-#define DP550_ID_PART_1 0x5\r
+#define DP550_ID_PART_0 0x50\r
+#define DP550_ID_DES_0 0xB\r
+#define DP550_ID_PART_1 0x5\r
\r
-#define DP550_ID_REVISION 0x0\r
-#define DP550_ID_JEDEC 0x1\r
-#define DP550_ID_DES_1 0x3\r
+#define DP550_ID_REVISION 0x0\r
+#define DP550_ID_JEDEC 0x1\r
+#define DP550_ID_DES_1 0x3\r
\r
-#define DP550_PERIPHERAL_ID0_VAL (DP550_ID_PART_0)\r
-#define DP550_PERIPHERAL_ID1_VAL ((DP550_ID_DES_0 << 4) \\r
+#define DP550_PERIPHERAL_ID0_VAL (DP550_ID_PART_0)\r
+#define DP550_PERIPHERAL_ID1_VAL ((DP550_ID_DES_0 << 4) \\r
| DP550_ID_PART_1)\r
-#define DP550_PERIPHERAL_ID2_VAL ((DP550_ID_REVISION << 4) \\r
+#define DP550_PERIPHERAL_ID2_VAL ((DP550_ID_REVISION << 4) \\r
| (DP550_ID_JEDEC << 3) \\r
| (DP550_ID_DES_1))\r
\r
// DP650 Peripheral Ids\r
-#define DP650_ID_PART_0 0x50\r
-#define DP650_ID_DES_0 0xB\r
-#define DP650_ID_PART_1 0x6\r
+#define DP650_ID_PART_0 0x50\r
+#define DP650_ID_DES_0 0xB\r
+#define DP650_ID_PART_1 0x6\r
\r
-#define DP650_ID_REVISION 0x0\r
-#define DP650_ID_JEDEC 0x1\r
-#define DP650_ID_DES_1 0x3\r
+#define DP650_ID_REVISION 0x0\r
+#define DP650_ID_JEDEC 0x1\r
+#define DP650_ID_DES_1 0x3\r
\r
-#define DP650_PERIPHERAL_ID0_VAL (DP650_ID_PART_0)\r
-#define DP650_PERIPHERAL_ID1_VAL ((DP650_ID_DES_0 << 4) \\r
+#define DP650_PERIPHERAL_ID0_VAL (DP650_ID_PART_0)\r
+#define DP650_PERIPHERAL_ID1_VAL ((DP650_ID_DES_0 << 4) \\r
| DP650_ID_PART_1)\r
-#define DP650_PERIPHERAL_ID2_VAL ((DP650_ID_REVISION << 4) \\r
+#define DP650_PERIPHERAL_ID2_VAL ((DP650_ID_REVISION << 4) \\r
| (DP650_ID_JEDEC << 3) \\r
| (DP650_ID_DES_1))\r
\r
// Display Engine (DE) control register offsets for DP550/DP650\r
-#define DP_DE_STATUS 0x00000\r
-#define DP_DE_IRQ_SET 0x00004\r
-#define DP_DE_IRQ_MASK 0x00008\r
-#define DP_DE_IRQ_CLEAR 0x0000C\r
-#define DP_DE_CONTROL 0x00010\r
-#define DP_DE_PROG_LINE 0x00014\r
-#define DP_DE_AXI_CONTROL 0x00018\r
-#define DP_DE_AXI_QOS 0x0001C\r
-#define DP_DE_DISPLAY_FUNCTION 0x00020\r
-\r
-#define DP_DE_H_INTERVALS 0x00030\r
-#define DP_DE_V_INTERVALS 0x00034\r
-#define DP_DE_SYNC_CONTROL 0x00038\r
-#define DP_DE_HV_ACTIVESIZE 0x0003C\r
-#define DP_DE_DISPLAY_SIDEBAND 0x00040\r
-#define DP_DE_BACKGROUND_COLOR 0x00044\r
-#define DP_DE_DISPLAY_SPLIT 0x00048\r
-#define DP_DE_OUTPUT_DEPTH 0x0004C\r
+#define DP_DE_STATUS 0x00000\r
+#define DP_DE_IRQ_SET 0x00004\r
+#define DP_DE_IRQ_MASK 0x00008\r
+#define DP_DE_IRQ_CLEAR 0x0000C\r
+#define DP_DE_CONTROL 0x00010\r
+#define DP_DE_PROG_LINE 0x00014\r
+#define DP_DE_AXI_CONTROL 0x00018\r
+#define DP_DE_AXI_QOS 0x0001C\r
+#define DP_DE_DISPLAY_FUNCTION 0x00020\r
+\r
+#define DP_DE_H_INTERVALS 0x00030\r
+#define DP_DE_V_INTERVALS 0x00034\r
+#define DP_DE_SYNC_CONTROL 0x00038\r
+#define DP_DE_HV_ACTIVESIZE 0x0003C\r
+#define DP_DE_DISPLAY_SIDEBAND 0x00040\r
+#define DP_DE_BACKGROUND_COLOR 0x00044\r
+#define DP_DE_DISPLAY_SPLIT 0x00048\r
+#define DP_DE_OUTPUT_DEPTH 0x0004C\r
\r
// Display Engine (DE) control register offsets for DP500\r
-#define DP_DE_DP500_CORE_ID 0x00018\r
-#define DP_DE_DP500_CONTROL 0x0000C\r
-#define DP_DE_DP500_PROG_LINE 0x00010\r
-#define DP_DE_DP500_H_INTERVALS 0x00028\r
-#define DP_DE_DP500_V_INTERVALS 0x0002C\r
-#define DP_DE_DP500_SYNC_CONTROL 0x00030\r
-#define DP_DE_DP500_HV_ACTIVESIZE 0x00034\r
-#define DP_DE_DP500_BG_COLOR_RG 0x0003C\r
-#define DP_DE_DP500_BG_COLOR_B 0x00040\r
+#define DP_DE_DP500_CORE_ID 0x00018\r
+#define DP_DE_DP500_CONTROL 0x0000C\r
+#define DP_DE_DP500_PROG_LINE 0x00010\r
+#define DP_DE_DP500_H_INTERVALS 0x00028\r
+#define DP_DE_DP500_V_INTERVALS 0x0002C\r
+#define DP_DE_DP500_SYNC_CONTROL 0x00030\r
+#define DP_DE_DP500_HV_ACTIVESIZE 0x00034\r
+#define DP_DE_DP500_BG_COLOR_RG 0x0003C\r
+#define DP_DE_DP500_BG_COLOR_B 0x00040\r
\r
/* Display Engine (DE) graphics layer (LG) register offsets\r
* NOTE: For DP500 it will be LG2.\r
*/\r
-#define DE_LG_OFFSET 0x00300\r
-#define DP_DE_LG_FORMAT (DE_LG_OFFSET)\r
-#define DP_DE_LG_CONTROL (DE_LG_OFFSET + 0x04)\r
-#define DP_DE_LG_COMPOSE (DE_LG_OFFSET + 0x08)\r
-#define DP_DE_LG_IN_SIZE (DE_LG_OFFSET + 0x0C)\r
-#define DP_DE_LG_CMP_SIZE (DE_LG_OFFSET + 0x10)\r
-#define DP_DE_LG_OFFSET (DE_LG_OFFSET + 0x14)\r
-#define DP_DE_LG_H_STRIDE (DE_LG_OFFSET + 0x18)\r
-#define DP_DE_LG_PTR_LOW (DE_LG_OFFSET + 0x1C)\r
-#define DP_DE_LG_PTR_HIGH (DE_LG_OFFSET + 0x20)\r
-#define DP_DE_LG_CHROMA_KEY (DE_LG_OFFSET + 0x2C)\r
-#define DP_DE_LG_AD_CONTROL (DE_LG_OFFSET + 0x30)\r
-#define DP_DE_LG_MMU_CONTROL (DE_LG_OFFSET + 0x48)\r
+#define DE_LG_OFFSET 0x00300\r
+#define DP_DE_LG_FORMAT (DE_LG_OFFSET)\r
+#define DP_DE_LG_CONTROL (DE_LG_OFFSET + 0x04)\r
+#define DP_DE_LG_COMPOSE (DE_LG_OFFSET + 0x08)\r
+#define DP_DE_LG_IN_SIZE (DE_LG_OFFSET + 0x0C)\r
+#define DP_DE_LG_CMP_SIZE (DE_LG_OFFSET + 0x10)\r
+#define DP_DE_LG_OFFSET (DE_LG_OFFSET + 0x14)\r
+#define DP_DE_LG_H_STRIDE (DE_LG_OFFSET + 0x18)\r
+#define DP_DE_LG_PTR_LOW (DE_LG_OFFSET + 0x1C)\r
+#define DP_DE_LG_PTR_HIGH (DE_LG_OFFSET + 0x20)\r
+#define DP_DE_LG_CHROMA_KEY (DE_LG_OFFSET + 0x2C)\r
+#define DP_DE_LG_AD_CONTROL (DE_LG_OFFSET + 0x30)\r
+#define DP_DE_LG_MMU_CONTROL (DE_LG_OFFSET + 0x48)\r
\r
// Display core (DC) control register offsets.\r
-#define DP_DC_OFFSET 0x0C000\r
-#define DP_DC_STATUS (DP_DC_OFFSET + 0x00)\r
-#define DP_DC_IRQ_SET (DP_DC_OFFSET + 0x04)\r
-#define DP_DC_IRQ_MASK (DP_DC_OFFSET + 0x08)\r
-#define DP_DC_IRQ_CLEAR (DP_DC_OFFSET + 0x0C)\r
-#define DP_DC_CONTROL (DP_DC_OFFSET + 0x10)\r
-#define DP_DC_CONFIG_VALID (DP_DC_OFFSET + 0x14)\r
-#define DP_DC_CORE_ID (DP_DC_OFFSET + 0x18)\r
+#define DP_DC_OFFSET 0x0C000\r
+#define DP_DC_STATUS (DP_DC_OFFSET + 0x00)\r
+#define DP_DC_IRQ_SET (DP_DC_OFFSET + 0x04)\r
+#define DP_DC_IRQ_MASK (DP_DC_OFFSET + 0x08)\r
+#define DP_DC_IRQ_CLEAR (DP_DC_OFFSET + 0x0C)\r
+#define DP_DC_CONTROL (DP_DC_OFFSET + 0x10)\r
+#define DP_DC_CONFIG_VALID (DP_DC_OFFSET + 0x14)\r
+#define DP_DC_CORE_ID (DP_DC_OFFSET + 0x18)\r
\r
// DP500 has a global configuration register.\r
-#define DP_DP500_CONFIG_VALID (0xF00)\r
+#define DP_DP500_CONFIG_VALID (0xF00)\r
\r
// Display core ID register offsets.\r
-#define DP_DC_ID_OFFSET 0x0FF00\r
-#define DP_DC_ID_PERIPHERAL_ID4 (DP_DC_ID_OFFSET + 0xD0)\r
-#define DP_DC_CONFIGURATION_ID (DP_DC_ID_OFFSET + 0xD4)\r
-#define DP_DC_PERIPHERAL_ID0 (DP_DC_ID_OFFSET + 0xE0)\r
-#define DP_DC_PERIPHERAL_ID1 (DP_DC_ID_OFFSET + 0xE4)\r
-#define DP_DC_PERIPHERAL_ID2 (DP_DC_ID_OFFSET + 0xE8)\r
-#define DP_DC_COMPONENT_ID0 (DP_DC_ID_OFFSET + 0xF0)\r
-#define DP_DC_COMPONENT_ID1 (DP_DC_ID_OFFSET + 0xF4)\r
-#define DP_DC_COMPONENT_ID2 (DP_DC_ID_OFFSET + 0xF8)\r
-#define DP_DC_COMPONENT_ID3 (DP_DC_ID_OFFSET + 0xFC)\r
-\r
-#define DP_DP500_ID_OFFSET 0x0F00\r
-#define DP_DP500_ID_PERIPHERAL_ID4 (DP_DP500_ID_OFFSET + 0xD0)\r
-#define DP_DP500_CONFIGURATION_ID (DP_DP500_ID_OFFSET + 0xD4)\r
-#define DP_DP500_PERIPHERAL_ID0 (DP_DP500_ID_OFFSET + 0xE0)\r
-#define DP_DP500_PERIPHERAL_ID1 (DP_DP500_ID_OFFSET + 0xE4)\r
-#define DP_DP500_PERIPHERAL_ID2 (DP_DP500_ID_OFFSET + 0xE8)\r
-#define DP_DP500_COMPONENT_ID0 (DP_DP500_ID_OFFSET + 0xF0)\r
-#define DP_DP500_COMPONENT_ID1 (DP_DP500_ID_OFFSET + 0xF4)\r
-#define DP_DP500_COMPONENT_ID2 (DP_DP500_ID_OFFSET + 0xF8)\r
-#define DP_DP500_COMPONENT_ID3 (DP_DP500_ID_OFFSET + 0xFC)\r
+#define DP_DC_ID_OFFSET 0x0FF00\r
+#define DP_DC_ID_PERIPHERAL_ID4 (DP_DC_ID_OFFSET + 0xD0)\r
+#define DP_DC_CONFIGURATION_ID (DP_DC_ID_OFFSET + 0xD4)\r
+#define DP_DC_PERIPHERAL_ID0 (DP_DC_ID_OFFSET + 0xE0)\r
+#define DP_DC_PERIPHERAL_ID1 (DP_DC_ID_OFFSET + 0xE4)\r
+#define DP_DC_PERIPHERAL_ID2 (DP_DC_ID_OFFSET + 0xE8)\r
+#define DP_DC_COMPONENT_ID0 (DP_DC_ID_OFFSET + 0xF0)\r
+#define DP_DC_COMPONENT_ID1 (DP_DC_ID_OFFSET + 0xF4)\r
+#define DP_DC_COMPONENT_ID2 (DP_DC_ID_OFFSET + 0xF8)\r
+#define DP_DC_COMPONENT_ID3 (DP_DC_ID_OFFSET + 0xFC)\r
+\r
+#define DP_DP500_ID_OFFSET 0x0F00\r
+#define DP_DP500_ID_PERIPHERAL_ID4 (DP_DP500_ID_OFFSET + 0xD0)\r
+#define DP_DP500_CONFIGURATION_ID (DP_DP500_ID_OFFSET + 0xD4)\r
+#define DP_DP500_PERIPHERAL_ID0 (DP_DP500_ID_OFFSET + 0xE0)\r
+#define DP_DP500_PERIPHERAL_ID1 (DP_DP500_ID_OFFSET + 0xE4)\r
+#define DP_DP500_PERIPHERAL_ID2 (DP_DP500_ID_OFFSET + 0xE8)\r
+#define DP_DP500_COMPONENT_ID0 (DP_DP500_ID_OFFSET + 0xF0)\r
+#define DP_DP500_COMPONENT_ID1 (DP_DP500_ID_OFFSET + 0xF4)\r
+#define DP_DP500_COMPONENT_ID2 (DP_DP500_ID_OFFSET + 0xF8)\r
+#define DP_DP500_COMPONENT_ID3 (DP_DP500_ID_OFFSET + 0xFC)\r
\r
// Display status configuration mode activation flag\r
-#define DP_DC_STATUS_CM_ACTIVE_FLAG (0x1U << 16)\r
+#define DP_DC_STATUS_CM_ACTIVE_FLAG (0x1U << 16)\r
\r
// Display core control configuration mode\r
-#define DP_DC_CONTROL_SRST_ACTIVE (0x1U << 18)\r
-#define DP_DC_CONTROL_CRST_ACTIVE (0x1U << 17)\r
-#define DP_DC_CONTROL_CM_ACTIVE (0x1U << 16)\r
+#define DP_DC_CONTROL_SRST_ACTIVE (0x1U << 18)\r
+#define DP_DC_CONTROL_CRST_ACTIVE (0x1U << 17)\r
+#define DP_DC_CONTROL_CM_ACTIVE (0x1U << 16)\r
\r
#define DP_DE_DP500_CONTROL_SOFTRESET_REQ (0x1U << 16)\r
#define DP_DE_DP500_CONTROL_CONFIG_REQ (0x1U << 17)\r
\r
// Display core configuration valid register\r
-#define DP_DC_CONFIG_VALID_CVAL (0x1U)\r
+#define DP_DC_CONFIG_VALID_CVAL (0x1U)\r
\r
// DC_CORE_ID\r
// Display core version register PRODUCT_ID\r
-#define DP_DC_CORE_ID_SHIFT 16\r
-#define DP_DE_DP500_CORE_ID_SHIFT DP_DC_CORE_ID_SHIFT\r
+#define DP_DC_CORE_ID_SHIFT 16\r
+#define DP_DE_DP500_CORE_ID_SHIFT DP_DC_CORE_ID_SHIFT\r
\r
// Timing settings\r
-#define DP_DE_HBACKPORCH_SHIFT 16\r
-#define DP_DE_VBACKPORCH_SHIFT 16\r
-#define DP_DE_VSP_SHIFT 28\r
-#define DP_DE_VSYNCWIDTH_SHIFT 16\r
-#define DP_DE_HSP_SHIFT 13\r
-#define DP_DE_V_ACTIVE_SHIFT 16\r
+#define DP_DE_HBACKPORCH_SHIFT 16\r
+#define DP_DE_VBACKPORCH_SHIFT 16\r
+#define DP_DE_VSP_SHIFT 28\r
+#define DP_DE_VSYNCWIDTH_SHIFT 16\r
+#define DP_DE_HSP_SHIFT 13\r
+#define DP_DE_V_ACTIVE_SHIFT 16\r
\r
// BACKGROUND_COLOR\r
-#define DP_DE_BG_R_PIXEL_SHIFT 16\r
-#define DP_DE_BG_G_PIXEL_SHIFT 8\r
-\r
-//Graphics layer LG_FORMAT Pixel Format\r
-#define DP_PIXEL_FORMAT_ARGB_8888 0x8\r
-#define DP_PIXEL_FORMAT_ABGR_8888 0x9\r
-#define DP_PIXEL_FORMAT_RGBA_8888 0xA\r
-#define DP_PIXEL_FORMAT_BGRA_8888 0xB\r
-#define DP_PIXEL_FORMAT_XRGB_8888 0x10\r
-#define DP_PIXEL_FORMAT_XBGR_8888 0x11\r
-#define DP_PIXEL_FORMAT_RGBX_8888 0x12\r
-#define DP_PIXEL_FORMAT_BGRX_8888 0x13\r
-#define DP_PIXEL_FORMAT_RGB_888 0x18\r
-#define DP_PIXEL_FORMAT_BGR_888 0x19\r
+#define DP_DE_BG_R_PIXEL_SHIFT 16\r
+#define DP_DE_BG_G_PIXEL_SHIFT 8\r
+\r
+// Graphics layer LG_FORMAT Pixel Format\r
+#define DP_PIXEL_FORMAT_ARGB_8888 0x8\r
+#define DP_PIXEL_FORMAT_ABGR_8888 0x9\r
+#define DP_PIXEL_FORMAT_RGBA_8888 0xA\r
+#define DP_PIXEL_FORMAT_BGRA_8888 0xB\r
+#define DP_PIXEL_FORMAT_XRGB_8888 0x10\r
+#define DP_PIXEL_FORMAT_XBGR_8888 0x11\r
+#define DP_PIXEL_FORMAT_RGBX_8888 0x12\r
+#define DP_PIXEL_FORMAT_BGRX_8888 0x13\r
+#define DP_PIXEL_FORMAT_RGB_888 0x18\r
+#define DP_PIXEL_FORMAT_BGR_888 0x19\r
\r
// DP500 format code are different than DP550/DP650\r
-#define DP_PIXEL_FORMAT_DP500_ARGB_8888 0x2\r
-#define DP_PIXEL_FORMAT_DP500_ABGR_8888 0x3\r
-#define DP_PIXEL_FORMAT_DP500_XRGB_8888 0x4\r
-#define DP_PIXEL_FORMAT_DP500_XBGR_8888 0x5\r
+#define DP_PIXEL_FORMAT_DP500_ARGB_8888 0x2\r
+#define DP_PIXEL_FORMAT_DP500_ABGR_8888 0x3\r
+#define DP_PIXEL_FORMAT_DP500_XRGB_8888 0x4\r
+#define DP_PIXEL_FORMAT_DP500_XBGR_8888 0x5\r
\r
// Graphics layer LG_PTR_LOW and LG_PTR_HIGH\r
-#define DP_DE_LG_PTR_LOW_MASK 0xFFFFFFFFU\r
-#define DP_DE_LG_PTR_HIGH_SHIFT 32\r
+#define DP_DE_LG_PTR_LOW_MASK 0xFFFFFFFFU\r
+#define DP_DE_LG_PTR_HIGH_SHIFT 32\r
\r
// Graphics layer LG_CONTROL register characteristics\r
-#define DP_DE_LG_L_ALPHA_SHIFT 16\r
-#define DP_DE_LG_CHK_SHIFT 15\r
-#define DP_DE_LG_PMUL_SHIFT 14\r
-#define DP_DE_LG_COM_SHIFT 12\r
-#define DP_DE_LG_VFP_SHIFT 11\r
-#define DP_DE_LG_HFP_SHIFT 10\r
-#define DP_DE_LG_ROTATION_SHIFT 8\r
-\r
-#define DP_DE_LG_LAYER_BLEND_NO_BG 0x0U\r
-#define DP_DE_LG_PIXEL_BLEND_NO_BG 0x1U\r
-#define DP_DE_LG_LAYER_BLEND_BG 0x2U\r
-#define DP_DE_LG_PIXEL_BLEND_BG 0x3U\r
-#define DP_DE_LG_ENABLE 0x1U\r
+#define DP_DE_LG_L_ALPHA_SHIFT 16\r
+#define DP_DE_LG_CHK_SHIFT 15\r
+#define DP_DE_LG_PMUL_SHIFT 14\r
+#define DP_DE_LG_COM_SHIFT 12\r
+#define DP_DE_LG_VFP_SHIFT 11\r
+#define DP_DE_LG_HFP_SHIFT 10\r
+#define DP_DE_LG_ROTATION_SHIFT 8\r
+\r
+#define DP_DE_LG_LAYER_BLEND_NO_BG 0x0U\r
+#define DP_DE_LG_PIXEL_BLEND_NO_BG 0x1U\r
+#define DP_DE_LG_LAYER_BLEND_BG 0x2U\r
+#define DP_DE_LG_PIXEL_BLEND_BG 0x3U\r
+#define DP_DE_LG_ENABLE 0x1U\r
\r
// Graphics layer LG_IN_SIZE register characteristics\r
-#define DP_DE_LG_V_IN_SIZE_SHIFT 16\r
+#define DP_DE_LG_V_IN_SIZE_SHIFT 16\r
\r
// Graphics layer LG_CMP_SIZE register characteristics\r
-#define DP_DE_LG_V_CMP_SIZE_SHIFT 16\r
-#define DP_DE_LG_V_OFFSET_SHIFT 16\r
+#define DP_DE_LG_V_CMP_SIZE_SHIFT 16\r
+#define DP_DE_LG_V_OFFSET_SHIFT 16\r
\r
// Helper display timing macro functions.\r
-#define H_INTERVALS(Hfp, Hbp) ((Hbp << DP_DE_HBACKPORCH_SHIFT) | Hfp)\r
-#define V_INTERVALS(Vfp, Vbp) ((Vbp << DP_DE_VBACKPORCH_SHIFT) | Vfp)\r
-#define SYNC_WIDTH(Hsw, Vsw) ((Vsw << DP_DE_VSYNCWIDTH_SHIFT) | Hsw)\r
-#define HV_ACTIVE(Hor, Ver) ((Ver << DP_DE_V_ACTIVE_SHIFT) | Hor)\r
+#define H_INTERVALS(Hfp, Hbp) ((Hbp << DP_DE_HBACKPORCH_SHIFT) | Hfp)\r
+#define V_INTERVALS(Vfp, Vbp) ((Vbp << DP_DE_VBACKPORCH_SHIFT) | Vfp)\r
+#define SYNC_WIDTH(Hsw, Vsw) ((Vsw << DP_DE_VSYNCWIDTH_SHIFT) | Hsw)\r
+#define HV_ACTIVE(Hor, Ver) ((Ver << DP_DE_V_ACTIVE_SHIFT) | Hor)\r
\r
// Helper layer graphics macros.\r
-#define FRAME_IN_SIZE(Hor, Ver) ((Ver << DP_DE_LG_V_IN_SIZE_SHIFT) | Hor)\r
-#define FRAME_CMP_SIZE(Hor, Ver) ((Ver << DP_DE_LG_V_CMP_SIZE_SHIFT) | Hor)\r
+#define FRAME_IN_SIZE(Hor, Ver) ((Ver << DP_DE_LG_V_IN_SIZE_SHIFT) | Hor)\r
+#define FRAME_CMP_SIZE(Hor, Ver) ((Ver << DP_DE_LG_V_CMP_SIZE_SHIFT) | Hor)\r
\r
#endif /* ARMMALIDP_H_ */\r
\r
#include <Ppi/ArmMpCoreInfo.h>\r
\r
-\r
-ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {\r
+ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {\r
{\r
// Cluster 0, Core 0\r
0x0, 0x0,\r
**/\r
RETURN_STATUS\r
ArmPlatformInitialize (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
)\r
{\r
if (!ArmPlatformIsPrimaryCore (MpId)) {\r
return RETURN_SUCCESS;\r
}\r
\r
- //TODO: Implement me\r
+ // TODO: Implement me\r
\r
return RETURN_SUCCESS;\r
}\r
\r
EFI_STATUS\r
PrePeiCoreGetMpCoreInfo (\r
- OUT UINTN *CoreCount,\r
- OUT ARM_CORE_INFO **ArmCoreTable\r
+ OUT UINTN *CoreCount,\r
+ OUT ARM_CORE_INFO **ArmCoreTable\r
)\r
{\r
- if (ArmIsMpCore()) {\r
- *CoreCount = sizeof(mArmPlatformNullMpCoreInfoTable) / sizeof(ARM_CORE_INFO);\r
+ if (ArmIsMpCore ()) {\r
+ *CoreCount = sizeof (mArmPlatformNullMpCoreInfoTable) / sizeof (ARM_CORE_INFO);\r
*ArmCoreTable = mArmPlatformNullMpCoreInfoTable;\r
return EFI_SUCCESS;\r
} else {\r
}\r
}\r
\r
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };\r
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };\r
\r
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {\r
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {\r
{\r
EFI_PEI_PPI_DESCRIPTOR_PPI,\r
&gArmMpCoreInfoPpiGuid,\r
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList\r
)\r
{\r
- if (ArmIsMpCore()) {\r
- *PpiListSize = sizeof(gPlatformPpiTable);\r
- *PpiList = gPlatformPpiTable;\r
+ if (ArmIsMpCore ()) {\r
+ *PpiListSize = sizeof (gPlatformPpiTable);\r
+ *PpiList = gPlatformPpiTable;\r
} else {\r
*PpiListSize = 0;\r
- *PpiList = NULL;\r
+ *PpiList = NULL;\r
}\r
}\r
-\r
**/\r
VOID\r
ArmPlatformGetVirtualMemoryMap (\r
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r
+ IN ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap\r
)\r
{\r
- ASSERT(0);\r
+ ASSERT (0);\r
}\r
\r
#include "HdLcd.h"\r
\r
-#define BYTES_PER_PIXEL 4\r
+#define BYTES_PER_PIXEL 4\r
\r
/** Initialize display.\r
\r
**/\r
EFI_STATUS\r
LcdInitialize (\r
- IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
+ IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
)\r
{\r
// Disable the controller\r
MmioWrite32 (HDLCD_REG_FB_BASE, (UINT32)VramBaseAddress);\r
\r
// Setup various registers that never change\r
- MmioWrite32 (HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);\r
+ MmioWrite32 (HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);\r
\r
MmioWrite32 (HDLCD_REG_POLARITIES, HDLCD_DEFAULT_POLARITIES);\r
\r
IN UINT32 ModeNumber\r
)\r
{\r
- EFI_STATUS Status;\r
- SCAN_TIMINGS *Horizontal;\r
- SCAN_TIMINGS *Vertical;\r
+ EFI_STATUS Status;\r
+ SCAN_TIMINGS *Horizontal;\r
+ SCAN_TIMINGS *Vertical;\r
\r
EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;\r
\r
: PixelBlueGreenRedReserved8BitPerColor;\r
\r
if (ModeInfo.PixelFormat == PixelFormat) {\r
- MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 16);\r
+ MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 16);\r
MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 0);\r
} else {\r
MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 16);\r
- MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 0);\r
+ MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 0);\r
}\r
\r
MmioWrite32 (HDLCD_REG_GREEN_SELECT, (8 << 8) | 8);\r
MmioWrite32 (HDLCD_REG_FB_LINE_COUNT, Vertical->Resolution - 1);\r
\r
// Set the vertical timing information\r
- MmioWrite32 (HDLCD_REG_V_SYNC, Vertical->Sync);\r
- MmioWrite32 (HDLCD_REG_V_BACK_PORCH, Vertical->BackPorch);\r
- MmioWrite32 (HDLCD_REG_V_DATA, Vertical->Resolution - 1);\r
+ MmioWrite32 (HDLCD_REG_V_SYNC, Vertical->Sync);\r
+ MmioWrite32 (HDLCD_REG_V_BACK_PORCH, Vertical->BackPorch);\r
+ MmioWrite32 (HDLCD_REG_V_DATA, Vertical->Resolution - 1);\r
MmioWrite32 (HDLCD_REG_V_FRONT_PORCH, Vertical->FrontPorch);\r
\r
// Set the horizontal timing information\r
- MmioWrite32 (HDLCD_REG_H_SYNC, Horizontal->Sync);\r
- MmioWrite32 (HDLCD_REG_H_BACK_PORCH, Horizontal->BackPorch);\r
- MmioWrite32 (HDLCD_REG_H_DATA, Horizontal->Resolution - 1);\r
+ MmioWrite32 (HDLCD_REG_H_SYNC, Horizontal->Sync);\r
+ MmioWrite32 (HDLCD_REG_H_BACK_PORCH, Horizontal->BackPorch);\r
+ MmioWrite32 (HDLCD_REG_H_DATA, Horizontal->Resolution - 1);\r
MmioWrite32 (HDLCD_REG_H_FRONT_PORCH, Horizontal->FrontPorch);\r
\r
// Enable the controller\r
#define HDLCD_H_\r
\r
// HDLCD Controller Register Offsets\r
-#define HDLCD_REG_VERSION ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x000)\r
-#define HDLCD_REG_INT_RAWSTAT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x010)\r
-#define HDLCD_REG_INT_CLEAR ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x014)\r
-#define HDLCD_REG_INT_MASK ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x018)\r
-#define HDLCD_REG_INT_STATUS ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x01C)\r
-#define HDLCD_REG_FB_BASE ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x100)\r
-#define HDLCD_REG_FB_LINE_LENGTH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x104)\r
-#define HDLCD_REG_FB_LINE_COUNT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x108)\r
-#define HDLCD_REG_FB_LINE_PITCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x10C)\r
-#define HDLCD_REG_BUS_OPTIONS ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x110)\r
-#define HDLCD_REG_V_SYNC ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x200)\r
-#define HDLCD_REG_V_BACK_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x204)\r
-#define HDLCD_REG_V_DATA ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x208)\r
-#define HDLCD_REG_V_FRONT_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x20C)\r
-#define HDLCD_REG_H_SYNC ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x210)\r
-#define HDLCD_REG_H_BACK_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x214)\r
-#define HDLCD_REG_H_DATA ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x218)\r
-#define HDLCD_REG_H_FRONT_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x21C)\r
-#define HDLCD_REG_POLARITIES ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x220)\r
-#define HDLCD_REG_COMMAND ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x230)\r
-#define HDLCD_REG_PIXEL_FORMAT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x240)\r
-#define HDLCD_REG_RED_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x244)\r
-#define HDLCD_REG_GREEN_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x248)\r
-#define HDLCD_REG_BLUE_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x24C)\r
+#define HDLCD_REG_VERSION ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x000)\r
+#define HDLCD_REG_INT_RAWSTAT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x010)\r
+#define HDLCD_REG_INT_CLEAR ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x014)\r
+#define HDLCD_REG_INT_MASK ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x018)\r
+#define HDLCD_REG_INT_STATUS ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x01C)\r
+#define HDLCD_REG_FB_BASE ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x100)\r
+#define HDLCD_REG_FB_LINE_LENGTH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x104)\r
+#define HDLCD_REG_FB_LINE_COUNT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x108)\r
+#define HDLCD_REG_FB_LINE_PITCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x10C)\r
+#define HDLCD_REG_BUS_OPTIONS ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x110)\r
+#define HDLCD_REG_V_SYNC ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x200)\r
+#define HDLCD_REG_V_BACK_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x204)\r
+#define HDLCD_REG_V_DATA ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x208)\r
+#define HDLCD_REG_V_FRONT_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x20C)\r
+#define HDLCD_REG_H_SYNC ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x210)\r
+#define HDLCD_REG_H_BACK_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x214)\r
+#define HDLCD_REG_H_DATA ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x218)\r
+#define HDLCD_REG_H_FRONT_PORCH ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x21C)\r
+#define HDLCD_REG_POLARITIES ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x220)\r
+#define HDLCD_REG_COMMAND ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x230)\r
+#define HDLCD_REG_PIXEL_FORMAT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x240)\r
+#define HDLCD_REG_RED_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x244)\r
+#define HDLCD_REG_GREEN_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x248)\r
+#define HDLCD_REG_BLUE_SELECT ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x24C)\r
\r
// HDLCD Values of registers\r
\r
// HDLCD Interrupt mask, clear and status register\r
-#define HDLCD_DMA_END BIT0 /* DMA has finished reading a frame */\r
-#define HDLCD_BUS_ERROR BIT1 /* DMA bus error */\r
-#define HDLCD_SYNC BIT2 /* Vertical sync */\r
-#define HDLCD_UNDERRUN BIT3 /* No Data available while DATAEN active */\r
+#define HDLCD_DMA_END BIT0 /* DMA has finished reading a frame */\r
+#define HDLCD_BUS_ERROR BIT1 /* DMA bus error */\r
+#define HDLCD_SYNC BIT2 /* Vertical sync */\r
+#define HDLCD_UNDERRUN BIT3 /* No Data available while DATAEN active */\r
\r
// CLCD_CONTROL Control register\r
-#define HDLCD_DISABLE 0\r
-#define HDLCD_ENABLE BIT0\r
+#define HDLCD_DISABLE 0\r
+#define HDLCD_ENABLE BIT0\r
\r
// Bus Options\r
-#define HDLCD_BURST_1 BIT0\r
-#define HDLCD_BURST_2 BIT1\r
-#define HDLCD_BURST_4 BIT2\r
-#define HDLCD_BURST_8 BIT3\r
-#define HDLCD_BURST_16 BIT4\r
+#define HDLCD_BURST_1 BIT0\r
+#define HDLCD_BURST_2 BIT1\r
+#define HDLCD_BURST_4 BIT2\r
+#define HDLCD_BURST_8 BIT3\r
+#define HDLCD_BURST_16 BIT4\r
\r
// Polarities - HIGH\r
-#define HDLCD_VSYNC_HIGH BIT0\r
-#define HDLCD_HSYNC_HIGH BIT1\r
-#define HDLCD_DATEN_HIGH BIT2\r
-#define HDLCD_DATA_HIGH BIT3\r
-#define HDLCD_PXCLK_HIGH BIT4\r
+#define HDLCD_VSYNC_HIGH BIT0\r
+#define HDLCD_HSYNC_HIGH BIT1\r
+#define HDLCD_DATEN_HIGH BIT2\r
+#define HDLCD_DATA_HIGH BIT3\r
+#define HDLCD_PXCLK_HIGH BIT4\r
// Polarities - LOW (for completion and for ease of understanding the hardware settings)\r
-#define HDLCD_VSYNC_LOW 0\r
-#define HDLCD_HSYNC_LOW 0\r
-#define HDLCD_DATEN_LOW 0\r
-#define HDLCD_DATA_LOW 0\r
-#define HDLCD_PXCLK_LOW 0\r
+#define HDLCD_VSYNC_LOW 0\r
+#define HDLCD_HSYNC_LOW 0\r
+#define HDLCD_DATEN_LOW 0\r
+#define HDLCD_DATA_LOW 0\r
+#define HDLCD_PXCLK_LOW 0\r
\r
// Default polarities\r
-#define HDLCD_DEFAULT_POLARITIES (HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | \\r
+#define HDLCD_DEFAULT_POLARITIES (HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | \\r
HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | \\r
HDLCD_VSYNC_HIGH)\r
\r
// Pixel Format\r
-#define HDLCD_LITTLE_ENDIAN (0 << 31)\r
-#define HDLCD_BIG_ENDIAN (1 << 31)\r
+#define HDLCD_LITTLE_ENDIAN (0 << 31)\r
+#define HDLCD_BIG_ENDIAN (1 << 31)\r
\r
// Number of bytes per pixel\r
-#define HDLCD_4BYTES_PER_PIXEL ((4 - 1) << 3)\r
+#define HDLCD_4BYTES_PER_PIXEL ((4 - 1) << 3)\r
\r
-#define HDLCD_PRODUCT_ID 0x1CDC\r
+#define HDLCD_PRODUCT_ID 0x1CDC\r
\r
#endif /* HDLCD_H_ */\r
**/\r
EFI_STATUS\r
LcdPlatformInitializeDisplay (\r
- IN EFI_HANDLE Handle\r
+ IN EFI_HANDLE Handle\r
)\r
{\r
ASSERT (FALSE);\r
**/\r
EFI_STATUS\r
LcdPlatformGetVram (\r
- OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,\r
- OUT UINTN* VramSize\r
+ OUT EFI_PHYSICAL_ADDRESS *VramBaseAddress,\r
+ OUT UINTN *VramSize\r
)\r
{\r
ASSERT (FALSE);\r
**/\r
EFI_STATUS\r
LcdPlatformSetMode (\r
- IN UINT32 ModeNumber\r
+ IN UINT32 ModeNumber\r
)\r
{\r
ASSERT (FALSE);\r
**/\r
EFI_STATUS\r
LcdPlatformGetTimings (\r
- IN UINT32 ModeNumber,\r
- OUT SCAN_TIMINGS **Horizontal,\r
- OUT SCAN_TIMINGS **Vertical\r
+ IN UINT32 ModeNumber,\r
+ OUT SCAN_TIMINGS **Horizontal,\r
+ OUT SCAN_TIMINGS **Vertical\r
)\r
{\r
ASSERT (FALSE);\r
**/\r
EFI_STATUS\r
LcdPlatformGetBpp (\r
- IN UINT32 ModeNumber,\r
- OUT LCD_BPP* Bpp\r
+ IN UINT32 ModeNumber,\r
+ OUT LCD_BPP *Bpp\r
)\r
{\r
ASSERT (FALSE);\r
\r
EFI_STATUS\r
NorFlashPlatformGetDevices (\r
- OUT NOR_FLASH_DESCRIPTION **NorFlashDescriptions,\r
- OUT UINT32 *Count\r
+ OUT NOR_FLASH_DESCRIPTION **NorFlashDescriptions,\r
+ OUT UINT32 *Count\r
)\r
{\r
*NorFlashDescriptions = NULL;\r
- *Count = 0;\r
+ *Count = 0;\r
return EFI_SUCCESS;\r
}\r
UINT8 DataBits;\r
EFI_STOP_BITS_TYPE StopBits;\r
\r
- BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate);\r
+ BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate);\r
ReceiveFifoDepth = 0; // Use default FIFO depth\r
- Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);\r
- DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);\r
- StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);\r
+ Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);\r
+ DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);\r
+ StopBits = (EFI_STOP_BITS_TYPE)FixedPcdGet8 (PcdUartDefaultStopBits);\r
\r
return PL011UartInitializePort (\r
(UINTN)PcdGet64 (PcdSerialRegisterBase),\r
- PL011UartClockGetFreq(),\r
+ PL011UartClockGetFreq (),\r
&BaudRate,\r
&ReceiveFifoDepth,\r
&Parity,\r
UINTN\r
EFIAPI\r
SerialPortWrite (\r
- IN UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
+ IN UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
)\r
{\r
return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
UINTN\r
EFIAPI\r
SerialPortRead (\r
- OUT UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
-)\r
+ OUT UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
+ )\r
{\r
return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
}\r
{\r
return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));\r
}\r
+\r
/**\r
Set new attributes to PL011.\r
\r
{\r
return PL011UartInitializePort (\r
(UINTN)PcdGet64 (PcdSerialRegisterBase),\r
- PL011UartClockGetFreq(),\r
+ PL011UartClockGetFreq (),\r
BaudRate,\r
ReceiveFifoDepth,\r
Parity,\r
#ifndef __PL011_UART_H__\r
#define __PL011_UART_H__\r
\r
-#define PL011_VARIANT_ZTE 1\r
+#define PL011_VARIANT_ZTE 1\r
\r
// PL011 Registers\r
#if FixedPcdGet8 (PL011UartRegOffsetVariant) == PL011_VARIANT_ZTE\r
-#define UARTDR 0x004\r
-#define UARTRSR 0x010\r
-#define UARTECR 0x010\r
-#define UARTFR 0x014\r
-#define UARTIBRD 0x024\r
-#define UARTFBRD 0x028\r
-#define UARTLCR_H 0x030\r
-#define UARTCR 0x034\r
-#define UARTIFLS 0x038\r
-#define UARTIMSC 0x040\r
-#define UARTRIS 0x044\r
-#define UARTMIS 0x048\r
-#define UARTICR 0x04c\r
-#define UARTDMACR 0x050\r
+#define UARTDR 0x004\r
+#define UARTRSR 0x010\r
+#define UARTECR 0x010\r
+#define UARTFR 0x014\r
+#define UARTIBRD 0x024\r
+#define UARTFBRD 0x028\r
+#define UARTLCR_H 0x030\r
+#define UARTCR 0x034\r
+#define UARTIFLS 0x038\r
+#define UARTIMSC 0x040\r
+#define UARTRIS 0x044\r
+#define UARTMIS 0x048\r
+#define UARTICR 0x04c\r
+#define UARTDMACR 0x050\r
#else\r
-#define UARTDR 0x000\r
-#define UARTRSR 0x004\r
-#define UARTECR 0x004\r
-#define UARTFR 0x018\r
-#define UARTILPR 0x020\r
-#define UARTIBRD 0x024\r
-#define UARTFBRD 0x028\r
-#define UARTLCR_H 0x02C\r
-#define UARTCR 0x030\r
-#define UARTIFLS 0x034\r
-#define UARTIMSC 0x038\r
-#define UARTRIS 0x03C\r
-#define UARTMIS 0x040\r
-#define UARTICR 0x044\r
-#define UARTDMACR 0x048\r
+#define UARTDR 0x000\r
+#define UARTRSR 0x004\r
+#define UARTECR 0x004\r
+#define UARTFR 0x018\r
+#define UARTILPR 0x020\r
+#define UARTIBRD 0x024\r
+#define UARTFBRD 0x028\r
+#define UARTLCR_H 0x02C\r
+#define UARTCR 0x030\r
+#define UARTIFLS 0x034\r
+#define UARTIMSC 0x038\r
+#define UARTRIS 0x03C\r
+#define UARTMIS 0x040\r
+#define UARTICR 0x044\r
+#define UARTDMACR 0x048\r
#endif\r
\r
-#define UARTPID0 0xFE0\r
-#define UARTPID1 0xFE4\r
-#define UARTPID2 0xFE8\r
-#define UARTPID3 0xFEC\r
+#define UARTPID0 0xFE0\r
+#define UARTPID1 0xFE4\r
+#define UARTPID2 0xFE8\r
+#define UARTPID3 0xFEC\r
\r
// Data status bits\r
-#define UART_DATA_ERROR_MASK 0x0F00\r
+#define UART_DATA_ERROR_MASK 0x0F00\r
\r
// Status reg bits\r
-#define UART_STATUS_ERROR_MASK 0x0F\r
+#define UART_STATUS_ERROR_MASK 0x0F\r
\r
// Flag reg bits\r
#if FixedPcdGet8 (PL011UartRegOffsetVariant) == PL011_VARIANT_ZTE\r
-#define PL011_UARTFR_RI (1 << 0) // Ring indicator\r
-#define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty\r
-#define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full\r
-#define PL011_UARTFR_TXFF (1 << 5) // Transmit FIFO full\r
-#define PL011_UARTFR_RXFE (1 << 4) // Receive FIFO empty\r
-#define PL011_UARTFR_BUSY (1 << 8) // UART busy\r
-#define PL011_UARTFR_DCD (1 << 2) // Data carrier detect\r
-#define PL011_UARTFR_DSR (1 << 3) // Data set ready\r
-#define PL011_UARTFR_CTS (1 << 1) // Clear to send\r
+#define PL011_UARTFR_RI (1 << 0) // Ring indicator\r
+#define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty\r
+#define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full\r
+#define PL011_UARTFR_TXFF (1 << 5) // Transmit FIFO full\r
+#define PL011_UARTFR_RXFE (1 << 4) // Receive FIFO empty\r
+#define PL011_UARTFR_BUSY (1 << 8) // UART busy\r
+#define PL011_UARTFR_DCD (1 << 2) // Data carrier detect\r
+#define PL011_UARTFR_DSR (1 << 3) // Data set ready\r
+#define PL011_UARTFR_CTS (1 << 1) // Clear to send\r
#else\r
-#define PL011_UARTFR_RI (1 << 8) // Ring indicator\r
-#define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty\r
-#define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full\r
-#define PL011_UARTFR_TXFF (1 << 5) // Transmit FIFO full\r
-#define PL011_UARTFR_RXFE (1 << 4) // Receive FIFO empty\r
-#define PL011_UARTFR_BUSY (1 << 3) // UART busy\r
-#define PL011_UARTFR_DCD (1 << 2) // Data carrier detect\r
-#define PL011_UARTFR_DSR (1 << 1) // Data set ready\r
-#define PL011_UARTFR_CTS (1 << 0) // Clear to send\r
+#define PL011_UARTFR_RI (1 << 8) // Ring indicator\r
+#define PL011_UARTFR_TXFE (1 << 7) // Transmit FIFO empty\r
+#define PL011_UARTFR_RXFF (1 << 6) // Receive FIFO full\r
+#define PL011_UARTFR_TXFF (1 << 5) // Transmit FIFO full\r
+#define PL011_UARTFR_RXFE (1 << 4) // Receive FIFO empty\r
+#define PL011_UARTFR_BUSY (1 << 3) // UART busy\r
+#define PL011_UARTFR_DCD (1 << 2) // Data carrier detect\r
+#define PL011_UARTFR_DSR (1 << 1) // Data set ready\r
+#define PL011_UARTFR_CTS (1 << 0) // Clear to send\r
#endif\r
\r
// Flag reg bits - alternative names\r
-#define UART_TX_EMPTY_FLAG_MASK PL011_UARTFR_TXFE\r
-#define UART_RX_FULL_FLAG_MASK PL011_UARTFR_RXFF\r
-#define UART_TX_FULL_FLAG_MASK PL011_UARTFR_TXFF\r
-#define UART_RX_EMPTY_FLAG_MASK PL011_UARTFR_RXFE\r
-#define UART_BUSY_FLAG_MASK PL011_UARTFR_BUSY\r
+#define UART_TX_EMPTY_FLAG_MASK PL011_UARTFR_TXFE\r
+#define UART_RX_FULL_FLAG_MASK PL011_UARTFR_RXFF\r
+#define UART_TX_FULL_FLAG_MASK PL011_UARTFR_TXFF\r
+#define UART_RX_EMPTY_FLAG_MASK PL011_UARTFR_RXFE\r
+#define UART_BUSY_FLAG_MASK PL011_UARTFR_BUSY\r
\r
// Control reg bits\r
-#define PL011_UARTCR_CTSEN (1 << 15) // CTS hardware flow control enable\r
-#define PL011_UARTCR_RTSEN (1 << 14) // RTS hardware flow control enable\r
-#define PL011_UARTCR_RTS (1 << 11) // Request to send\r
-#define PL011_UARTCR_DTR (1 << 10) // Data transmit ready.\r
-#define PL011_UARTCR_RXE (1 << 9) // Receive enable\r
-#define PL011_UARTCR_TXE (1 << 8) // Transmit enable\r
-#define PL011_UARTCR_LBE (1 << 7) // Loopback enable\r
-#define PL011_UARTCR_UARTEN (1 << 0) // UART Enable\r
+#define PL011_UARTCR_CTSEN (1 << 15) // CTS hardware flow control enable\r
+#define PL011_UARTCR_RTSEN (1 << 14) // RTS hardware flow control enable\r
+#define PL011_UARTCR_RTS (1 << 11) // Request to send\r
+#define PL011_UARTCR_DTR (1 << 10) // Data transmit ready.\r
+#define PL011_UARTCR_RXE (1 << 9) // Receive enable\r
+#define PL011_UARTCR_TXE (1 << 8) // Transmit enable\r
+#define PL011_UARTCR_LBE (1 << 7) // Loopback enable\r
+#define PL011_UARTCR_UARTEN (1 << 0) // UART Enable\r
\r
// Line Control Register Bits\r
-#define PL011_UARTLCR_H_SPS (1 << 7) // Stick parity select\r
-#define PL011_UARTLCR_H_WLEN_8 (3 << 5)\r
-#define PL011_UARTLCR_H_WLEN_7 (2 << 5)\r
-#define PL011_UARTLCR_H_WLEN_6 (1 << 5)\r
-#define PL011_UARTLCR_H_WLEN_5 (0 << 5)\r
-#define PL011_UARTLCR_H_FEN (1 << 4) // FIFOs Enable\r
-#define PL011_UARTLCR_H_STP2 (1 << 3) // Two stop bits select\r
-#define PL011_UARTLCR_H_EPS (1 << 2) // Even parity select\r
-#define PL011_UARTLCR_H_PEN (1 << 1) // Parity Enable\r
-#define PL011_UARTLCR_H_BRK (1 << 0) // Send break\r
+#define PL011_UARTLCR_H_SPS (1 << 7) // Stick parity select\r
+#define PL011_UARTLCR_H_WLEN_8 (3 << 5)\r
+#define PL011_UARTLCR_H_WLEN_7 (2 << 5)\r
+#define PL011_UARTLCR_H_WLEN_6 (1 << 5)\r
+#define PL011_UARTLCR_H_WLEN_5 (0 << 5)\r
+#define PL011_UARTLCR_H_FEN (1 << 4) // FIFOs Enable\r
+#define PL011_UARTLCR_H_STP2 (1 << 3) // Two stop bits select\r
+#define PL011_UARTLCR_H_EPS (1 << 2) // Even parity select\r
+#define PL011_UARTLCR_H_PEN (1 << 1) // Parity Enable\r
+#define PL011_UARTLCR_H_BRK (1 << 0) // Send break\r
\r
-#define PL011_UARTPID2_VER(X) (((X) >> 4) & 0xF)\r
-#define PL011_VER_R1P4 0x2\r
+#define PL011_UARTPID2_VER(X) (((X) >> 4) & 0xF)\r
+#define PL011_VER_R1P4 0x2\r
\r
#endif\r
// EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE is the only\r
// control bit that is not supported.\r
//\r
-STATIC CONST UINT32 mInvalidControlBits = EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;\r
+STATIC CONST UINT32 mInvalidControlBits = EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;\r
\r
/**\r
\r
IN OUT EFI_STOP_BITS_TYPE *StopBits\r
)\r
{\r
- UINT32 LineControl;\r
- UINT32 Divisor;\r
- UINT32 Integer;\r
- UINT32 Fractional;\r
- UINT32 HardwareFifoDepth;\r
- UINT32 UartPid2;\r
+ UINT32 LineControl;\r
+ UINT32 Divisor;\r
+ UINT32 Integer;\r
+ UINT32 Fractional;\r
+ UINT32 HardwareFifoDepth;\r
+ UINT32 UartPid2;\r
\r
HardwareFifoDepth = FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth);\r
if (HardwareFifoDepth == 0) {\r
- UartPid2 = MmioRead32 (UartBase + UARTPID2);\r
+ UartPid2 = MmioRead32 (UartBase + UARTPID2);\r
HardwareFifoDepth = (PL011_UARTPID2_VER (UartPid2) > PL011_VER_R1P4) ? 32 : 16;\r
}\r
\r
// down, there is no maximum FIFO size.\r
if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= HardwareFifoDepth)) {\r
// Enable FIFO\r
- LineControl = PL011_UARTLCR_H_FEN;\r
+ LineControl = PL011_UARTLCR_H_FEN;\r
*ReceiveFifoDepth = HardwareFifoDepth;\r
} else {\r
// Disable FIFO\r
// Parity\r
//\r
switch (*Parity) {\r
- case DefaultParity:\r
- *Parity = NoParity;\r
- case NoParity:\r
- // Nothing to do. Parity is disabled by default.\r
- break;\r
- case EvenParity:\r
- LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_EPS);\r
- break;\r
- case OddParity:\r
- LineControl |= PL011_UARTLCR_H_PEN;\r
- break;\r
- case MarkParity:\r
- LineControl |= ( PL011_UARTLCR_H_PEN \\r
- | PL011_UARTLCR_H_SPS \\r
- | PL011_UARTLCR_H_EPS);\r
- break;\r
- case SpaceParity:\r
- LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS);\r
- break;\r
- default:\r
- return RETURN_INVALID_PARAMETER;\r
+ case DefaultParity:\r
+ *Parity = NoParity;\r
+ case NoParity:\r
+ // Nothing to do. Parity is disabled by default.\r
+ break;\r
+ case EvenParity:\r
+ LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_EPS);\r
+ break;\r
+ case OddParity:\r
+ LineControl |= PL011_UARTLCR_H_PEN;\r
+ break;\r
+ case MarkParity:\r
+ LineControl |= (PL011_UARTLCR_H_PEN \\r
+ | PL011_UARTLCR_H_SPS \\r
+ | PL011_UARTLCR_H_EPS);\r
+ break;\r
+ case SpaceParity:\r
+ LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS);\r
+ break;\r
+ default:\r
+ return RETURN_INVALID_PARAMETER;\r
}\r
\r
//\r
// Data Bits\r
//\r
switch (*DataBits) {\r
- case 0:\r
- *DataBits = 8;\r
- case 8:\r
- LineControl |= PL011_UARTLCR_H_WLEN_8;\r
- break;\r
- case 7:\r
- LineControl |= PL011_UARTLCR_H_WLEN_7;\r
- break;\r
- case 6:\r
- LineControl |= PL011_UARTLCR_H_WLEN_6;\r
- break;\r
- case 5:\r
- LineControl |= PL011_UARTLCR_H_WLEN_5;\r
- break;\r
- default:\r
- return RETURN_INVALID_PARAMETER;\r
+ case 0:\r
+ *DataBits = 8;\r
+ case 8:\r
+ LineControl |= PL011_UARTLCR_H_WLEN_8;\r
+ break;\r
+ case 7:\r
+ LineControl |= PL011_UARTLCR_H_WLEN_7;\r
+ break;\r
+ case 6:\r
+ LineControl |= PL011_UARTLCR_H_WLEN_6;\r
+ break;\r
+ case 5:\r
+ LineControl |= PL011_UARTLCR_H_WLEN_5;\r
+ break;\r
+ default:\r
+ return RETURN_INVALID_PARAMETER;\r
}\r
\r
//\r
// Stop Bits\r
//\r
switch (*StopBits) {\r
- case DefaultStopBits:\r
- *StopBits = OneStopBit;\r
- case OneStopBit:\r
- // Nothing to do. One stop bit is enabled by default.\r
- break;\r
- case TwoStopBits:\r
- LineControl |= PL011_UARTLCR_H_STP2;\r
- break;\r
- case OneFiveStopBits:\r
+ case DefaultStopBits:\r
+ *StopBits = OneStopBit;\r
+ case OneStopBit:\r
+ // Nothing to do. One stop bit is enabled by default.\r
+ break;\r
+ case TwoStopBits:\r
+ LineControl |= PL011_UARTLCR_H_STP2;\r
+ break;\r
+ case OneFiveStopBits:\r
// Only 1 or 2 stop bits are supported\r
- default:\r
- return RETURN_INVALID_PARAMETER;\r
+ default:\r
+ return RETURN_INVALID_PARAMETER;\r
}\r
\r
// Don't send the LineControl value to the PL011 yet,\r
\r
// If PL011 Integer value has been defined then always ignore the BAUD rate\r
if (FixedPcdGet32 (PL011UartInteger) != 0) {\r
- Integer = FixedPcdGet32 (PL011UartInteger);\r
+ Integer = FixedPcdGet32 (PL011UartInteger);\r
Fractional = FixedPcdGet32 (PL011UartFractional);\r
} else {\r
// If BAUD rate is zero then replace it with the system default value\r
return RETURN_INVALID_PARAMETER;\r
}\r
}\r
+\r
if (0 == UartClkInHz) {\r
return RETURN_INVALID_PARAMETER;\r
}\r
\r
- Divisor = (UartClkInHz * 4) / *BaudRate;\r
- Integer = Divisor >> FRACTION_PART_SIZE_IN_BITS;\r
+ Divisor = (UartClkInHz * 4) / *BaudRate;\r
+ Integer = Divisor >> FRACTION_PART_SIZE_IN_BITS;\r
Fractional = Divisor & FRACTION_PART_MASK;\r
}\r
\r
// and re-initialize only if the settings are different.\r
//\r
if (((MmioRead32 (UartBase + UARTCR) & PL011_UARTCR_UARTEN) != 0) &&\r
- (MmioRead32 (UartBase + UARTLCR_H) == LineControl) &&\r
- (MmioRead32 (UartBase + UARTIBRD) == Integer) &&\r
- (MmioRead32 (UartBase + UARTFBRD) == Fractional)) {\r
+ (MmioRead32 (UartBase + UARTLCR_H) == LineControl) &&\r
+ (MmioRead32 (UartBase + UARTIBRD) == Integer) &&\r
+ (MmioRead32 (UartBase + UARTFBRD) == Fractional))\r
+ {\r
// Nothing to do - already initialized with correct attributes\r
return RETURN_SUCCESS;\r
}\r
\r
// Wait for the end of transmission\r
- while ((MmioRead32 (UartBase + UARTFR) & PL011_UARTFR_TXFE) == 0);\r
+ while ((MmioRead32 (UartBase + UARTFR) & PL011_UARTFR_TXFE) == 0) {\r
+ }\r
\r
// Disable UART: "The UARTLCR_H, UARTIBRD, and UARTFBRD registers must not be changed\r
// when the UART is enabled"\r
MmioWrite32 (UartBase + UARTECR, 0);\r
\r
// Enable Tx, Rx, and UART overall\r
- MmioWrite32 (UartBase + UARTCR,\r
- PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN);\r
+ MmioWrite32 (\r
+ UartBase + UARTCR,\r
+ PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN\r
+ );\r
\r
return RETURN_SUCCESS;\r
}\r
RETURN_STATUS\r
EFIAPI\r
PL011UartSetControl (\r
- IN UINTN UartBase,\r
- IN UINT32 Control\r
+ IN UINTN UartBase,\r
+ IN UINT32 Control\r
)\r
{\r
UINT32 Bits;\r
RETURN_STATUS\r
EFIAPI\r
PL011UartGetControl (\r
- IN UINTN UartBase,\r
- OUT UINT32 *Control\r
+ IN UINTN UartBase,\r
+ OUT UINT32 *Control\r
)\r
{\r
- UINT32 FlagRegister;\r
- UINT32 ControlRegister;\r
+ UINT32 FlagRegister;\r
+ UINT32 ControlRegister;\r
\r
-\r
- FlagRegister = MmioRead32 (UartBase + UARTFR);\r
+ FlagRegister = MmioRead32 (UartBase + UARTFR);\r
ControlRegister = MmioRead32 (UartBase + UARTCR);\r
\r
*Control = 0;\r
}\r
\r
if ((ControlRegister & (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN))\r
- == (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN)) {\r
+ == (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN))\r
+ {\r
*Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;\r
}\r
\r
UINTN\r
EFIAPI\r
PL011UartWrite (\r
- IN UINTN UartBase,\r
- IN UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
+ IN UINTN UartBase,\r
+ IN UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
)\r
{\r
- UINT8* CONST Final = &Buffer[NumberOfBytes];\r
+ UINT8 *CONST Final = &Buffer[NumberOfBytes];\r
\r
while (Buffer < Final) {\r
// Wait until UART able to accept another char\r
- while ((MmioRead32 (UartBase + UARTFR) & UART_TX_FULL_FLAG_MASK));\r
+ while ((MmioRead32 (UartBase + UARTFR) & UART_TX_FULL_FLAG_MASK)) {\r
+ }\r
\r
MmioWrite8 (UartBase + UARTDR, *Buffer++);\r
}\r
UINTN\r
EFIAPI\r
PL011UartRead (\r
- IN UINTN UartBase,\r
- OUT UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
+ IN UINTN UartBase,\r
+ OUT UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
)\r
{\r
- UINTN Count;\r
+ UINTN Count;\r
\r
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
- while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);\r
+ while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0) {\r
+ }\r
+\r
*Buffer = MmioRead8 (UartBase + UARTDR);\r
}\r
\r
BOOLEAN\r
EFIAPI\r
PL011UartPoll (\r
- IN UINTN UartBase\r
+ IN UINTN UartBase\r
)\r
{\r
return ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) == 0);\r
\r
**/\r
\r
-\r
#ifndef __PL031_REAL_TIME_CLOCK_H__\r
#define __PL031_REAL_TIME_CLOCK_H__\r
\r
// PL031 Registers\r
-#define PL031_RTC_DR_DATA_REGISTER 0x000\r
-#define PL031_RTC_MR_MATCH_REGISTER 0x004\r
-#define PL031_RTC_LR_LOAD_REGISTER 0x008\r
-#define PL031_RTC_CR_CONTROL_REGISTER 0x00C\r
-#define PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER 0x010\r
-#define PL031_RTC_RIS_RAW_IRQ_STATUS_REGISTER 0x014\r
-#define PL031_RTC_MIS_MASKED_IRQ_STATUS_REGISTER 0x018\r
-#define PL031_RTC_ICR_IRQ_CLEAR_REGISTER 0x01C\r
-#define PL031_RTC_PERIPH_ID0 0xFE0\r
-#define PL031_RTC_PERIPH_ID1 0xFE4\r
-#define PL031_RTC_PERIPH_ID2 0xFE8\r
-#define PL031_RTC_PERIPH_ID3 0xFEC\r
-#define PL031_RTC_PCELL_ID0 0xFF0\r
-#define PL031_RTC_PCELL_ID1 0xFF4\r
-#define PL031_RTC_PCELL_ID2 0xFF8\r
-#define PL031_RTC_PCELL_ID3 0xFFC\r
+#define PL031_RTC_DR_DATA_REGISTER 0x000\r
+#define PL031_RTC_MR_MATCH_REGISTER 0x004\r
+#define PL031_RTC_LR_LOAD_REGISTER 0x008\r
+#define PL031_RTC_CR_CONTROL_REGISTER 0x00C\r
+#define PL031_RTC_IMSC_IRQ_MASK_SET_CLEAR_REGISTER 0x010\r
+#define PL031_RTC_RIS_RAW_IRQ_STATUS_REGISTER 0x014\r
+#define PL031_RTC_MIS_MASKED_IRQ_STATUS_REGISTER 0x018\r
+#define PL031_RTC_ICR_IRQ_CLEAR_REGISTER 0x01C\r
+#define PL031_RTC_PERIPH_ID0 0xFE0\r
+#define PL031_RTC_PERIPH_ID1 0xFE4\r
+#define PL031_RTC_PERIPH_ID2 0xFE8\r
+#define PL031_RTC_PERIPH_ID3 0xFEC\r
+#define PL031_RTC_PCELL_ID0 0xFF0\r
+#define PL031_RTC_PCELL_ID1 0xFF4\r
+#define PL031_RTC_PCELL_ID2 0xFF8\r
+#define PL031_RTC_PCELL_ID3 0xFFC\r
\r
// PL031 Values\r
-#define PL031_RTC_ENABLED 0x00000001\r
-#define PL031_SET_IRQ_MASK 0x00000001\r
-#define PL031_IRQ_TRIGGERED 0x00000001\r
-#define PL031_CLEAR_IRQ 0x00000001\r
+#define PL031_RTC_ENABLED 0x00000001\r
+#define PL031_SET_IRQ_MASK 0x00000001\r
+#define PL031_IRQ_TRIGGERED 0x00000001\r
+#define PL031_CLEAR_IRQ 0x00000001\r
\r
-#define PL031_COUNTS_PER_SECOND 1\r
+#define PL031_COUNTS_PER_SECOND 1\r
\r
#endif\r
\r
#include "PL031RealTimeClock.h"\r
\r
-STATIC BOOLEAN mPL031Initialized = FALSE;\r
-STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;\r
-STATIC UINTN mPL031RtcBase;\r
+STATIC BOOLEAN mPL031Initialized = FALSE;\r
+STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;\r
+STATIC UINTN mPL031RtcBase;\r
\r
EFI_STATUS\r
IdentifyPL031 (\r
VOID\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
// Check if this is a PrimeCell Peripheral\r
if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID0) != 0x0D)\r
- || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0)\r
- || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05)\r
- || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1)) {\r
+ || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID1) != 0xF0)\r
+ || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID2) != 0x05)\r
+ || (MmioRead8 (mPL031RtcBase + PL031_RTC_PCELL_ID3) != 0xB1))\r
+ {\r
Status = EFI_NOT_FOUND;\r
goto EXIT;\r
}\r
\r
// Check if this PrimeCell Peripheral is the PL031 Real Time Clock\r
if ( (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID0) != 0x31)\r
- || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10)\r
- || ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04)\r
- || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00)) {\r
+ || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID1) != 0x10)\r
+ || ((MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID2) & 0xF) != 0x04)\r
+ || (MmioRead8 (mPL031RtcBase + PL031_RTC_PERIPH_ID3) != 0x00))\r
+ {\r
Status = EFI_NOT_FOUND;\r
goto EXIT;\r
}\r
\r
Status = EFI_SUCCESS;\r
\r
- EXIT:\r
+EXIT:\r
return Status;\r
}\r
\r
VOID\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
// Prepare the hardware\r
- Status = IdentifyPL031();\r
+ Status = IdentifyPL031 ();\r
if (EFI_ERROR (Status)) {\r
goto EXIT;\r
}\r
\r
mPL031Initialized = TRUE;\r
\r
- EXIT:\r
+EXIT:\r
return Status;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
LibGetTime (\r
- OUT EFI_TIME *Time,\r
- OUT EFI_TIME_CAPABILITIES *Capabilities\r
+ OUT EFI_TIME *Time,\r
+ OUT EFI_TIME_CAPABILITIES *Capabilities\r
)\r
{\r
EFI_STATUS Status;\r
// Update the Capabilities info\r
if (Capabilities != NULL) {\r
// PL031 runs at frequency 1Hz\r
- Capabilities->Resolution = PL031_COUNTS_PER_SECOND;\r
+ Capabilities->Resolution = PL031_COUNTS_PER_SECOND;\r
// Accuracy in ppm multiplied by 1,000,000, e.g. for 50ppm set 50,000,000\r
- Capabilities->Accuracy = (UINT32)PcdGet32 (PcdPL031RtcPpmAccuracy);\r
+ Capabilities->Accuracy = (UINT32)PcdGet32 (PcdPL031RtcPpmAccuracy);\r
// FALSE: Setting the time does not clear the values below the resolution level\r
- Capabilities->SetsToZero = FALSE;\r
+ Capabilities->SetsToZero = FALSE;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Sets the current local time and date information.\r
\r
EFI_STATUS\r
EFIAPI\r
LibSetTime (\r
- IN EFI_TIME *Time\r
+ IN EFI_TIME *Time\r
)\r
{\r
EFI_STATUS Status;\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Returns the current wakeup alarm clock setting.\r
\r
EFI_STATUS\r
EFIAPI\r
LibGetWakeupTime (\r
- OUT BOOLEAN *Enabled,\r
- OUT BOOLEAN *Pending,\r
- OUT EFI_TIME *Time\r
+ OUT BOOLEAN *Enabled,\r
+ OUT BOOLEAN *Pending,\r
+ OUT EFI_TIME *Time\r
)\r
{\r
// Not a required feature\r
return EFI_UNSUPPORTED;\r
}\r
\r
-\r
/**\r
Sets the system wakeup alarm clock time.\r
\r
EFI_STATUS\r
EFIAPI\r
LibSetWakeupTime (\r
- IN BOOLEAN Enabled,\r
- OUT EFI_TIME *Time\r
+ IN BOOLEAN Enabled,\r
+ OUT EFI_TIME *Time\r
)\r
{\r
// Not a required feature\r
VOID\r
EFIAPI\r
LibRtcVirtualNotifyEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
)\r
{\r
//\r
// to virtual address. After the OS transitions to calling in virtual mode, all future\r
// runtime calls will be made in virtual mode.\r
//\r
- EfiConvertPointer (0x0, (VOID**)&mPL031RtcBase);\r
+ EfiConvertPointer (0x0, (VOID **)&mPL031RtcBase);\r
return;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
LibRtcInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_HANDLE Handle;\r
+ EFI_STATUS Status;\r
+ EFI_HANDLE Handle;\r
\r
// Initialize RTC Base Address\r
mPL031RtcBase = PcdGet32 (PcdPL031RtcBase);\r
// Declare the controller as EFI_MEMORY_RUNTIME\r
Status = gDS->AddMemorySpace (\r
EfiGcdMemoryTypeMemoryMappedIo,\r
- mPL031RtcBase, SIZE_4KB,\r
+ mPL031RtcBase,\r
+ SIZE_4KB,\r
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME\r
);\r
if (EFI_ERROR (Status)) {\r
Handle = NULL;\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
&Handle,\r
- &gEfiRealTimeClockArchProtocolGuid, NULL,\r
+ &gEfiRealTimeClockArchProtocolGuid,\r
+ NULL,\r
NULL\r
- );\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
//\r
VOID\r
)\r
{\r
- DEBUG ((DEBUG_WARN, "Probing ID registers at 0x%lx for a PL111\n",\r
- PL111_REG_CLCD_PERIPH_ID_0));\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
+ "Probing ID registers at 0x%lx for a PL111\n",\r
+ PL111_REG_CLCD_PERIPH_ID_0\r
+ ));\r
\r
// Check if this is a PL111\r
- if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&\r
- MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&\r
- (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&\r
- MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&\r
- MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&\r
- MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&\r
- MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&\r
- MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {\r
+ if ((MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0) &&\r
+ (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1) &&\r
+ ((MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2) &&\r
+ (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3) &&\r
+ (MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0) &&\r
+ (MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1) &&\r
+ (MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2) &&\r
+ (MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3))\r
+ {\r
return EFI_SUCCESS;\r
}\r
+\r
return EFI_NOT_FOUND;\r
}\r
\r
**/\r
EFI_STATUS\r
LcdInitialize (\r
- IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
+ IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
)\r
{\r
// Define start of the VRAM. This never changes for any graphics mode\r
IN UINT32 ModeNumber\r
)\r
{\r
- EFI_STATUS Status;\r
- SCAN_TIMINGS *Horizontal;\r
- SCAN_TIMINGS *Vertical;\r
- UINT32 LcdControl;\r
- LCD_BPP LcdBpp;\r
+ EFI_STATUS Status;\r
+ SCAN_TIMINGS *Horizontal;\r
+ SCAN_TIMINGS *Vertical;\r
+ UINT32 LcdControl;\r
+ LCD_BPP LcdBpp;\r
\r
EFI_GRAPHICS_OUTPUT_MODE_INFORMATION ModeInfo;\r
\r
if (ModeInfo.PixelFormat == PixelBlueGreenRedReserved8BitPerColor) {\r
LcdControl |= PL111_CTRL_BGR;\r
}\r
+\r
MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);\r
\r
return EFI_SUCCESS;\r
**********************************************************************/\r
\r
// Controller Register Offsets\r
-#define PL111_REG_LCD_TIMING_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x000)\r
-#define PL111_REG_LCD_TIMING_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x004)\r
-#define PL111_REG_LCD_TIMING_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x008)\r
-#define PL111_REG_LCD_TIMING_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x00C)\r
-#define PL111_REG_LCD_UP_BASE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x010)\r
-#define PL111_REG_LCD_LP_BASE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x014)\r
-#define PL111_REG_LCD_CONTROL ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x018)\r
-#define PL111_REG_LCD_IMSC ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x01C)\r
-#define PL111_REG_LCD_RIS ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x020)\r
-#define PL111_REG_LCD_MIS ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x024)\r
-#define PL111_REG_LCD_ICR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x028)\r
-#define PL111_REG_LCD_UP_CURR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x02C)\r
-#define PL111_REG_LCD_LP_CURR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x030)\r
-#define PL111_REG_LCD_PALETTE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x200)\r
+#define PL111_REG_LCD_TIMING_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x000)\r
+#define PL111_REG_LCD_TIMING_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x004)\r
+#define PL111_REG_LCD_TIMING_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x008)\r
+#define PL111_REG_LCD_TIMING_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x00C)\r
+#define PL111_REG_LCD_UP_BASE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x010)\r
+#define PL111_REG_LCD_LP_BASE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x014)\r
+#define PL111_REG_LCD_CONTROL ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x018)\r
+#define PL111_REG_LCD_IMSC ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x01C)\r
+#define PL111_REG_LCD_RIS ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x020)\r
+#define PL111_REG_LCD_MIS ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x024)\r
+#define PL111_REG_LCD_ICR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x028)\r
+#define PL111_REG_LCD_UP_CURR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x02C)\r
+#define PL111_REG_LCD_LP_CURR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x030)\r
+#define PL111_REG_LCD_PALETTE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x200)\r
\r
// Identification Register Offsets\r
-#define PL111_REG_CLCD_PERIPH_ID_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE0)\r
-#define PL111_REG_CLCD_PERIPH_ID_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE4)\r
-#define PL111_REG_CLCD_PERIPH_ID_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE8)\r
-#define PL111_REG_CLCD_PERIPH_ID_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFEC)\r
-#define PL111_REG_CLCD_P_CELL_ID_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF0)\r
-#define PL111_REG_CLCD_P_CELL_ID_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF4)\r
-#define PL111_REG_CLCD_P_CELL_ID_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF8)\r
-#define PL111_REG_CLCD_P_CELL_ID_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFFC)\r
-\r
-#define PL111_CLCD_PERIPH_ID_0 0x11\r
-#define PL111_CLCD_PERIPH_ID_1 0x11\r
-#define PL111_CLCD_PERIPH_ID_2 0x04\r
-#define PL111_CLCD_PERIPH_ID_3 0x00\r
-#define PL111_CLCD_P_CELL_ID_0 0x0D\r
-#define PL111_CLCD_P_CELL_ID_1 0xF0\r
-#define PL111_CLCD_P_CELL_ID_2 0x05\r
-#define PL111_CLCD_P_CELL_ID_3 0xB1\r
+#define PL111_REG_CLCD_PERIPH_ID_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE0)\r
+#define PL111_REG_CLCD_PERIPH_ID_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE4)\r
+#define PL111_REG_CLCD_PERIPH_ID_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE8)\r
+#define PL111_REG_CLCD_PERIPH_ID_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFEC)\r
+#define PL111_REG_CLCD_P_CELL_ID_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF0)\r
+#define PL111_REG_CLCD_P_CELL_ID_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF4)\r
+#define PL111_REG_CLCD_P_CELL_ID_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF8)\r
+#define PL111_REG_CLCD_P_CELL_ID_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFFC)\r
+\r
+#define PL111_CLCD_PERIPH_ID_0 0x11\r
+#define PL111_CLCD_PERIPH_ID_1 0x11\r
+#define PL111_CLCD_PERIPH_ID_2 0x04\r
+#define PL111_CLCD_PERIPH_ID_3 0x00\r
+#define PL111_CLCD_P_CELL_ID_0 0x0D\r
+#define PL111_CLCD_P_CELL_ID_1 0xF0\r
+#define PL111_CLCD_P_CELL_ID_2 0x05\r
+#define PL111_CLCD_P_CELL_ID_3 0xB1\r
\r
/**********************************************************************/\r
\r
/**********************************************************************/\r
\r
// Register: PL111_REG_LCD_TIMING_0\r
-#define HOR_AXIS_PANEL(hbp,hfp,hsw,hor_res) (UINT32)(((UINT32)(hbp) << 24) | ((UINT32)(hfp) << 16) | ((UINT32)(hsw) << 8) | (((UINT32)((hor_res)/16)-1) << 2))\r
+#define HOR_AXIS_PANEL(hbp, hfp, hsw, hor_res) (UINT32)(((UINT32)(hbp) << 24) | ((UINT32)(hfp) << 16) | ((UINT32)(hsw) << 8) | (((UINT32)((hor_res)/16)-1) << 2))\r
\r
// Register: PL111_REG_LCD_TIMING_1\r
-#define VER_AXIS_PANEL(vbp,vfp,vsw,ver_res) (UINT32)(((UINT32)(vbp) << 24) | ((UINT32)(vfp) << 16) | ((UINT32)(vsw) << 10) | ((ver_res)-1))\r
+#define VER_AXIS_PANEL(vbp, vfp, vsw, ver_res) (UINT32)(((UINT32)(vbp) << 24) | ((UINT32)(vfp) << 16) | ((UINT32)(vsw) << 10) | ((ver_res)-1))\r
\r
// Register: PL111_REG_LCD_TIMING_2\r
-#define PL111_BIT_SHIFT_PCD_HI 27\r
-#define PL111_BIT_SHIFT_BCD 26\r
-#define PL111_BIT_SHIFT_CPL 16\r
-#define PL111_BIT_SHIFT_IOE 14\r
-#define PL111_BIT_SHIFT_IPC 13\r
-#define PL111_BIT_SHIFT_IHS 12\r
-#define PL111_BIT_SHIFT_IVS 11\r
-#define PL111_BIT_SHIFT_ACB 6\r
-#define PL111_BIT_SHIFT_CLKSEL 5\r
-#define PL111_BIT_SHIFT_PCD_LO 0\r
-\r
-#define PL111_BCD (1 << 26)\r
-#define PL111_IPC (1 << 13)\r
-#define PL111_IHS (1 << 12)\r
-#define PL111_IVS (1 << 11)\r
-\r
-#define CLK_SIG_POLARITY(hor_res) (UINT32)(PL111_BCD | PL111_IPC | PL111_IHS | PL111_IVS | (((hor_res)-1) << 16))\r
+#define PL111_BIT_SHIFT_PCD_HI 27\r
+#define PL111_BIT_SHIFT_BCD 26\r
+#define PL111_BIT_SHIFT_CPL 16\r
+#define PL111_BIT_SHIFT_IOE 14\r
+#define PL111_BIT_SHIFT_IPC 13\r
+#define PL111_BIT_SHIFT_IHS 12\r
+#define PL111_BIT_SHIFT_IVS 11\r
+#define PL111_BIT_SHIFT_ACB 6\r
+#define PL111_BIT_SHIFT_CLKSEL 5\r
+#define PL111_BIT_SHIFT_PCD_LO 0\r
+\r
+#define PL111_BCD (1 << 26)\r
+#define PL111_IPC (1 << 13)\r
+#define PL111_IHS (1 << 12)\r
+#define PL111_IVS (1 << 11)\r
+\r
+#define CLK_SIG_POLARITY(hor_res) (UINT32)(PL111_BCD | PL111_IPC | PL111_IHS | PL111_IVS | (((hor_res)-1) << 16))\r
\r
// Register: PL111_REG_LCD_TIMING_3\r
-#define PL111_BIT_SHIFT_LEE 16\r
-#define PL111_BIT_SHIFT_LED 0\r
-\r
-#define PL111_CTRL_WATERMARK (1 << 16)\r
-#define PL111_CTRL_LCD_V_COMP (1 << 12)\r
-#define PL111_CTRL_LCD_PWR (1 << 11)\r
-#define PL111_CTRL_BEPO (1 << 10)\r
-#define PL111_CTRL_BEBO (1 << 9)\r
-#define PL111_CTRL_BGR (1 << 8)\r
-#define PL111_CTRL_LCD_DUAL (1 << 7)\r
-#define PL111_CTRL_LCD_MONO_8 (1 << 6)\r
-#define PL111_CTRL_LCD_TFT (1 << 5)\r
-#define PL111_CTRL_LCD_BW (1 << 4)\r
-#define PL111_CTRL_LCD_1BPP (0 << 1)\r
-#define PL111_CTRL_LCD_2BPP (1 << 1)\r
-#define PL111_CTRL_LCD_4BPP (2 << 1)\r
-#define PL111_CTRL_LCD_8BPP (3 << 1)\r
-#define PL111_CTRL_LCD_16BPP (4 << 1)\r
-#define PL111_CTRL_LCD_24BPP (5 << 1)\r
-#define PL111_CTRL_LCD_16BPP_565 (6 << 1)\r
-#define PL111_CTRL_LCD_12BPP_444 (7 << 1)\r
-#define PL111_CTRL_LCD_BPP(Bpp) ((Bpp) << 1)\r
-#define PL111_CTRL_LCD_EN 1\r
+#define PL111_BIT_SHIFT_LEE 16\r
+#define PL111_BIT_SHIFT_LED 0\r
+\r
+#define PL111_CTRL_WATERMARK (1 << 16)\r
+#define PL111_CTRL_LCD_V_COMP (1 << 12)\r
+#define PL111_CTRL_LCD_PWR (1 << 11)\r
+#define PL111_CTRL_BEPO (1 << 10)\r
+#define PL111_CTRL_BEBO (1 << 9)\r
+#define PL111_CTRL_BGR (1 << 8)\r
+#define PL111_CTRL_LCD_DUAL (1 << 7)\r
+#define PL111_CTRL_LCD_MONO_8 (1 << 6)\r
+#define PL111_CTRL_LCD_TFT (1 << 5)\r
+#define PL111_CTRL_LCD_BW (1 << 4)\r
+#define PL111_CTRL_LCD_1BPP (0 << 1)\r
+#define PL111_CTRL_LCD_2BPP (1 << 1)\r
+#define PL111_CTRL_LCD_4BPP (2 << 1)\r
+#define PL111_CTRL_LCD_8BPP (3 << 1)\r
+#define PL111_CTRL_LCD_16BPP (4 << 1)\r
+#define PL111_CTRL_LCD_24BPP (5 << 1)\r
+#define PL111_CTRL_LCD_16BPP_565 (6 << 1)\r
+#define PL111_CTRL_LCD_12BPP_444 (7 << 1)\r
+#define PL111_CTRL_LCD_BPP(Bpp) ((Bpp) << 1)\r
+#define PL111_CTRL_LCD_EN 1\r
\r
/**********************************************************************/\r
\r
// Register: PL111_REG_LCD_TIMING_0\r
-#define PL111_LCD_TIMING_0_HBP(hbp) (((hbp) & 0xFF) << 24)\r
-#define PL111_LCD_TIMING_0_HFP(hfp) (((hfp) & 0xFF) << 16)\r
-#define PL111_LCD_TIMING_0_HSW(hsw) (((hsw) & 0xFF) << 8)\r
-#define PL111_LCD_TIMING_0_PPL(ppl) (((hsw) & 0x3F) << 2)\r
+#define PL111_LCD_TIMING_0_HBP(hbp) (((hbp) & 0xFF) << 24)\r
+#define PL111_LCD_TIMING_0_HFP(hfp) (((hfp) & 0xFF) << 16)\r
+#define PL111_LCD_TIMING_0_HSW(hsw) (((hsw) & 0xFF) << 8)\r
+#define PL111_LCD_TIMING_0_PPL(ppl) (((hsw) & 0x3F) << 2)\r
\r
// Register: PL111_REG_LCD_TIMING_1\r
-#define PL111_LCD_TIMING_1_VBP(vbp) (((vbp) & 0xFF) << 24)\r
-#define PL111_LCD_TIMING_1_VFP(vfp) (((vfp) & 0xFF) << 16)\r
-#define PL111_LCD_TIMING_1_VSW(vsw) (((vsw) & 0x3F) << 10)\r
-#define PL111_LCD_TIMING_1_LPP(lpp) ((lpp) & 0xFC)\r
+#define PL111_LCD_TIMING_1_VBP(vbp) (((vbp) & 0xFF) << 24)\r
+#define PL111_LCD_TIMING_1_VFP(vfp) (((vfp) & 0xFF) << 16)\r
+#define PL111_LCD_TIMING_1_VSW(vsw) (((vsw) & 0x3F) << 10)\r
+#define PL111_LCD_TIMING_1_LPP(lpp) ((lpp) & 0xFC)\r
\r
// Register: PL111_REG_LCD_TIMING_2\r
-#define PL111_BIT_MASK_PCD_HI 0xF8000000\r
-#define PL111_BIT_MASK_BCD 0x04000000\r
-#define PL111_BIT_MASK_CPL 0x03FF0000\r
-#define PL111_BIT_MASK_IOE 0x00004000\r
-#define PL111_BIT_MASK_IPC 0x00002000\r
-#define PL111_BIT_MASK_IHS 0x00001000\r
-#define PL111_BIT_MASK_IVS 0x00000800\r
-#define PL111_BIT_MASK_ACB 0x000007C0\r
-#define PL111_BIT_MASK_CLKSEL 0x00000020\r
-#define PL111_BIT_MASK_PCD_LO 0x0000001F\r
+#define PL111_BIT_MASK_PCD_HI 0xF8000000\r
+#define PL111_BIT_MASK_BCD 0x04000000\r
+#define PL111_BIT_MASK_CPL 0x03FF0000\r
+#define PL111_BIT_MASK_IOE 0x00004000\r
+#define PL111_BIT_MASK_IPC 0x00002000\r
+#define PL111_BIT_MASK_IHS 0x00001000\r
+#define PL111_BIT_MASK_IVS 0x00000800\r
+#define PL111_BIT_MASK_ACB 0x000007C0\r
+#define PL111_BIT_MASK_CLKSEL 0x00000020\r
+#define PL111_BIT_MASK_PCD_LO 0x0000001F\r
\r
// Register: PL111_REG_LCD_TIMING_3\r
-#define PL111_BIT_MASK_LEE 0x00010000\r
-#define PL111_BIT_MASK_LED 0x0000007F\r
+#define PL111_BIT_MASK_LEE 0x00010000\r
+#define PL111_BIT_MASK_LED 0x0000007F\r
\r
#endif /* _PL111LCD_H__ */\r
VOID\r
)\r
{\r
- return (VOID *)ArmReadTpidrurw();\r
+ return (VOID *)ArmReadTpidrurw ();\r
}\r
\r
-\r
-\r
/**\r
Updates the pointer to the HOB list.\r
\r
EFI_STATUS\r
EFIAPI\r
PrePeiSetHobList (\r
- IN VOID *HobList\r
+ IN VOID *HobList\r
)\r
{\r
- ArmWriteTpidrurw((UINTN)HobList);\r
+ ArmWriteTpidrurw ((UINTN)HobList);\r
\r
return EFI_SUCCESS;\r
}\r
IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable\r
)\r
{\r
+ VOID *TranslationTableBase;\r
+ UINTN TranslationTableSize;\r
+ RETURN_STATUS Status;\r
\r
- VOID *TranslationTableBase;\r
- UINTN TranslationTableSize;\r
- RETURN_STATUS Status;\r
-\r
- //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in\r
+ // Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in\r
// DRAM (even at the top of DRAM as it is the first permanent memory allocation)\r
Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
if (EFI_ERROR (Status)) {\r
EFI_STATUS\r
EFIAPI\r
MemoryPeim (\r
- IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
- IN UINT64 UefiMemorySize\r
+ IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
+ IN UINT64 UefiMemorySize\r
)\r
{\r
- ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;\r
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;\r
- UINT64 ResourceLength;\r
- EFI_PEI_HOB_POINTERS NextHob;\r
- EFI_PHYSICAL_ADDRESS FdTop;\r
- EFI_PHYSICAL_ADDRESS SystemMemoryTop;\r
- EFI_PHYSICAL_ADDRESS ResourceTop;\r
- BOOLEAN Found;\r
+ ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;\r
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;\r
+ UINT64 ResourceLength;\r
+ EFI_PEI_HOB_POINTERS NextHob;\r
+ EFI_PHYSICAL_ADDRESS FdTop;\r
+ EFI_PHYSICAL_ADDRESS SystemMemoryTop;\r
+ EFI_PHYSICAL_ADDRESS ResourceTop;\r
+ BOOLEAN Found;\r
\r
// Get Virtual Memory Map from the Platform Library\r
ArmPlatformGetVirtualMemoryMap (&MemoryTable);\r
// Now, the permanent memory has been installed, we can call AllocatePages()\r
//\r
ResourceAttributes = (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED\r
- );\r
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_TESTED\r
+ );\r
\r
//\r
// Check if the resource for the main system memory has been declared\r
//\r
- Found = FALSE;\r
+ Found = FALSE;\r
NextHob.Raw = GetHobList ();\r
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {\r
if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&\r
Found = TRUE;\r
break;\r
}\r
+\r
NextHob.Raw = GET_NEXT_HOB (NextHob);\r
}\r
\r
if (!Found) {\r
// Reserved the memory space occupied by the firmware volume\r
BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- ResourceAttributes,\r
- PcdGet64 (PcdSystemMemoryBase),\r
- PcdGet64 (PcdSystemMemorySize)\r
- );\r
+ EFI_RESOURCE_SYSTEM_MEMORY,\r
+ ResourceAttributes,\r
+ PcdGet64 (PcdSystemMemoryBase),\r
+ PcdGet64 (PcdSystemMemorySize)\r
+ );\r
}\r
\r
//\r
//\r
\r
SystemMemoryTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemoryBase) + (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemorySize);\r
- FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFdSize);\r
+ FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFdSize);\r
\r
// EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE\r
// core to overwrite this area we must create a memory allocation HOB for the region,\r
(FdTop <= NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength))\r
{\r
ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;\r
- ResourceLength = NextHob.ResourceDescriptor->ResourceLength;\r
- ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;\r
+ ResourceLength = NextHob.ResourceDescriptor->ResourceLength;\r
+ ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;\r
\r
if (PcdGet64 (PcdFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {\r
if (SystemMemoryTop != FdTop) {\r
// Create the System Memory HOB for the firmware\r
- BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
- ResourceAttributes,\r
- PcdGet64 (PcdFdBaseAddress),\r
- PcdGet32 (PcdFdSize));\r
+ BuildResourceDescriptorHob (\r
+ EFI_RESOURCE_SYSTEM_MEMORY,\r
+ ResourceAttributes,\r
+ PcdGet64 (PcdFdBaseAddress),\r
+ PcdGet32 (PcdFdSize)\r
+ );\r
\r
// Top of the FD is system memory available for UEFI\r
- NextHob.ResourceDescriptor->PhysicalStart += PcdGet32(PcdFdSize);\r
- NextHob.ResourceDescriptor->ResourceLength -= PcdGet32(PcdFdSize);\r
+ NextHob.ResourceDescriptor->PhysicalStart += PcdGet32 (PcdFdSize);\r
+ NextHob.ResourceDescriptor->ResourceLength -= PcdGet32 (PcdFdSize);\r
}\r
} else {\r
// Create the System Memory HOB for the firmware\r
- BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
- ResourceAttributes,\r
- PcdGet64 (PcdFdBaseAddress),\r
- PcdGet32 (PcdFdSize));\r
+ BuildResourceDescriptorHob (\r
+ EFI_RESOURCE_SYSTEM_MEMORY,\r
+ ResourceAttributes,\r
+ PcdGet64 (PcdFdBaseAddress),\r
+ PcdGet32 (PcdFdSize)\r
+ );\r
\r
// Update the HOB\r
NextHob.ResourceDescriptor->ResourceLength = PcdGet64 (PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;\r
// If there is some memory available on the top of the FD then create a HOB\r
if (FdTop < NextHob.ResourceDescriptor->PhysicalStart + ResourceLength) {\r
// Create the System Memory HOB for the remaining region (top of the FD)\r
- BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,\r
- ResourceAttributes,\r
- FdTop,\r
- ResourceTop - FdTop);\r
+ BuildResourceDescriptorHob (\r
+ EFI_RESOURCE_SYSTEM_MEMORY,\r
+ ResourceAttributes,\r
+ FdTop,\r
+ ResourceTop - FdTop\r
+ );\r
}\r
}\r
\r
// Mark the memory covering the Firmware Device as boot services data\r
- BuildMemoryAllocationHob (PcdGet64 (PcdFdBaseAddress),\r
- PcdGet32 (PcdFdSize),\r
- EfiBootServicesData);\r
+ BuildMemoryAllocationHob (\r
+ PcdGet64 (PcdFdBaseAddress),\r
+ PcdGet32 (PcdFdSize),\r
+ EfiBootServicesData\r
+ );\r
\r
Found = TRUE;\r
break;\r
}\r
+\r
NextHob.Raw = GET_NEXT_HOB (NextHob);\r
}\r
\r
- ASSERT(Found);\r
+ ASSERT (Found);\r
}\r
\r
// Build Memory Allocation Hob\r
EFI_STATUS\r
EFIAPI\r
MemoryPeim (\r
- IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
- IN UINT64 UefiMemorySize\r
+ IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
+ IN UINT64 UefiMemorySize\r
);\r
\r
// May want to put this into a library so you only need the PCD settings if you are using the feature?\r
VOID\r
)\r
{\r
- EFI_MEMORY_TYPE_INFORMATION Info[10];\r
+ EFI_MEMORY_TYPE_INFORMATION Info[10];\r
\r
Info[0].Type = EfiACPIReclaimMemory;\r
Info[0].NumberOfPages = PcdGet32 (PcdMemoryTypeEfiACPIReclaimMemory);\r
IN CONST EFI_PEI_SERVICES **PeiServices\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN SystemMemoryBase;\r
- UINT64 SystemMemoryTop;\r
- UINTN FdBase;\r
- UINTN FdTop;\r
- UINTN UefiMemoryBase;\r
+ EFI_STATUS Status;\r
+ UINTN SystemMemoryBase;\r
+ UINT64 SystemMemoryTop;\r
+ UINTN FdBase;\r
+ UINTN FdTop;\r
+ UINTN UefiMemoryBase;\r
\r
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Memory Init PEIM Loaded\n"));\r
\r
ASSERT (PcdGet64 (PcdSystemMemoryBase) < (UINT64)MAX_ALLOC_ADDRESS);\r
\r
SystemMemoryBase = (UINTN)PcdGet64 (PcdSystemMemoryBase);\r
- SystemMemoryTop = SystemMemoryBase + PcdGet64 (PcdSystemMemorySize);\r
+ SystemMemoryTop = SystemMemoryBase + PcdGet64 (PcdSystemMemorySize);\r
if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {\r
SystemMemoryTop = (UINT64)MAX_ALLOC_ADDRESS + 1;\r
}\r
+\r
FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);\r
- FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);\r
+ FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);\r
\r
//\r
// Declare the UEFI memory to PEI\r
IN CONST EFI_PEI_SERVICES **PeiServices\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_BOOT_MODE BootMode;\r
+ EFI_STATUS Status;\r
+ EFI_BOOT_MODE BootMode;\r
\r
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Platform PEIM Loaded\n"));\r
\r
\r
VOID\r
PeiCommonExceptionEntry (\r
- IN UINT32 Entry,\r
- IN UINTN LR\r
+ IN UINT32 Entry,\r
+ IN UINTN LR\r
)\r
{\r
- CHAR8 Buffer[100];\r
- UINTN CharCount;\r
+ CHAR8 Buffer[100];\r
+ UINTN CharCount;\r
\r
switch (Entry) {\r
- case EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Synchronous Exception at 0x%X\n\r", LR);\r
- break;\r
- case EXCEPT_AARCH64_IRQ:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r", LR);\r
- break;\r
- case EXCEPT_AARCH64_FIQ:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r", LR);\r
- break;\r
- case EXCEPT_AARCH64_SERROR:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SError/Abort Exception at 0x%X\n\r", LR);\r
- break;\r
- default:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r", LR);\r
- break;\r
+ case EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Synchronous Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case EXCEPT_AARCH64_IRQ:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "IRQ Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case EXCEPT_AARCH64_FIQ:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "FIQ Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case EXCEPT_AARCH64_SERROR:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "SError/Abort Exception at 0x%X\n\r", LR);\r
+ break;\r
+ default:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Unknown Exception at 0x%X\n\r", LR);\r
+ break;\r
}\r
\r
- SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
+ SerialPortWrite ((UINT8 *)Buffer, CharCount);\r
\r
- while(1);\r
+ while (1) {\r
+ }\r
}\r
-\r
\r
VOID\r
PeiCommonExceptionEntry (\r
- IN UINT32 Entry,\r
- IN UINTN LR\r
+ IN UINT32 Entry,\r
+ IN UINTN LR\r
)\r
{\r
- CHAR8 Buffer[100];\r
- UINTN CharCount;\r
+ CHAR8 Buffer[100];\r
+ UINTN CharCount;\r
\r
switch (Entry) {\r
- case 0:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);\r
- break;\r
- case 1:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);\r
- break;\r
- case 2:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);\r
- break;\r
- case 3:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);\r
- break;\r
- case 4:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);\r
- break;\r
- case 5:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);\r
- break;\r
- case 6:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);\r
- break;\r
- case 7:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);\r
- break;\r
- default:\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);\r
- break;\r
+ case 0:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Reset Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case 1:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Undefined Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case 2:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "SWI Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case 3:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "PrefetchAbort Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case 4:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "DataAbort Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case 5:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Reserved Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case 6:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "IRQ Exception at 0x%X\n\r", LR);\r
+ break;\r
+ case 7:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "FIQ Exception at 0x%X\n\r", LR);\r
+ break;\r
+ default:\r
+ CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "Unknown Exception at 0x%X\n\r", LR);\r
+ break;\r
}\r
- SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
- while(1);\r
-}\r
\r
+ SerialPortWrite ((UINT8 *)Buffer, CharCount);\r
+ while (1) {\r
+ }\r
+}\r
VOID\r
EFIAPI\r
SecondaryMain (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
)\r
{\r
EFI_STATUS Status;\r
ARM_CORE_INFO *ArmCoreInfoTable;\r
UINT32 ClusterId;\r
UINT32 CoreId;\r
- VOID (*SecondaryStart)(VOID);\r
- UINTN SecondaryEntryAddr;\r
- UINTN AcknowledgeInterrupt;\r
- UINTN InterruptId;\r
\r
- ClusterId = GET_CLUSTER_ID(MpId);\r
- CoreId = GET_CORE_ID(MpId);\r
+ VOID (*SecondaryStart)(\r
+ VOID\r
+ );\r
+ UINTN SecondaryEntryAddr;\r
+ UINTN AcknowledgeInterrupt;\r
+ UINTN InterruptId;\r
+\r
+ ClusterId = GET_CLUSTER_ID (MpId);\r
+ CoreId = GET_CORE_ID (MpId);\r
\r
// Get the gArmMpCoreInfoPpiGuid\r
PpiListSize = 0;\r
ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
- PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
+ PpiListCount = PpiListSize / sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
if (CompareGuid (PpiList->Guid, &gArmMpCoreInfoPpiGuid) == TRUE) {\r
break;\r
ASSERT (Index != PpiListCount);\r
\r
ArmMpCoreInfoPpi = PpiList->Ppi;\r
- ArmCoreCount = 0;\r
- Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
+ ArmCoreCount = 0;\r
+ Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
ASSERT_EFI_ERROR (Status);\r
\r
// Find the core in the ArmCoreTable\r
} while (SecondaryEntryAddr == 0);\r
\r
// Jump to secondary core entry point.\r
- SecondaryStart = (VOID (*)())SecondaryEntryAddr;\r
- SecondaryStart();\r
+ SecondaryStart = (VOID (*)()) SecondaryEntryAddr;\r
+ SecondaryStart ();\r
\r
// The secondaries shouldn't reach here\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
\r
VOID\r
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
)\r
{\r
- EFI_SEC_PEI_HAND_OFF SecCoreData;\r
- UINTN PpiListSize;\r
- EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
- UINTN TemporaryRamBase;\r
- UINTN TemporaryRamSize;\r
+ EFI_SEC_PEI_HAND_OFF SecCoreData;\r
+ UINTN PpiListSize;\r
+ EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
+ UINTN TemporaryRamBase;\r
+ UINTN TemporaryRamSize;\r
\r
CreatePpiList (&PpiListSize, &PpiList);\r
\r
// Enable the GIC Distributor\r
- ArmGicEnableDistributor (PcdGet64(PcdGicDistributorBase));\r
+ ArmGicEnableDistributor (PcdGet64 (PcdGicDistributorBase));\r
\r
// If ArmVe has not been built as Standalone then we need to wake up the secondary cores\r
if (FeaturePcdGet (PcdSendSgiToBringUpSecondaryCores)) {\r
// Sending SGI to all the Secondary CPU interfaces\r
- ArmGicSendSgiTo (PcdGet64(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
+ ArmGicSendSgiTo (PcdGet64 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
}\r
\r
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at\r
// the base of the primary core stack\r
- PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT);\r
+ PpiListSize = ALIGN_VALUE (PpiListSize, CPU_STACK_ALIGNMENT);\r
TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;\r
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;\r
\r
// Note: this must be in sync with the stuff in the asm file\r
// Note also: HOBs (pei temp ram) MUST be above stack\r
//\r
- SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
+ SecCoreData.DataSize = sizeof (EFI_SEC_PEI_HAND_OFF);\r
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);\r
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);\r
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)\r
VOID\r
EFIAPI\r
SecondaryMain (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
)\r
{\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
\r
VOID\r
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
)\r
{\r
- EFI_SEC_PEI_HAND_OFF SecCoreData;\r
- UINTN PpiListSize;\r
- EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
- UINTN TemporaryRamBase;\r
- UINTN TemporaryRamSize;\r
+ EFI_SEC_PEI_HAND_OFF SecCoreData;\r
+ UINTN PpiListSize;\r
+ EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
+ UINTN TemporaryRamBase;\r
+ UINTN TemporaryRamSize;\r
\r
CreatePpiList (&PpiListSize, &PpiList);\r
\r
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at\r
// the base of the primary core stack\r
- PpiListSize = ALIGN_VALUE(PpiListSize, CPU_STACK_ALIGNMENT);\r
+ PpiListSize = ALIGN_VALUE (PpiListSize, CPU_STACK_ALIGNMENT);\r
TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;\r
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;\r
\r
// Note: this must be in sync with the stuff in the asm file\r
// Note also: HOBs (pei temp ram) MUST be above stack\r
//\r
- SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
+ SecCoreData.DataSize = sizeof (EFI_SEC_PEI_HAND_OFF);\r
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);\r
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);\r
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)\r
\r
#include "PrePeiCore.h"\r
\r
-CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport };\r
+CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport };\r
\r
-CONST EFI_PEI_PPI_DESCRIPTOR gCommonPpiTable[] = {\r
+CONST EFI_PEI_PPI_DESCRIPTOR gCommonPpiTable[] = {\r
{\r
EFI_PEI_PPI_DESCRIPTOR_PPI,\r
&gEfiTemporaryRamSupportPpiGuid,\r
- (VOID *) &mTemporaryRamSupportPpi\r
+ (VOID *)&mTemporaryRamSupportPpi\r
}\r
};\r
\r
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList\r
)\r
{\r
- EFI_PEI_PPI_DESCRIPTOR *PlatformPpiList;\r
+ EFI_PEI_PPI_DESCRIPTOR *PlatformPpiList;\r
UINTN PlatformPpiListSize;\r
UINTN ListBase;\r
- EFI_PEI_PPI_DESCRIPTOR *LastPpi;\r
+ EFI_PEI_PPI_DESCRIPTOR *LastPpi;\r
\r
// Get the Platform PPIs\r
PlatformPpiListSize = 0;\r
\r
// Copy the Common and Platform PPis in Temporary Memory\r
ListBase = PcdGet64 (PcdCPUCoresStackBase);\r
- CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));\r
- CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);\r
+ CopyMem ((VOID *)ListBase, gCommonPpiTable, sizeof (gCommonPpiTable));\r
+ CopyMem ((VOID *)(ListBase + sizeof (gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);\r
\r
// Set the Terminate flag on the last PPI entry\r
- LastPpi = (EFI_PEI_PPI_DESCRIPTOR*)ListBase + ((sizeof(gCommonPpiTable) + PlatformPpiListSize) / sizeof(EFI_PEI_PPI_DESCRIPTOR)) - 1;\r
+ LastPpi = (EFI_PEI_PPI_DESCRIPTOR *)ListBase + ((sizeof (gCommonPpiTable) + PlatformPpiListSize) / sizeof (EFI_PEI_PPI_DESCRIPTOR)) - 1;\r
LastPpi->Flags |= EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;\r
\r
- *PpiList = (EFI_PEI_PPI_DESCRIPTOR*)ListBase;\r
- *PpiListSize = sizeof(gCommonPpiTable) + PlatformPpiListSize;\r
+ *PpiList = (EFI_PEI_PPI_DESCRIPTOR *)ListBase;\r
+ *PpiListSize = sizeof (gCommonPpiTable) + PlatformPpiListSize;\r
}\r
\r
VOID\r
// Enable Instruction Caches on all cores.\r
ArmEnableInstructionCache ();\r
\r
- InvalidateDataCacheRange ((VOID *)(UINTN)PcdGet64 (PcdCPUCoresStackBase),\r
- PcdGet32 (PcdCPUCorePrimaryStackSize));\r
+ InvalidateDataCacheRange (\r
+ (VOID *)(UINTN)PcdGet64 (PcdCPUCoresStackBase),\r
+ PcdGet32 (PcdCPUCorePrimaryStackSize)\r
+ );\r
\r
//\r
// Note: Doesn't have to Enable CPU interface in non-secure world,\r
ArmEnableVFP ();\r
}\r
\r
- //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r
+ // Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r
\r
// If not primary Jump to Secondary Main\r
if (ArmPlatformIsPrimaryCore (MpId)) {\r
EFI_STATUS\r
EFIAPI\r
PrePeiCoreTemporaryRamSupport (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
- IN UINTN CopySize\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
+ IN UINTN CopySize\r
)\r
{\r
- VOID *OldHeap;\r
- VOID *NewHeap;\r
- VOID *OldStack;\r
- VOID *NewStack;\r
- UINTN HeapSize;\r
+ VOID *OldHeap;\r
+ VOID *NewHeap;\r
+ VOID *OldStack;\r
+ VOID *NewStack;\r
+ UINTN HeapSize;\r
\r
HeapSize = ALIGN_VALUE (CopySize / 2, CPU_STACK_ALIGNMENT);\r
\r
- OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;\r
- NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize - HeapSize));\r
+ OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;\r
+ NewHeap = (VOID *)((UINTN)PermanentMemoryBase + (CopySize - HeapSize));\r
\r
- OldStack = (VOID*)((UINTN)TemporaryMemoryBase + HeapSize);\r
- NewStack = (VOID*)(UINTN)PermanentMemoryBase;\r
+ OldStack = (VOID *)((UINTN)TemporaryMemoryBase + HeapSize);\r
+ NewStack = (VOID *)(UINTN)PermanentMemoryBase;\r
\r
//\r
// Migrate the temporary memory stack to permanent memory stack.\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
+\r
#ifndef __PREPEICORE_H_\r
#define __PREPEICORE_H_\r
\r
EFI_STATUS\r
EFIAPI\r
PrePeiCoreTemporaryRamSupport (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
- IN UINTN CopySize\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
+ IN UINTN CopySize\r
);\r
\r
VOID\r
SecSwitchStack (\r
- INTN StackDelta\r
+ INTN StackDelta\r
);\r
\r
// Vector Table for Pei Phase\r
-VOID PeiVectorTable (VOID);\r
+VOID\r
+PeiVectorTable (\r
+ VOID\r
+ );\r
\r
VOID\r
EFIAPI\r
VOID\r
EFIAPI\r
SecondaryMain (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
);\r
\r
VOID\r
PeiCommonExceptionEntry (\r
- IN UINT32 Entry,\r
- IN UINTN LR\r
+ IN UINT32 Entry,\r
+ IN UINTN LR\r
);\r
\r
#endif\r
ArmEnableVFP ();\r
}\r
}\r
-\r
\r
VOID\r
PrimaryMain (\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase,\r
- IN UINT64 StartTimeStamp\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase,\r
+ IN UINT64 StartTimeStamp\r
)\r
{\r
// Enable the GIC Distributor\r
- ArmGicEnableDistributor(PcdGet64(PcdGicDistributorBase));\r
+ ArmGicEnableDistributor (PcdGet64 (PcdGicDistributorBase));\r
\r
// In some cases, the secondary cores are waiting for an SGI from the next stage boot loader to resume their initialization\r
- if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {\r
+ if (!FixedPcdGet32 (PcdSendSgiToBringUpSecondaryCores)) {\r
// Sending SGI to all the Secondary CPU interfaces\r
- ArmGicSendSgiTo (PcdGet64(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
+ ArmGicSendSgiTo (PcdGet64 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));\r
}\r
\r
PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
\r
// We must never return\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
\r
VOID\r
SecondaryMain (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
)\r
{\r
- EFI_STATUS Status;\r
- ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;\r
- UINTN Index;\r
- UINTN ArmCoreCount;\r
- ARM_CORE_INFO *ArmCoreInfoTable;\r
- UINT32 ClusterId;\r
- UINT32 CoreId;\r
- VOID (*SecondaryStart)(VOID);\r
- UINTN SecondaryEntryAddr;\r
- UINTN AcknowledgeInterrupt;\r
- UINTN InterruptId;\r
-\r
- ClusterId = GET_CLUSTER_ID(MpId);\r
- CoreId = GET_CORE_ID(MpId);\r
+ EFI_STATUS Status;\r
+ ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;\r
+ UINTN Index;\r
+ UINTN ArmCoreCount;\r
+ ARM_CORE_INFO *ArmCoreInfoTable;\r
+ UINT32 ClusterId;\r
+ UINT32 CoreId;\r
+\r
+ VOID (*SecondaryStart)(\r
+ VOID\r
+ );\r
+ UINTN SecondaryEntryAddr;\r
+ UINTN AcknowledgeInterrupt;\r
+ UINTN InterruptId;\r
+\r
+ ClusterId = GET_CLUSTER_ID (MpId);\r
+ CoreId = GET_CORE_ID (MpId);\r
\r
// On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
- Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
+ Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID **)&ArmMpCoreInfoPpi);\r
ASSERT_EFI_ERROR (Status);\r
\r
ArmCoreCount = 0;\r
- Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
+ Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
ASSERT_EFI_ERROR (Status);\r
\r
// Find the core in the ArmCoreTable\r
} while (SecondaryEntryAddr == 0);\r
\r
// Jump to secondary core entry point.\r
- SecondaryStart = (VOID (*)())SecondaryEntryAddr;\r
- SecondaryStart();\r
+ SecondaryStart = (VOID (*)()) SecondaryEntryAddr;\r
+ SecondaryStart ();\r
\r
// The secondaries shouldn't reach here\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
\r
VOID\r
PrimaryMain (\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase,\r
- IN UINT64 StartTimeStamp\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase,\r
+ IN UINT64 StartTimeStamp\r
)\r
{\r
PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
\r
// We must never return\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
\r
VOID\r
SecondaryMain (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
)\r
{\r
// We must never get into this function on UniCore system\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
-\r
\r
#include "PrePi.h"\r
\r
-#define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) || \\r
+#define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) ||\\r
((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= FixedPcdGet64 (PcdSystemMemoryBase)))\r
\r
-UINT64 mSystemMemoryEnd = FixedPcdGet64(PcdSystemMemoryBase) +\r
- FixedPcdGet64(PcdSystemMemorySize) - 1;\r
+UINT64 mSystemMemoryEnd = FixedPcdGet64 (PcdSystemMemoryBase) +\r
+ FixedPcdGet64 (PcdSystemMemorySize) - 1;\r
\r
EFI_STATUS\r
GetPlatformPpi (\r
\r
PpiListSize = 0;\r
ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
- PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
+ PpiListCount = PpiListSize / sizeof (EFI_PEI_PPI_DESCRIPTOR);\r
for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r
*Ppi = PpiList->Ppi;\r
\r
VOID\r
PrePiMain (\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase,\r
- IN UINT64 StartTimeStamp\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase,\r
+ IN UINT64 StartTimeStamp\r
)\r
{\r
- EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r
- ARM_MP_CORE_INFO_PPI* ArmMpCoreInfoPpi;\r
- UINTN ArmCoreCount;\r
- ARM_CORE_INFO* ArmCoreInfoTable;\r
- EFI_STATUS Status;\r
- CHAR8 Buffer[100];\r
- UINTN CharCount;\r
- UINTN StacksSize;\r
- FIRMWARE_SEC_PERFORMANCE Performance;\r
+ EFI_HOB_HANDOFF_INFO_TABLE *HobList;\r
+ ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;\r
+ UINTN ArmCoreCount;\r
+ ARM_CORE_INFO *ArmCoreInfoTable;\r
+ EFI_STATUS Status;\r
+ CHAR8 Buffer[100];\r
+ UINTN CharCount;\r
+ UINTN StacksSize;\r
+ FIRMWARE_SEC_PERFORMANCE Performance;\r
\r
// If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r
- ASSERT (IS_XIP() ||\r
- ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&\r
- ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd)));\r
+ ASSERT (\r
+ IS_XIP () ||\r
+ ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&\r
+ ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd))\r
+ );\r
\r
// Initialize the architecture specific bits\r
ArchInitialize ();\r
\r
// Initialize the Serial Port\r
SerialPortInitialize ();\r
- CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r
- (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r
- SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
+ CharCount = AsciiSPrint (\r
+ Buffer,\r
+ sizeof (Buffer),\r
+ "UEFI firmware (version %s built at %a on %a)\n\r",\r
+ (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString),\r
+ __TIME__,\r
+ __DATE__\r
+ );\r
+ SerialPortWrite ((UINT8 *)Buffer, CharCount);\r
\r
// Initialize the Debug Agent for Source Level Debugging\r
InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
\r
// Declare the PI/UEFI memory region\r
HobList = HobConstructor (\r
- (VOID*)UefiMemoryBase,\r
- FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
- (VOID*)UefiMemoryBase,\r
- (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
- );\r
+ (VOID *)UefiMemoryBase,\r
+ FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
+ (VOID *)UefiMemoryBase,\r
+ (VOID *)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
+ );\r
PrePeiSetHobList (HobList);\r
\r
// Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
} else {\r
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
}\r
+\r
BuildStackHob (StacksBase, StacksSize);\r
\r
- //TODO: Call CpuPei as a library\r
+ // TODO: Call CpuPei as a library\r
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));\r
\r
if (ArmIsMpCore ()) {\r
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid\r
- Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
+ Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID **)&ArmMpCoreInfoPpi);\r
\r
// On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
ASSERT_EFI_ERROR (Status);\r
\r
// Build the MP Core Info Table\r
ArmCoreCount = 0;\r
- Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
- if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {\r
+ Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
+ if (!EFI_ERROR (Status) && (ArmCoreCount > 0)) {\r
// Build MPCore Info HOB\r
BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);\r
}\r
\r
VOID\r
CEntryPoint (\r
- IN UINTN MpId,\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase\r
+ IN UINTN MpId,\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase\r
)\r
{\r
- UINT64 StartTimeStamp;\r
+ UINT64 StartTimeStamp;\r
\r
// Initialize the platform specific controllers\r
ArmPlatformInitialize (MpId);\r
ArmEnableInstructionCache ();\r
\r
// Define the Global Variable region when we are not running in XIP\r
- if (!IS_XIP()) {\r
+ if (!IS_XIP ()) {\r
if (ArmPlatformIsPrimaryCore (MpId)) {\r
- if (ArmIsMpCore()) {\r
+ if (ArmIsMpCore ()) {\r
// Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)\r
ArmCallSEV ();\r
}\r
\r
// If not primary Jump to Secondary Main\r
if (ArmPlatformIsPrimaryCore (MpId)) {\r
-\r
- InvalidateDataCacheRange ((VOID *)UefiMemoryBase,\r
- FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
+ InvalidateDataCacheRange (\r
+ (VOID *)UefiMemoryBase,\r
+ FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)\r
+ );\r
\r
// Goto primary Main.\r
PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
#include <Library/SerialPortLib.h>\r
#include <Library/ArmPlatformLib.h>\r
\r
-extern UINT64 mSystemMemoryEnd;\r
+extern UINT64 mSystemMemoryEnd;\r
\r
RETURN_STATUS\r
EFIAPI\r
\r
VOID\r
PrePiMain (\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase,\r
- IN UINT64 StartTimeStamp\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase,\r
+ IN UINT64 StartTimeStamp\r
);\r
\r
EFI_STATUS\r
EFIAPI\r
MemoryPeim (\r
- IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
- IN UINT64 UefiMemorySize\r
+ IN EFI_PHYSICAL_ADDRESS UefiMemoryBase,\r
+ IN UINT64 UefiMemorySize\r
);\r
\r
EFI_STATUS\r
\r
VOID\r
PrimaryMain (\r
- IN UINTN UefiMemoryBase,\r
- IN UINTN StacksBase,\r
- IN UINT64 StartTimeStamp\r
+ IN UINTN UefiMemoryBase,\r
+ IN UINTN StacksBase,\r
+ IN UINT64 StartTimeStamp\r
);\r
\r
VOID\r
SecondaryMain (\r
- IN UINTN MpId\r
+ IN UINTN MpId\r
);\r
\r
// Either implemented by PrePiLib or by MemoryInitPei\r
projects / mirror_edk2.git / commitdiff