]> git.proxmox.com Git - mirror_edk2.git/log
mirror_edk2.git
8 years agoShellPkg: pci -i -_e to print next capability
Abdul Lateef Attar [Sat, 10 Sep 2016 06:31:35 +0000 (23:31 -0700)]
ShellPkg: pci -i -_e to print next capability

According to PCI spec the next AER capability is relative to
the beginning of PCI configuration space. Hence substract the
base offset to get the next capability.

"-_e" option is changed from TypeFlag to TypeValue, so that
user can specify individual AER capability to print.
e.g. pci 00 00 01 -i -_e <capability-id>

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Abdul Lateef Attar <abdul-lateef.attar@hpe.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
8 years agoArmPkg/ArmBaseLib: clean up directory structure
Ard Biesheuvel [Mon, 5 Sep 2016 14:12:01 +0000 (15:12 +0100)]
ArmPkg/ArmBaseLib: clean up directory structure

For historical reasons, the files under ArmLib are split up into 'common'
files under Common/, containing common C files as well as AArch64 and Arm
specific asm files, and ArmV7 and AArch64 files under ArmV7/ and AArch64/,
respectively. This presumably dates back to the time when ArmLib supported
different revisions of the 32-bit architecture (i.e., pre-V7)

Since the PI spec requires V7 or later, we can simplify this to Arm/ and
AArch64, which aligns ArmLib with the majority of other modules that carry
ARM or AArch64 specific code.

So move the files around so that shared files live at the same level as
ArmBaseLib.inf, and ARM/AArch64 specific files live in Arm/ or AArch64/,
respectively.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmPkg/ArmBaseLib: remove MemoryAllocationLib.h includes
Ard Biesheuvel [Mon, 5 Sep 2016 14:03:20 +0000 (15:03 +0100)]
ArmPkg/ArmBaseLib: remove MemoryAllocationLib.h includes

The ArmBaseLib timer code does not depend on MemoryAllocationLib at
all, so remove the #includes referring to it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoMaintainers.txt: Add Giri as IntelFsp2*Pkg, IntelSiliconPkg maintainer
Jiewen Yao [Wed, 7 Sep 2016 01:19:45 +0000 (09:19 +0800)]
Maintainers.txt: Add Giri as IntelFsp2*Pkg, IntelSiliconPkg maintainer

Add Giri as 2nd maintainer to IntelFsp2*Pkg and IntelSiliconPkg.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoArmPlatformPkg: remove EFI_MEMORY_UC attribute from normal memory
Ard Biesheuvel [Thu, 8 Sep 2016 08:05:45 +0000 (09:05 +0100)]
ArmPlatformPkg: remove EFI_MEMORY_UC attribute from normal memory

On ARM systems, mapping normal memory as device memory may have unintended
side effects, given that unaligned accesses or loads and stores with special
semantics (e.g., load/store exclusive) may fault or may not work as expected.
Similarly, DC ZVA instructions are only supported on normal memory, not
device memory.

So remove the EFI_MEMORY_UC attribute that we set by default on system RAM.
If any region requires this attribute, it is up to the driver to set this
attribute, and to ensure that no offending operations are performed on it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmVirtPkg: restrict mapping attributes of normal memory to EFI_MEMORY_WB
Ard Biesheuvel [Thu, 8 Sep 2016 07:40:09 +0000 (08:40 +0100)]
ArmVirtPkg: restrict mapping attributes of normal memory to EFI_MEMORY_WB

In general, on an ARM system, mapping normal memory as device memory may
have unintended side effects, given that unaligned accesses or loads and
stores with special semantics (e.g., load/store exclusive) may fault or
may not work as expected.

Under KVM, the situation is even worse, since the host may not expect the
guest to perform uncached accesses, and so writes to such an uncached
region may get lost completely.

Since the only safe mapping type under KVM is EFI_MEMORY_WB, remove all
other memory type attributes.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
8 years agoArmPkg/ArmLib: remove all ArmLib flavors except ArmBaseLib
Ard Biesheuvel [Mon, 5 Sep 2016 10:53:57 +0000 (11:53 +0100)]
ArmPkg/ArmLib: remove all ArmLib flavors except ArmBaseLib

This removes the following ArmLib implementation, which were, apart from
the fact that they targeted either ARM or AARCH64, fully identical:

  ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
  ArmPkg/Library/ArmLib/AArch64/AArch64LibPei.inf
  ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
  ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
  ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
  ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
  ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf

Only ArmBaseLib remains, which can fulfil the dependencies upon each of
the listed flavors.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmVirtPkg: replace all ArmLib resolutions with ArmBaseLib
Ard Biesheuvel [Mon, 5 Sep 2016 10:48:17 +0000 (11:48 +0100)]
ArmVirtPkg: replace all ArmLib resolutions with ArmBaseLib

The various ArmLib flavors are identical in practice, and a new
ArmBaseLib has been introduced that can replace all of them. So replace
all occurrences with ArmBaseLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
8 years agoBeagleBoardPkg EmbeddedPkg Omap35xxPkg: move to ArmBaseLib
Ard Biesheuvel [Mon, 5 Sep 2016 10:49:37 +0000 (11:49 +0100)]
BeagleBoardPkg EmbeddedPkg Omap35xxPkg: move to ArmBaseLib

The various ArmLib flavors are identical in practice, and a new
ArmBaseLib has been introduced that can replace all of them. So replace
all occurrences with ArmBaseLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmPkg/ArmLib: introduce ArmBaseLib
Ard Biesheuvel [Mon, 5 Sep 2016 10:25:18 +0000 (11:25 +0100)]
ArmPkg/ArmLib: introduce ArmBaseLib

Introduce a new ArmLib version ArmBaseLib, which encapsulates the ARM
version ArmV7Lib and the AArch64 version AArch64Lib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmPkg/ArmLib: remove NullArmLib
Ard Biesheuvel [Mon, 5 Sep 2016 10:13:19 +0000 (11:13 +0100)]
ArmPkg/ArmLib: remove NullArmLib

Remove the NULL instance of ArmLib: it is not currently used, and its
usefulness its dubious.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-up
Dennis Chen [Mon, 5 Sep 2016 11:38:20 +0000 (19:38 +0800)]
ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-up

According to the ACPI 6.0/6.1 spec, the physical base address of GICC,
GICD, GICR and GIC ITS is 64-bit. So change the type of the various GIC
base address PCDs to 64-bit, and fix up all users.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
8 years agoOvmfPkg/QemuBootOrderLib: drop too strict "/HD(" suffix from vblk prefix
Laszlo Ersek [Wed, 7 Sep 2016 10:47:19 +0000 (12:47 +0200)]
OvmfPkg/QemuBootOrderLib: drop too strict "/HD(" suffix from vblk prefix

Translating QEMU's virtio-block OpenFirmware device path to a UEFI device
path prefix was one of the earliest case handled in QemuBootOrderLib. At
that time, I terminated the translation output (the UEFI devpath prefix)
with a "/HD(" suffix.

The intent was for the translation to prefix-match only boot options with
HD() device path nodes in them, that is, no auto-generated "device level"
boot options. This was motivated by prioritizing specific boot options
created by OS installers over auto-generated "device level" options.

However, practice has shown that:

- OS installers place their installed boot options first in the boot order
  anyway,

- other device types (SATA disks, virtio-scsi disks), where "/HD(" is not
  appended, work just fine,

- requiring "/HD(" actually causes problems: after the OS-installed
  specific boot option has been lost (or purposely removed), the
  auto-generated "device level" boot option does the right thing (see the
  Default Boot Behavior under
  <http://blog.uncooperative.org/blog/2014/02/06/the-efi-system-partition/>).
  The "/HD(" requirement causes such boot options to be dropped, which
  prevents "fallback.efi" from running.

Relax the matching by removing the "/HD(" suffix from the translated
prefix.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Fixes: e06a4cd134064590aa1a855ff4b973023279e805
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1373812
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
8 years agoBaseTools VfrCompile Pccts: Update GCC Flags to the specific one with BUILD_ prefix
Liming Gao [Thu, 1 Sep 2016 07:59:57 +0000 (15:59 +0800)]
BaseTools VfrCompile Pccts: Update GCC Flags to the specific one with BUILD_ prefix

This change is also applied to VfrCompile Pccts antlr and dlg tool.

In V2, add the missing C rules.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
8 years agoBaseTools VfrCompile GNU makefile: Replace CXX with BUILD_CXX
Liming Gao [Thu, 1 Sep 2016 07:47:04 +0000 (15:47 +0800)]
BaseTools VfrCompile GNU makefile: Replace CXX with BUILD_CXX

The change is missing in VfrComile GNUmakefile.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
8 years agoBaseTools GNU makefile: remove unused .S rule
Liming Gao [Wed, 31 Aug 2016 04:46:17 +0000 (12:46 +0800)]
BaseTools GNU makefile: remove unused .S rule

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
8 years agoBaseTools GNU makefile: Add BUILD_CXXFLAGS to align make built-in rule
Liming Gao [Wed, 31 Aug 2016 04:44:50 +0000 (12:44 +0800)]
BaseTools GNU makefile: Add BUILD_CXXFLAGS to align make built-in rule

GNU make built-in rule to Compiling C++ programs with
ā€˜$(CXX) $(CPPFLAGS) $(CXXFLAGS) -cā€™.
To align to it, add empty BUILD_CXXFLAGS in cpp rule.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
8 years agoUefiCpuPkg/XeonPhiMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:52:00 +0000 (18:52 +0800)]
UefiCpuPkg/XeonPhiMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/XeonE7Msr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:51:46 +0000 (18:51 +0800)]
UefiCpuPkg/XeonE7Msr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/XeonDMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:51:32 +0000 (18:51 +0800)]
UefiCpuPkg/XeonDMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/Xeon5600Msr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:51:19 +0000 (18:51 +0800)]
UefiCpuPkg/Xeon5600Msr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/SkylakeMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:51:04 +0000 (18:51 +0800)]
UefiCpuPkg/SkylakeMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/SilvermontMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:50:51 +0000 (18:50 +0800)]
UefiCpuPkg/SilvermontMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/SandyBridgeMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:50:30 +0000 (18:50 +0800)]
UefiCpuPkg/SandyBridgeMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/PentiumMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:50:14 +0000 (18:50 +0800)]
UefiCpuPkg/PentiumMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/PentiumMMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:49:59 +0000 (18:49 +0800)]
UefiCpuPkg/PentiumMMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/Pentium4Msr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:49:45 +0000 (18:49 +0800)]
UefiCpuPkg/Pentium4Msr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/P6Msr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:49:27 +0000 (18:49 +0800)]
UefiCpuPkg/P6Msr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/NehalemMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:49:12 +0000 (18:49 +0800)]
UefiCpuPkg/NehalemMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/IvyBridgeMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:48:58 +0000 (18:48 +0800)]
UefiCpuPkg/IvyBridgeMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/HaswellMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:48:39 +0000 (18:48 +0800)]
UefiCpuPkg/HaswellMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/HaswellEMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:48:24 +0000 (18:48 +0800)]
UefiCpuPkg/HaswellEMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/CoreMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:48:08 +0000 (18:48 +0800)]
UefiCpuPkg/CoreMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/Core2Msr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:47:50 +0000 (18:47 +0800)]
UefiCpuPkg/Core2Msr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/BroadwellMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:47:34 +0000 (18:47 +0800)]
UefiCpuPkg/BroadwellMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/AtomMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 10:47:14 +0000 (18:47 +0800)]
UefiCpuPkg/AtomMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoUefiCpuPkg/ArchitecturalMsr.h: add MSR reference from SDM in comment
Jeff Fan [Tue, 6 Sep 2016 08:59:56 +0000 (16:59 +0800)]
UefiCpuPkg/ArchitecturalMsr.h: add MSR reference from SDM in comment

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
8 years agoArmPkg/DefaultExceptionHandlerLib AARCH64: add minimal backtrace to crash dump
Ard Biesheuvel [Wed, 7 Sep 2016 08:12:29 +0000 (09:12 +0100)]
ArmPkg/DefaultExceptionHandlerLib AARCH64: add minimal backtrace to crash dump

When dumping the CPU state after an unhandled fault, walk the stack
frames and decode the return addresses so we can show a minimal
backtrace. Unfortunately, we do not have sufficient information to
show the function names, but at least we can see the modules and the
return addresses inside the modules.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoBaseTools/tools_def AARCH64: enable frame pointers for DEBUG builds
Ard Biesheuvel [Wed, 7 Sep 2016 08:19:37 +0000 (09:19 +0100)]
BaseTools/tools_def AARCH64: enable frame pointers for DEBUG builds

Enable frame pointers on DEBUG builds so we can support backtraces in
crash dumps.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmPlatformPkg/PrePi: fix secondary stack base
Michael Zimmermann [Wed, 7 Sep 2016 12:16:18 +0000 (13:16 +0100)]
ArmPlatformPkg/PrePi: fix secondary stack base

this bug was introduced by:
d2fa09a ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
8 years agoVlv2TbltDevicePkg/dec: Correct wrong default value.
Jiewen Yao [Tue, 6 Sep 2016 08:21:15 +0000 (16:21 +0800)]
Vlv2TbltDevicePkg/dec: Correct wrong default value.

The default PcdPeiIchEhciControllerMemoryBaseAddress value 0xFD000000
conflict with the default TXE SECUMA MMIO address.
So we update to 0xFC000000 to avoid conflict.

Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
8 years agoVlv2TbltDevicePkg/PlatformInitPei: Support USB init
Jiewen Yao [Tue, 6 Sep 2016 08:24:31 +0000 (16:24 +0800)]
Vlv2TbltDevicePkg/PlatformInitPei: Support USB init

In order to support recovery in PEI phase, a platform need initialize
USB controller. This logic is missing in current PchInitPeim.

We removed MultiPlatformInfoInit() because it is already done in
PlatformEarlyInitEntry().

We also initialize XhciMemBaseAddr to 0, or it is garbage value.

Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
8 years agoNetworkPkg/DnsDxe: Handle CNAME type responded from the name server
Jiaxin Wu [Tue, 6 Sep 2016 03:23:38 +0000 (11:23 +0800)]
NetworkPkg/DnsDxe: Handle CNAME type responded from the name server

v2:
* Code refine.
* For DnsCache, the minimum value of TTL is selected between CNAME and A/AAAA record.

According RFC 1034 - 3.6.2, if the query name is an alias, the name server
will include the CNAME record in the response and restart the query at the
domain name specified in the data field of the CNAME record. RFC also provides
one example server action when A query received:

Suppose a name server was processing a query with for USCISIC.ARPA, asking for
type A information, and had the following resource records:
USC-ISIC.ARPA IN CNAME C.ISI.EDU
C.ISI.EDU     IN A     10.0.0.52
Both of these RRs would be returned in the response to the type A query.

Currently, DnsDxe driver doesn't handle the CNAME type response, which will cause
any exception result. The driver need continue the packet parsing while CNAME type
record parsed. So, this patch is used to handle it correctly.

Cc: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Tested-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com>
8 years agoArmPkg/CompilerIntrinsicsLib: use Clang-compatible 'weak' attribute
Ard Biesheuvel [Tue, 6 Sep 2016 14:25:03 +0000 (15:25 +0100)]
ArmPkg/CompilerIntrinsicsLib: use Clang-compatible 'weak' attribute

Clang does not like separate definitions for the __alias__ and the
__weak__ attributes, so merge the definitions into one.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmVirtPkg/FdtPciHostBridgeLib: enable 64-bit PCI DMA
Ard Biesheuvel [Mon, 5 Sep 2016 09:00:37 +0000 (10:00 +0100)]
ArmVirtPkg/FdtPciHostBridgeLib: enable 64-bit PCI DMA

Now that the PCI root bridge driver and various host controller drivers
have been fixed, remove the 4 GB limit on PCI DMA allocation for QEMU's
ECAM PCI host bridge.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
8 years agoMdeModulePkg/PciHostBridgeDxe: restrict 64-bit DMA to devices that support it
Ard Biesheuvel [Mon, 5 Sep 2016 08:55:16 +0000 (09:55 +0100)]
MdeModulePkg/PciHostBridgeDxe: restrict 64-bit DMA to devices that support it

Currently, the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute is completely
ignored by the PCI host bridge driver, which means that, on an implementation
that supports DMA above 4 GB, allocations above 4 GB may be provided to
devices that have not expressed support for it.

So in addition to checking 'RootBridge->DmaAbove4G' to establish whether the
root bridge itself supports DMA above 4 GB, we must also take into account
the operation type (EfiPciOperationBusMaster{Read|Write|CommonBuffer}64),
and the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute, when mapping and
allocating DMA memory, respectively.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
8 years agoMdeModulePkg/XhciDxe: enable 64-bit PCI DMA
Ard Biesheuvel [Mon, 5 Sep 2016 08:52:10 +0000 (09:52 +0100)]
MdeModulePkg/XhciDxe: enable 64-bit PCI DMA

PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
8 years agoMdeModulePkg/SdMmcPciHcDxe: enable 64-bit PCI DMA
Ard Biesheuvel [Mon, 5 Sep 2016 08:51:48 +0000 (09:51 +0100)]
MdeModulePkg/SdMmcPciHcDxe: enable 64-bit PCI DMA

PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
8 years agoMdeModulePkg/NvmExpressDxe: enable 64-bit PCI DMA
Ard Biesheuvel [Mon, 5 Sep 2016 08:51:32 +0000 (09:51 +0100)]
MdeModulePkg/NvmExpressDxe: enable 64-bit PCI DMA

PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
8 years agoMdeModulePkg/EhciDxe: enable 64-bit PCI DMA
Ard Biesheuvel [Mon, 5 Sep 2016 08:51:16 +0000 (09:51 +0100)]
MdeModulePkg/EhciDxe: enable 64-bit PCI DMA

PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
8 years agoMdeModulePkg/AtaAtapiPassThru: enable 64-bit PCI DMA
Ard Biesheuvel [Mon, 5 Sep 2016 08:49:44 +0000 (09:49 +0100)]
MdeModulePkg/AtaAtapiPassThru: enable 64-bit PCI DMA

PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
8 years agoNetworkPkg/IpSecDxe: Generate SPI randomly and correct IKE_SPI_BASE value
Jiaxin Wu [Wed, 20 Jul 2016 02:53:31 +0000 (10:53 +0800)]
NetworkPkg/IpSecDxe: Generate SPI randomly and correct IKE_SPI_BASE value

This path made the following update:
* Generate SPI randomly.
* Correct IKE_SPI_BASE value according RFC 4302/4303.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
8 years agoMdeModulePkg: Support classless IP for DHCPv4 TransmitReceive()
Jiaxin Wu [Thu, 18 Aug 2016 05:31:07 +0000 (13:31 +0800)]
MdeModulePkg: Support classless IP for DHCPv4 TransmitReceive()

The IP address should not be treated as classful one if DHCP options
contain a classless IP with its true subnet mask. Otherwise, DHCPv4
TransmitReceive() will failed. This real subnet mask will be parsed
and recorded in DhcpSb->Netmask. So, we need check it before get the
IP's corresponding subnet mask.

Cc: Santhapur Naveen <naveens@amiindia.co.in>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Set the non-blocking I/O feature support bit
Hao Wu [Tue, 30 Aug 2016 11:57:44 +0000 (19:57 +0800)]
MdeModulePkg NvmExpressDxe: Set the non-blocking I/O feature support bit

Since current codes in NvmExpressDxe already support the non-blocking I/O
feature for EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL interface, the relative bit
in the 'Attributes' field of EFI_NVM_EXPRESS_PASS_THRU_MODE should be set
to reflect this.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Fix 'Event' won't be signaled for Admin cmds
Hao Wu [Thu, 1 Sep 2016 02:17:43 +0000 (10:17 +0800)]
MdeModulePkg NvmExpressDxe: Fix 'Event' won't be signaled for Admin cmds

This commit fixes the issue that the caller event passed to
EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.PassThru() will not be signaled for
NVME Admin commands.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Add NamespaceId validity check in PassThru
Hao Wu [Tue, 30 Aug 2016 08:34:09 +0000 (16:34 +0800)]
MdeModulePkg NvmExpressDxe: Add NamespaceId validity check in PassThru

According to the UEFI spec, EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.PassThru()
should return EFI_INVALID_PARAMETER if the input 'NamespaceId' is invalid
for the NVM Express controller. This commit adds check in PassThru() to
follow this rule.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Add check for command packet in PassThru
Hao Wu [Mon, 29 Aug 2016 02:12:42 +0000 (10:12 +0800)]
MdeModulePkg NvmExpressDxe: Add check for command packet in PassThru

This commit adds serveral checks for the 'Packet' parameter passed to the
EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.PassThru() API:

The check for the 'TransferLength' field in
EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET to make sure the value will not
exceed the maximum data transfer size allowed by a controller.

The check for the 'TransferBuffer' and 'TransferLength' fields in
EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET when the Opcode of an NVME
command indicates a data transfer between controller and host.

The check for the 'MetadataLength' field in
EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET to make sure the value is not 0
when the corresponding 'MetadataBuffer' field has a non-NULL value.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Add check on the attributes of NVME controller
Hao Wu [Mon, 22 Aug 2016 06:11:23 +0000 (14:11 +0800)]
MdeModulePkg NvmExpressDxe: Add check on the attributes of NVME controller

According to UEFI spec, an EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL with neither
EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL nor
EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL set in the Attributes field
is an illegal configuration.

This commit adds this check in the PassThru API to follow the spec.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Add buffer alignment check in PassThru API
Hao Wu [Mon, 22 Aug 2016 05:55:52 +0000 (13:55 +0800)]
MdeModulePkg NvmExpressDxe: Add buffer alignment check in PassThru API

According to the UEFI spec, the 'TransferBuffer' and 'MetadataBuffer' used
in a data transfer should be aligned on the boundary specified by the
IoAlign field in the EFI_NVM_EXPRESS_PASS_THRU_MODE structure.

This commit adds this check to follow the spec.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Refine GetNextNamespace API to follow spec
Hao Wu [Mon, 29 Aug 2016 01:01:26 +0000 (09:01 +0800)]
MdeModulePkg NvmExpressDxe: Refine GetNextNamespace API to follow spec

According to the UEFI spec,
EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNextNamespace() should return
EFI_NOT_FOUND when the value pointed to by NamespaceId is the namespace ID
of the last namespace on the NVM Express controller. This commit modifies
the check for NamespaceId to follow this rule.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Refine GetNameSpace API to follow spec
Hao Wu [Fri, 19 Aug 2016 03:18:42 +0000 (11:18 +0800)]
MdeModulePkg NvmExpressDxe: Refine GetNameSpace API to follow spec

According to the UEFI spec,
EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNamespace() should return
EFI_NOT_FOUND when the input DevicePath is a device path node type that
the NVM Express Pass Thru driver supports, but there is not a valid
translation from DevicePath to a namespace ID. Current code will return
EFI_SUCCESS. This commit adds additional check in the GetNameSpace API to
make sure correct status is returned.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Refine BuildDevicePath API to follow spec
Hao Wu [Fri, 19 Aug 2016 03:08:04 +0000 (11:08 +0800)]
MdeModulePkg NvmExpressDxe: Refine BuildDevicePath API to follow spec

According to the UEFI spec,
EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath() should return
EFI_NOT_FOUND when the input NamespaceId is not valid. However, current
code returns EFI_DEVICE_ERROR instead. This commit modifies the check for
input NamespaceId to return the correct status.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg NvmExpressDxe: Avoid crashing 'Mode' during OpenProtocol
Hao Wu [Fri, 26 Aug 2016 06:39:37 +0000 (14:39 +0800)]
MdeModulePkg NvmExpressDxe: Avoid crashing 'Mode' during OpenProtocol

The gBS->OpenProtocol() calls to open EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL
in NvmExpress.c will crash the data in 'Mode' field of
'Private->Passthru'.

The third parameter of gBS->OpenProtocol() is an output parameter that
stores the address where a pointer to the corresponding Protocol
Interface. The current code mistakenly pass '&Private->Passthru' (a
pointer of the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL) as the third
parameter. This will crash the data in 'Mode' filed.

Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoArmPkg/CompilerIntrinsicsLib ARM: make memset() weak again
Ard Biesheuvel [Mon, 5 Sep 2016 12:33:37 +0000 (13:33 +0100)]
ArmPkg/CompilerIntrinsicsLib ARM: make memset() weak again

After the recent update of CompilerIntrinsicsLib, our memset() is no
longer emitted as a weak symbol. On ARM, this may cause problems when
combining this library with another library that supplies memset() [e.g.,
CryptoPkg/IntrinsicLib], due to the fact that the object also supplies
the __aeabi_memXXX entry points, which can only be satisfied by this
object. So make our memset() weak again, to let the other implementation
take precedence.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmVirtPkg/FdtPciPcdProducerLib: zero init local var to please GCC 4.8
Ard Biesheuvel [Mon, 5 Sep 2016 07:52:11 +0000 (08:52 +0100)]
ArmVirtPkg/FdtPciPcdProducerLib: zero init local var to please GCC 4.8

GCC 4.8 in RELEASE mode complains about GetPciIoTranslation () potentially
not assigning IoTranslation, but does not notice that it returns failure in
this case, which means IoTranslation is never referenced *unless* it has
been assigned. So simply set IoTranslation to zero to help the compiler.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
8 years agoMdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment
Star Zeng [Mon, 8 Aug 2016 10:20:58 +0000 (18:20 +0800)]
MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment

Support multiple PCI segment for PCI_CONFIG2 opcodes.

PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib
instead of PciLib. That means platforms need to add PciSegmentLib
declaration like below in platform dsc if the PciSegmentLib was
not declared in platform dsc before.

PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf

For platforms only have one segment,
MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended
to be used and declared in platform dsc for PiDxeS3BootScriptLib to have
equivalent functionality with before.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
8 years agoMdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces
Star Zeng [Wed, 17 Aug 2016 08:51:55 +0000 (16:51 +0800)]
MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
8 years agoSecurityPkg/SecurityPkg.dsc: Declare PciSegmentLib
Star Zeng [Fri, 19 Aug 2016 07:30:36 +0000 (15:30 +0800)]
SecurityPkg/SecurityPkg.dsc: Declare PciSegmentLib

PiDxeS3BootScriptLib will be updated to consume PciSegmentLib
instead of PciLib to support multiple PCI segment.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
8 years agoQuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib
Star Zeng [Fri, 19 Aug 2016 07:06:58 +0000 (15:06 +0800)]
QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib

PiDxeS3BootScriptLib will be updated to consume PciSegmentLib
instead of PciLib to support multiple PCI segment.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
8 years agoQuarkPlatformPkg: Declare PciSegmentLib in platform dsc
Star Zeng [Fri, 19 Aug 2016 07:05:48 +0000 (15:05 +0800)]
QuarkPlatformPkg: Declare PciSegmentLib in platform dsc

PiDxeS3BootScriptLib will be updated to consume PciSegmentLib
instead of PciLib to support multiple PCI segment.
That means platforms need to add PciSegmentLib
declaration in platform dsc if the PciSegmentLib was
not declared in platform dsc before.

For platforms only have one segment,
MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended
to be used and declared in platform dsc for PiDxeS3BootScriptLib to have
equivalent functionality with before.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
8 years agoVlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc
Star Zeng [Fri, 19 Aug 2016 07:01:12 +0000 (15:01 +0800)]
Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc

PiDxeS3BootScriptLib will be updated to consume PciSegmentLib
instead of PciLib to support multiple PCI segment.
That means platforms need to add PciSegmentLib
declaration in platform dsc if the PciSegmentLib was
not declared in platform dsc before.

For platforms only have one segment,
MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended
to be used and declared in platform dsc for PiDxeS3BootScriptLib to have
equivalent functionality with before.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
8 years agoBaseTools: Change source files to DOS format
Yonghong Zhu [Thu, 1 Sep 2016 09:02:43 +0000 (17:02 +0800)]
BaseTools: Change source files to DOS format

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
8 years agoIntelSiliconPkg: Rename IGD structures to make it consistent
Mudusuru, Giri P [Tue, 30 Aug 2016 22:57:34 +0000 (06:57 +0800)]
IntelSiliconPkg: Rename IGD structures to make it consistent

Renamed INTEL_IGD_* to IGD_* and IGD_OPREGION_VBT to IGD_OPREGION_MBOX4
to make it consistent with file name and other mailbox naming.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
8 years agoArmVirtPkg: remove now unused PciHostBridgeDxe
Ard Biesheuvel [Wed, 31 Aug 2016 15:35:57 +0000 (16:35 +0100)]
ArmVirtPkg: remove now unused PciHostBridgeDxe

This code is now no longer used, so remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65

8 years agoArmVirtPkg/FdtPciHostBridgeLib: add MMIO64 support
Ard Biesheuvel [Sun, 21 Aug 2016 16:51:04 +0000 (18:51 +0200)]
ArmVirtPkg/FdtPciHostBridgeLib: add MMIO64 support

If the pci-host-ecam-generic DT node describes a 64-bit MMIO region,
account for it in the PCI_ROOT_BRIDGE description that we return to
the generic PciHostBridgeDxe implementation, which will be able to
allocate BARs from it without any further changes.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65

8 years agoArmVirtPkg/ArmVirtQemu: switch to generic PciHostBridgeDxe
Ard Biesheuvel [Sun, 21 Aug 2016 16:53:34 +0000 (18:53 +0200)]
ArmVirtPkg/ArmVirtQemu: switch to generic PciHostBridgeDxe

Wire up the FdtPciHostBridgeLib introduced in the previous patch
to the generic PciHostBridgeDxe implementation, and drop the special
ArmVirtPkg version. The former's dependency on gEfiCpuIo2ProtocolGuid
is satisfied by adding ArmPciCpuIo2Dxe.inf as well, and adding the PCD
gArmTokenSpaceGuid.PcdPciIoTranslation as a dynamic PCD.

In terms of functionality, no changes are intended.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65

8 years agoArmVirtPkg: implement FdtPciHostBridgeLib
Ard Biesheuvel [Sun, 21 Aug 2016 15:34:19 +0000 (17:34 +0200)]
ArmVirtPkg: implement FdtPciHostBridgeLib

Implement PciHostBridgeLib for DT platforms that expose a PCI root bridge
via a pci-host-ecam-generic DT node. The DT parsing logic is copied from
the PciHostBridgeDxe implementation in ArmVirtPkg, with the one notable
difference that we don't set some of the legacy PCI attributes for IDE
and VGA I/O ranges.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65

8 years agoArmVirtPkg/FdtPciPcdProducerLib: add handling of PcdPciIoTranslation
Ard Biesheuvel [Wed, 24 Aug 2016 17:03:00 +0000 (19:03 +0200)]
ArmVirtPkg/FdtPciPcdProducerLib: add handling of PcdPciIoTranslation

Add handling of the PcdPciIoTranslation PCD, so that modules that include
this library via NULL resolution are guaranteed that it will be set before
they reference it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65

8 years agoArmVirtPkg/PciHostBridgeDxe: don't set linux,pci-probe-only DT property
Ard Biesheuvel [Sun, 21 Aug 2016 15:33:36 +0000 (17:33 +0200)]
ArmVirtPkg/PciHostBridgeDxe: don't set linux,pci-probe-only DT property

Setting the linux,pci-probe-only was intended to align OSes booting via
DT with OSes booting via ACPI in the way they honor the PCI configuration
performed by the firmware. However, ACPI on arm64 does not currently honor
the firmware's PCI configuration, and the linux,pci-probe-only completely
prevents any PCI reconfiguration from occurring under the OS, including
what is needed to support PCI hotplug.

Since the primary use case was OS access to the GOP framebuffer (which
breaks when the framebuffer BAR is moved when the OS reconfigures the
PCI), we can undo this change now that ArmVirtQemu has moved to a GOP
implementation that does not expose a raw framebuffer in the first place.

This effectively reverts commit 8b816c624dd4 ("ArmVirtPkg/VirtFdtDxe: set
/chosen/linux,pci-probe-only to 1 in DTB")

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65

8 years agoArmPkg/BaseMemoryLibStm: implement new IsZeroBuffer() API function
Ard Biesheuvel [Wed, 31 Aug 2016 09:07:33 +0000 (10:07 +0100)]
ArmPkg/BaseMemoryLibStm: implement new IsZeroBuffer() API function

BaseMemoryLib has recently been extended with an API function
IsZeroBuffer(), so copy the default implementation into BaseMemoryLibStm
as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoArmPkg/BaseMemoryLibStm: implement new IsZeroGuid() API function
Ard Biesheuvel [Wed, 31 Aug 2016 09:07:32 +0000 (10:07 +0100)]
ArmPkg/BaseMemoryLibStm: implement new IsZeroGuid() API function

BaseMemoryLib has recently been extended with an API function
IsZeroGuid(), so copy the default implementation into BaseMemoryLibStm
as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
8 years agoMdeModulePkg UefiBootManagerLib: Ignore BootManagerMenu from LoadFile
Liming Gao [Thu, 1 Sep 2016 05:41:20 +0000 (13:41 +0800)]
MdeModulePkg UefiBootManagerLib: Ignore BootManagerMenu from LoadFile

BootManagerMenu boot option is handled by EfiBootManagerGetBootManagerMenu.
Don't need to handle it again when parse LoadFile protocol.

In V2, use "BootManagerMenu" instead of "BootMenuApp".

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
8 years agoMdeModulePkg UefiBootManagerLib: Rename BootMenuApp to BootManagerMenu
Liming Gao [Thu, 1 Sep 2016 05:30:13 +0000 (13:30 +0800)]
MdeModulePkg UefiBootManagerLib: Rename BootMenuApp to BootManagerMenu

Rename local function name BootMenuApp to BootManagerMenu to align to
other public function name.

In V2, use "BootManagerMenu" instead of "BootMenuApp".

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
8 years agoMdeModulePkg/EbcDxe AARCH64: simplify interpreter entry point thunks
Ard Biesheuvel [Wed, 17 Aug 2016 14:36:42 +0000 (16:36 +0200)]
MdeModulePkg/EbcDxe AARCH64: simplify interpreter entry point thunks

The prototypes of EbcInterpret() and ExecuteEbcImageEntryPoint() are
private to the AARCH64 implementation of EbcDxe, so we can shuffle
the arguments around a bit and make the assembler thunking glue a lot
simpler.

For ExecuteEbcImageEntryPoint(), this involves passing the EntryPoint
argument as the third parameter, rather than the first, which allows
us to do a tail call. For EbcInterpret(), instead of copying each
argument beyond #8 from one native stack frame to the next (before
another copy is made into the VM stack), pass a pointer to the
argument stack.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg/EbcDxe AARCH64: use tail call for EBC to native thunk
Ard Biesheuvel [Wed, 17 Aug 2016 14:29:09 +0000 (16:29 +0200)]
MdeModulePkg/EbcDxe AARCH64: use tail call for EBC to native thunk

Instead of pessimistically copying at least 64 bytes from the VM stack
to the native stack, and popping off the register arguments again
before doing the native call, try to avoid touching the stack completely
if the VM stack frame is <= 64 bytes. Also, if the stack frame does exceed
64 bytes, there is no need to copy the first 64 bytes, since we are passing
those in registers anyway.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg/EbcDxe AARCH64: use a fixed size thunk structure
Ard Biesheuvel [Wed, 17 Aug 2016 14:24:52 +0000 (16:24 +0200)]
MdeModulePkg/EbcDxe AARCH64: use a fixed size thunk structure

The thunk generation is needlessly complex, given that it attempts to
deal with variable length instructions, which don't exist on AArch64.

So replace it with a simple template coded in assembler, with a matching
struct definition in C. That way, we can create and manipulate the thunks
easily without looping over the instructions looking for 'magic' numbers.

Also, use x16 rather than x9, since it is the architectural register to
use for thunks/veneers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg/EbcDxe AARCH64: clean up comment style in ASM file
Ard Biesheuvel [Wed, 17 Aug 2016 14:08:21 +0000 (16:08 +0200)]
MdeModulePkg/EbcDxe AARCH64: clean up comment style in ASM file

Change to consistent // style comments. Also, remove bogus global
definitions for external functions, and move the real exports to
the top of the file.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Feng Tian <feng.tian@intel.com>
8 years agoMdeModulePkg SmbiosMeasurementDxe: Add NominalSpeed in Type 27 to black list
Star Zeng [Wed, 31 Aug 2016 08:28:49 +0000 (16:28 +0800)]
MdeModulePkg SmbiosMeasurementDxe: Add NominalSpeed in Type 27 to black list

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
8 years agoNt32Pkg PlatformBootManagerLib: Enable BootManagerMenuApp.
Dong, Eric [Wed, 24 Aug 2016 08:21:50 +0000 (16:21 +0800)]
Nt32Pkg PlatformBootManagerLib: Enable BootManagerMenuApp.

Enable BootManagerMenuApp application for Nt32 platform.
Also enable F7 hotkey to select this boot option.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
8 years agoMdeModulePkg/ResetSystemRuntimeDxe: Support EfiResetPlatformSpecific
Ruiyu Ni [Wed, 10 Aug 2016 05:32:58 +0000 (13:32 +0800)]
MdeModulePkg/ResetSystemRuntimeDxe: Support EfiResetPlatformSpecific

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
8 years agoPcAtChipsetPkg: Remove KbcResetDxe
Ruiyu Ni [Wed, 10 Aug 2016 05:32:05 +0000 (13:32 +0800)]
PcAtChipsetPkg: Remove KbcResetDxe

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
8 years agoOvmfPkg: Use MdeModulePkg/ResetSystemRuntimeDxe
Ruiyu Ni [Wed, 10 Aug 2016 05:31:02 +0000 (13:31 +0800)]
OvmfPkg: Use MdeModulePkg/ResetSystemRuntimeDxe

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
8 years agoVlv2TbltDevicePkg/ResetSystemLib: Implement ResetPlatformSpecific
Ruiyu Ni [Wed, 10 Aug 2016 05:29:28 +0000 (13:29 +0800)]
Vlv2TbltDevicePkg/ResetSystemLib: Implement ResetPlatformSpecific

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
8 years agoQuarkSocPkg/ResetSystemLib: Implement ResetPlatformSpecific
Ruiyu Ni [Wed, 10 Aug 2016 05:28:04 +0000 (13:28 +0800)]
QuarkSocPkg/ResetSystemLib: Implement ResetPlatformSpecific

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
8 years agoPcAtChipsetPkg/ResetSystemLib: Implement ResetPlatformSpecific
Ruiyu Ni [Wed, 10 Aug 2016 05:27:19 +0000 (13:27 +0800)]
PcAtChipsetPkg/ResetSystemLib: Implement ResetPlatformSpecific

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
8 years agoOvmfPkg/ResetSystemLib: Implement ResetPlatformSpecific
Ruiyu Ni [Wed, 10 Aug 2016 05:25:51 +0000 (13:25 +0800)]
OvmfPkg/ResetSystemLib: Implement ResetPlatformSpecific

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
8 years agoCorebootPayloadPkg/ResetSystemLib: Implement ResetPlatformSpecific
Ruiyu Ni [Wed, 10 Aug 2016 05:25:08 +0000 (13:25 +0800)]
CorebootPayloadPkg/ResetSystemLib: Implement ResetPlatformSpecific

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
8 years agoMdeModulePkg/BaseResetSystemLibNull: Implement ResetPlatformSpecific
Ruiyu Ni [Wed, 10 Aug 2016 05:23:31 +0000 (13:23 +0800)]
MdeModulePkg/BaseResetSystemLibNull: Implement ResetPlatformSpecific

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
8 years agoMdeModulePkg: Add API ResetPlatformSpecific() to ResetSystemLib.h
Ruiyu Ni [Wed, 10 Aug 2016 05:21:47 +0000 (13:21 +0800)]
MdeModulePkg: Add API ResetPlatformSpecific() to ResetSystemLib.h

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
8 years agoMdePkg/UefiSpec.h: Align function header of ResetSystem to UEFI Spec
Ruiyu Ni [Wed, 27 Jul 2016 02:22:37 +0000 (10:22 +0800)]
MdePkg/UefiSpec.h: Align function header of ResetSystem to UEFI Spec

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>