mirror_edk2.git
15 months agoIntelFsp2Pkg/GenCfgOpt.py: Support PCD input from command line
Chasel, Chiu [Mon, 8 Oct 2018 07:44:45 +0000 (15:44 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: Support PCD input from command line

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1231

Build system already support override PCD value by command
line so add this support to GenCfgOpt.py
Also update revision to 0.53

Test: Verified UPD header files generated can reflect different
      PCD values from --pcd build command input

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Zhu Yonghong <yonghong.zhu@intel.com>
15 months agoMdeModulePkg/NonDiscoverablePciDeviceDxe: expose unique B/D/F identifiers
Ard Biesheuvel [Wed, 10 Oct 2018 08:34:50 +0000 (10:34 +0200)]
MdeModulePkg/NonDiscoverablePciDeviceDxe: expose unique B/D/F identifiers

Currently, the implementation of EFI_PCI_IO_PROTOCOL::GetLocation()
in NonDiscoverablePciDeviceDxe returns the same set of dummy values
for each instance of the NON_DISCOVERABLE_DEVICE protocol that it
attaches itself to. However, this turns out to be causing problems
in cases where software (such as the ARM Compliance Test Suite [ACS])
attempts to use these values to uniquely identify controllers, since
the collisions create ambiguity in this regard.

So let's modify GetLocation() to return an arbitrary bus/device tuple
on segment 0xff instead. This is guaranteed not to clash with other
non-discoverable PCI devices, and highly unlikely to clash with real
PCIe devices.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoMdeModulePkg: Update Brotli DecompressLib to the latest v1.0.6
Liming Gao [Thu, 9 Aug 2018 07:51:58 +0000 (15:51 +0800)]
MdeModulePkg: Update Brotli DecompressLib to the latest v1.0.6

https://bugzilla.tianocore.org/show_bug.cgi?id=1201
Update Brotli to the latest version 1.0.6
https://github.com/google/brotli

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoBaseTools: Update Brotli Compress to the latest one 1.0.6
Liming Gao [Thu, 9 Aug 2018 06:55:19 +0000 (14:55 +0800)]
BaseTools: Update Brotli Compress to the latest one 1.0.6

https://bugzilla.tianocore.org/show_bug.cgi?id=1201
Update Brotli to the latest version 1.0.6
https://github.com/google/brotli
Verify VS2017, GCC5 build.
Verify Decompression boot functionality.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoMdePkg: Add PciRoot/PcieRoot text for ACPI Expanded Device Path
Dandan Bi [Fri, 5 Oct 2018 08:06:00 +0000 (16:06 +0800)]
MdePkg: Add PciRoot/PcieRoot text for ACPI Expanded Device Path

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1228

According to UEFI spec,for ACPI Expanded Device Path
when HID=PNP0A03 or CID=PNP0A03 and HID != PNP0A08,
the device path node can be displayed as: PciRoot(UID|UIDSTR)
When HID=PNP0A08 or CID=PNP0A08, the device path node can be
displayed as: PcieRoot(UID|UIDSTR). But current code miss the
code logic.

This commit is to do the enhancement.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoMdePkg: Correct condition check for AcpiExp text format
Dandan Bi [Fri, 5 Oct 2018 06:35:25 +0000 (14:35 +0800)]
MdePkg: Correct condition check for AcpiExp text format

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1226

According to UEFI Spec, for ACPI Expanded Device Path,
when HIDSTR=empty, CIDSTR=empty, UID STR!=empty,
the ACPI Expanded Device Path node can be displayed as
AcpiExp(HID,CID,UIDSTR) format.
And if UID is 0 and UIDSTR is empty, then use AcpiEx format.

This patch is to correct the condition check to follow UEFI
Spec when convert the device path node to the AcpiExp text
format.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoMdePkg: Correct the string order of ACPI Expanded Device Path
Dandan Bi [Fri, 5 Oct 2018 05:21:57 +0000 (13:21 +0800)]
MdePkg: Correct the string order of ACPI Expanded Device Path

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1227

According to UEFI Spec, ACPI Expanded Device Path can be display
AcpiEx(HID|HIDSTR,(CID|CIDSTR,UID|UIDSTR)), but current code display
UID|UIDSTR before CID|CIDSTR.
This patch is to fix this issue.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoMdePkg: Correct the string expression of UTF8 vendor device path
Dandan Bi [Fri, 5 Oct 2018 01:22:20 +0000 (09:22 +0800)]
MdePkg: Correct the string expression of UTF8 vendor device path

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1225

According to UEFI spec, the string expression of UTF8 vendor
device node should be displayed as: VenUtf8(). Current code
display it as: VenUft8() by mistake when convert device
path node to text.

This commit is to fix this bug.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoMdeModulePkg/HiiDB: Fix incorrect structure convention for checkbox
Dandan Bi [Fri, 28 Sep 2018 05:28:03 +0000 (13:28 +0800)]
MdeModulePkg/HiiDB: Fix incorrect structure convention for checkbox

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1224

When covert IFR binary to EFI_IFR_CHECKBOX structure,
Current code has following incorrect code logic:
IfrCheckBox = (EFI_IFR_CHECKBOX *) (IfrOpHdr + 1);
The correct one should be:
IfrCheckBox = (EFI_IFR_CHECKBOX *) IfrOpHdr;

1. The bug is in function "UpdateDefaultSettingInFormPackage()"
which is to update the default setting of some HII Questions
in the IFR binary data. So it only has impact when platform
overrides default setting in HII VarStore through DynamicHii
PCD setting in Platform DSC file. If platform doesn't
override default setting, it has no impact.

2. The implementation updates the "Flags" filed in the
EFI_IFR_CHECKBOX structure to update the default
setting of checkbox.
If using "IfrCheckBox = (EFI_IFR_CHECKBOX *) (IfrOpHdr + 1);"
when wants to update the " Flags" filed in checkbox,
but in fact it will update the opcode binary
data(opcode binary length) behind checkbox binary.
And then it will cause Browser can't parse the IFR
binary data correctly. And then the possible symptom
is that some HII Question and forms may be not parsed
and then cannot be shown.

This patch is to fix this bug.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
15 months agoBaseTools LzmaCompress: Fix GCC warning misleading-indentation
Liming Gao [Tue, 9 Oct 2018 07:06:14 +0000 (15:06 +0800)]
BaseTools LzmaCompress: Fix GCC warning misleading-indentation

GCC 6 or above reports the warning misleading-indentation.
This patch fixes it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1234
[lersek@redhat.com: reference the BZ that got reported meanwhile]

15 months agoIntelFrameworkModulePkg Lzma: Update LZMA SDK version to 18.05
Liming Gao [Wed, 29 Aug 2018 00:51:26 +0000 (08:51 +0800)]
IntelFrameworkModulePkg Lzma: Update LZMA SDK version to 18.05

https://bugzilla.tianocore.org/show_bug.cgi?id=1006
New formal release in https://www.7-zip.org/sdk.html is 18.05.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoMdeModulePkg Lzma: Update LZMA SDK version to 18.05
Liming Gao [Wed, 29 Aug 2018 00:51:27 +0000 (08:51 +0800)]
MdeModulePkg Lzma: Update LZMA SDK version to 18.05

https://bugzilla.tianocore.org/show_bug.cgi?id=1006
New formal release in https://www.7-zip.org/sdk.html is 18.05.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoBaseTools Lzma: Update LZMA SDK version to 18.05
Liming Gao [Wed, 29 Aug 2018 00:51:28 +0000 (08:51 +0800)]
BaseTools Lzma: Update LZMA SDK version to 18.05

https://bugzilla.tianocore.org/show_bug.cgi?id=1006
New formal release in https://www.7-zip.org/sdk.html is 18.05.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoShellPkg/TftpDynamicCommand: Correct comments to align with the input parameter.
Jiaxin Wu [Mon, 8 Oct 2018 02:49:33 +0000 (10:49 +0800)]
ShellPkg/TftpDynamicCommand: Correct comments to align with the input parameter.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1230

Cc: Carsey Jaben <jaben.carsey@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Bi Dandan <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
15 months agoNetworkPkg/UefiPxeBcDxe: Correct comments to align with the input parameter.
Jiaxin Wu [Mon, 8 Oct 2018 02:48:20 +0000 (10:48 +0800)]
NetworkPkg/UefiPxeBcDxe: Correct comments to align with the input parameter.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1230

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Bi Dandan <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
15 months agoMdeModulePkg/Tcp4Dxe: Remove the trailing white space in one line.
Jiaxin Wu [Mon, 8 Oct 2018 02:27:20 +0000 (10:27 +0800)]
MdeModulePkg/Tcp4Dxe: Remove the trailing white space in one line.

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Bi Dandan <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
15 months agoOvmfPkg/PlatformPei: clear CPU caches
Marc-André Lureau [Tue, 2 Oct 2018 12:17:25 +0000 (16:17 +0400)]
OvmfPkg/PlatformPei: clear CPU caches

This is for conformance with the TCG "Platform Reset Attack Mitigation
Specification". Because clearing the CPU caches at boot doesn't impact
performance significantly, do it unconditionally, for simplicity's
sake.

Flush the cache on all logical processors, thanks to
EFI_PEI_MP_SERVICES_PPI and CacheMaintenanceLib.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien.grall@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Anthony PERARD <anthony.perard@citrix.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
[lersek@redhat.com: remove bogus Message-Id line from commit msg]

15 months agoShellPkg: Create a homefilesystem environment variable
Jim.Dailey@dell.com [Wed, 3 Oct 2018 16:02:24 +0000 (09:02 -0700)]
ShellPkg: Create a homefilesystem environment variable

Create a homefilesystem environment variable whose value is the file
system on which the executing shell is located. For example: "FS14:".

This eliminates the need for people to have to try and find the "boot"
file system in their startup script.  After this change they can simply
execute %homefilesystem% to set the cwd to the root of the file system
where the shell is located.

A future enhancement could be to add "homefilesystem" to the list of
predefined, read-only variables listed in the EfiShellSetEnv function of
file ShellProtocol.c

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jim Dailey <jim_dailey@dell.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
15 months agoBaseTools: refactor the error for PCD value is negative or exceed max
zhijufan [Thu, 27 Sep 2018 06:08:15 +0000 (14:08 +0800)]
BaseTools: refactor the error for PCD value is negative or exceed max

refactor the error handling for the PCD value that is negative or it
exceed the max value.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
15 months agoUefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass
Hao Wu [Thu, 13 Sep 2018 07:53:31 +0000 (15:53 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

It is possible for SMI handler(s) to call EFI_SMM_CPU_PROTOCOL service
ReadSaveState() and use the content in the 'CommBuffer' (controlled
external inputs) as the 'CpuIndex'. So this commit will insert AsmLfence
API to mitigate the bounds check bypass issue within SmmReadSaveState().

For SmmReadSaveState():

The 'CpuIndex' will be passed into function ReadSaveStateRegister(). And
then in to ReadSaveStateRegisterByIndex().

With the call:
ReadSaveStateRegisterByIndex (
  CpuIndex,
  SMM_SAVE_STATE_REGISTER_IOMISC_INDEX,
  sizeof(IoMisc.Uint32),
  &IoMisc.Uint32
  );

The 'IoMisc' can be a cross boundary access during speculative execution.
Later, 'IoMisc' is used as the index to access buffers 'mSmmCpuIoWidth'
and 'mSmmCpuIoType'. One can observe which part of the content within
those buffers was brought into cache to possibly reveal the value of
'IoMisc'.

Hence, this commit adds a AsmLfence() after the check of 'CpuIndex'
within function SmmReadSaveState() to prevent the speculative execution.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass
Hao Wu [Thu, 13 Sep 2018 07:47:10 +0000 (15:47 +0800)]
MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the
Variable\RuntimeDxe driver and insert AsmLfence API to mitigate the
bounds check bypass issue.

For SMI handler SmmVariableHandler():

Under "case SMM_VARIABLE_FUNCTION_GET_VARIABLE:",
'SmmVariableHeader->NameSize' can be a potential cross boundary access of
the 'CommBuffer' (controlled external input) during speculative execution.

This cross boundary access is later used as the index to access array
'SmmVariableHeader->Name' by code:
"SmmVariableHeader->Name[SmmVariableHeader->NameSize/sizeof (CHAR16) - 1]"
One can observe which part of the content within array was brought into
cache to possibly reveal the value of 'SmmVariableHeader->NameSize'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of
'CommBuffer' to prevent the speculative execution.

And there are 2 similar cases under
"case SMM_VARIABLE_FUNCTION_SET_VARIABLE:" and
"case SMM_VARIABLE_FUNCTION_VAR_CHECK_VARIABLE_PROPERTY_GET:" as well.
This commits also handles them.

Also, under "case SMM_VARIABLE_FUNCTION_SET_VARIABLE:",
'(UINT8 *)SmmVariableHeader->Name + SmmVariableHeader->NameSize' points to
the 'CommBuffer' (with some offset) and then passed as parameter 'Data' to
function VariableServiceSetVariable().

Within function VariableServiceSetVariable(), there is a sanity check for
EFI_VARIABLE_AUTHENTICATION_2 descriptor for the data pointed by 'Data'.
If this check is speculatively bypassed, potential cross-boundary data
access for 'Data' is possible to be revealed via the below function calls
sequence during speculative execution:

AuthVariableLibProcessVariable()
ProcessVarWithPk() or ProcessVarWithKek()

Within function ProcessVarWithPk() or ProcessVarWithKek(), for the code
"PayloadSize = DataSize - AUTHINFO2_SIZE (Data);", 'AUTHINFO2_SIZE (Data)'
can be a cross boundary access during speculative execution.

Then, 'PayloadSize' is possible to be revealed by the function call
sequence:

AuthServiceInternalUpdateVariableWithTimeStamp()
mAuthVarLibContextIn->UpdateVariable()
VariableExLibUpdateVariable()
UpdateVariable()
CopyMem()

Hence, this commit adds a AsmLfence() after the sanity check for
EFI_VARIABLE_AUTHENTICATION_2 descriptor upon 'Data' within function
VariableServiceSetVariable() to prevent the speculative execution.

Also, please note that the change made within function
VariableServiceSetVariable() will affect DXE as well. However, since we
only focuses on the SMM codes, the commit will introduce a new module
internal function called VariableLoadFence() to handle this. This internal
function will have 2 implementations (1 for SMM, 1 for DXE). For the SMM
implementation, it is a wrapper to call the AsmLfence() API; for the DXE
implementation, it is empty.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass
Hao Wu [Thu, 13 Sep 2018 07:35:12 +0000 (15:35 +0800)]
MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the
SmmLockBox driver and insert AsmLfence API to mitigate the
bounds check bypass issue.

For SMI handler SmmLockBoxHandler():

Under "case EFI_SMM_LOCK_BOX_COMMAND_SAVE:", the 'CommBuffer' (controlled
external inputs) is passed to function SmmLockBoxSave().

'TempLockBoxParameterSave.Length' can be a potential cross boundary access
of the 'CommBuffer' during speculative execution. This cross boundary
access is later passed as parameter 'Length' into function SaveLockBox().

Within function SaveLockBox(), the value of 'Length' can be inferred by
code:
"CopyMem ((VOID *)(UINTN)SmramBuffer, (VOID *)(UINTN)Buffer, Length);".
One can observe which part of the content within 'Buffer' was brought into
cache to possibly reveal the value of 'Length'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of
'CommBuffer' to prevent the speculative execution.

And there is a similar case under "case EFI_SMM_LOCK_BOX_COMMAND_UPDATE:"
function SmmLockBoxUpdate() as well. This commits also handles it.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass
Hao Wu [Thu, 13 Sep 2018 07:29:26 +0000 (15:29 +0800)]
MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the
FaultTolerantWriteDxe driver and insert AsmLfence API to mitigate the
bounds check bypass issue.

For SMI handler SmmFaultTolerantWriteHandler():

Under "case FTW_FUNCTION_WRITE:", 'SmmFtwWriteHeader->Length' can be a
potential cross boundary access of the 'CommBuffer' (controlled external
inputs) during speculative execution. This cross boundary access is later
passed as parameter 'Length' into function FtwWrite().

Within function FtwWrite(), the value of 'Length' can be inferred by code:
"CopyMem (MyBuffer + Offset, Buffer, Length);". One can observe which part
of the content within 'Buffer' was brought into cache to possibly reveal
the value of 'Length'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of
'CommBuffer' to prevent the speculative execution.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdePkg/BaseLib: Add new AsmLfence API
Hao Wu [Thu, 13 Sep 2018 07:11:35 +0000 (15:11 +0800)]
MdePkg/BaseLib: Add new AsmLfence API

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1193

This commit will add a new BaseLib API AsmLfence(). This API will perform
a serializing operation on all load-from-memory instructions that were
issued prior to the call of this function. Please note that this API is
only available on IA-32 and x64.

The purpose of adding this API is to mitigate of the [CVE-2017-5753]
Bounds Check Bypass issue when untrusted data are being processed within
SMM. More details can be referred at the 'Bounds check bypass mitigation'
section at the below link:

https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdePkg/BaseLib: Remove an unused PCD
shenglei [Tue, 28 Aug 2018 02:36:47 +0000 (10:36 +0800)]
MdePkg/BaseLib: Remove an unused PCD

The PCD below is unused, so it has been removed from inf.
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoShellPkg/UefiShellDebug1CommandsLib: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 03:02:57 +0000 (11:02 +0800)]
ShellPkg/UefiShellDebug1CommandsLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize
gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength

Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
15 months agoShellPkg/UefiHandleParsingLib: Remove an unused PCD
shenglei [Tue, 28 Aug 2018 03:01:02 +0000 (11:01 +0800)]
ShellPkg/UefiHandleParsingLib: Remove an unused PCD

The PCD below is unused, so it has been removed from inf.
gEfiShellPkgTokenSpaceGuid.PcdShellPrintBufferSize

Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
15 months agoShellPkg/DpDynamicCommand: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:57:55 +0000 (10:57 +0800)]
ShellPkg/DpDynamicCommand: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize in DpApp.inf
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize in
DpDynamicCommand.inf

Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
15 months agoShellPkg/Shell: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:55:09 +0000 (10:55 +0800)]
ShellPkg/Shell: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize
gEfiShellPkgTokenSpaceGuid.PcdShellMapNameLength

Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
15 months agoUefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Change to DOS format file.
Eric Dong [Sat, 29 Sep 2018 01:37:32 +0000 (09:37 +0800)]
UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Change to DOS format file.

Follow EDKII coding style, change file format to dos style.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1213

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoSecurityPkg/Tcg2Dxe: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:22:19 +0000 (10:22 +0800)]
SecurityPkg/Tcg2Dxe: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoSecurityPkg/Tcg2ConfigPei: Remove an unused PCD
shenglei [Tue, 28 Aug 2018 02:20:25 +0000 (10:20 +0800)]
SecurityPkg/Tcg2ConfigPei: Remove an unused PCD

The PCD below is unused, so it has been removed from inf.
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/FirmwarePerformanceDataTableDxe: Remove an unused PCD
shenglei [Tue, 28 Aug 2018 02:50:30 +0000 (10:50 +0800)]
MdeModulePkg/FirmwarePerformanceDataTableDxe: Remove an unused PCD

The PCD below is unused, so it has been removed from inf.
gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoMdeModulePkg/DxeCapsuleLibFmp: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:44:32 +0000 (10:44 +0800)]
MdeModulePkg/DxeCapsuleLibFmp: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleMax
gEfiMdeModulePkgTokenSpaceGuid.PcdSystemRebootAfterCapsuleProcessFlag
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeSubClassCapsule
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesBegin
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeProcessCapsulesEnd
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdatingFirmware
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareSuccess
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeUpdateFirmwareFailed
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleStatusCodeResettingSystem
The library Pcdlib is not linked, so "#include <Library/PcdLib.h>"
is deleted.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoUefiCpuPkg/CpuCommonFeaturesLib: Remove an unused PCD
shenglei [Tue, 28 Aug 2018 02:32:11 +0000 (10:32 +0800)]
UefiCpuPkg/CpuCommonFeaturesLib: Remove an unused PCD

The PCD below is unused, so it has been removed from inf.
gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport

Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
15 months agoNetworkPkg/HttpUtilitiesDxe: fix read memory access overflow.
Li, Songpeng [Fri, 28 Sep 2018 03:02:35 +0000 (11:02 +0800)]
NetworkPkg/HttpUtilitiesDxe: fix read memory access overflow.

The input param String of AsciiStrStr() requires a pointer to
 Null-terminated string, however in HttpUtilitiesParse(),
 the Buffersize before AllocateZeroPool() is equal to the size
 of TCP header, after the CopyMem(), it might not end with
 Null-terminator. It might cause memory access overflow.

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1204
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Songpeng Li <songpeng.li@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
15 months agoNetworkPkg/HttpDxe: fix read memory access overflow in HTTPBoot.
Songpeng Li [Fri, 28 Sep 2018 03:02:34 +0000 (11:02 +0800)]
NetworkPkg/HttpDxe: fix read memory access overflow in HTTPBoot.

The input param String of AsciiStrStr() requires a pointer to
 Null-terminated string, however in HttpTcpReceiveHeader(),
 the Buffersize before AllocateZeroPool() is equal to the size
 of TCP header, after the CopyMem(), it might not end with
 Null-terminator. It might cause memory access overflow.

Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1204
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Songpeng Li <songpeng.li@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
15 months agoMdeModulePkg/RegularExpressionDxe: modify inf to pass vs 2012 build
Guo, Dongao [Wed, 26 Sep 2018 09:45:43 +0000 (17:45 +0800)]
MdeModulePkg/RegularExpressionDxe: modify inf to pass vs 2012 build

Add /wd4703 for passing VS 2012 build.This equals /wd4701 in VS2015.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dongao Guo <dongao.guo@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
15 months agoIntelFsp2Pkg/GenCfgOpt.py: remove tailing space from output file
Chasel, Chiu [Wed, 26 Sep 2018 11:50:42 +0000 (19:50 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: remove tailing space from output file

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1212

UPD header files generated by GenCfgOpt.py may have
tailing white space from some of the UPD description in DSC,
especially when python script automatically switching lines
for long description string. This patch will always remove
tailing white space for UPD header files.

Test: Verified the patch can remove tailing space in
      output header files when UPD DSC contains intentional
      tailing white space.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
15 months agoIntelFsp2Pkg/GenCfgOpt.py: Support UPD offset auto assignment
Chasel, Chiu [Wed, 26 Sep 2018 11:21:11 +0000 (19:21 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: Support UPD offset auto assignment

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1211

For reducing maintenance effort, the UPD offset can be
automatic assigned by GenCfgOpt.py following by alignment
requirements.

The usage model as below:
. If UPD offset in DSC file are all '*', GenCfgOpt.py will
  assign offset for all UPD automatically. In this case no
  need to manually hardcode offset to all UPD in DSC.

. If UPD offset in DSC file are all not '*', GenCfgOpt.py
  will use hardcoded offset directly (original usage model)

. Tool does not support mixing scenario so UPD offset in DSC
  should be all '*' or all hardcoded but not mixed.

In auto mode UPD offset will be assigned following natural
alignment (size aligned) rule and the whole structure size
will align to either 32bits or 64bits depends on maximal UPD
size in the structure.

Test: Verified by both UPD offset hardcoded or '*' in DSC and
      generated UPD header files are correct.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
15 months agoIntelFsp2Pkg/GenCfgOpt.py: support FixedAtBuild PCD
Chasel, Chiu [Wed, 26 Sep 2018 02:52:36 +0000 (10:52 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: support FixedAtBuild PCD

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1210

FixedAtBuild PCD is suggested to be used instead
of FeatureFlag PCD so extend this tool to support.
Also skipped PCDs which commented out by '#'.

Test: Verified with FixedAtBuild PCD for including or
excluding lines in generated UPD header files successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
15 months agoMdeModulePkg Variable: Fix comment typo 'end' to 'start'
Star Zeng [Thu, 27 Sep 2018 01:46:17 +0000 (09:46 +0800)]
MdeModulePkg Variable: Fix comment typo 'end' to 'start'

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1214
This patch only updates comment and function description, so has
no functionality impact.

This patch fixes comment typo 'end' to 'start' in GetStartPointer.

GetStartPointer for PEI and DXE has aligned function description,
but GetEndPointer does not.
This patch also aligns GetEndPointer's function description for
PEI and DXE.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoIntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample: Remove PCDs
shenglei [Tue, 28 Aug 2018 02:12:07 +0000 (10:12 +0800)]
IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample: Remove PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months agoIntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an unused PCD
shenglei [Tue, 28 Aug 2018 02:09:01 +0000 (10:09 +0800)]
IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an unused PCD

The PCD below is unused, so it has been removed from inf.
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months agoIntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:01:35 +0000 (10:01 +0800)]
IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months agoIntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 02:00:10 +0000 (10:00 +0800)]
IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months agoIntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 01:57:00 +0000 (09:57 +0800)]
IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months agoIntelFsp2Pkg/FspSecCore: Remove unused PCDs
shenglei [Tue, 28 Aug 2018 01:54:52 +0000 (09:54 +0800)]
IntelFsp2Pkg/FspSecCore: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months agoIntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b
Chasel, Chiu [Fri, 28 Sep 2018 02:31:37 +0000 (10:31 +0800)]
IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b

Commit formats had issues so reverted 9 commits
from IntelFsp2Pkg and IntelFsp2WrapperPkg.
Will re-submit them with correct formats.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoShellPkg/TftpDynamicCommand: Fix the potentially uninitialized local variable used.
Jiaxin Wu [Thu, 27 Sep 2018 10:43:23 +0000 (18:43 +0800)]
ShellPkg/TftpDynamicCommand: Fix the potentially uninitialized local variable used.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1217

Local variable 'Mtftp4Token' might be uninitialized when error happen. This patch is to
resolve the issue.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Carsey Jaben <jaben.carsey@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoEmulatorPkg/EmulatorPkg.dsc: override PCD default to avoid boot failure
Jian J Wang [Thu, 27 Sep 2018 07:01:37 +0000 (15:01 +0800)]
EmulatorPkg/EmulatorPkg.dsc: override PCD default to avoid boot failure

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1215

This issue is caused by commit 5267926134d17e86672b84fd57b438f05ffa68e1.

The reason is this commit changed the condition of building page table
in DxeIpl. The code before it will only build page table for the sake
of PcdSetNxForStack. This commit added PcdImageProtectionPolicy and
PcdDxeNxMemoryProtectionPolicy into the logic. But the default value of
PcdImageProtectionPolicy is 02, which means the DxeIpl should build page
table. Due to the fact that EmulatorPkg doesn't support page table at all,
this will cause exception on Windows OS.

This patch solves this issue by setting PcdImageProtectionPolicy to 0
explicitly in EmulatorPkg.dsc.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoNt32Pkg/Nt32Pkg.dsc: override PCD default to avoid boot failure
Jian J Wang [Thu, 27 Sep 2018 06:56:58 +0000 (14:56 +0800)]
Nt32Pkg/Nt32Pkg.dsc: override PCD default to avoid boot failure

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1215

This issue is caused by commit 5267926134d17e86672b84fd57b438f05ffa68e1.

The reason is this commit changed the condition of building page table
in DxeIpl. The code before it will only build page table for the sake
of PcdSetNxForStack. This commit added PcdImageProtectionPolicy and
PcdDxeNxMemoryProtectionPolicy into the logic. But the default value of
PcdImageProtectionPolicy is 02, which means the DxeIpl should build page
table. Due to the fact that Nt32Pkg doesn't support page table at all,
this will cause exception on Windows OS.

This patch solves this issue by setting PcdImageProtectionPolicy to 0
explicitly in Nt32Pkg.dsc.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
15 months agoGenCfgOpt.py: remove tailing space from output file
Chasel, Chiu [Wed, 26 Sep 2018 11:50:42 +0000 (19:50 +0800)]
GenCfgOpt.py: remove tailing space from output file

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1212

UPD header files generated by GenCfgOpt.py may have
tailing white space from some of the UPD description in DSC,
especially when python script automatically switching lines
for long description string. This patch will always remove
tailing white space for UPD header files.

Test: Verified the patch can remove tailing space in
      output header files when UPD DSC contains intentional
      tailing white space.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
15 months agoIntelFsp2Pkg/GenCfgOpt.py: Support UPD offset auto assignment
Chasel, Chiu [Wed, 26 Sep 2018 11:21:11 +0000 (19:21 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: Support UPD offset auto assignment

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1211

For reducing maintenance effort, the UPD offset can be
automatic assigned by GenCfgOpt.py following by alignment
requirements.

The usage model as below:
. If UPD offset in DSC file are all '*', GenCfgOpt.py will
  assign offset for all UPD automatically. In this case no
  need to manually hardcode offset to all UPD in DSC.

. If UPD offset in DSC file are all not '*', GenCfgOpt.py
  will use hardcoded offset directly (original usage model)

. Tool does not support mixing scenario so UPD offset in DSC
  should be all '*' or all hardcoded but not mixed.

In auto mode UPD offset will be assigned following natural
alignment (size aligned) rule and the whole structure size
will align to either 32bits or 64bits depends on maximal UPD
size in the structure.

Test: Verified by both UPD offset hardcoded or '*' in DSC and
      generated UPD header files are correct.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
15 months agoIntelFsp2Pkg/GenCfgOpt.py: support FixedAtBuild PCD
Chasel, Chiu [Wed, 26 Sep 2018 02:52:36 +0000 (10:52 +0800)]
IntelFsp2Pkg/GenCfgOpt.py: support FixedAtBuild PCD

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1210

FixedAtBuild PCD is suggested to be used instead
of FeatureFlag PCD so extend this tool to support.
Also skipped PCDs which commented out by '#'.

Test: Verified with FixedAtBuild PCD for including or
excluding lines in generated UPD header files successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Gao Liming <liming.gao@intel.com>
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
15 months ago[PATCH v3 06/16] IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample:
Chasel, Chiu [Thu, 27 Sep 2018 07:39:33 +0000 (15:39 +0800)]
[PATCH v3 06/16] IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample:
 Remove PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months ago[PATCH v3 05/16] IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an
Chasel, Chiu [Thu, 27 Sep 2018 07:36:48 +0000 (15:36 +0800)]
[PATCH v3 05/16] IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an
 unused PCD

The PCD below is unused, so it has been removed from inf.
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months ago[PATCH v3 04/16] IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused
Chasel, Chiu [Thu, 27 Sep 2018 07:35:06 +0000 (15:35 +0800)]
[PATCH v3 04/16] IntelFsp2Pkg/BaseFspSwitchStackLib: Remove unused
 PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months ago[PATCH v3 03/16] IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs
Chasel, Chiu [Thu, 27 Sep 2018 07:32:19 +0000 (15:32 +0800)]
[PATCH v3 03/16] IntelFsp2Pkg/BaseFspPlatformLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months ago[PATCH v3 02/16] IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs
Chasel, Chiu [Thu, 27 Sep 2018 07:27:51 +0000 (15:27 +0800)]
[PATCH v3 02/16] IntelFsp2Pkg/BaseFspCommonLib: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.

gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months ago[PATCH v3 01/16] IntelFsp2Pkg/FspSecCore: Remove unused PCDs
Chasel, Chiu [Thu, 27 Sep 2018 07:01:09 +0000 (15:01 +0800)]
[PATCH v3 01/16] IntelFsp2Pkg/FspSecCore: Remove unused PCDs

The PCDs below are unused, so they have been removed from inf.

gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
15 months agoUefiCpuPkg PiSmmCpuDxeSmm: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:41:07 +0000 (16:41 +0800)]
UefiCpuPkg PiSmmCpuDxeSmm: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates PiSmmCpuDxeSmm to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoShellPkg DpDynamicCommand: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:40:40 +0000 (16:40 +0800)]
ShellPkg DpDynamicCommand: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates DpDynamicCommand to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoPcAtChipsetPkg PcRtc: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:40:09 +0000 (16:40 +0800)]
PcAtChipsetPkg PcRtc: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates PcatRealTimeClockRuntimeDxe to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoMdeModulePkg S3SaveStateDxe: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:39:38 +0000 (16:39 +0800)]
MdeModulePkg S3SaveStateDxe: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates S3SaveStateDxe to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
15 months agoIntelSiliconPkg IntelVTdDxe: Use new EfiLocateFirstAcpiTable()
Star Zeng [Fri, 8 Jun 2018 08:38:46 +0000 (16:38 +0800)]
IntelSiliconPkg IntelVTdDxe: Use new EfiLocateFirstAcpiTable()

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch updates IntelVTdDxe to use new
EfiLocateFirstAcpiTable() and remove the duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
15 months agoIntelFrameworkPkg FrameworkUefiLib: Add new EfiLocateXXXAcpiTable APIs
Star Zeng [Wed, 19 Sep 2018 00:55:33 +0000 (08:55 +0800)]
IntelFrameworkPkg FrameworkUefiLib: Add new EfiLocateXXXAcpiTable APIs

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch adds new EfiLocateXXXAcpiTable() APIs in UefiLib
for the request and also the following patch to remove the
duplicated code.

V2:
ASSERT(FALSE) and return NULL instead of real implementation for the
new APIs as the IntelFrameworkPkg is a to-be-deprecated packages.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
15 months agoMdePkg UefiLib: Add new EfiLocateXXXAcpiTable() APIs
Star Zeng [Fri, 8 Jun 2018 09:12:01 +0000 (17:12 +0800)]
MdePkg UefiLib: Add new EfiLocateXXXAcpiTable() APIs

https://bugzilla.tianocore.org/show_bug.cgi?id=967
Request to add a library function for GetAcpiTable() in order
to get ACPI table using signature as input.

After evaluation, we found there are many duplicated code to
find ACPI table by signature in different modules.

This patch adds new EfiLocateXXXAcpiTable() APIs in UefiLib
for the request and also the following patch to remove the
duplicated code.

Cc: Younas khan <pmdyounaskhan786@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
15 months agoNetworkPkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in MdeModulePkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:37:20 +0000 (11:37 +0800)]
NetworkPkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to UefiPxeBcDxe in MdeModulePkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoNetworkPkg/IScsiDxe: Add the clarification compared to IScsiDxe in MdeModulePkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:36:50 +0000 (11:36 +0800)]
NetworkPkg/IScsiDxe: Add the clarification compared to IScsiDxe in MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to IScsiDxe in MdeModulePkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoNetworkPkg/TcpDxe: Add the clarification compared to Tcp4Dxe in MdeModulePkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:36:09 +0000 (11:36 +0800)]
NetworkPkg/TcpDxe: Add the clarification compared to Tcp4Dxe in MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to Tcp4Dxe in MdeModulePkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in NetworkPkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:35:00 +0000 (11:35 +0800)]
MdeModulePkg/UefiPxeBcDxe: Add the clarification compared to UefiPxeBcDxe in NetworkPkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to UefiPxeBcDxe in NetworkPkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/IScsiDxe: Add the clarification compared to IScsiDxe in NetworkPkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:33:07 +0000 (11:33 +0800)]
MdeModulePkg/IScsiDxe: Add the clarification compared to IScsiDxe in NetworkPkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to IScsiDxe in NetworkPkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/Tcp4Dxe: Add the clarification compared to TcpDxe in NetworkPkg.
Jiaxin Wu [Tue, 25 Sep 2018 03:34:10 +0000 (11:34 +0800)]
MdeModulePkg/Tcp4Dxe: Add the clarification compared to TcpDxe in NetworkPkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1205

This patch is to add the driver usage/difference clarification
compared to TcpDxe in NetworkPkg.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoNetworkPkg/UefiPxeBcDxe: Use the specified MTFTP windowsize.
Jiaxin Wu [Fri, 14 Sep 2018 07:49:23 +0000 (15:49 +0800)]
NetworkPkg/UefiPxeBcDxe: Use the specified MTFTP windowsize.

*v2: Since the new PCD (PcdPxeTftpWindowSize) was renamed/defined in
NetworkPkg instead of MdeModulePkg, this new version is to update the
consuming PXE driver.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to use the specified MTFTP windowsize to benefit the PXE
download performance.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
15 months agoNetworkPkg: Define one PCD for PXE to specify MTFTP windowsize.
Jiaxin Wu [Fri, 21 Sep 2018 07:09:55 +0000 (15:09 +0800)]
NetworkPkg: Define one PCD for PXE to specify MTFTP windowsize.

*v2: Rename and redefine the PCD in NetworkPkg instead of MdeModulePkg.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to define one new PCD for PXE driver to specify MTFTP windowsize so as
to improve the PXE download performance. The default value is set to 4.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoShellPkg/TftpDynamicCommand: Add one option for tftp command to specify windowsize.
Jiaxin Wu [Fri, 14 Sep 2018 07:48:17 +0000 (15:48 +0800)]
ShellPkg/TftpDynamicCommand: Add one option for tftp command to specify windowsize.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to define one new option for TFTP shell command to specify the
windowsize option as defined in RFC 7440. Valid range is between 1 and 64,
default value is 1.

Note that: RFC 7440 does not mention max window size value, but for the
stability reason, the value is limited to 64.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Carsey Jaben <jaben.carsey@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
15 months agoNetworkPkg/Mtftp6Dxe: Support windowsize in read request operation.
Jiaxin Wu [Fri, 14 Sep 2018 07:47:52 +0000 (15:47 +0800)]
NetworkPkg/Mtftp6Dxe: Support windowsize in read request operation.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to support the TFTP windowsize option described in RFC 7440.
The feature allows the client and server to negotiate a window size of
consecutive blocks to send as an alternative for replacing the single-block
lockstep schema.

Currently, the windowsize for write request operation is not supported since
there is no real use cases.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
15 months agoMdeModulePke/Mtftp4Dxe: Support windowsize in read request operation.
Jiaxin Wu [Fri, 14 Sep 2018 07:47:20 +0000 (15:47 +0800)]
MdeModulePke/Mtftp4Dxe: Support windowsize in read request operation.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=886

This patch is to support the TFTP windowsize option described in RFC 7440.
The feature allows the client and server to negotiate a window size of
consecutive blocks to send as an alternative for replacing the single-block
lockstep schema.

Currently, the windowsize for write request operation is not supported since
there is no real use cases.

Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Shao Ming <ming.shao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
15 months agoBaseTool: Support different PCDs that refers to the same EFI variable.
bob.c.feng@intel.com [Tue, 25 Sep 2018 02:55:30 +0000 (10:55 +0800)]
BaseTool: Support different PCDs that refers to the same EFI variable.

If Structure PCD and Normal Pcd refer to the
same EFI variable, do EFI variable merge, otherwise, do
EFI variable combination.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
15 months agoBaseTool: Replace dict with OrderedDict.
BobCF [Tue, 25 Sep 2018 05:20:46 +0000 (13:20 +0800)]
BaseTool: Replace dict with OrderedDict.

Replace dict with OrderedDict for PCD so that
the pcd list has same order.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
15 months agoBaseTools: Fix the wrong reference _GetSkuIds() in AutoGen code
Liming Gao [Tue, 25 Sep 2018 01:36:00 +0000 (09:36 +0800)]
BaseTools: Fix the wrong reference _GetSkuIds() in AutoGen code

DscBuildData has been updated to define SkuIds instead of _GetSkuIds().
The consumer code should refer to SkuIds.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
15 months agoMdePkg/BaseSynchronizationLib: fix XADD operands in GCC IA32/X64 assembly
Laszlo Ersek [Tue, 25 Sep 2018 14:58:15 +0000 (16:58 +0200)]
MdePkg/BaseSynchronizationLib: fix XADD operands in GCC IA32/X64 assembly

Currently, "gcc-4.8.5-28.el7_5.1.x86_64" generates the following code for
me, from the XADD inline assembly added to "X64/GccInline.c" in commit
17634d026f96:

0000000000004383 <InternalSyncIncrement>:
> UINT32
> EFIAPI
> InternalSyncIncrement (
>   IN      volatile UINT32    *Value
>   )
> {
>     4383:       55                      push   %rbp
>     4384:       48 89 e5                mov    %rsp,%rbp
>     4387:       48 83 ec 10             sub    $0x10,%rsp
>     438b:       48 89 4d 10             mov    %rcx,0x10(%rbp)
>   UINT32  Result;
>
>   __asm__ __volatile__ (
>     438f:       48 8b 55 10             mov    0x10(%rbp),%rdx
>     4393:       48 8b 45 10             mov    0x10(%rbp),%rax
>     4397:       b8 01 00 00 00          mov    $0x1,%eax
>     439c:       f0 0f c1 00             lock xadd %eax,(%rax)
>     43a0:       ff c0                   inc    %eax
>     43a2:       89 45 fc                mov    %eax,-0x4(%rbp)
>     : "m"  (*Value)           // %2
>     : "memory",
>       "cc"
>     );
>
>   return Result;
>     43a5:       8b 45 fc                mov    -0x4(%rbp),%eax
> }
>     43a8:       c9                      leaveq
>     43a9:       c3                      retq
>

The MOV $0X1,%EAX instruction corrupts the address of Value in %RAX before
we reach the XADD instruction. In fact, it makes no sense for XADD to use
%EAX as source operand and (%RAX) as destination operand at the same time.

The XADD instruction's destination operand is a read-write operand. The
GCC documentation states:

> The ordinary output operands must be write-only; GCC will assume that
> the values in these operands before the instruction are dead and need
> not be generated. Extended asm supports input-output or read-write
> operands. Use the constraint character `+' to indicate such an operand
> and list it with the output operands. You should only use read-write
> operands when the constraints for the operand (or the operand in which
> only some of the bits are to be changed) allow a register.

(The above is intentionally quoted from the oldest GCC release that edk2
supports, namely gcc-4.4:
<https://gcc.gnu.org/onlinedocs/gcc-4.4.7/gcc/Extended-Asm.html>.)

Fix the operand list accordingly.

With the patch applied, I get:

0000000000004383 <InternalSyncIncrement>:
> UINT32
> EFIAPI
> InternalSyncIncrement (
>   IN      volatile UINT32    *Value
>   )
> {
>     4383:       55                      push   %rbp
>     4384:       48 89 e5                mov    %rsp,%rbp
>     4387:       48 83 ec 10             sub    $0x10,%rsp
>     438b:       48 89 4d 10             mov    %rcx,0x10(%rbp)
>   UINT32  Result;
>
>   __asm__ __volatile__ (
>     438f:       48 8b 55 10             mov    0x10(%rbp),%rdx
>     4393:       48 8b 45 10             mov    0x10(%rbp),%rax
>     4397:       b8 01 00 00 00          mov    $0x1,%eax
>     439c:       f0 0f c1 02             lock xadd %eax,(%rdx)
>     43a0:       ff c0                   inc    %eax
>     43a2:       89 45 fc                mov    %eax,-0x4(%rbp)
>     :                         // no inputs that aren't also outputs
>     : "memory",
>       "cc"
>     );
>
>   return Result;
>     43a5:       8b 45 fc                mov    -0x4(%rbp),%eax
> }
>     43a8:       c9                      leaveq
>     43a9:       c3                      retq

Note that some other bugs remain in
"BaseSynchronizationLib/*/GccInline.c"; those should be addressed later,
under <https://bugzilla.tianocore.org/show_bug.cgi?id=1208>.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1207
Fixes: 17634d026f968c404b039a8d8431b6389dd396ea
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
15 months agoUefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition.
Eric Dong [Tue, 25 Sep 2018 00:30:06 +0000 (08:30 +0800)]
UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition.

V3 changes include:
  1. Keep the ReservedX not change if bit info not changed for this field.

V2 changes include:
  1. Use X in ReservedX fields from totally new value if MSR structure definition changed.
     For example, if in current structure, the max reserved variable is Reserved2, in new
     definition, reserved variable is begin with Reserved3.

V1 Changes:
Changes includes:
  1. Update MSR structure definition, change some reserved fields to useful fields:
     1. MSR_XEON_PHI_PKG_CST_CONFIG_CONTROL_REGISTER
     2. MSR_XEON_PHI_SMM_MCA_CAP_REGISTER
  2. For MSR_XEON_PHI_PMG_IO_CAPTURE_BASE_REGISTER structure, it expand the field range.
     Old definition like below:
       typedef union {
         ///
         /// Individual bit fields
         ///
         struct {
           ///
           /// [Bits 15:0] LVL_2 Base Address (R/W).
           ///
           UINT32  Lvl2Base:16;
           ///
           /// [Bits 18:16] C-state Range (R/W)  Specifies the encoding value of the
           /// maximum C-State code name to be included when IO read to MWAIT
           /// redirection is enabled by MSR_PKG_CST_CONFIG_CONTROL[bit10]: 100b - C4
           /// is the max C-State to include 110b - C6 is the max C-State to include.
           ///
           UINT32  CStateRange:3;
           UINT32  Reserved1:13;
           UINT32  Reserved2:32;
         } Bits;
         ///
         /// All bit fields as a 32-bit value
         ///
         UINT32  Uint32;
         ///
         /// All bit fields as a 64-bit value
         ///
         UINT64  Uint64;
       } MSR_XEON_PHI_PMG_IO_CAPTURE_BASE_REGISTER;
    This patch make below changes for this data structure, it expand "CStateRange" field width.
      old one:
        UINT32  CStateRange:3;
        UINT32  Reserved1:13;
      new one:
        UINT32  CStateRange:7;
        UINT32  Reserved1:9;

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition.
Eric Dong [Tue, 25 Sep 2018 00:32:31 +0000 (08:32 +0800)]
UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition.

V3 changes include:
  1. Keep ReservedX not change if bit info not changed for this field.

V2 changes include:
  1. Use X in ReservedX fields from totally new value if MSR structure definition changed.
     For example, if in current structure, the max reserved variable is Reserved2, in new
     definition, reserved variable is begin with Reserved3.

V1 Changes includes:
  1. Change fields which is reserved in old version: MSR_IA32_RTIT_CTL_REGISTER

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one.
Eric Dong [Fri, 14 Sep 2018 00:59:27 +0000 (08:59 +0800)]
UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: Add new MSR name and keep old one.

Changes includes:
  1. Change MSR name:
    1. MSR_GOLDMONT_SGXOWNER0 => MSR_GOLDMONT_SGXOWNEREPOCH0
    2. MSR_GOLDMONT_SGXOWNER1 => MSR_GOLDMONT_SGXOWNEREPOCH1
  2. Keep old MSR definition (MSR_GOLDMONT_SGXOWNER0/1) for compatibility.
    1. Define old MSR like below style:
           #define MSR_GOLDMONT_SGXOWNER0   MSR_GOLDMONT_SGXOWNEREPOCH0

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one.
Eric Dong [Fri, 14 Sep 2018 00:54:46 +0000 (08:54 +0800)]
UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one.

Changes includes:
  1. Change MSR name:
    1. MSR_SKYLAKE_SGXOWNER0 => MSR_SKYLAKE_SGXOWNEREPOCH0
    2. MSR_SKYLAKE_SGXOWNER1 => MSR_SKYLAKE_SGXOWNEREPOCH1
  2. Keep old MSR definition(MSR_SKYLAKE_SGXOWNER0/1) for compatibility
    1. Use below coding style to define old MSR
         #define MSR_SKYLAKE_SGXOWNER0  MSR_SKYLAKE_SGXOWNEREPOCH0

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/CoreMsr.h: Remove old MSR.
Eric Dong [Mon, 3 Sep 2018 02:22:19 +0000 (10:22 +0800)]
UefiCpuPkg/Include/Register/Msr/CoreMsr.h: Remove old MSR.

Changes includes:
  1. Remove old MSR which not existed in 2018-05 version spec:
     1. MSR_CORE_ROB_CR_BKUPTMPDR6

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/P6Msr.h: Remove old MSR.
Eric Dong [Thu, 30 Aug 2018 06:10:17 +0000 (14:10 +0800)]
UefiCpuPkg/Include/Register/Msr/P6Msr.h: Remove old MSR.

Changes includes:
  1. Remove MSR which not existed in 2018-05 version spec: MSR_P6_ROB_CR_BKUPTMPDR6.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR.
Eric Dong [Thu, 30 Aug 2018 06:07:59 +0000 (14:07 +0800)]
UefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR.

Changes includes:
  1. Remove old MSR which not existed in 2018-05 version spec:
     1. MSR_CORE2_BBL_CR_CTL3

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 06:13:13 +0000 (14:13 +0800)]
UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR.

Changes includes:
  1. Add new MSRs: MSR_IA32_L2_QOS_CFG/MSR_IA32_CSTAR.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs.
Eric Dong [Thu, 30 Aug 2018 06:22:09 +0000 (14:22 +0800)]
UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs.

Changes includes:
  1. Add new MSR definitions.
  2. Add support platform info.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 06:04:38 +0000 (14:04 +0800)]
UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Add new MSR.

Changes includes:
  1. Add new MSR definition:
     1. MSR_XEON_PHI_PPIN_CTL
     2. MSR_XEON_PHI_PPIN
     3. MSR_XEON_PHI_MISC_FEATURE_ENABLES
     4. MSR_XEON_PHI_MSRUNCORE_RATIO_LIMIT
  2. Add DisplayModule == 0x85 supports.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/*.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 05:57:58 +0000 (13:57 +0800)]
UefiCpuPkg/Include/Register/Msr/*.h: Add new MSR.

Changes includes:
  1. Add new MSR: MSR_*_MSRUNCORE_RATIO_LIMIT

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR.
Eric Dong [Thu, 30 Aug 2018 05:49:16 +0000 (13:49 +0800)]
UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR.

Changes includes:
  1. Add new MSR: MSR_SILVERMONT_PLATFORM_INFO

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont...
Eric Dong [Mon, 27 Aug 2018 12:19:20 +0000 (20:19 +0800)]
UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont plus microarchitecture.

Changes includes:
  1. Add new MSR file which used for goldmont plus microarchitecture.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/Include/Register/Msr: Update reference spec info.
Eric Dong [Mon, 27 Aug 2018 08:20:26 +0000 (16:20 +0800)]
UefiCpuPkg/Include/Register/Msr: Update reference spec info.

Latest SDM has moved MSR related content from volume 3 chapter 35 to volume 4
chapter 2. Current MSR's comments need to be updated to reference the new
chapter info.

Changes includes:
  1. Update referenced chapter info from some MSRs.
  2. Update referenced SDM version info.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
15 months agoUefiCpuPkg/MtrrLib: Revert "Skip MSR access when the pair is invalid"
Ruiyu Ni [Tue, 25 Sep 2018 05:21:40 +0000 (13:21 +0800)]
UefiCpuPkg/MtrrLib: Revert "Skip MSR access when the pair is invalid"

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1187

The patch reverts 9c8c4478cfcacaf5fd60b75ff78d26732d93a5b8
"UefiCpuPkg/MtrrLib: Skip Base MSR access when the pair is invalid".

Microsoft Windows will report an error in event manager if MTRR
usage is different across hibernate even when the difference is
in an non valid MTRR pair. This seems like a bug in Windows but
for compatibility and servicing reasons we think a change in UEFI
would wise.
A Windows change has already been submitted for the next iteration
(2019 time frame).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
15 months agoMdeModulePkg/PciHostBridge: Move declaration of mIoMmu to header file
Ruiyu Ni [Tue, 25 Sep 2018 02:58:56 +0000 (10:58 +0800)]
MdeModulePkg/PciHostBridge: Move declaration of mIoMmu to header file

The change doesn't have functionality impact.
It just renames the mIoMmuProtocol to mIoMmu and moves the
declaration from PciRootBridgeIo.c to PciHostBridge.h.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Suggested-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
15 months agoMdeModulePkg/PciHostBridge: Add RESOURCE_VALID() to simplify code
Ruiyu Ni [Fri, 21 Sep 2018 07:22:46 +0000 (15:22 +0800)]
MdeModulePkg/PciHostBridge: Add RESOURCE_VALID() to simplify code

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Garrett Kirkendall <garrett.kirkendall@amd.com>