Jeff Fan [Wed, 29 Jun 2016 01:00:13 +0000 (09:00 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Add MemoryMapped in SetProcessorRegister()
REGISTER_TYPE in UefiCpuPkg/Include/AcpiCpuData.h defines a MemoryMapped
enum value. However support for the MemoryMapped enum is missing from
the implementation of SetProcessorRegister(). This patch adds support
for MemoryMapped type SetProcessorRegister().
One spin lock is added to avoid potential conflict when multiple processor
update the same memory space.
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Jeff Fan [Mon, 27 Jun 2016 07:41:50 +0000 (15:41 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Remove duplicate aligned buffer on S3 path
InitializeMpSyncData() invokes InitializeSmmCpuSemaphores() to allocate an
aligned buffer for all locks and semaphores. However, this function is
invoked on S3 resume path again to reset mSmmMpSyncData. It causes
an additional aligned buffer to be allocated.
This update moves InitializeSmmCpuSemaphores() into
InitializeMpServiceData() that is only invoked on normal boot.
InitializeMpSyncData() is updated to reset the locks/semaphore in
mSmmMpSyncData.
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
The AXI<->PCIe translation comments are out of date with
respect to the code. In the first case the AXI master port
is incorrectly called a slave. In the second case the the
translation direction indicated for the slave port is the
wrong direction.
Correct both of these comments to reflect what the code is
doing.
Jeremy Linton [Thu, 14 Jul 2016 13:58:29 +0000 (08:58 -0500)]
ArmPlatformPkg/ArmJuno: fix Juno PIO host bridge mapping
The Juno PIO mapping is 8M, so it should be using a 32-bit
PIO address translation. Further, PIO addresses should start
at 0 and be translated to/from the ARM MMIO region.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Jeff Fan [Tue, 12 Jul 2016 03:10:27 +0000 (11:10 +0800)]
MdePkg/BaseSynchronizationLib: spin lock alignment is 32 at least
Some processor may return small cache line size, we should return 32 bytes at
least for spin lock alignment.
Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Jeff Fan [Tue, 12 Jul 2016 00:49:33 +0000 (08:49 +0800)]
UefiCpuPkg/CpuMpPei: Remove PmodeOffset and LmodeOffset
Remove Pmode(Entry)Offset/Lmode(Entry)Offset and use unified Mode(Entry)Offset
to clean up the definition of MP_ASSEMBLY_ADDRESS_MAP and MP_CPU_EXCHANGE_INFO.
Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Jeff Fan [Mon, 11 Jul 2016 11:40:05 +0000 (19:40 +0800)]
UefiCpuPkg/CpuMpPei/X64: Use CodeSegment and DataSegment fields
Using CodeSegment and DataSegment fields in ExchangeInfo instead of the hardcode
MACROs for x64 arch. Switch AP from real mode to long mode directly, so needn't
the CS/DS of protected mode.
Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
BaseTools: Update the FV region name as upper letter
Since in the GenFds phase, the FV is generated as upper letter. This
patch update the FV region name as upper letter, it can fix the build
report generate failure on case sensitive file system.
ArmVirtPkg/PlatformBootManagerLib: remove stale FvFile boot options
(This patch ports OvmfPkg commit 2eb358986052 to ArmVirtPkg. That
functionality was not added to QemuBootOrderLib, because it was (and is)
independent from QEMU and fw_cfg.)
Remove any boot options that point to binaries built into the firmware and
have become stale due to any of the following:
- FvMain's base address or size changed (historical -- see commit e191a3114f4c),
- FvMain's FvNameGuid changed,
- the FILE_GUID of the pointed-to binary changed,
- the referenced binary is no longer built into the firmware.
For example, multiple such "EFI Internal Shell" boot options can coexist.
They technically differ from each other, but may not describe any built-in
shell binary exactly. Such options can accumulate in a varstore over time,
and while they remain generally bootable (thanks to the efforts of
BmGetFileBufferByFvFilePath()), they look bad.
OvmfPkg/PlatformPei: add missing auto variable initialization
The E820EntriesCount variable in XenPublishRamRegions() may be
referenced without being initialized on RELEASE builds, since the
ASSERT that fires if the call to XenGetE820Map() fails is compiled
out in that case. So initialize it to 0.
ArmPkg/ArmGicLib: manage GICv3 SPI state at the distributor
Unlike SGIs and PPIs, which are private to the CPU and are managed at
the redistributor level (which is also a per-CPU construct), shared
interrupts (SPIs) are shared between all CPUs, and therefore managed at
the distributor level (just as on GICv2).
ArmPkg/ArmMmuLib: avoid type promotion in TCR_EL1 assignment
Commit fafb7e9c110e ("ArmPkg: correct TTBR1_EL1 settings in TCR_EL1")
introduced a symbolic constant TCR_TG1_4KB which resolves to (2 << 30),
and ORs it into the value to be written into TCR_EL1 (if executing at
EL1). Since the constant is implicitly typed as signed int, and has the
sign bit set, the promotion that occurs when casting to UINT64 results
in a TCR value that has bits [63:32] all set, which includes mostly
RES0 bits but also the TBIn, AS and IPS fields.
So explicitly redefine all TCR related constants as 'unsigned long'
types, using the UL suffix. To avoid confusion in the future, the
inappropriately named VTCR_EL23_xxx constants have the leading V
removed, and the actual VTCR_EL2 related constants are dropped, given
that we never configure stage 2 translation in UEFI.
Jeff Fan [Fri, 1 Jul 2016 06:52:12 +0000 (14:52 +0800)]
UefiCpuPkg/CpuMpPei: Dump message if microcode signature not matched
Verification microcode signature is one enhancement and not one requirement from
IA32 SDM. This update is just to dump debug message instead of ASSERT() if the
updated microcode signature does not match the loaded microcode signature.
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Jeff Fan [Fri, 1 Jul 2016 06:51:10 +0000 (14:51 +0800)]
UefiCpuPkg/CpuMpPei: Skip microcode check/load if it has been loaded
Actually, there is only one microcode region in platform. If microcode has been
loaded, its signature will not be zero and should be loaded successfully.
We needn't to check microcode region and load microcode again. This update is to
skip checking/loading microcode if current microcode signature is not zero.
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Laszlo Ersek [Thu, 30 Jun 2016 18:16:06 +0000 (20:16 +0200)]
OvmfPkg: add PciHotPlugInitDxe
After IncompatiblePciDeviceSupportDxe, this is another small driver /
protocol implementation that tweaks the behavior of the PCI bus driver in
edk2.
The protocol is specified in the Platform Init Spec v1.4a, Volume 5,
Chapter 12.6 "PCI Hot Plug PCI Initialization Protocol". This
implementation steers the PCI bus driver to reserve the following
resources ("padding") for each PCI bus, in addition to the BARs of the
devices on that PCI bus:
- 2MB of 64-bit non-prefetchable MMIO aperture,
- 512B of IO port space.
The goal is to reserve room for devices hot-plugged at runtime even if the
bridge receiving the device is empty at boot time.
The 2MB MMIO size is inspired by SeaBIOS. The 512B IO port size is
actually only 1/8th of the PCI spec mandated reservation, but the
specified size of 4096 has proved wasteful (given the limited size of our
IO port space -- see commit bba734ab4c7c). Especially on Q35, where every
PCIe root port and downstream port qualifies as a separate bridge (capable
of accepting a single device).
Test results for this patch:
- regardless of our request for 64-bit MMIO reservation, it is downgraded
to 32-bit,
- although we request 512B alignment for the IO port space reservation,
the next upstream bridge rounds it up to 4096B.
Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Suggested-by: Andrew Fish <afish@apple.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Section 7.8.2 of the PCI Express specification (r4.0 v0.3), entitled "PCI
Express Capabilities Register (Offset 02h)", and section 7.8.9 "Slot
Capabilities Register (Offset 14h)" of the same, describe the conditions
when a PCIe port should be considered "supporting hotplug":
- it should be a root complex port or a switch downstream port, and
- it should have the "Slot Implemented" bit set in the Express
Capabilities Register, and
- it should have the "Hot-Plug Capable" bit set in the Slot Capabilities
Register.
The first two sub-conditions are already implemented in at least two open
source projects I could find:
- in SeaBIOS by Marcel Apfelbaum: "hw/pci: reserve IO and mem for pci
express downstream ports with no devices attached"
<https://code.coreboot.org/p/seabios/source/commit/3aa31d7d6375>,
- in edk2 itself, in the implementation of the "PCI" UEFI Shell command:
see the "PcieExplainTypeSlot" case label in function
PciExplainPciExpress(), file
"ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c".
PciBusDxe recognizes such PCIe ports as bridges, but it doesn't realize
they support hotplug. In turn PciBusDxe omits getting any resource padding
information from the platform's EFI_PCI_HOT_PLUG_INIT_PROTOCOL for these
bridges:
GatherPpbInfo() [PciEnumeratorSupport.c]
GetResourcePaddingPpb() [PciResourceSupport.c]
GetResourcePaddingForHpb() [PciHotPlugSupport.c]
IsPciHotPlugBus() [PciHotPlugSupport.c]
//
// returns FALSE
//
//
// the following is not reached:
//
gPciHotPlugInit->GetResourcePadding()
Implement a function called SupportsPcieHotplug() for identifying such
ports, and call it from IsPciHotPlugBus() (after the call to IsSHPC()).
Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
Laszlo Ersek [Thu, 30 Jun 2016 23:44:38 +0000 (01:44 +0200)]
MdeModulePkg/PciBusDxe: look for the right capability in IsSHPC()
The PCI Hot Plug capability register block is marked with capability ID
0x0C (EFI_PCI_CAPABILITY_ID_SHPC), not 0x06
(EFI_PCI_CAPABILITY_ID_HOTPLUG).
This bug prevents PciBusDxe from recognizing whether a PCI-to-PCI bridge
supports hotplug. In turn the platform's EFI_PCI_HOT_PLUG_INIT_PROTOCOL is
not consulted for resource padding information:
GatherPpbInfo() [PciEnumeratorSupport.c]
GetResourcePaddingPpb() [PciResourceSupport.c]
GetResourcePaddingForHpb() [PciHotPlugSupport.c]
IsPciHotPlugBus() [PciHotPlugSupport.c]
IsSHPC() [PciHotPlugSupport.c]
//
// returns FALSE
//
//
// the following is not reached:
//
gPciHotPlugInit->GetResourcePadding()
Look for the correct capability ID.
Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
The "Pci22.h" header file defines the macro EFI_PCI_CAPABILITY_ID_HOTPLUG
with value 0x06. According to all of:
- later parts of the same header file,
- Appendix H ("Capability IDs") of the PCI Local Bus Specification
Revision 2.3,
- and Chapter 2 ("Capability IDs") of the PCI Code and ID Assignment
Specification Revision 0.9,
0x06 means "CompactPCI Hot Swap". It does not mean "PCI Hot-Plug": that
capability is described by ID 0x0C:
0Ch PCI Hot-Plug -- This Capability ID indicates that the associated
device conforms to the Standard Hot-Plug Controller model.
Therefore EFI_PCI_CAPABILITY_ID_HOTPLUG is arguably a misnomer. PciBusDxe
(mis-)uses EFI_PCI_CAPABILITY_ID_HOTPLUG in the IsSHPC() helper function
to identify PCI Hot-Plug capability.
In order to preserve compatibility with existent code, leave
EFI_PCI_CAPABILITY_ID_HOTPLUG alone, and introduce
EFI_PCI_CAPABILITY_ID_SHPC with the right ID value.
Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
OvmfPkg/PlatformBootManagerLib: remove stale FvFile boot options
Removes any boot options that point to binaries built into the firmware
and have become stale due to any of the following:
- DXEFV's base address or size changed (historical),
- DXEFV's FvNameGuid changed,
- the FILE_GUID of the pointed-to binary changed,
- the referenced binary is no longer built into the firmware.
For example, multiple such "EFI Internal Shell" boot options can coexist.
They technically differ from each other, but may not describe any built-in
shell binary exactly. Such options can accumulate in a varstore over time,
and while they remain generally bootable (thanks to the efforts of
BmGetFileBufferByFvFilePath()), they look bad.
Filter out any stale options.
This functionality is not added to QemuBootOrderLib, because it is
independent from QEMU and fw_cfg.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gary Lin <glin@suse.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
The FDF spec mentions the FvNameGuid statement for [FV.xxxx] sections, but
the detailed description can be found in Volume 3 of the Platform Init
spec (which is at 1.4a currently).
Adding an FvNameGuid statement to [FV.xxx] has the following effects
(implemented by "BaseTools/Source/C/GenFv/GenFvInternalLib.c"):
- The EFI_FIRMWARE_VOLUME_HEADER.ExtHeaderOffset field is set to a nonzero
value, pointing after EFI_FIRMWARE_VOLUME_HEADER itself (although not
directly, see below).
- An EFI_FIRMWARE_VOLUME_EXT_HEADER object is created at the pointed-to
address. This object is not followed by any
EFI_FIRMWARE_VOLUME_EXT_ENTRY (= extension) entries, so it only
specifies the Name GUID for the firmware volume.
The EFI_FIRMWARE_VOLUME_EXT_HEADER for each firmware volume can be found
in the Build directory as a separate file (20 bytes in size):
Build/Ovmf*/*_GCC*/FV/*.ext
- The new data consume 48 bytes in the following volumes: SECFV,
FVMAIN_COMPACT, DXEFV. They comprise:
- 16 padding bytes,
- EFI_FFS_FILE_HEADER2 (8 bytes in total: no Name and ExtendedSize
fields, and Type=EFI_FV_FILETYPE_FFS_PAD),
- EFI_FIRMWARE_VOLUME_EXT_HEADER (20 bytes, see above),
- 4 padding bytes.
(The initial 16 padding bytes and the EFI_FFS_FILE_HEADER2 structure are
the reason why EFI_FIRMWARE_VOLUME_HEADER.ExtHeaderOffset does not point
immediately past EFI_FIRMWARE_VOLUME_HEADER.)
The sizes of the firmware volumes don't change, only their internal
usages grow by 48 bytes. I verified that the statements and calculations
in "OvmfPkg/DecomprScratchEnd.fdf.inc" are unaffected and remain valid.
- The new data consume 0 bytes in PEIFV. This is because PEIFV has enough
internal padding at the moment to accomodate the above structures
without a growth in usage.
In the future, firmware volumes can be identified by Name GUID (Fv(...)
device path nodes), rather than memory location (MemoryMapped(...) device
path nodes). This is supposed to improve stability for persistent device
paths that refer to FFS files; for example, UEFI boot options.
Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Suggested-by: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Assign name GUIDs to the FVs that may appear in DevicePath references to
things like the UiApp and the UEFI Shell. This prevents these device
paths from changing inadvertently when the FV ends up in a different
memory location due to external occurrences such as, e.g., a change in
the amount of system memory.
All three current ArmVirtPkg have identical [Rules] sections in their
FDF definitions, and ideally, they should remain that way. So factor
out the definitions into a separate include file, and replace the
existing definitions with !include directives.
ArmVirtPkg/ArmVirtQemu: factor out shared FV.FvMain definition
The FDF definition of [FV.FvMain] is identical between ArmVirtQemu and
ArmVirtQemuKernel, and needs to remain that way. So factor it out into
a separate include file, and replace both definitions with an !include
directive.
ArmVirtPkg: align ArmVirtQemuKernel with ArmVirtQemu
The platform ArmVirtQemuKernel is intended as an alternative for
ArmVirtQemu that only deviates in the way it is invoked by QEMU, either
from flash address 0x0 (the default ARM reset vector) or via the Linux
kernel boot protocol. So add VirtioRngDxe and HighMemDxe here as well.
ArmVirtPkg/HighMemDxe: allow patchable PCD for PcdSystemMemoryBase
Redefine the reference to PcdSystemMemoryBase in HighMemDxe.inf as
a plain [Pcd] rather than [FixedPcd] (and fix up the code as
appropriate). This allows us to align ArmVirtQemuKernel with
ArmVirtQemu, given that the former uses a patchable PCD not a fixed
PCD.
MdeModulePkg AtaBusDxe: Fix ATA commands cannot be sent to some devices
If there is no port multiplier (PortMultiplierPort = 0xFFFF), current code
in functions TransferAtaDevice() and TrustTransferAtaDevice() will always
set the DEV bit of the ATA device register. It causes that ATA commands
cannot be sent to some ATA hard drives.
The current implementation calls both pack() and Buffer.write() Size
times. The new implementation calls both of these methods only once; the
full data to write are constructed locally [1]. The range() function is
replaced by xrange() because the latter is supposed to be faster / lighter
weight [2].
On my laptop, I tested the change as follows: I pre-built the series at
[3] with
Ruiyu Ni [Tue, 12 Jul 2016 07:10:09 +0000 (15:10 +0800)]
ShellBinPkg: Ia32/X64 Shell binary update.
The binaries of ShellBinPkg are generated with ShellPkg project c882bdc6712314f255c92d7c951eaf9760a9de38.
The binaries are built with no debug information by building with "RELEASE" target.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
The bug existed in replacing AsciiStrToUnicodeStr with AsciiStrToUnicodeStrS,
since MacString now is a pointer, the value sizeof(MacString)/sizeof (MacString[0])
is not correct here as the third parameter.
Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
- abstrated to abstracted
- accessibla to accessible
- addres to address
- apropriate to appropriate
- arry to array
- availabe to available
- avaliable to available
- becasue to because
- correponding to corresponding
- etablished to established
- exeuction to execution
- extensiable to extensible
- fileds to fields
- loadding to loading
- ptototypes to prototypes
- prococol protocol
- requried to required
- resoruce to resource
- runing to running
- uild to build
Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Star Zeng [Fri, 8 Jul 2016 02:37:46 +0000 (10:37 +0800)]
MdeModulePkg MemoryProfile.h:two bytes of Reserved[4] as ActionStringOffset
At 94092aa60341a3e4b1e1ea7c362781b8404ac538, we extended
MEMORY_PROFILE_ALLOC_INFO to add ActionStringOffset and
Reserved2[6] fields, that was not aware the Reserved[4]
field can be reused to have better memory profile database
size efficiency.
With the patch, PcdMemoryProfilePropertyMask|0x3 and
PcdMemoryProfileMemoryType|0xffff, the memory profile
database size can be reduced as below on my sample platform.
ArmVirtPkg/PlatformBootManagerLib: Postpone the shell registration
This patch ports Gary's OvmfPkg commit 14b2ebc30c8b to ArmVirtPkg.
Turns out Gary's argument in 14b2ebc30c8b is not only valid for Xen. The
same situation arises with QEMU if:
- the user specifies no boot order via fw_cfg at all (so QemuBootOrderLib
won't touch the boot order), and
- the varstore file has just been created from the varstore template.
In this case the user is dropped to the UEFI shell (because the shell is
registered earlier than all the auto-generated options), which is likely
not what the user wants.
Getting openssl 1.0.2g building with ARM RVCT requires a change to
ignore an unset variable used before set was necessary.
(NOTE: This was fixed in OpenSSL 1.1 HEAD with commit d9b8b89bec4480de3a10bdaf9425db371c19145b, and can be dropped then.)
corrects x509_vfy.c(875): error C3017: ok may be used before being set
Evan Lloyd [Mon, 20 Jun 2016 18:43:04 +0000 (19:43 +0100)]
ArmPlatformPkg: Set Juno debug serial port defaults
Juno has several serial ports, one of which may be used for a remote
debug interface (e.g. gdb, WinDbg). The debug serial port needs to
be distinct from that used for UEFI trace to prevent corruption of
debugger protocol messaging.
The UEFI spec requires that serial devices be initialised to default
settings. (11.8 Serial I/O Protocol - "The default attributes for all
UART-style serial device interfaces are: 115,200 baud, ..."
and 17.3.3 EFI Debugport Variable - "These defaults must be used in the
absence of a DEBUGPORT variable...")
This change adds initialization of the serial device reported in the
ACPI DBG2 table. The initialisation is done early in the boot to allow
the possibility of remote debug of UEFI itself.
NOTE: This is functionally dependent on the DBG2 table being updated in
OpenPlatformPkg, but is required as a precursor to that change.
ShellPkg:Ping: Ping command hangs with intermittent packet losses
When we have intermittent loss of packets, ping command doesnt
return to Shell prompt. It keeps looping in the while (Status
==EFI_NOT_READY) since Private->RxCount will never reach
Private->SendNum. Addresses the issue with the use of a new varibale
in the PRIVATE structure.
Ard Biesheuvel [Thu, 16 Jun 2016 10:21:50 +0000 (12:21 +0200)]
ArmPkg/ArmMmuLib: add PEI specific version of ArmMmuLib
This introduces a special version of ArmMmuLib for PEIMs that takes care
only to perform cache maintenance on the live entry replacement routine
if the module is not executing in place. Not only is such cache maintenance
unnecessary in that case, it may be actively harmful on some systems that
fail to tolerate cache maintenance operations on NOR flash regions.
Ard Biesheuvel [Thu, 16 Jun 2016 09:51:10 +0000 (11:51 +0200)]
ArmPkg ArmVirtPkg MdeModulePkg: switch to separate ArmMmuLib
Switch all users of ArmLib that depend on the MMU routines to the new,
separate ArmMmuLib. This needs to occur in one go, since the MMU
routines are removed from ArmLib build at the same time, to prevent
conflicting symbols.
Ard Biesheuvel [Wed, 15 Jun 2016 16:49:09 +0000 (18:49 +0200)]
ArmPkg: introduce base ArmMmuLib implementation
This base library encapsulates the MMU manipulation routines that have been
factored out of ArmLib. The functionality covers initial creation of the 1:1
mapping in the page tables, and remapping regions to change permissions or
cacheability attributes.
Dandan Bi [Thu, 7 Jul 2016 02:58:14 +0000 (10:58 +0800)]
IntelFrameworkModulePkg/LegacyUi: Get legacy options when open legacy form
The LegacyBootMaintUiLib depends on the LegacyBootManagerLib to realize its
functionality, the LegacyBootManagerLib may initialize after
LegacyBootMaintUiLib, so the functionality of LegacyBootMaintUiLib may
be incorrect. Now we fix this issue by executing the related codes when
opening the legacy forminstead in its the constructor function. Because
when opening the legacy form, the LegacyBootManagerLib must have been
initialized.
Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
Dandan Bi [Thu, 30 Jun 2016 03:37:56 +0000 (11:37 +0800)]
MdeModulePkg/BootMaintUiLib: Update menus when open BMM form
BootMaintenanceManagerUiLib depend on the LeagcyBootMaintUiLib to show the
legacy menus. So we need to do the actions related to LegacyUi in BMM
after the LeagcyBootMaintUiLib have been initialized. So now : 1). update
menus (including legacy menus), 2) re-scan boot options (including legacy
boot option) when opening the BMM form. We think when opening BMM form,
the LeagcyBootMaintUiLib must have been initialized.
Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
Dandan Bi [Mon, 20 Jun 2016 10:24:34 +0000 (18:24 +0800)]
MdeModulePkg/HiiDB: Record fail info if fail to save data for EfiVarStore
HiiConfigRoutingRouteConfig function returns 'Progress' to indicate
the failure info in the ConfigResp string. But when fail to route the
ConfigResp for EfiVarStore, it doesn't return the correct failure info.
Now this patch is to fix this issue and add debug info let user know the
reason of failure.
Ruiyu Ni [Tue, 5 Jul 2016 09:46:07 +0000 (17:46 +0800)]
MdeModulePkg/Bds: MemoryTypeInformation excludes boot option mem use
The patch re-orders the sequences by putting updating memory type
information before loading the boot option so that the reserved
memory usage by HTTP RAM disk boot can be excluded by the memory
type information updating.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Sunny Wang <sunnywang@hpe.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
IP4_CONFIG2_INSTANCE->DataItem is used to save the configuration
data to NV variable. When the policy is changed from static to
DHCP, DnsServers info will be cleaned from DataItem first
(See Ip4Config2SetPolicy), it's correct because DnsServers info
should not be saved to NV variable.
But if there is any DnsServers info received from DHCP message, it
will be reset to DataItem again (See Ip4Config2SetDnsServerWorker),
which may cause the NV variable contain the DnsServers info while
the policy is DHCP (See Ip4Config2WriteConfigData).
Then, while the platform is reset, the issue happened. Because
Ip4Config2DataTypeDnsServer is set under DHCP policy, which is not
allowed by UEFI Spec and error returned.
This patch is used to resolve this potential issue.
Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Zhang Lubo <lubo.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Zhang Lubo <lubo.zhang@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
MdeModulePkg/BootMaintUi: Add error handling codes when AllocatePool fail
The AllocateCopyPool in function ExtractFileNameFromDevicePath
may return NULL, so need to do error handling. This patch is to
add error handling codes for function ExtractFileNameFromDevicePath
and its caller functions.
Cc: Eric Dong <eric.dong@intel.com> Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
MdeModulePkg UefiPxeBcDxe: Fix build error for lastest VS2015 compiler
The UefiPxeBcDxe module encounters a build error for IA32 arch using the
latest version of VS2015:
UefiPxe4BcDxe.lib(PxeBcDhcp.obj) : error LNK2001: unresolved external
symbol __allmul
The cause is line 1659 in file
MdeModulePkg/Universal/Network/UefiPxeBcDxe/PxeBcDhcp.c. The third
parameter for gBS->SetTimer() function is of type UINT64, so the
multiplication should use the MultU64x32() function.
Sunny Wang [Fri, 1 Jul 2016 02:38:24 +0000 (10:38 +0800)]
MdeModulePkg: Skip registering BootManagerMenu if absent
This is a enhancement to support the case when platform firmware
doesn't support Boot Manager Menu. For now, if BootManagerMenu FFS
can not be retrieved from FV, BDS core code will still register a
boot option for it. Then, this non-functional boot option will
still be booted by user's request (like HotKey or Exit from shell)
to cause additional boot time and error status code reported.
Therefore, it would be good to skip BootManagerMenu boot option
registration and then return error status and Invalid BootOption
data for this case so that the BootManagerBoot() or other consumers
can directly return without doing anything.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sunny Wang <sunnywang@hpe.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>