Laszlo Ersek [Tue, 17 May 2016 17:22:17 +0000 (19:22 +0200)]
OvmfPkg, ArmVirtPkg: clean up SetBootOrderFromQemu() parameter list
With OvmfPkg's original QemuBootOrderLib (and USE_OLD_BDS) gone, we no
longer need the BootOptionList parameter in the SetBootOrderFromQemu()
prototype. Update the library class header file (including the function's
documentation), and adapt the library instance and the call sites.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gary Ching-Pang Lin <glin@suse.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Laszlo Ersek [Tue, 17 May 2016 16:47:02 +0000 (18:47 +0200)]
OvmfPkg/README: refer to MdeModulePkg & PlatformBootManagerLib in examples
The "UNIXGCC Debug" section happens to name PlatformBdsLib and
IntelFrameworkModulePkg's BdsDxe as examples. OVMF will soon stop offering
those even as a fallback option.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gary Ching-Pang Lin <glin@suse.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Yonghong Zhu [Fri, 6 May 2016 07:20:23 +0000 (15:20 +0800)]
BaseTools/GenFds: enhance to get TOOL_CHAIN_TAG and TARGET value
when user don't set TOOL_CHAIN_TAG and TARGET by –D Flag, then GenFds
would report failure for format:
FILE DATA = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/testfile
so this patch enhance to get the TOOL_CHAIN_TAG and TARGET value by
following priority (high to low): 1. the Macro value set by -D Flag;
2. Get the value by the -t/-b option. 3. get the value from target.txt
file. Besides, this patch also remove the error checking for missing
-t/-b option.
Marvin H?user [Thu, 19 May 2016 19:04:02 +0000 (03:04 +0800)]
ShellPkg/App: Fix memory leak and save resources.
1) RunSplitCommand() allocates the initial SplitStdOut via
CreateFileInterfaceMem(). Free SplitStdIn after the swap to fix
the memory leak.
2) In RunSplitCommand(), SplitStdOut is checked for equality with
StdIn. This cannot happen due to the if-check within the swap.
Hence remove it.
3) UefiMain() doesn't free SplitList. Delete all list entries and
reinitialize the list when in DEBUG. This does not include the
CreateFileInterfaceMem()-allocated SplitStd mentioned in 1), so
keep the ASSERT() until resolved.
Jeff Fan [Tue, 22 Mar 2016 02:08:03 +0000 (10:08 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Move forward MP sync data initialization
Move MP sync data initialization in front of the place that initialize
page table, because the page fault spin lock is allocated in
InitializeMpSyncData() while it is initialized in SmmInitPageTable().
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
The driver entry point calls gDS->SetMemorySpaceAttributes().
This interface may return EFI_NOT_AVAILABLE_YET when CPU Arch
protocol is not available.
So we need to list CpuArch protocol in its INF dependency section.
Maurice Ma [Mon, 23 May 2016 21:51:48 +0000 (14:51 -0700)]
CorebootPayloadPkg: Consume PlatformHookLib in PlatformBootManagerLib
When coreboot uses different baud rate from the default (115200), the
current BDS driver will not be able to enable serial console display
due to the inconsistent serial port PCD settings. By adding the
PlatformHookLib reference in the inf file, it will enforce the PCDs
to be aligned with what have been passed from coreboot.
Cc: Prince Agyeman <prince.agyeman@intel.com> Cc: Lee Leahy <leroy.p.leahy@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Lee Leahy <leroy.p.leahy@intel.com>
Maurice Ma [Mon, 16 May 2016 22:02:44 +0000 (15:02 -0700)]
CorebootPayloadPkg: Use generic PciBus/PciHostBridge driver
Current CorebootPayloadPkg uses PciBusNoEnumerationDxe and
PciRootBridgenoEnumerationDxe copied from the DuetPkg. Now it will
switch to use the standard PciBusDxe and PciHostBridgeDxe from
MdeModulePkg. As a result, a coreboot specific PciHostBridgeLib
is added to collect pre-allocated PCI resources.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Leahy, Leroy P [Mon, 23 May 2016 15:45:07 +0000 (08:45 -0700)]
CorebootModulePkg/CbSupportDxe: Text only support
Not all platforms have or support graphics. The ASSERT that the
frame buffer HOB is not NULL is fatal for these platforms. Convert
this into an if statement and make the related PcdSet* calls c
onditional on locating the frame buffer HOB.
Change-Id: Ibdc4bf5359571f3ce1555efcaf4657b8e363b2cd
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Leahy, Leroy P [Mon, 23 May 2016 15:45:28 +0000 (08:45 -0700)]
CorebootPayloadPkg/PlatformBootManagerLib: Fix Linux build
Fix Linux build failure with GCC 4.8.4 due to missing braces.
Change-Id: Ic0de6520605149f1bb74f8b60ce8cab8beda10a4
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Ruiyu Ni [Fri, 1 Apr 2016 08:14:07 +0000 (16:14 +0800)]
MdeModulePkg/PciBus: do not improperly degrade resource
PciBus driver originally always degrade (64->32) the MMIO resource
for PCI BAR when the PCI device contains option ROM.
But the degrade causes the PCI device can only use resource below 4GB
which makes the resource allocation fails when the PCI device wants
very big MMIO.
The patch follows the PI spec (ECR 1529) to honor the granularity
setting for PCI BAR from IncompatiblePciDeviceSupport so that even
for PCI device which contains option ROM, the degrade doesn't happen
if IncompatiblePciDeviceSupport returns 64 as granularity.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
Ruiyu Ni [Wed, 18 May 2016 05:18:28 +0000 (13:18 +0800)]
PcAtChipsetPkg/PcRtc: get century RTC address in entry point
When ACPI table is installed before PcRtc driver runs,
the ACPI table installation callback isn't called which causes the
century value isn't written to the CMOS.
The patch calls GetCenturyRtcAddress() in entry point to fix
the bug.
Jiewen Yao [Fri, 20 May 2016 12:07:42 +0000 (20:07 +0800)]
IntelFsp2WrapperPkg: Update gFspWrapperTokenSpaceGuid to gIntelFsp2WrapperTokenSpaceGuid.
We updated gIntelFspPkgTokenSpaceGuid to gIntelFsp2PkgTokenSpaceGuid
in IntelFsp2Pkg, but we miss the update in IntelFsp2WrapperPkg.
This patch fixed the issue and made them consistent.
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Satya P Yarlagadda <satya.p.yarlagadda@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Maurice Ma [Tue, 17 May 2016 16:34:33 +0000 (09:34 -0700)]
CorebootPayloadPkg: Remove BdsPlatform library
Since the new BdsDxe driver in MdeModulePkg is used, the old
BdsPlatform library is not used any more and should be removed.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Maurice Ma [Tue, 17 May 2016 16:33:28 +0000 (09:33 -0700)]
CorebootPayloadPkg: Switch to use generic BdxDxe driver
Switch over to use BdxDxe generic driver in MdeModulePkg.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
In order to use the generic BdsDxe in MdeModulePkg, a platform
specific PlatfromBootManagerLib is required. This library will
help update the ConIn, ConOut and ErrOut variables.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Maurice Ma [Tue, 17 May 2016 16:30:49 +0000 (09:30 -0700)]
CorebootModulePkg: Add video resolution PCD initialization
The video console resolution related PCDs are required to be
initialized after switching to use the generic BdsDxe driver
in MdeModulePkg.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Maurice Ma [Wed, 18 May 2016 19:30:06 +0000 (12:30 -0700)]
CorebootModulePkg: Convert TAB to white space for CbSupportDxe driver
Convert TAB to white space for CbSupportDxe driver.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Star Zeng [Wed, 18 May 2016 09:04:23 +0000 (17:04 +0800)]
MdePkg: Clarification to the return status of EFI_PEIM_NOTIFY_ENTRY_POINT
In Previous PI spec (< PI1.4a) Volume 1, Section 7.4.1, the callback
EFI_PEIM_NOTIFY_ENTRY_POINT is defined. A description for the arguments
are provided but not for the EFI_STATUS return value.
PI1.4a updated EFI_PEIM_NOTIFY_ENTRY_POINT definition to include a new
paragraph with this sentence after the arguments:
"The status code returned from this function is ignored"
This patch is to follow PI1.4a spec to update the code.
Star Zeng [Wed, 18 May 2016 05:59:33 +0000 (13:59 +0800)]
MdePkg: Update EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE to 0x00080000
Previous PI spec (< PI1.4a) has EFI_RESOURCE_ATTRIBUTE_PERSISTENT and
EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE with same value 0x00800000.
To resolve the conflict, PI1.4a updated
EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE to 0x00080000, this patch
is to follow PI1.4a spec to update the code.
Qiu Shumin [Fri, 20 May 2016 04:48:44 +0000 (12:48 +0800)]
ShellPkg/Bcfg: Add support for 'addp' command.
Until now the 'addp' command has been handled in the same way as 'add'.
Just copy the DevicePath starting from the Hard Drive node when 'addp'
is used.
MdePkg IndustryStandard/Scsi.h: Add Unmap command support
According to the SCSI Block Commands - 4 (SBC-4) spec, the patch add SCSI
unmap command support in IndustryStandard/Scsi.h.
The following changes have been made:
1. Add SCSI unmap command OP Code
2. Update the structure definition for Block Limits VPD page
3. Add structure definitions for UNMAP parameter list header & UNMAP block
descriptor.
Gary Lin [Fri, 20 May 2016 03:18:16 +0000 (11:18 +0800)]
NetworkPkg/HttpDxe: Don't free Wrap in HttpTcpReceiveNotifyDpc
The HTTP Token Wrap is created in EfiHttpResponse() and then passed
to the deferred Receive event callback, HttpTcpReceiveNotifyDpc.
HttpTcpReceiveHeader and HttpTcpReceiveBody use a Tcp polling loop to
monitor the socket status and trigger the Receive event when a new
packet arrives. The Receive event brings up HttpTcpReceiveNotifyDpc
to process the HTTP message and the function will set Wrap->TcpWrap.IsRxDone
to TRUE to break the Tcp polling loop.
However, HttpTcpReceiveNotifyDpc mistakenly freed Wrap, so the Tcp
polling loop was actually checking a dead variable, and this led the
system into an unstable status.
Given the fact that the HTTP Token Wrap will be freed in EfiHttpResponse
or HttpResponseWorker, this commit removes every "FreePool (Wrap)" in
HttpTcpReceiveNotifyDpc.
v2:
* Free Wrap after HttpTcpReceiveBody returns normally.
Fu Siyuan [Fri, 6 May 2016 02:30:09 +0000 (10:30 +0800)]
ShellPkg: Add argument to set block size for tftp command.
TFTP block size has a big impact on the transmit performance, this patch is to
add new argument [-s <block size>] for shell "tftp" command to configure the
block size for file download.
Jiewen Yao [Wed, 18 May 2016 12:40:01 +0000 (20:40 +0800)]
IntelFsp2WrapperPkg/FspmWrapperPeim: Update debug message match code.
Update function name in debug message to match code.
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Amy Chan <amy.chan@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Jiewen Yao [Fri, 20 May 2016 00:46:58 +0000 (08:46 +0800)]
IntelFsp2Pkg/FspApi.h: Add comment for structure definition.
Add doxygen style comment for structure definition.
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Satya P Yarlagadda <satya.p.yarlagadda@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
SMRR range size and alignment should follow the rules like MTRR:
a. The minimum range size is 4 KBytes and the base address of the
range must be on at least a 4-KByte boundary.
b. For ranges greater than 4 KBytes, each range must be of length
2^n and its base address must be aligned on a 2^n boundary, where
n is a value equal to or greater than 12. The base-address
alignment value cannot be less than its length.
Thus, it could meet "Address_Within_Range AND PhysMask = PhysBase
AND PhysMask".
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
SMRR range size and alignment should follow the rules like MTRR:
a. The minimum range size is 4 KBytes and the base address of the
range must be on at least a 4-KByte boundary.
b. For ranges greater than 4 KBytes, each range must be of length
2^n and its base address must be aligned on a 2^n boundary, where
n is a value equal to or greater than 12. The base-address
alignment value cannot be less than its length.
Thus, it could meet "Address_Within_Range AND PhysMask = PhysBase
AND PhysMask".
Cc: Jeff Fan <jeff.fan@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
Dong, Eric [Wed, 18 May 2016 05:12:41 +0000 (13:12 +0800)]
BootMaintenanceMangerUiLib: Save mode info for later use.
In current code, we use different output modes for boot phase
and setup phase. When split BootMaintenanceMangerUiLib from
UiApp code, we not add logic to save the boot phase mode info
which will be used later. This change add this logic.
Dong, Eric [Wed, 18 May 2016 05:12:40 +0000 (13:12 +0800)]
MdeModulePkg BootManagerUiLib: Save mode info for later use.
In current code, we use different output modes for boot phase
and setup phase. When split BootManagerUiLib from UiApp code,
we not add logic to save the boot phase mode info which will
be used later. This change add this logic.
Zhang, Chao B [Tue, 17 May 2016 07:35:21 +0000 (15:35 +0800)]
MdeModulePkg: PeiCore: Fix PEI Multiple Sub-FV Support issue
FirmwareVolmeInfoPpiNotifyCallback is re-enterable during FV process. Since PrivateData->FVCount increases when processing each sub FVs, need to cache Parent FV count in stack before processing any sub FV.
Maurice Ma [Wed, 18 May 2016 23:27:07 +0000 (16:27 -0700)]
CorebootModulePkg: Use PCD for memory type information initialization
CorebootModulePkg currently uses a hardcoded table for memory type
initialization. It might need to be adjusted by platform to reduce
the memory fragmentation. So changing to use PCDs rather than
constant values to facilitate the customization.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
Ma, Maurice [Mon, 16 May 2016 21:26:06 +0000 (05:26 +0800)]
MdeModulePkg: Skip invalid bus number scanning in PciBusDxe driver
When PcdPciDisableBusEnumeration is enabled, the PciBus driver
might get into a dead loop if the secondary bus register on PCI
bridge is not programmed or programmed improperly. Adding this
check to avoid any potential dead loop caused by this.
Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Lee Leahy <Leroy.p.leahy@intel.com>
Yonghong Zhu [Tue, 10 May 2016 09:58:26 +0000 (17:58 +0800)]
BaseTools: support private package definition
EDKII build spec and DEC spec updated to support private package
definition.
If GUID, Protocol or PPI is listed in a DEC file, where the Private
modifier is used in the section tag ([Guids.common.Private] for example),
only modules within the package are permitted to use the GUID, Protocol
or PPI. If a module or library instance outside of the package attempts
to use the item, the build must fail with an appropriate error message.
Laszlo Ersek [Mon, 9 May 2016 20:54:36 +0000 (22:54 +0200)]
OvmfPkg/PlatformPei: provide 10 * 4KB of PCI IO Port space on Q35
This can accommodate 10 bridges (including root bridges, PCIe upstream and
downstream ports, etc -- see
<https://bugzilla.redhat.com/show_bug.cgi?id=1333238#c12> for more
details).
10 is not a whole lot, but closer to the architectural limit of 15 than
our current 4, so it can be considered a stop-gap solution until all
guests manage to migrate to virtio-1.0, and no longer need PCI IO BARs
behind PCIe downstream ports.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
Laszlo Ersek [Mon, 9 May 2016 20:39:44 +0000 (22:39 +0200)]
OvmfPkg/PlatformPei: set PCI IO port aperture dynamically
Make PcdPciIoBase and PcdPciIoSize dynamic PCDs, and set them in
MemMapInitialization(), where we produce our EFI_RESOURCE_IO descriptor
HOB. (The PCD is consumed by the core PciHostBridgeDxe driver, through our
PciHostBridgeLib instance.)
Take special care to keep the GCD IO space map unchanged on all platforms
OVMF runs on.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
Laszlo Ersek [Mon, 9 May 2016 19:04:47 +0000 (21:04 +0200)]
OvmfPkg: determine PMBA value dependent on host bridge device ID
In this patch, the AcpiTimerLib instances, ResetSystemLib, and PlatformPei
are modified together in order to keep VMs functional across a bisection:
they all must agree on the PMBA value used.
ResetSystemLib must not use dynamic PCDs. With SOURCE_DEBUG_ENABLE, it
gets linked into the debug agent, therefore the same restrictions apply to
it as to BaseRomAcpiTimerLib. Luckily, AcpiPmControl() is only used for
powering off the virtual machine, thus the extra cost of a PCI config
space read, compared to a PcdGet16(), should be negligible.
This is the patch that moves the PMBA to IO port 0x0600 on Q35 in
practice.
The ResetSystemLib change is easiest to verify with the "reset -s" command
in the UEFI shell (which goes through gRT->ResetSystem() and, in OVMF,
PcAtChipsetPkg/KbcResetDxe).
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
Laszlo Ersek [Mon, 9 May 2016 17:46:00 +0000 (19:46 +0200)]
OvmfPkg: introduce ICH9_PMBASE_VALUE
According to the ICH9 spec, PMBASE "provides 128 bytes of I/O space for
ACPI, GPIO, and TCO logic. This is placed on a 128-byte boundary".
On the Q35 machine type of QEMU, our current PMBASE setting of 0xB000 is
the only thing that prevents us from lowering the base of the PCI IO port
aperture from 0xC000. (The base must be aligned to 0x1000 due to PCI
bridge requirements.)
By moving our PMBASE to 0x0600 (moving the register block to
0x0600..0x067F inclusive), which is also what SeaBIOS uses on Q35, we will
be able to lower the PCI IO port aperture base to 0x6000 (the next IO port
under it being taken by the "vmport" device, at fixed 0x5658), while
steering clear of other QEMU devices.
On PIIX4, freeing up the 0x1000 IO ports at 0xB000 wouldn't help much,
because the 0xA000 block right below it is occupied by unmovable devices
(see <https://bugzilla.redhat.com/show_bug.cgi?id=1333238#c19> for
details).
Doing this for Q35 only has two more benefits:
- It won't interfere with Xen guests,
- The Q35 machine type with the smallest version number is "pc-q35-2.4",
which is guaranteed to have an ACPI generator. This matters because the
ACPI tables (FACP, DSDT) have to reflect the PM base address that we
program.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
Laszlo Ersek [Mon, 9 May 2016 18:05:18 +0000 (20:05 +0200)]
OvmfPkg: add and use industry standard macro PIIX4_PMBA_MASK
We already have the identical purpose (but different value) macro for
ICH9, namely ICH9_PMBASE_MASK in
"OvmfPkg/Include/IndustryStandard/Q35MchIch9.h".
Also, stop bit-negating signed integer constants.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
Laszlo Ersek [Mon, 9 May 2016 17:26:37 +0000 (19:26 +0200)]
OvmfPkg: replace PcdAcpiPmBaseAddress with PIIX4_PMBA_VALUE
In the next patches, we'll differentiate the PMBA IO port address that we
program on PIIX4 vs. Q35.
Normally we'd just turn PcdAcpiPmBaseAddress into a dynamic PCD. However,
because we need this value in BaseRomAcpiTimerLib too (which cannot access
RAM and dynamic PCDs), it must remain a build time constant. We will
introduce its Q35 counterpart later.
As first step, replace the PCD with a new macro in "OvmfPlatforms.h";
Jordan prefers the latter to fixed PCDs in this instance.
Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
Maurice Ma [Mon, 16 May 2016 15:29:40 +0000 (08:29 -0700)]
CorebootModulePkg: Remove PciSioSerialDxe and SerialDxe driver
CorebootPayloadPkg has been changed to use generic SerialDxe driver
from MdeModulePkg. As part of the clean-up, the overridden SerialDxe
and PciSioSerialDxe drivers in CorebootModulePkg need to be removed.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Dandan Bi [Tue, 10 May 2016 10:51:44 +0000 (18:51 +0800)]
MdeModulePkg/SetupBrowser: Clean the BufferValue for string before use
When copy new string content to BufferValue, need to clean the
BufferValue firstly, or the BufferValue may contain some
content that doesn't belong to the new string.
Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
Laszlo Ersek [Fri, 13 May 2016 09:50:42 +0000 (17:50 +0800)]
MdeModulePkg/BootMaintenanceManagerUiLib: hide library-internal symbol
Static storage duration objects that are internal to a library instance
should:
- either have internal linkage (i.e., be declared STATIC),
- or, if they are referenced in multiple files of the library instance,
prefixed with a word that is specific to the library instance, and
minimizes namespace collisions.
In this case, the "gHiiDriverList" variable (with static storage duration
and external linkage) is defined in both BootMaintenanceManagerUiLib and
UiApp. When these are linked together, GCC catches the multiple external
definitions and aborts the build. (GCC notices this due to commit 214a3b79417f.) Fix the error by applying the first rule above.
Jeff Fan [Tue, 5 Apr 2016 06:28:49 +0000 (14:28 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile: Fix BTS support check bug
SmmProfile feature depends on BTS feature to get the invoker IP (in SMM) from
last branch record. If this feature is not supported, SmmProfile cannot get the
invoker IP (in SMM). Per IA-32 Architectures Software Developer's Manual, BTS
feature is detected by IA32_MISC_ENABLE. If BIT11 of IA32_MISC_ENABLE is set,
BTS is not supported. But current implementation check BIT11 opposite. Also, BTS
feature does not depends on PEBS feature if supported or not.
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Shifflett, Joseph <joseph.shifflett@hpe.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Reported-by: Shifflett, Joseph <joseph.shifflett@hpe.com> Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Shifflett, Joseph <joseph.shifflett@hpe.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Nagaraj Hegde [Fri, 6 May 2016 10:20:00 +0000 (18:20 +0800)]
NetworkPkg:HttpDxe: Code changes to support HTTP PUT/POST operations
Code changes enables HttpDxe to handle PUT/POST operations.
EfiHttpRequest assumes "Request" and "HttpMsg->Headers" can
never be NULL. Also, HttpResponseWorker assumes HTTP Reponse
will contain headers. We could have response which could contain
only a string (HTTP 100 Continue) and no headers. Code changes
tries to do-away from these assumptions, which would enable
HttpDxe to support PUT/POST operations.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hegde, Nagaraj P nagaraj-p.hegde@hpe.com Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>