Ruiyu Ni [Tue, 16 Jan 2018 08:21:42 +0000 (16:21 +0800)]
MdeModulePkg/Ps2Kb: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ruiyu Ni [Fri, 12 Jan 2018 11:29:32 +0000 (19:29 +0800)]
MdeModulePkg/UsbKb: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ruiyu Ni [Fri, 12 Jan 2018 11:26:22 +0000 (19:26 +0800)]
MdeModulePkg/ConSplitter: ReadKeyStrokeEx always return key state
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
Laszlo Ersek [Tue, 30 Jan 2018 14:34:08 +0000 (15:34 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: eliminate conditional jump in IA32 SmmStartup()
SMM emulation under both KVM and QEMU (TCG) crashes the guest when the
"jz" branch, added in commit d4d87596c11d ("UefiCpuPkg/PiSmmCpuDxeSmm:
Enable NXE if it's supported", 2018-01-18), is taken.
Rework the propagation of CPUID.80000001H:EDX.NX [bit 20] to IA32_EFER.NXE
[bit 11] so that no code is executed conditionally.
Cc: Eric Dong <eric.dong@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: http://mid.mail-archive.com/d6fff558-6c4f-9ca6-74a7-e7cd9d007276@redhat.com
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
[lersek@redhat.com: XD -> NX code comment updates from Ray] Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: mark QEMU/TCG as well in the commit message]
Laszlo Ersek [Tue, 30 Jan 2018 13:43:28 +0000 (14:43 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: remove unneeded DBs from IA32 SmmStartup()
The SmmStartup() executes in SMM, which is very similar to real mode. Add
"BITS 16" before it and "BITS 32" after it (just before the @32bit label).
Remove the manual 0x66 operand-size override prefixes, for selecting
32-bit operands -- the sizes of our operands trigger NASM to insert the
prefixes automatically in almost every spot. The one place where we have
to add it back manually is the LGDT instruction. (The 0x67 address-size
override prefix is also auto-generated.)
This patch causes NASM to generate byte-identical object code (determined
by disassembling both the pre-patch and post-patch versions, and comparing
the listings), except:
Laszlo Ersek [Tue, 30 Jan 2018 13:31:23 +0000 (14:31 +0100)]
UefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup()
The gSmmCr3, gSmmCr4, gSmmCr0 and gSmmJmpAddr global variables are used
for patching assembly instructions, thus we can't yet remove the DB
encodings for those instructions. At least we should add the intended
meanings in comments.
This patch only changes comments.
Cc: Eric Dong <eric.dong@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: adapt commit msg to ongoing PatchAssembly discussion]
Yonghong Zhu [Mon, 29 Jan 2018 07:49:56 +0000 (15:49 +0800)]
BaseTools: Fix the bug to align VPD PCD based on value type
Spec required for VOID* VPD Pcd, Ascii string use byte alignment, byte
array use 8-byte alignment, unicode string use 2-byte alignment.
while when the VPD pcd offset use *, the offset generated in the .map
file not follow this rule.
Star Zeng [Thu, 25 Jan 2018 03:20:04 +0000 (11:20 +0800)]
MdeModulePkg PiSmmCore: Set ForwardLink to NULL in RemoveOldEntry()
"Entry->Link.ForwardLink = NULL;" is present in RemoveMemoryMapEntry()
for DxeCore, that is correct.
"Entry->Link.ForwardLink = NULL;" is absent in RemoveOldEntry()
for PiSmmCore, that is incorrect.
Without this fix, when FromStack in Entry is TRUE,
the "InsertTailList (&mMapStack[mMapDepth].Link, &Entry->Link);" in
following calling to CoreFreeMemoryMapStack() will fail as the entry
at mMapStack[mMapDepth] actually has been removed from the list.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Ard Biesheuvel [Thu, 7 Dec 2017 22:43:22 +0000 (22:43 +0000)]
MdeModulePkg/SdMmcPciHcDxe: allow HC capabilities to be overridden
Invoke the newly introduced SD/MMC override protocol to override
the capabilities register after reading it from the device registers,
and to call the pre/post host init and reset hooks at the appropriate
times.
Ard Biesheuvel [Thu, 7 Dec 2017 22:43:21 +0000 (22:43 +0000)]
MdeModulePkg: introduce SD/MMC override protocol
Many ARM based SoCs have integrated SDHCI controllers, and often,
these implementations deviate in subtle ways from the pertinent
specifications. On the one hand, these deviations are quite easy
to work around, but on the other hand, having a collection of SoC
specific workarounds in the generic driver stack is undesirable.
So let's introduce an optional SD/MMC override protocol that we
can invoke at the appropriate moments in the device initialization.
That way, the workaround itself remains platform specific, but we
can still use the generic driver stack on such platforms.
Arthur Heymans [Wed, 24 Jan 2018 10:57:36 +0000 (18:57 +0800)]
CorebootPayloadPkg: Use correct BytesPerScanLine
Fetch BytesPerScanLine from coreboot table to reflect how the actual
framebuffer is set up instead of guessing it from the horizontal
resolution.
This fixes a garbled display when HorizontalResolution * (BitsPerPixel
/ 8) and pFbInfo->BytesPerScanLine don't match.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Benjamin You <benjamin.you@intel.com>
Original code locates the first UnicodeCollation instance in
DXE Core protocol database.
It's not correct considering multiple UnicodeCollation instances
exist in system.
The patch changes logic to find the one that matches the current
system language.
Jian J Wang [Mon, 29 Jan 2018 01:26:31 +0000 (09:26 +0800)]
UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs
The reason doing this is that we found that calling StartupAllAps() to
flush TLB for all APs in CpuDxe driver after changing page attributes
will spend a lot of time to complete. If there are many page attributes
update requests, the whole system performance will be slowed down
explicitly, including any shell command and UI operation.
The solution is removing the flush operation for AP in CpuDxe driver
and let AP flush TLB after woken up.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Jian J Wang [Fri, 26 Jan 2018 08:30:40 +0000 (16:30 +0800)]
UefiCpuPkg/MpInitLib: force flushing TLB for AP in mwait loop mode
The reason doing this is that we found that calling StartupAllAps() to
flush TLB for all APs in CpuDxe driver after changing page attributes
will spend a lot of time to complete. If there are many page attributes
update requests, the whole system performance will be slowed down
explicitly, including any shell command and UI operation.
The solution is removing the flush operation for AP in CpuDxe driver.
Since TLB is always flushed in HLT loop mode, we just need to enforce
a TLB flush for mwait loop mode.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
The above patch miss the case of 64-bit PEI, which will link
X64/MpFuncs.nasm instead of Ia32/MpFuncs.nasm. For X64/MpFuncs.nasm,
ExchangeInfo->ModeHighMemory should be always initialized no matter
if separate wakeup buffer is allocated or not. Ia32/MpFuncs.nasm will
not need ModeHighMemory during AP init. So the changes made in this
patch should not affect the functionality of it.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Star Zeng [Thu, 28 Dec 2017 02:24:29 +0000 (10:24 +0800)]
UefiCpuPkg/MpInitLib: Make sure AP uses correct StartupApSignal
Every processor's StartupApSignal is initialized in
MpInitLibInitialize() before calling CollectProcessorCount().
When SortApicId() is called from CollectProcessorCount(), AP Index
is re-assigned by APIC ID. But SortApicId() forgets to set the
correct StartupApSignal when sorting the AP.
The patch fixes this issue.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com>
Ruiyu Ni [Thu, 25 Jan 2018 09:44:16 +0000 (17:44 +0800)]
MdeModulePkg/Partition: Fix media probe
The call in ProbeMediaStatusEx() to the ReadDisk() function of the
EFI_DISK_IO_PROTOCOL interface implemented in DiskIoDxe/DiskIo.c
crashed in DiskIo2ReadWriteDisk() because of the NULL value of
the destination buffer pointer.
Pass the address of a buffer in the stack instead of a NULL
pointer.
SafeIntLib provides helper functions to prevent integer overflow
during type conversion, addition, subtraction, and multiplication.
Conversion Functions
====================
* Converting from a signed type to an unsigned type of the same
size, or vice-versa.
* Converting to a smaller type that could possibly overflow.
* Converting from a signed type to a larger unsigned type.
Unsigned Addition, Subtraction, Multiplication
===============================================
* Unsigned integer math functions protect from overflow and
underflow (in case of subtraction).
Signed Addition, Subtraction, Multiplication
============================================
* Strongly consider using unsigned numbers.
* Signed numbers are often used where unsigned numbers should
be used. For example file sizes and array indices should always
be unsigned. Subtracting a larger positive signed number from a
smaller positive signed number with SafeInt32Sub() will succeed,
producing a negative number, that then must not be used as an
array index (but can occasionally be used as a pointer index.)
Similarly for adding a larger magnitude negative number to a
smaller magnitude positive number.
* SafeIntLib does not protect you from such errors. It tells you
if your integer operations overflowed, not if you are doing the
right thing with your non-overflowed integers.
* Likewise you can overflow a buffer with a non-overflowed
unsigned index.
Feng, Bob C [Tue, 23 Jan 2018 03:34:45 +0000 (11:34 +0800)]
BaseTools: Fixed some small issues
1. The structure pcd default value should use the default value under sku.
2. Incorrect VpdOffset value for those un-used in module Vpd
3. Add a checkpoint for Structure Pcd Name
Jiaxin Wu [Tue, 23 Jan 2018 07:06:52 +0000 (15:06 +0800)]
MdeModulePkg/UefiBootManagerLib: Skip the DNS device path node check.
After HTTP boot successfully in home mode, the HTTP device path will be
updated accordingly. So, the new device path may be appended with a DNS
device path node. When executing home mode boot again, the original HTTP
device path will mismatch with the new updated one, which will cause the
HTTP boot failure. So, we need update the current match algorithm to match
the correct FilePath. Since the DNS device path is an optional, we can skip
it check.
This patch is to fix above issue.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Jian J Wang [Wed, 24 Jan 2018 01:36:01 +0000 (09:36 +0800)]
UefiCpuPkg/MpInitLib: fix issue in wakeup buffer initialization
To fix an issue in which enabling NX feature will mark the AP wakeup
buffer as non-executable and fail the AP init, the buffer was split
into two part: the lower part in memory within 1MB and the higher part
within allocated executable memory (EfiBootServicesCode). But the
address of higher part memory was stored in lower part memory, which
is actually shared with legacy components and will be overwritten by
LegacyBiosDxe driver if CSM is enabled.
This patch fixes this issue by storing the address of higher part
memory in CpuMpData instead of ExchangeInfo.
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
The patch fixes flush cache issue in
CreateSecondLevelPagingEntryTable().
We found some video cards still not work even they have
been added to the exception list.
In CreateSecondLevelPagingEntryTable(), the check
"(BaseAddress >= MemoryLimit)" may be TRUE and "goto Done"
will be executed, then the FlushPageTableMemory operations
at the end of the function will be skipped.
Instead of "goto Done", this patch uses "break" to break
the for loops, then the FlushPageTableMemory operations
at the end of the function could have opportunity to be
executed.
The patch also fixes a miscalculation for Lvl3End.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Ruiyu Ni [Mon, 22 Jan 2018 06:23:00 +0000 (14:23 +0800)]
MdeModulePkg/PciBusDxe: Install PciEnumerationComplete after PciIo
Per PI spec, the PciEnumerationComplete protocol installation
should be after PciIo installation.
Today's implementation installs the PciEnumerationComplete
after hardware enumeration is completed, but before PciIo
installation.
The change corrects the spec/implementation gap.
The change also benefits certain implementation that depends on
the PciIo handle in PciEnumerationComplete callback.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Ruiyu Ni [Thu, 18 Jan 2018 06:13:32 +0000 (14:13 +0800)]
UefiCpuPkg/MtrrLib: Add comments to recommend to use batch-set API
MtrrSetMemoryAttributesInMtrrSettings() is a batch-set API.
When setting multiple ranges of memory attributes, the single-set
API (MtrrSetMemoryAttributeInMtrrSettings and MtrrSetMemoryAttribute)
may fail, but batch-set API may succeed.
Add comments to recommend caller to use batch-set API when setting
multiple ranges.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Ming Shao <ming.shao@intel.com>
Ruiyu Ni [Mon, 22 Jan 2018 09:16:33 +0000 (17:16 +0800)]
UefiCpuPkg/PeiMpLib: Fix a system hang-in-pei issue.
GetWakeupBuffer() tries to find a below-1M free memory, it checks
whether the memory is allocated already in
CheckOverlapWithAllocatedBuffer(). When there is a memory allocation
hob (base = 0xff_00000000, size = 0x10000000),
CheckOverlapWithAllocateBuffer() truncates the base to 0 which causes
it always returns TRUE so GetWakeupBuffer() fails to find a below-1MB
memory.
The patch fixes this issue by using UINT64 type.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Liming Gao [Thu, 11 Jan 2018 08:21:29 +0000 (16:21 +0800)]
Edk2: Retire Edk2Setup.bat
Edk2Setup.bat is out of maintain. It is a draft version batch file, and not
implement all features listed in its header file. To avoid the confuse,
drop it from edk2 project, and keep edksetup.bat only.
Ironically, disabling warnings in the OpensslLib library build is
causing breakage when using the CLANG35 toolchain to build for ARM:
error: unknown warning option '-Werror=maybe-uninitialized'; did you mean '-Werror=uninitialized'? [-Werror,-Wunknown-warning-option]
So let's add -Wno-unknown-warning-option to the list of warnings to
ignore when using Clang 3.5, and move the same option from the x86
specific list to the shared list for Clang 3.8.
Long Qin [Mon, 22 Jan 2018 06:27:53 +0000 (14:27 +0800)]
CryptoPkg/BaseCryptLib: Add error handling for time() wrapper
In time() wrapper implementation, the gRT->GetTime() call may be not
available. This patch adds the extra error handling to avoid the
potential dead loop.
Cc: Star Zeng <star.zeng@intel.com> Cc: Ting Ye <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qin Long <qin.long@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Ruiyu Ni [Fri, 19 Jan 2018 07:04:24 +0000 (15:04 +0800)]
MdeModulePkg/UsbStorage: Fix "map -r" cannot detect media change
When system boots to Shell without CDROM in the USB CDROM drive,
and then user inserts one CDROM with Eltorito file system,
"map -r" cannot show the the new Eltorito file system.
The root cause is when "map" command probes the media change
by calling dummy ReadBlockIo(), UsbMassStorage ReadBlockIo()
contains a bug that ignores the media change status:
UsbBootDetectMedia() ignores the EFI_MEDIA_CHANGED status
returned from UsbBootIsUnitReady(), in consequence, the
BlockIo protocol re-installation logic doesn't run.
By checking the code change history, below commit
SHA-1: 19bc85276559ae01996fa0918ec3f6495e7aaa69
* remove unnecessary retry logic from usb mass storage driver.
adds the code to skip EFI_MEDIA_CHANGED status.
Talking with the original committer Tian Feng, he said the
change was just a code cleanup, not for a special bug fix.
So I revert part of the patch, only keep the change that
removes unnecessary retry logic. It can fix this bug.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
BaseTools: Optimizing DscDefaultValue process in BuildReport
DscDefaultValue from Dsc file has been parsed by ValueExpressionEx
when Dsc file parse, so only DscDefaultValue from FDF file need
ValueExpressionEx parse
Issue decription:
step 1, build platform X64
step 2, build platform IA32
step 3, build platform X64
step 4, check all ffs files for X64, the content still has IA32 in it
Jian J Wang [Thu, 18 Jan 2018 07:29:01 +0000 (15:29 +0800)]
UefiCpuPkg/CpuDxe: fix bad boot performance
If features like memory profile, protection and heap guard are enabled,
a lot of more memory page attributes update actions will happen than
usual. An unnecessary sync of CR0.WP setting among APs will then cause
worse performance in memory allocation action. Removing the calling of
SyncMemoryPageAttributesAp() in function DisableReadOnlyPageWriteProtect
and EnableReadOnlyPageWriteProtect can fix this problem. In DEBUG build
case, the boot performance can be boosted from 11 minute to 6 minute.
Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Jian J Wang [Wed, 17 Jan 2018 10:36:55 +0000 (18:36 +0800)]
MdeModulePkg/Core: fix a logic hole in page free
This hole will cause page fault randomly. The root cause is that Guard
page, which is just freed back to page pool but not yet cleared not-
present attribute, will be allocated right away by internal function
CoreFreeMemoryMapStack(). The solution to this issue is to clear the
not-present attribute for freed Guard page before doing any free
operation, instead of after those operation.
The reason we didn't do this before is due to the fact that manipulating
page attributes might cause memory allocation action which would cause a
dead lock inside a memory allocation/free operation. So we always set or
unset Guard page outside the memory lock. After a thorough analysis, we
believe clearing a Guard page will not cause memory allocation because
memory we're to manipulate was already manipulated before for sure.
Therefore there should be no memory allocation occurring in this
situation.
Since we cleared Guard page not-present attribute before freeing instead
of after freeing, the debug code to clear freed memory can now be restored
to its original way (aka no checking and bypassing Guard page).
Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Jian J Wang [Mon, 15 Jan 2018 02:25:40 +0000 (10:25 +0800)]
MdeModulePkg/BootScriptExecutorDxe: remove NX attr for FfsBuffer
If PcdDxeNxMemoryProtectionPolicy is set to enable protection for memory
of EfiReservedMemoryType, the BIOS will hang at a page fault exception
triggered by BootScriptExecutorDxe.
The root cause is that this driver will allocate memory of
EfiReservedMemoryType and relocate itself into this new memory. Since
EfiReservedMemoryType of memory is marked non-executable, re-start this
driver after relocation will cause exception. The fix is removing the NX
attribute after memory allocation.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Jian J Wang [Mon, 15 Jan 2018 02:21:08 +0000 (10:21 +0800)]
MdeModulePkg/PiSmmCore: remove NX attr for SMM RAM
If PcdDxeNxMemoryProtectionPolicy is set to enable protection for memory
of EfiReservedMemoryType, the BIOS will hang at a page fault exception
during starting SMM driver.
The root cause is that SMM RAM is type of EfiReservedMemoryType and
marked as non-executable. The fix is simply removing NX attribute for
those memory.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Jian J Wang [Mon, 15 Jan 2018 02:16:26 +0000 (10:16 +0800)]
UefiCpuPkg/PiSmmCpuDxeSmm: Enable NXE if it's supported
If PcdDxeNxMemoryProtectionPolicy is set to enable protection for memory
of EfiBootServicesCode, EfiConventionalMemory, the BIOS will hang at a page
fault exception triggered by PiSmmCpuDxeSmm.
The root cause is that PiSmmCpuDxeSmm will access default SMM RAM starting
at 0x30000 which is marked as non-executable, but NX feature was not
enabled during SMM initialization. Accessing memory which has invalid
attributes set will cause page fault exception. This patch fixes it by
checking NX capability in cpuid and enable NXE in EFER MSR if it's
available.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Jian J Wang [Mon, 15 Jan 2018 02:00:39 +0000 (10:00 +0800)]
UefiCpuPkg/CpuDxe: clear NX attr for page directory
If PcdDxeNxMemoryProtectionPolicy is set to enable protection for memory
of EfiBootServicesCode, EfiConventionalMemory and EfiReservedMemoryType,
the BIOS will hang at a page fault exception randomly.
The root cause is that the memory allocation for driver images (actually
a memory type conversion from free memory, type of EfiConventionalMemory,
to code memory, type of EfiBootServicesCode/EfiRuntimeServicesCode)
will get memory with NX set, because the CpuDxe driver will keep the NX
attribute (with free memory) in page directory during page table splitting
and then override the NX attribute of all its entries.
This patch fixes this issue by not inheriting NX attribute when turning
a page entry into a page directory during page granularity split.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Jian J Wang [Mon, 15 Jan 2018 01:45:59 +0000 (09:45 +0800)]
UefiCpuPkg/CpuExceptionHandlerLib: alloc code memory for exception handlers
If PcdDxeNxMemoryProtectionPolicy is set to enable protection for memory
of EfiBootServicesData, EfiConventionalMemory, the BIOS will reset after
timer initialized and started.
The root cause is that the memory used to hold the exception and interrupt
handler is allocated with type of EfiBootServicesData and marked as
non-executable due to NX feature enabled. This patch fixes it by allocating
EfiBootServicesCode type of memory for those handlers instead.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Jian J Wang [Fri, 29 Dec 2017 01:12:54 +0000 (09:12 +0800)]
UefiCpuPkg/MpInitLib: split wake up buffer into two parts
If PcdDxeNxMemoryProtectionPolicy is set to enable protection for memory
of EfiBootServicesCode, EfiConventionalMemory, the BIOS will hang at a page
fault exception during MP initialization.
The root cause is that the AP wake up buffer, which is below 1MB and used
to hold both AP init code and data, is type of EfiConventionalMemory (not
really allocated because of potential conflict with legacy code), and is
marked as non-executable. During the transition from real address mode
to long mode, the AP init code has to enable paging which will then cause
itself a page fault exception because it's just running in non-executable
memory.
The solution is splitting AP wake up buffer into two part: lower part is
still below 1MB and shared with legacy system, higher part is really
allocated memory of BootServicesCode type. The init code in the memory
below 1MB will not enable paging but just switch to protected mode and
jump to higher memory, in which the init code will enable paging and
switch to long mode.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Jian J Wang [Tue, 16 Jan 2018 02:45:56 +0000 (10:45 +0800)]
UefiCpuPkg/CpuDxe: fix SetMemoryAttributes issue in 32-bit mode
In 32-bit mode, the BIOS will not create page table for memory beyond
4GB and therefore it cannot handle the attributes change request for
those memory. But current CpuDxe doesn't check this situation and still
try to complete the request, which will cause attributes of incorrect
memory address to be changed due to type cast from 64-bit to 32-bit.
This patch fixes this issue by checking the end address of input
memory block and returning EFI_UNSUPPORTED if it's out of range.
Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
We also got maybe-uninitialized warning when building OpensslLib.inf
with GCC48 for ARM and AARCH64, so add -Wno-error=maybe-uninitialized
build option just as other platforms.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Cc: Qin Long <qin.long@intel.com> Cc: Ting Ye <ting.ye@intel.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Qin Long <qin.long@intel.com>
Long Qin [Tue, 16 Jan 2018 07:03:05 +0000 (15:03 +0800)]
CryptoPkg: Adding OpenSSL as one submodule of EDKII repo
A submodule allows to keep another Git repository in a subdirectory
of main repository. The submodule repository has its own history, which
does not interfere with the history of the current repository. This can
be used to have external dependencies such as third party libraries.
After the extra patch for EDKII-OpenSSL build was removed, OpenSSL can
be one typical submodule use case in EDKII project. This patch adds the
openssl git repository into EDKII project as one submodule.
One .gitmodules file will be generated with the submodule info:
[submodule "CryptoPkg/Library/OpensslLib/openssl"]
path = CryptoPkg/Library/OpensslLib/openssl
url = https://github.com/openssl/openssl
The user can use the following command to clone both main EDKII repo and
openssl submodule:
1) Add the "--recursive" flag to their git clone command:
$ git clone --recursive https://github.com/tianocore/edk2
or 2) Manually initialize and the submodules after the clone operation:
$ git clone https://github.com/tianocore/edk2
$ git submodule update -–init -–recursive
For Pull operations, "git pull" will not update the submodule repository.
So the following combined commands can be used to pull the remote submodule
updates (e.g. Updating to new supported OpenSSL release)
$ git pull –-recurse-submodules && \
git submodule update -–recursive --remote
Ruiyu Ni [Wed, 17 Jan 2018 05:52:06 +0000 (13:52 +0800)]
UefiCpuPkg/MpInitLib: Fix timer interrupt is disabled after SwitchBSP
Commits a2ea6894e6ca95e8d7a254593661a79e4b988626
* UefiCpuPkg/MpInitLib: Fix a bug that AP enters timer INT handler
masked the interrupts in AP.
But it didn't unmask the interrupt in new BSP when Switch BSP
happens.
The patch fixed this issue.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> Cc: Eric Dong <eric.dong@intel.com>
Star Zeng [Tue, 16 Jan 2018 10:48:52 +0000 (18:48 +0800)]
IntelSiliconPkg IntelVTdPmrPei: Use HostAddressWidth in DMAR correctly
According to VTd spec, HostAddressWidth + 1 should be used as the real
host address width value.
Host Address Width:
This field indicates the maximum DMA physical
addressability supported by this platform. The
system address map reported by the BIOS
indicates what portions of this addresses are
populated.
The Host Address Width (HAW) of the platform is
computed as (N+1), where N is the value
reported in this field. For example, for a platform
supporting 40 bits of physical addressability, the
value of 100111b is reported in this field.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Wang Fan [Tue, 16 Jan 2018 07:57:04 +0000 (15:57 +0800)]
MdeModulePkg/DxeIpIoLib: Fixed the error ASSERT incorrectly used in IpIoAddIp().
* In DxeIpIo, an ASSERT check is incorrectly used in IpIoAddIp(), which result
debug image hang when this API is called, this patch is to fix this issue.
Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wang Fan <fan.wang@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Liming Gao [Wed, 10 Jan 2018 15:24:32 +0000 (23:24 +0800)]
OvmfPkg: Don't add -mno-mmx -mno-sse option for XCODE5 tool chain
Ovmf appended option -mno-mmx -mno-sse, but these two options were enabled
in Openssl. The compiler option becomes -mmmx ?msse -mno-mmx -mno-sse. It
trig mac clang compiler hang when compile one source file in openssl.
This issue is found when SECURE_BOOT_ENABLE is TRUE. This may be the compiler
issue. To work around it, don't add these two options for XCODE5 tool chain.
In V2, use "mov rax, strict qword 0" to replace the hard code db.
1. Use lea instruction to get the address instead of mov instruction.
2. Use the dummy address as jmp destination, and add the logic to fix up
the address to the absolute address at boot time.
3. On MpFuncs.nasm, use ExchangeInfo to record InitializeFloatingPointUnits.
This way is same to MpInitLib.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>